From 78acd1f5a21ee673591b2f86bd8bc8a9c36760a5 Mon Sep 17 00:00:00 2001 From: SahilSonar Date: Tue, 5 Dec 2023 20:50:09 +0100 Subject: [PATCH] usb20: Checkout to 11 - The USB driver bringup on S kernel is incomplete. Reverting the driver back to 11 to fixup OTG. Change-Id: I3530f44b4f9087bd6c453790a7821138c87bb500 --- arch/arm64/boot/dts/mediatek/mt6765.dts | 35 +- drivers/misc/mediatek/usb20/Kconfig | 14 - drivers/misc/mediatek/usb20/Makefile | 56 +- drivers/misc/mediatek/usb20/mt6765/Makefile | 11 +- drivers/misc/mediatek/usb20/mt6765/usb20.c | 853 +-- drivers/misc/mediatek/usb20/mt6765/usb20.h | 50 +- .../misc/mediatek/usb20/mt6765/usb20_host.c | 336 +- .../misc/mediatek/usb20/mt6765/usb20_phy.c | 11 +- drivers/misc/mediatek/usb20/mt6768/Makefile | 36 - .../mediatek/usb20/mt6768/mtk-phy-a60810.h | 3125 --------- drivers/misc/mediatek/usb20/mt6768/otg.c | 136 - drivers/misc/mediatek/usb20/mt6768/usb20.c | 2198 ------ drivers/misc/mediatek/usb20/mt6768/usb20.h | 139 - .../misc/mediatek/usb20/mt6768/usb20_host.c | 762 --- .../misc/mediatek/usb20/mt6768/usb20_otg_if.c | 1497 ----- .../misc/mediatek/usb20/mt6768/usb20_phy.c | 848 --- .../mediatek/usb20/mt6768/usb20_phy_debugfs.c | 725 -- drivers/misc/mediatek/usb20/mt6781/Makefile | 36 - .../mediatek/usb20/mt6781/mtk-phy-a60810.h | 3126 --------- drivers/misc/mediatek/usb20/mt6781/otg.c | 137 - .../misc/mediatek/usb20/mt6781/phy-mtk-fpga.h | 5983 ----------------- drivers/misc/mediatek/usb20/mt6781/usb20.c | 2278 ------- drivers/misc/mediatek/usb20/mt6781/usb20.h | 146 - .../misc/mediatek/usb20/mt6781/usb20_host.c | 777 --- .../misc/mediatek/usb20/mt6781/usb20_otg_if.c | 1498 ----- .../misc/mediatek/usb20/mt6781/usb20_phy.c | 824 --- .../mediatek/usb20/mt6781/usb20_phy_debugfs.c | 918 --- drivers/misc/mediatek/usb20/mt6833/Makefile | 36 - .../mediatek/usb20/mt6833/mtk-phy-a60810.h | 3125 --------- drivers/misc/mediatek/usb20/mt6833/otg.c | 136 - drivers/misc/mediatek/usb20/mt6833/usb20.c | 2114 ------ drivers/misc/mediatek/usb20/mt6833/usb20.h | 152 - .../misc/mediatek/usb20/mt6833/usb20_host.c | 779 --- .../misc/mediatek/usb20/mt6833/usb20_otg_if.c | 1497 ----- .../misc/mediatek/usb20/mt6833/usb20_phy.c | 905 --- .../mediatek/usb20/mt6833/usb20_phy_debugfs.c | 725 -- drivers/misc/mediatek/usb20/mtk_musb.h | 58 +- drivers/misc/mediatek/usb20/mtk_musb_reg.h | 5 - drivers/misc/mediatek/usb20/mtk_qmu.c | 54 +- drivers/misc/mediatek/usb20/mtk_qmu.h | 4 +- drivers/misc/mediatek/usb20/musb.h | 89 +- drivers/misc/mediatek/usb20/musb_core.c | 171 +- drivers/misc/mediatek/usb20/musb_core.h | 46 +- drivers/misc/mediatek/usb20/musb_debug.h | 5 +- drivers/misc/mediatek/usb20/musb_debugfs.c | 253 +- drivers/misc/mediatek/usb20/musb_dr.c | 482 -- drivers/misc/mediatek/usb20/musb_dr.h | 101 - drivers/misc/mediatek/usb20/musb_gadget.c | 335 +- drivers/misc/mediatek/usb20/musb_gadget_ep0.c | 3 +- drivers/misc/mediatek/usb20/musb_host.c | 18 +- drivers/misc/mediatek/usb20/musb_host.h | 1 - drivers/misc/mediatek/usb20/musb_io.h | 3 +- drivers/misc/mediatek/usb20/musb_qmu.c | 22 +- drivers/misc/mediatek/usb20/musb_virthub.c | 43 +- 54 files changed, 934 insertions(+), 36783 deletions(-) delete mode 100644 drivers/misc/mediatek/usb20/mt6768/Makefile delete mode 100644 drivers/misc/mediatek/usb20/mt6768/mtk-phy-a60810.h delete mode 100644 drivers/misc/mediatek/usb20/mt6768/otg.c delete mode 100644 drivers/misc/mediatek/usb20/mt6768/usb20.c delete mode 100644 drivers/misc/mediatek/usb20/mt6768/usb20.h delete mode 100644 drivers/misc/mediatek/usb20/mt6768/usb20_host.c delete mode 100644 drivers/misc/mediatek/usb20/mt6768/usb20_otg_if.c delete mode 100644 drivers/misc/mediatek/usb20/mt6768/usb20_phy.c delete mode 100644 drivers/misc/mediatek/usb20/mt6768/usb20_phy_debugfs.c delete mode 100644 drivers/misc/mediatek/usb20/mt6781/Makefile delete mode 100644 drivers/misc/mediatek/usb20/mt6781/mtk-phy-a60810.h delete mode 100644 drivers/misc/mediatek/usb20/mt6781/otg.c delete mode 100644 drivers/misc/mediatek/usb20/mt6781/phy-mtk-fpga.h delete mode 100644 drivers/misc/mediatek/usb20/mt6781/usb20.c delete mode 100644 drivers/misc/mediatek/usb20/mt6781/usb20.h delete mode 100644 drivers/misc/mediatek/usb20/mt6781/usb20_host.c delete mode 100644 drivers/misc/mediatek/usb20/mt6781/usb20_otg_if.c delete mode 100644 drivers/misc/mediatek/usb20/mt6781/usb20_phy.c delete mode 100644 drivers/misc/mediatek/usb20/mt6781/usb20_phy_debugfs.c delete mode 100644 drivers/misc/mediatek/usb20/mt6833/Makefile delete mode 100644 drivers/misc/mediatek/usb20/mt6833/mtk-phy-a60810.h delete mode 100644 drivers/misc/mediatek/usb20/mt6833/otg.c delete mode 100644 drivers/misc/mediatek/usb20/mt6833/usb20.c delete mode 100644 drivers/misc/mediatek/usb20/mt6833/usb20.h delete mode 100644 drivers/misc/mediatek/usb20/mt6833/usb20_host.c delete mode 100644 drivers/misc/mediatek/usb20/mt6833/usb20_otg_if.c delete mode 100644 drivers/misc/mediatek/usb20/mt6833/usb20_phy.c delete mode 100644 drivers/misc/mediatek/usb20/mt6833/usb20_phy_debugfs.c delete mode 100644 drivers/misc/mediatek/usb20/musb_dr.c delete mode 100644 drivers/misc/mediatek/usb20/musb_dr.h diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dts b/arch/arm64/boot/dts/mediatek/mt6765.dts index 410fcc0aeff1..4d0169cb41f6 100644 --- a/arch/arm64/boot/dts/mediatek/mt6765.dts +++ b/arch/arm64/boot/dts/mediatek/mt6765.dts @@ -2490,30 +2490,12 @@ firmware_class.path=/vendor/firmware"; clock-names = "usb0", "usb0_clk_top_sel", "usb0_clk_univpll3_d4"; - pericfg= <&pericfg>; - interrupt-names = "mc"; - phys = <&u2port0 PHY_TYPE_USB2>; - dr_mode = "otg"; - usb-role-switch; + charger = <&mtk_charger_type>; }; - u2phy0: usb-phy@11210000 { - compatible = "mediatek,generic-tphy-v1"; - reg = <0 0x11cc0000 0 0x0800>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "okay"; - u2port0: usb-phy@11210000 { - reg = <0 0x11cc0800 0 0x100>; - clocks = <&clk26m>; - clock-names = "ref"; - #phy-cells = <1>; - nvmem-cells = <&u2_phy_data>; - nvmem-cell-names = "intr_cal"; - nvmem-cell-masks = <0x1f>; - status = "okay"; - }; + usb_sif@11210000 { + compatible = "mediatek,usb_sif"; + reg = <0 0x11210000 0 0x10000>; }; msdc0:msdc@11230000 { @@ -3562,15 +3544,6 @@ firmware_class.path=/vendor/firmware"; adapter_name = "pd_adapter"; }; - extcon_usb: extcon_usb { - compatible = "mediatek,extcon-usb"; - charger = <&mtk_charger_type>; - vbus-voltage = <5000000>; - vbus-current = <1800000>; - dev-conn = <&usb>; - mediatek,bypss-typec-sink = <1>; - }; - rt9465_slave_chr: rt9465_slave_chr { compatible = "richtek,rt9465"; status = "disabled"; diff --git a/drivers/misc/mediatek/usb20/Kconfig b/drivers/misc/mediatek/usb20/Kconfig index 51f03ad864a3..d52630ab918d 100644 --- a/drivers/misc/mediatek/usb20/Kconfig +++ b/drivers/misc/mediatek/usb20/Kconfig @@ -80,17 +80,3 @@ config MTK_MUSB_PORT0_LOWPOWER_MODE Dynamic control the usb port0 clock when PORT1 not exist. Say Y here if your want to enable port0 low power mode for saving power. -config MTK_MUSB_DUAL_ROLE - bool "Mediatek MUSB Dual Role mode support" - select USB_ROLE_SWITCH - help - This is the default mode of working of MTK MUSB controller - where both host and gadget - features are enabled. - It is better to be be used with Mediatek extcon and tphy support. - Say Y here if your want to use usb role switch. - -config MTK_MUSB_PHY - tristate "MediaTek USB20 PHY support" - help - MediaTek USB20 PHY support. diff --git a/drivers/misc/mediatek/usb20/Makefile b/drivers/misc/mediatek/usb20/Makefile index e062e06c37a0..2c3ab4ae3642 100644 --- a/drivers/misc/mediatek/usb20/Makefile +++ b/drivers/misc/mediatek/usb20/Makefile @@ -19,52 +19,23 @@ ifeq ($(MTK_ALPS_BOX_SUPPORT),yes) ccflags-y += -DMTK_ALPS_BOX_SUPPORT endif -usb20plat := $(subst ",,$(CONFIG_MTK_PLATFORM)) - -ifeq ($(CONFIG_MACH_MT6781),y) -usb20plat := mt6781 -endif -ifeq ($(CONFIG_MACH_MT6761),y) -usb20plat := mt6765 -endif -ifeq ($(CONFIG_MACH_MT6833),y) -usb20plat := mt6833 -endif - ccflags-y += -I$(srctree)/drivers/misc/mediatek/include/mt-plat -# for SPM control usage -ccflags-y += -I$(srctree)/drivers/misc/mediatek/base/power/include - -# for phy and vbus settings -ccflags-y += -I$(srctree)/drivers/misc/mediatek/usb20/$(usb20plat) - -ifeq ($(CONFIG_TCPC_CLASS),y) - ccflags-y += -I$(srctree)/drivers/misc/mediatek/typec/tcpc/inc -endif - -#for 6739 -ccflags-y += -I$(srctree)/drivers/usb/core/ - -# Driver -obj-$(CONFIG_USB_MTK_HDRC) := musb_hdrc.o -musb_hdrc-$(CONFIG_USB_MTK_HDRC) += musb_core.o -musb_hdrc-$(CONFIG_USB_MTK_HDRC) += musb_virthub.o musb_host.o -musb_hdrc-$(CONFIG_USB_MTK_HDRC) += musb_gadget_ep0.o musb_gadget.o -musb_hdrc-$(CONFIG_PROC_FS) += musb_debugfs.o -musb_hdrc-$(CONFIG_MTK_MUSB_DUAL_ROLE) += musb_dr.o - -# obj-$(CONFIG_MTK_MUSB_PLAT) += mtk_musb.o -obj-$(CONFIG_USB_MTK_HDRC) += musbhsdma.o - #Platform -obj-y += $(usb20plat)/ -obj-$(CONFIG_USB_MTK_HDRC) += $(usb20plat)/usb20.o -obj-$(CONFIG_USB_MTK_HDRC) += $(usb20plat)/usb20_host.o -obj-$(CONFIG_USBIF_COMPLIANCE) += $(usb20plat)/usb20_otg_if.o +obj-$(CONFIG_MACH_MT6765) += $(subst ",,$(CONFIG_MTK_PLATFORM))/ +obj-$(CONFIG_MACH_MT6761) += mt6765/ +obj-$(CONFIG_MACH_MT8163) += $(subst ",,$(CONFIG_MTK_PLATFORM))/ + +#Driver +obj-$(CONFIG_USB_MTK_HDRC) += musb_hdrc.o +musb_hdrc-$(CONFIG_USB_MTK_HDRC) := musb_core.o +musb_hdrc-$(CONFIG_USB_MTK_HDRC) += musb_gadget_ep0.o musb_gadget.o +musb_hdrc-$(CONFIG_USB_MTK_HDRC) += musb_virthub.o musb_host.o +musb_hdrc-$(CONFIG_USB_MTK_HDRC) += musbhsdma.o +musb_hdrc-$(CONFIG_DEBUG_FS) += musb_debugfs.o # QMU Realted -musb_hdrc-$(CONFIG_MTK_MUSB_QMU_SUPPORT)+= mtk_qmu.o musb_qmu.o +obj-$(CONFIG_MTK_MUSB_QMU_SUPPORT) += mtk_qmu.o musb_qmu.o ifeq ($(CONFIG_MTK_MUSB_QMU_SUPPORT),y) subdir-ccflags-$(CONFIG_MACH_MT8163) += -DMUSB_QMU_LIMIT_SUPPORT -DMUSB_QMU_LIMIT_RXQ_NUM=4 -DMUSB_QMU_LIMIT_TXQ_NUM=4 endif @@ -72,5 +43,4 @@ ifeq ($(CONFIG_MTK_MUSB_QMU_SUPPORT),y) subdir-ccflags-$(CONFIG_MACH_MT8167) += -DMUSB_QMU_LIMIT_SUPPORT -DMUSB_QMU_LIMIT_RXQ_NUM=4 -DMUSB_QMU_LIMIT_TXQ_NUM=4 endif -subdir-ccflags-$(CONFIG_MACH_MT6781) += -DUSB2_PHY_V2 -subdir-ccflags-$(CONFIG_MACH_MT6833) += -DUSB2_PHY_V2 +obj-$(CONFIG_DUAL_ROLE_USB_INTF) += mtk_dual_role.o \ No newline at end of file diff --git a/drivers/misc/mediatek/usb20/mt6765/Makefile b/drivers/misc/mediatek/usb20/mt6765/Makefile index 54b0aaa7e68f..aef66d50fab4 100644 --- a/drivers/misc/mediatek/usb20/mt6765/Makefile +++ b/drivers/misc/mediatek/usb20/mt6765/Makefile @@ -14,7 +14,7 @@ # # for USB OTG silicon based on Mentor Graphics INVENTRA designs # -ccflags-y += -I$(srctree)/drivers/misc/mediatek/usb20 +ccflags-$(CONFIG_USB_MTK_HDRC) += -I$(srctree)/drivers/misc/mediatek/usb20 # for battery related ccflags-y += -I$(srctree)/drivers/misc/mediatek/include/mt-plat @@ -29,9 +29,8 @@ ifeq ($(CONFIG_TCPC_CLASS),y) endif # for ep0 test ccflags-y += -I$(srctree)/drivers/usb/core/ -ccflags-y += -I$(srctree)/drivers/misc/mediatek/usb20 -# Phy -obj-$(CONFIG_MTK_MUSB_PHY) += mtk_usb20_phy.o -mtk_usb20_phy-y += usb20_phy.o -mtk_usb20_phy-$(CONFIG_DEBUG_FS) += usb20_phy_debugfs.o +obj-$(CONFIG_USB_MTK_HDRC) := usb20.o usb20_phy.o +obj-$(CONFIG_USB_MTK_HDRC) += usb20_host.o +obj-$(CONFIG_USBIF_COMPLIANCE) += usb20_otg_if.o +obj-$(CONFIG_DEBUG_FS) += usb20_phy_debugfs.o diff --git a/drivers/misc/mediatek/usb20/mt6765/usb20.c b/drivers/misc/mediatek/usb20/mt6765/usb20.c index f7ec2068d2f4..c0a5772aef45 100644 --- a/drivers/misc/mediatek/usb20/mt6765/usb20.c +++ b/drivers/misc/mediatek/usb20/mt6765/usb20.c @@ -9,61 +9,13 @@ #include #include #include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -#include - -MODULE_LICENSE("GPL v2"); - -struct musb *mtk_musb; -EXPORT_SYMBOL(mtk_musb); - -bool mtk_usb_power; -EXPORT_SYMBOL(mtk_usb_power); - -int musb_force_on; -EXPORT_SYMBOL(musb_force_on); - -static void (*usb_hal_dpidle_request_fptr)(int); -void usb_hal_dpidle_request(int mode) -{ - if (usb_hal_dpidle_request_fptr) - usb_hal_dpidle_request_fptr(mode); -} -EXPORT_SYMBOL(usb_hal_dpidle_request); -void register_usb_hal_dpidle_request(void (*function)(int)) -{ - usb_hal_dpidle_request_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_dpidle_request); - -void (*usb_hal_disconnect_check_fptr)(void); -void usb_hal_disconnect_check(void) -{ - if (usb_hal_disconnect_check_fptr) - usb_hal_disconnect_check_fptr(); -} -EXPORT_SYMBOL(usb_hal_disconnect_check); +#include "musb_core.h" +#include "mtk_musb.h" +#include "musbhsdma.h" +#include "usb20.h" -void register_usb_hal_disconnect_check(void (*function)(void)) -{ - usb_hal_disconnect_check_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_disconnect_check); +#include #ifdef FPGA_PLATFORM #include @@ -120,9 +72,6 @@ static void issue_dpidle_timer(void) static void usb_6765_dpidle_request(int mode) { unsigned long flags; -#ifdef CONFIG_MACH_MT6761 - int ret; -#endif spin_lock_irqsave(&usb_hal_dpidle_lock, flags); @@ -158,32 +107,6 @@ static void usb_6765_dpidle_request(int mode) DBG(0, "USB_DPIDLE_TIMER\n"); issue_dpidle_timer(); break; - case USB_DPIDLE_SUSPEND: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, - SPM_RESOURCE_MAINPLL | SPM_RESOURCE_CK_26M | - SPM_RESOURCE_AXI_BUS); -#ifdef CONFIG_MACH_MT6761 - /* workaround: keep clock on for wakeup function */ - ret = clk_prepare_enable(glue->musb_clk_top_sel); - if (ret) - DBG(0, "%s: clk_prepare_enable: musb_clk_top_sel failed: %d\n", - __func__, ret); - ret = clk_prepare_enable(glue->musb_clk); - if (ret) - DBG(0, "%s: clk_prepare_enable: musb_clk failed: %d\n", __func__, ret); -#endif - DBG(0, "DPIDLE_SUSPEND\n"); - break; - case USB_DPIDLE_RESUME: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, - SPM_RESOURCE_RELEASE); -#ifdef CONFIG_MACH_MT6761 - /* workaround: keep clock on for wakeup function */ - clk_disable_unprepare(glue->musb_clk_top_sel); - clk_disable_unprepare(glue->musb_clk); -#endif - DBG(0, "DPIDLE_RESUME\n"); - break; default: DBG(0, "[ERROR] Are you kidding!?!?\n"); break; @@ -193,255 +116,60 @@ static void usb_6765_dpidle_request(int mode) } #endif -/* default value 0 */ -static int usb_rdy; -bool is_usb_rdy(void) -{ - if (mtk_musb->is_ready) { - usb_rdy = 1; - DBG(0, "set usb_rdy, wake up bat\n"); - } - - if (usb_rdy) - return true; - else - return false; -} -EXPORT_SYMBOL(is_usb_rdy); - -/* BC1.2 */ -/* Duplicate define in phy-mtk-tphy */ -#define PHY_MODE_BC11_SW_SET 1 -#define PHY_MODE_BC11_SW_CLR 2 - -void Charger_Detect_Init(void) -{ - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_SET); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Init); - -void Charger_Detect_Release(void) -{ - usb_prepare_enable_clock(true); - - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_CLR); - - udelay(1); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Release); - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool in_uart_mode; -bool usb_phy_check_in_uart_mode(void) -{ - int mode; - - usb_enable_clock(true); - udelay(50); - - /* get phy mode */ - mode = phy_get_mode_ext(glue->phy); - - /* usb_port_mode = USBPHY_READ32(0x68); */ - usb_enable_clock(false); - - if (mode == PHY_MODE_UART) { - DBG(0, "%s:%d - IN UART MODE : 0x%x\n", - __func__, __LINE__, mode); - mode = true; - } else { - DBG(0, "%s:%d - NOT IN UART MODE : 0x%x\n", - __func__, __LINE__, mode); - mode = false; - } - return mode; -} - -void usb_phy_switch_to_uart(void) -{ - unsigned int val = 0; - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - DBG(0, "Already in UART mode.\n"); - return; - } - - udelay(50); - - /* set PHY UART mode */ - phy_set_mode(glue->phy, PHY_MODE_UART); - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - val = readl(ap_gpio_base); - writel(val | (GPIO_SEL_UART0), ap_gpio_base); - - in_uart_mode = true; -} - -void usb_phy_switch_to_usb(void) -{ - unsigned int val = 0; - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - /* set UART mode to USB */ - phy_set_mode(glue->phy, PHY_MODE_USB_OTG); - - in_uart_mode = false; - - phy_power_on(glue->phy); -} - -void usb_phy_context_save(void) -{ - in_uart_mode = usb_phy_check_in_uart_mode(); -} -EXPORT_SYMBOL(usb_phy_context_save); - -void usb_phy_context_restore(void) -{ - if (in_uart_mode) - usb_phy_switch_to_uart(); -} -EXPORT_SYMBOL(usb_phy_context_restore); -#endif - -#ifdef CONFIG_USB_MTK_OTG -static struct regmap *pericfg; - -static void mt_usb_wakeup(struct musb *musb, bool enable) -{ - u32 tmp; - bool is_con = musb->port1_status & USB_PORT_STAT_CONNECTION; - - if (IS_ERR_OR_NULL(pericfg)) { - DBG(0, "init fail"); - return; - } - - DBG(0, "connection=%d\n", is_con); - - if (enable) { - regmap_read(pericfg, USB_WAKEUP_DEC_CON1, &tmp); - tmp |= USB1_CDDEBOUNCE(0x8) | USB1_CDEN; - regmap_write(pericfg, USB_WAKEUP_DEC_CON1, tmp); - - tmp = musb_readw(musb->mregs, RESREG); - if (is_con) - tmp &= ~HSTPWRDWN_OPT; - else - tmp |= HSTPWRDWN_OPT; - musb_writew(musb->mregs, RESREG, tmp); - } else { - regmap_read(pericfg, USB_WAKEUP_DEC_CON1, &tmp); - tmp &= ~(USB1_CDEN | USB1_CDDEBOUNCE(0xf)); - regmap_write(pericfg, USB_WAKEUP_DEC_CON1, tmp); - - tmp = musb_readw(musb->mregs, RESREG); - tmp &= ~HSTPWRDWN_OPT; - musb_writew(musb->mregs, RESREG, tmp); - if (is_con && !musb->is_active) { - DBG(0, "resume with device connected\n"); - musb->is_active = 1; - } - } -} - -static int mt_usb_wakeup_init(struct musb *musb) -{ - struct device_node *node; - -#ifdef CONFIG_MACH_MT6761 - node = of_find_compatible_node(NULL, NULL, - "mediatek,mt6761-usb20"); -#else - - node = of_find_compatible_node(NULL, NULL, - "mediatek,mt6765-usb20"); -#endif - if (!node) { - DBG(0, "map node failed\n"); - return -ENODEV; - } - - pericfg = syscon_regmap_lookup_by_phandle(node, - "pericfg"); - if (IS_ERR(pericfg)) { - DBG(0, "fail to get pericfg regs\n"); - return PTR_ERR(pericfg); - } - - return 0; -} -#endif - static u32 cable_mode = CABLE_MODE_NORMAL; #ifndef FPGA_PLATFORM +struct clk *musb_clk; +struct clk *musb_clk_top_sel; +struct clk *musb_clk_univpll3_d4; static struct regulator *reg_vusb; static struct regulator *reg_va12; #endif +void __iomem *usb_phy_base; + #ifdef CONFIG_MTK_UART_USB_SWITCH static u32 port_mode = PORT_MODE_USB; #define AP_GPIO_COMPATIBLE_NAME "mediatek,gpio" void __iomem *ap_gpio_base; #endif -/* EP Fifo Config */ +/*EP Fifo Config*/ static struct musb_fifo_cfg fifo_cfg[] __initdata = { - {.hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, - {.hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, + {.hw_ep_num = 1, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 1, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 2, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 2, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 3, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 3, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 4, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 4, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 5, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_INT, .mode = MUSB_BUF_SINGLE}, + {.hw_ep_num = 5, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_INT, .mode = MUSB_BUF_SINGLE}, + {.hw_ep_num = 6, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_INT, .mode = MUSB_BUF_SINGLE}, + {.hw_ep_num = 6, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_INT, .mode = MUSB_BUF_SINGLE}, + {.hw_ep_num = 7, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_SINGLE}, + {.hw_ep_num = 7, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_BULK, .mode = MUSB_BUF_SINGLE}, + {.hw_ep_num = 8, .style = MUSB_FIFO_TX, .maxpacket = 512, + .ep_mode = EP_ISO, .mode = MUSB_BUF_DOUBLE}, + {.hw_ep_num = 8, .style = MUSB_FIFO_RX, .maxpacket = 512, + .ep_mode = EP_ISO, .mode = MUSB_BUF_DOUBLE}, }; + /*=======================================================================*/ /* USB GADGET */ /*=======================================================================*/ @@ -453,149 +181,42 @@ static const struct of_device_id apusb_of_ids[] = { MODULE_DEVICE_TABLE(of, apusb_of_ids); -#ifdef FPGA_PLATFORM -bool usb_enable_clock(bool enable) +static int mt_usb_psy_notifier(struct notifier_block *nb, + unsigned long event, void *ptr) { - return true; -} -EXPORT_SYMBOL(usb_enable_clock); + struct musb *musb = container_of(nb, struct musb, psy_nb); + struct power_supply *psy = ptr; -bool usb_prepare_clock(bool enable) -{ - return true; -} -EXPORT_SYMBOL(usb_prepare_clock); + if (event == PSY_EVENT_PROP_CHANGED && psy == musb->usb_psy) { -void usb_prepare_enable_clock(bool enable) -{ -} -EXPORT_SYMBOL(usb_prepare_enable_clock); -#else -void usb_prepare_enable_clock(bool enable) -{ - if (enable) { - usb_prepare_clock(true); - usb_enable_clock(true); - } else { - usb_enable_clock(false); - usb_prepare_clock(false); - } -} -EXPORT_SYMBOL(usb_prepare_enable_clock); - -DEFINE_MUTEX(prepare_lock); -static atomic_t clk_prepare_cnt = ATOMIC_INIT(0); - -bool usb_prepare_clock(bool enable) -{ - int before_cnt = atomic_read(&clk_prepare_cnt); - - mutex_lock(&prepare_lock); + DBG(0, "psy=%s, event=%d", psy->desc->name, event); - if (IS_ERR_OR_NULL(glue->musb_clk) || - IS_ERR_OR_NULL(glue->musb_clk_top_sel) || - IS_ERR_OR_NULL(glue->musb_clk_univpll3_d4)) { - DBG(0, "clk not ready\n"); - mutex_unlock(&prepare_lock); - return 0; - } - - if (enable) { - if (clk_prepare(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel prepare fail\n"); - } else { - if (clk_set_parent(glue->musb_clk_top_sel, - glue->musb_clk_univpll3_d4)) - DBG(0, "musb_clk_top_sel set_parent fail\n"); - } - if (clk_prepare(glue->musb_clk)) - DBG(0, "musb_clk prepare fail\n"); - - atomic_inc(&clk_prepare_cnt); - } else { - clk_unprepare(glue->musb_clk_top_sel); - clk_unprepare(glue->musb_clk); - - atomic_dec(&clk_prepare_cnt); + if (usb_cable_connected(musb)) + mt_usb_connect(); + else + mt_usb_disconnect(); } - - mutex_unlock(&prepare_lock); - - DBG(1, "enable(%d), usb prepare_cnt, before(%d), after(%d)\n", - enable, before_cnt, atomic_read(&clk_prepare_cnt)); - -#ifdef CONFIG_MTK_AEE_FEATURE - if (atomic_read(&clk_prepare_cnt) < 0) - aee_kernel_warning("usb20", "usb clock prepare_cnt error\n"); -#endif - - return 1; + return NOTIFY_DONE; } -EXPORT_SYMBOL(usb_prepare_clock); -static DEFINE_SPINLOCK(musb_reg_clock_lock); - -bool usb_enable_clock(bool enable) +static int mt_usb_psy_init(struct musb *musb) { - static int count; - static int real_enable = 0, real_disable; - static int virt_enable = 0, virt_disable; - unsigned long flags; - - DBG(1, "enable(%d),count(%d),<%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - - spin_lock_irqsave(&musb_reg_clock_lock, flags); + int ret = 0; + struct device *dev = musb->controller->parent; - if (unlikely(atomic_read(&clk_prepare_cnt) <= 0)) { - DBG_LIMIT(1, "clock not prepare"); - goto exit; - } - - if (enable && count == 0) { - if (clk_enable(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel enable fail\n"); - goto exit; - } - - if (clk_enable(glue->musb_clk)) { - DBG(0, "musb_clk enable fail\n"); - clk_disable(glue->musb_clk_top_sel); - goto exit; - } - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); - real_enable++; - - } else if (!enable && count == 1) { - clk_disable(glue->musb_clk); - clk_disable(glue->musb_clk_top_sel); - - usb_hal_dpidle_request(USB_DPIDLE_ALLOWED); - real_disable++; + musb->usb_psy = devm_power_supply_get_by_phandle(dev, "charger"); + if (IS_ERR_OR_NULL(musb->usb_psy)) { + DBG(0, "couldn't get usb_psy\n"); + return -EINVAL; } - if (enable) - count++; - else - count = (count == 0) ? 0 : (count - 1); - -exit: - if (enable) - virt_enable++; - else - virt_disable++; - - spin_unlock_irqrestore(&musb_reg_clock_lock, flags); + musb->psy_nb.notifier_call = mt_usb_psy_notifier; + ret = power_supply_reg_notifier(&musb->psy_nb); + if (ret) + DBG(0, "failed to reg notifier: %d\n", ret); - DBG(1, "enable(%d),count(%d), <%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - return 1; + return ret; } -EXPORT_SYMBOL(usb_enable_clock); -#endif static struct delayed_work idle_work; @@ -755,10 +376,10 @@ static void mt_usb_enable(struct musb *musb) usb_enable_clock(true); mdelay(10); -#ifdef CONFIG_MTK_UART_USB_SWITCH + #ifdef CONFIG_MTK_UART_USB_SWITCH if (!is_check) { - in_uart_mode = usb_phy_check_in_uart_mode(); - is_check = 1; + usb_phy_check_in_uart_mode(); + is_check = 1; } #endif @@ -767,6 +388,7 @@ static void mt_usb_enable(struct musb *musb) /* only for mt6761 */ usb_sram_setup(); #endif + usb_phy_recover(musb); /* update musb->power & mtk_usb_power in the same time */ musb->power = true; @@ -794,6 +416,8 @@ static void mt_usb_disable(struct musb *musb) if (musb->power == false) return; + usb_phy_savecurrent(); + usb_enable_clock(false); /* clock will unprepare when leave here */ @@ -828,7 +452,7 @@ bool mt_usb_is_device(void) } #endif #ifdef CONFIG_USB_MTK_OTG - return !mtk_musb->is_host; + return !usb20_check_vbus_on(); #else return true; #endif @@ -889,7 +513,37 @@ static bool musb_hal_is_vbus_exist(void) /* be aware this could not be used in non-sleep context */ bool usb_cable_connected(struct musb *musb) { - if (musb->usb_connected) + struct power_supply *psy; + union power_supply_propval pval; + union power_supply_propval tval; + int ret; + + /* workaround to register psy again */ + if (IS_ERR_OR_NULL(musb->usb_psy)) { + DBG(0, "usb_psy not ready\n"); + if (mt_usb_psy_init(musb)) + return false; + } + + psy = musb->usb_psy; + ret = power_supply_get_property(psy, + POWER_SUPPLY_PROP_ONLINE, &pval); + if (ret != 0) { + DBG(0, "failed to get psy prop, ret=%d\n", ret); + return false; + } + + ret = power_supply_get_property(psy, + POWER_SUPPLY_PROP_USB_TYPE, &tval); + if (ret != 0) { + DBG(0, "failed to get psy prop, ret=%d\n", ret); + return false; + } + + DBG(0, "online=%d, type=%d\n", pval.intval, tval.intval); + + if (pval.intval && (tval.intval == POWER_SUPPLY_USB_TYPE_SDP || + tval.intval == POWER_SUPPLY_USB_TYPE_CDP)) return true; else return false; @@ -925,7 +579,7 @@ void do_connection_work(struct work_struct *data) usb_prepare_clock(true); /* be aware this could not be used in non-sleep context */ - usb_connected = mtk_musb->usb_connected; + usb_connected = usb_cable_connected(mtk_musb); /* additional check operation here */ if (musb_force_on) @@ -939,6 +593,7 @@ void do_connection_work(struct work_struct *data) if (cmode_effect_on()) usb_on = false; /* additional check operation done */ + spin_lock_irqsave(&mtk_musb->lock, flags); if (mtk_musb->is_host) { @@ -1021,7 +676,6 @@ void mt_usb_connect(void) DBG(0, "[MUSB] USB connect\n"); issue_connection_work(CONNECTION_OPS_CONN); } -EXPORT_SYMBOL(mt_usb_connect); void mt_usb_disconnect(void) { @@ -1040,7 +694,6 @@ void mt_usb_reconnect(void) DBG(0, "[MUSB] USB reconnect\n"); issue_connection_work(CONNECTION_OPS_CHECK); } -EXPORT_SYMBOL(mt_usb_reconnect); /* build time force on */ #if defined(CONFIG_FPGA_EARLY_PORTING) ||\ @@ -1081,7 +734,6 @@ static void do_usb20_test_connect_work(struct work_struct *work) test_connected = !test_connected; } - void mt_usb_connect_test(int start) { static struct wakeup_source *dev_test_wakelock; @@ -1105,6 +757,8 @@ void mt_usb_connect_test(int start) } } + + void musb_platform_reset(struct musb *musb) { u16 swrst = 0; @@ -1129,13 +783,11 @@ void musb_platform_reset(struct musb *musb) swrst |= (MUSB_SWRST_DISUSBRESET | MUSB_SWRST_SWRST); musb_writew(mbase, MUSB_SWRST, swrst); } -EXPORT_SYMBOL(musb_platform_reset); void musb_sync_with_bat(struct musb *musb, int usb_state) { DBG(1, "BATTERY_SetUSBState, state=%d\n", usb_state); } -EXPORT_SYMBOL(musb_sync_with_bat); /*-------------------------------------------------------------------------*/ static irqreturn_t generic_interrupt(int irq, void *__hci) @@ -1175,6 +827,7 @@ static irqreturn_t generic_interrupt(int irq, void *__hci) retval = musb_interrupt(musb); #endif + return retval; } @@ -1221,6 +874,54 @@ static irqreturn_t mt_usb_interrupt(int irq, void *dev_id) } +/*--FOR INSTANT POWER ON USAGE --*/ +static ssize_t cmode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (!dev) { + DBG(0, "dev is null!!\n"); + return 0; + } + return scnprintf(buf, PAGE_SIZE, "%d\n", cable_mode); +} + +static ssize_t cmode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned int cmode; + long tmp_val; + + if (!dev) { + DBG(0, "dev is null!!\n"); + return count; + /* } else if (1 == sscanf(buf, "%d", &cmode)) { */ + } else if (kstrtol(buf, 10, (long *)&tmp_val) == 0) { + if (mtk_musb) { + if (down_interruptible(&mtk_musb->musb_lock)) + DBG(0, + "USB20: %s: busy, Couldn't get power_clock_lock\n", + __func__); + } + cmode = tmp_val; + DBG(0, "cmode=%d, cable_mode=%d\n", cmode, cable_mode); + if (cmode >= CABLE_MODE_MAX) + cmode = CABLE_MODE_NORMAL; + + if (cable_mode != cmode) { + cable_mode = cmode; + mt_usb_reconnect(); + /* let conection work do its job */ + msleep(50); + } + if (mtk_musb) + up(&mtk_musb->musb_lock); + } + return count; +} + +DEVICE_ATTR_RW(cmode); + static bool saving_mode; static ssize_t saving_show(struct device *dev, @@ -1258,7 +959,6 @@ bool is_saving_mode(void) DBG(0, "%d\n", saving_mode); return saving_mode; } -EXPORT_SYMBOL(is_saving_mode); void usb_dump_debug_register(void) { @@ -1304,8 +1004,6 @@ static void uart_usb_switch_dump_register(void) { usb_enable_clock(true); -#ifdef CONFIG_MTK_MUSB_PHY - /* Todo: should phase out: not supported by tphy */ DBG(0, "[MUSB]addr: 0x68, value: %x\n" "[MUSB]addr: 0x6C, value: %x\n" "[MUSB]addr: 0x20, value: %x\n" @@ -1314,7 +1012,6 @@ static void uart_usb_switch_dump_register(void) USBPHY_READ32(0x6C), USBPHY_READ32(0x20), USBPHY_READ32(0x18)); -#endif usb_enable_clock(false); DBG(0, "[MUSB]GPIO_SEL=%x\n", GET_GPIO_SEL_VAL(readl(ap_gpio_base))); @@ -1330,8 +1027,7 @@ static ssize_t portmode_show(struct device *dev, } usb_prepare_enable_clock(true); - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) + if (usb_phy_check_in_uart_mode()) port_mode = PORT_MODE_UART; else port_mode = PORT_MODE_USB; @@ -1354,10 +1050,6 @@ static ssize_t portmode_store(struct device *dev, { unsigned int portmode; - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) - port_mode = PORT_MODE_UART; - if (!dev) { DBG(0, "dev is null!!\n"); return count; @@ -1389,6 +1081,24 @@ static ssize_t portmode_store(struct device *dev, DEVICE_ATTR_RW(portmode); +static ssize_t uartpath_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + u32 var; + + if (!dev) { + DBG(0, "dev is null!!\n"); + return 0; + } + + var = GET_GPIO_SEL_VAL(readl(ap_gpio_base)); + DBG(0, "[MUSB]GPIO SELECT=%x\n", var); + + return scnprintf(buf, PAGE_SIZE, "%x\n", var); +} + +DEVICE_ATTR_RW(uartpath); #endif #ifndef FPGA_PLATFORM @@ -1396,6 +1106,7 @@ static struct device_attribute *mt_usb_attributes[] = { &dev_attr_saving, #ifdef CONFIG_MTK_UART_USB_SWITCH &dev_attr_portmode, + &dev_attr_uartpath, #endif NULL }; @@ -1531,10 +1242,12 @@ static int usb_i2c_probe(struct i2c_client *client, u32 val = 0; /* if i2c probe before musb prob, this would cause KE */ /* base = (unsigned long)((unsigned long)mtk_musb->xceiv->io_priv); */ + base = usb_phy_base; DBG(0, "[MUSB]%, start, base:%p\n", __func__, base); usb_i2c_client = client; + /* disable usb mac suspend */ val = musb_readl(base, 0x868); DBG(0, "[MUSB]0x868=0x%x\n", val); @@ -1796,8 +1509,14 @@ static int __init mt_usb_init(struct musb *musb) DBG(1, "%s\n", __func__); - musb->phy = glue->phy; - musb->xceiv = glue->xceiv; + usb_phy_generic_register(); + musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); + + if (IS_ERR_OR_NULL(musb->xceiv)) { + DBG(0, "[MUSB] usb_get_phy error!!\n"); + return -EPROBE_DEFER; + } + musb->dma_irq = (int)SHARE_IRQ; musb->fifo_cfg = fifo_cfg; musb->fifo_cfg_size = ARRAY_SIZE(fifo_cfg); @@ -1805,26 +1524,11 @@ static int __init mt_usb_init(struct musb *musb) musb->power = false; musb->is_host = false; musb->fifo_size = 8 * 1024; - musb->usb_lock = wakeup_source_register(NULL, "USB suspend lock"); - - ret = phy_init(glue->phy); - if (ret) - goto err_phy_init; - -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - glue->phy_mode = PHY_MODE_UART; - DBG(0, "At UART mode. Switch to USB is not support\n"); - } +#ifndef FPGA_PLATFORM + musb->usb_rev6_setting = usb_rev6_setting; #endif - phy_set_mode(glue->phy, glue->phy_mode); - if (glue->phy_mode != PHY_MODE_UART) - ret = phy_power_on(glue->phy); - - if (ret) - goto err_phy_power_on; + musb->usb_lock = wakeup_source_register(NULL, "USB suspend lock"); #ifndef FPGA_PLATFORM reg_vusb = regulator_get(musb->controller, "vusb"); @@ -1861,7 +1565,7 @@ static int __init mt_usb_init(struct musb *musb) #endif - /* ret = device_create_file(musb->controller, &dev_attr_cmode); */ + ret = device_create_file(musb->controller, &dev_attr_cmode); /* mt_usb_enable(musb); */ @@ -1894,22 +1598,13 @@ static int __init mt_usb_init(struct musb *musb) #endif #ifdef CONFIG_USB_MTK_OTG mt_usb_otg_init(musb); - /* enable host suspend mode */ - mt_usb_wakeup_init(musb); - musb->host_suspend = true; #endif #ifdef CONFIG_MACH_MT6761 /* only for mt6761 */ usb_sram_init(); #endif - + mt_usb_psy_init(musb); return 0; - -err_phy_power_on: - phy_exit(glue->phy); -err_phy_init: - - return ret; } static int mt_usb_exit(struct musb *musb) @@ -1930,9 +1625,6 @@ static int mt_usb_exit(struct musb *musb) #ifdef CONFIG_USB_MTK_OTG mt_usb_otg_exit(musb); #endif - phy_power_off(glue->phy); - phy_exit(glue->phy); - return 0; } @@ -1971,9 +1663,6 @@ static const struct musb_platform_ops mt_usb_ops = { .disable_clk = mt_usb_disable_clk, .prepare_clk = mt_usb_prepare_clk, .unprepare_clk = mt_usb_unprepare_clk, -#ifdef CONFIG_USB_MTK_OTG - .enable_wakeup = mt_usb_wakeup, -#endif }; #ifdef CONFIG_MTK_MUSB_DRV_36BIT @@ -1982,20 +1671,15 @@ static u64 mt_usb_dmamask = DMA_BIT_MASK(36); static u64 mt_usb_dmamask = DMA_BIT_MASK(32); #endif -struct mt_usb_glue *glue; -EXPORT_SYMBOL(glue); - static int mt_usb_probe(struct platform_device *pdev) { struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data; - struct platform_device *musb_pdev; + struct platform_device *musb; + struct mt_usb_glue *glue; struct musb_hdrc_config *config; struct device_node *np = pdev->dev.of_node; #ifdef CONFIG_MTK_UART_USB_SWITCH struct device_node *ap_gpio_node = NULL; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk *otg_sx; #endif int ret = -ENOMEM; @@ -2003,33 +1687,13 @@ static int mt_usb_probe(struct platform_device *pdev) if (!glue) goto err0; - /* Device name is required */ - musb_pdev = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_NONE); - if (!musb_pdev) { - dev_notice(&pdev->dev, "failed to allocate musb pdev\n"); + musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_NONE); + if (!musb) { + dev_notice(&pdev->dev, "failed to allocate musb device\n"); goto err1; } - glue->phy = devm_of_phy_get_by_index(&pdev->dev, np, 0); - if (IS_ERR(glue->phy)) { - dev_err(&pdev->dev, "fail to getting phy %ld\n", - PTR_ERR(glue->phy)); - return PTR_ERR(glue->phy); - } - - glue->usb_phy = usb_phy_generic_register(); - if (IS_ERR(glue->usb_phy)) { - dev_err(&pdev->dev, "fail to registering usb-phy %ld\n", - PTR_ERR(glue->usb_phy)); - return PTR_ERR(glue->usb_phy); - } - glue->xceiv = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2); - if (IS_ERR(glue->xceiv)) { - dev_err(&pdev->dev, "fail to getting usb-phy %d\n", ret); - ret = PTR_ERR(glue->xceiv); - goto err_unregister_usb_phy; - } - + usb_phy_base = of_iomap(np, 1); pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) { dev_notice(&pdev->dev, "failed to allocate musb platform data\n"); @@ -2043,6 +1707,11 @@ static int mt_usb_probe(struct platform_device *pdev) */ goto err2; } +#ifdef CONFIG_USB_MTK_OTG + pdata->mode = MUSB_OTG; +#else + of_property_read_u32(np, "mode", (u32 *) &pdata->mode); +#endif #ifdef CONFIG_MTK_UART_USB_SWITCH ap_gpio_node = @@ -2064,16 +1733,16 @@ static int mt_usb_probe(struct platform_device *pdev) pdata->config = config; - musb_pdev->dev.parent = &pdev->dev; - musb_pdev->dev.dma_mask = &mt_usb_dmamask; - musb_pdev->dev.coherent_dma_mask = mt_usb_dmamask; + musb->dev.parent = &pdev->dev; + musb->dev.dma_mask = &mt_usb_dmamask; + musb->dev.coherent_dma_mask = mt_usb_dmamask; pdev->dev.dma_mask = &mt_usb_dmamask; pdev->dev.coherent_dma_mask = mt_usb_dmamask; - arch_setup_dma_ops(&musb_pdev->dev, 0, mt_usb_dmamask, NULL, 0); + arch_setup_dma_ops(&musb->dev, 0, mt_usb_dmamask, NULL, 0); glue->dev = &pdev->dev; - glue->musb_pdev = musb_pdev; + glue->musb = musb; pdata->platform_ops = &mt_usb_ops; @@ -2093,13 +1762,26 @@ static int mt_usb_probe(struct platform_device *pdev) platform_set_drvdata(pdev, glue); - ret = platform_device_add_resources(musb_pdev, + ret = platform_device_add_resources(musb, pdev->resource, pdev->num_resources); if (ret) { dev_notice(&pdev->dev, "failed to add resources\n"); goto err2; } + ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); + if (ret) { + dev_notice(&pdev->dev, "failed to add platform_data\n"); + goto err2; + } + + ret = platform_device_add(musb); + + if (ret) { + dev_notice(&pdev->dev, "failed to register musb device\n"); + goto err2; + } + #ifdef CONFIG_MTK_MUSB_QMU_SUPPORT isoc_ep_end_idx = 1; isoc_ep_gpd_count = 248; /* 30 ms for HS, at most (30*8 + 1) */ @@ -2115,87 +1797,42 @@ static int mt_usb_probe(struct platform_device *pdev) INIT_DELAYED_WORK(&idle_work, do_idle_work); - DBG(0, "keep musb->power & mtk_usb_power in the same value\n"); + DBG(0, "keep musb->power & mtk_usb_power in the samae value\n"); mtk_usb_power = false; #ifndef FPGA_PLATFORM - glue->musb_clk = devm_clk_get(&pdev->dev, "usb0"); - if (IS_ERR(glue->musb_clk)) { + musb_clk = devm_clk_get(&pdev->dev, "usb0"); + if (IS_ERR(musb_clk)) { DBG(0, "cannot get musb_clk clock\n"); goto err2; } - glue->musb_clk_top_sel = devm_clk_get(&pdev->dev, "usb0_clk_top_sel"); - if (IS_ERR(glue->musb_clk_top_sel)) { + musb_clk_top_sel = devm_clk_get(&pdev->dev, "usb0_clk_top_sel"); + if (IS_ERR(musb_clk_top_sel)) { DBG(0, "cannot get musb_clk_top_sel clock\n"); goto err2; } - glue->musb_clk_univpll3_d4 = - devm_clk_get(&pdev->dev, "usb0_clk_univpll3_d4"); - if (IS_ERR(glue->musb_clk_univpll3_d4)) { + musb_clk_univpll3_d4 = devm_clk_get(&pdev->dev, "usb0_clk_univpll3_d4"); + if (IS_ERR(musb_clk_univpll3_d4)) { DBG(0, "cannot get musb_clk_univpll3_d4 clock\n"); goto err2; } - if (init_sysfs(&pdev->dev)) { - DBG(0, "failed to init_sysfs\n"); +#ifdef CONFIG_DEBUG_FS + if (usb20_phy_init_debugfs()) { + DBG(0, "usb20_phy_init_debugfs fail!\n"); goto err2; } - -#ifdef CONFIG_USB_MTK_OTG - pdata->dr_mode = usb_get_dr_mode(&pdev->dev); -#else - of_property_read_u32(np, "dr_mode", (u32 *) &pdata->dr_mode); #endif - switch (pdata->dr_mode) { - case USB_DR_MODE_HOST: - glue->phy_mode = PHY_MODE_USB_HOST; - break; - case USB_DR_MODE_PERIPHERAL: - glue->phy_mode = PHY_MODE_USB_DEVICE; - break; - case USB_DR_MODE_OTG: - glue->phy_mode = PHY_MODE_USB_OTG; - break; - default: - dev_err(&pdev->dev, "Error 'dr_mode' property\n"); - return -EINVAL; - } - - DBG(0, "get dr_mode: %d\n", pdata->dr_mode); - - /* assign usb-role-sw */ - otg_sx = &glue->otg_sx; - -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - otg_sx->manual_drd_enabled = - of_property_read_bool(np, "enable-manual-drd"); - otg_sx->role_sw_used = of_property_read_bool(np, "usb-role-switch"); - - if (!otg_sx->role_sw_used && of_property_read_bool(np, "extcon")) { - otg_sx->edev = extcon_get_edev_by_phandle(&musb_pdev->dev, 0); - if (IS_ERR(otg_sx->edev)) { - dev_err(&musb_pdev->dev, "couldn't get extcon device\n"); - return PTR_ERR(otg_sx->edev); - } - } -#endif - - ret = platform_device_add_data(musb_pdev, pdata, sizeof(*pdata)); - if (ret) { - dev_notice(&pdev->dev, "failed to add platform_data\n"); + if (init_sysfs(&pdev->dev)) { + DBG(0, "failed to init_sysfs\n"); goto err2; } - ret = platform_device_add(musb_pdev); - if (ret) { - dev_notice(&pdev->dev, "failed to register musb device\n"); - goto err2; - } -#endif /* FPGA_PLATFORM */ +#endif DBG(0, "USB probe done!\n"); #if defined(FPGA_PLATFORM) || defined(FOR_BRING_UP) @@ -2205,10 +1842,7 @@ static int mt_usb_probe(struct platform_device *pdev) return 0; err2: - platform_device_put(musb_pdev); - platform_device_unregister(glue->musb_pdev); -err_unregister_usb_phy: - usb_phy_generic_unregister(glue->usb_phy); + platform_device_put(musb); err1: kfree(glue); err0: @@ -2218,10 +1852,8 @@ static int mt_usb_probe(struct platform_device *pdev) static int mt_usb_remove(struct platform_device *pdev) { struct mt_usb_glue *glue = platform_get_drvdata(pdev); - struct platform_device *usb_phy = glue->usb_phy; - platform_device_unregister(glue->musb_pdev); - usb_phy_generic_unregister(usb_phy); + platform_device_unregister(glue->musb); kfree(glue); return 0; @@ -2235,7 +1867,6 @@ static struct platform_driver mt_usb_driver = { .of_match_table = apusb_of_ids, }, }; -module_platform_driver(mt_usb_driver); static int __init usb20_init(void) { @@ -2249,9 +1880,8 @@ static int __init usb20_init(void) return 0; } #endif - /* Fix musb_plat build-in */ - /* ret = platform_driver_register(&mt_usb_driver); */ - ret = 0; + + ret = platform_driver_register(&mt_usb_driver); #ifdef FPGA_PLATFORM add_usb_i2c_driver(); @@ -2264,8 +1894,7 @@ fs_initcall(usb20_init); static void __exit usb20_exit(void) { - /* Fix musb_plat build-in */ - /* platform_driver_unregister(&mt_usb_driver); */ + platform_driver_unregister(&mt_usb_driver); } module_exit(usb20_exit); diff --git a/drivers/misc/mediatek/usb20/mt6765/usb20.h b/drivers/misc/mediatek/usb20/mt6765/usb20.h index 4fd6475bdeed..0e231d95ff54 100644 --- a/drivers/misc/mediatek/usb20/mt6765/usb20.h +++ b/drivers/misc/mediatek/usb20/mt6765/usb20.h @@ -10,43 +10,18 @@ #define FPGA_PLATFORM #endif -#include -#include - struct mt_usb_work { struct delayed_work dwork; int ops; }; -/* ToDo: should be moved to glue */ -extern struct musb *mtk_musb; -extern struct musb *musb; - struct mt_usb_glue { struct device *dev; - struct platform_device *musb_pdev; - struct musb *mtk_musb; - /* common power & clock */ - struct clk *musb_clk; - struct clk *musb_clk_top_sel; - struct clk *musb_clk_univpll3_d4; -#ifdef CONFIG_PHY_MTK_TPHY - struct platform_device *usb_phy; - struct phy *phy; - struct usb_phy *xceiv; - enum phy_mode phy_mode; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk otg_sx; -#endif + struct platform_device *musb; }; -extern struct mt_usb_glue *glue; - #define glue_to_musb(g) platform_get_drvdata(g->musb) -extern int kernel_init_done; - /* specific USB fuctnion */ enum CABLE_MODE { CABLE_MODE_CHRG_ONLY = 0, @@ -90,6 +65,10 @@ extern void USB_PHY_Write_Register8(u8 var, u8 addr); extern u8 USB_PHY_Read_Register8(u8 addr); #endif +extern struct clk *musb_clk; +extern struct clk *musb_clk_top_sel; +extern struct clk *musb_clk_univpll3_d4; + #ifdef CONFIG_MTK_UART_USB_SWITCH #define RG_GPIO_SELECT (0x600) @@ -103,23 +82,14 @@ extern void __iomem *ap_gpio_base; extern bool in_uart_mode; #endif extern int usb20_phy_init_debugfs(void); +#define PHY_IDLE_MODE 0 +#define PHY_DEV_ACTIVE 1 +#define PHY_HOST_ACTIVE 2 +void set_usb_phy_mode(int mode); #ifdef CONFIG_USB_MTK_OTG -extern void mt_usb_otg_init(struct musb *musb); -extern void mt_usb_otg_exit(struct musb *musb); -extern int mt_usb_get_vbus_status(struct musb *musb); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); +extern bool usb20_check_vbus_on(void); #endif -extern void musb_platform_reset(struct musb *musb); -extern bool usb_enable_clock(bool enable); extern bool usb_prepare_clock(bool enable); extern void usb_prepare_enable_clock(bool enable); extern void mt_usb_dev_disconnect(void); - -/* usb host mode wakeup */ -#define USB_WAKEUP_DEC_CON1 0x404 -#define USB1_CDEN BIT(0) -#define USB1_CDDEBOUNCE(x) (((x) & 0xf) << 1) #endif diff --git a/drivers/misc/mediatek/usb20/mt6765/usb20_host.c b/drivers/misc/mediatek/usb20/mt6765/usb20_host.c index 13224157991a..96472e32a054 100755 --- a/drivers/misc/mediatek/usb20/mt6765/usb20_host.c +++ b/drivers/misc/mediatek/usb20/mt6765/usb20_host.c @@ -3,11 +3,6 @@ * Copyright (C) 2018 MediaTek Inc. */ -#include -#include -#include -#include - #ifdef CONFIG_USB_MTK_OTG #include #include @@ -16,65 +11,97 @@ #include #include #include +#include "musb_core.h" #include -#include +#include "musbhsdma.h" +#include "usb20.h" #include #include #ifdef CONFIG_MTK_USB_TYPEC #ifdef CONFIG_TCPC_CLASS -#include -#endif -#endif +#include "tcpm.h" #include #include -#include +static struct notifier_block otg_nb; +static struct tcpc_device *otg_tcpc_dev; +static struct delayed_work register_otg_work; +static int otg_tcp_notifier_call(struct notifier_block *nb, + unsigned long event, void *data); +#define TCPC_OTG_DEV_NAME "type_c_port0" +static void do_register_otg_work(struct work_struct *data) +{ +#define REGISTER_OTG_WORK_DELAY 500 + static int ret; + + if (!otg_tcpc_dev) + otg_tcpc_dev = tcpc_dev_get_by_name(TCPC_OTG_DEV_NAME); + + if (!otg_tcpc_dev) { + DBG(0, "get type_c_port0 fail\n"); + queue_delayed_work(mtk_musb->st_wq, ®ister_otg_work, + msecs_to_jiffies(REGISTER_OTG_WORK_DELAY)); + return; + } + + otg_nb.notifier_call = otg_tcp_notifier_call; + ret = register_tcp_dev_notifier(otg_tcpc_dev, &otg_nb, + TCP_NOTIFY_TYPE_VBUS | TCP_NOTIFY_TYPE_USB | + TCP_NOTIFY_TYPE_MISC); + if (ret < 0) { + DBG(0, "register OTG <%p> fail\n", otg_tcpc_dev); + queue_delayed_work(mtk_musb->st_wq, ®ister_otg_work, + msecs_to_jiffies(REGISTER_OTG_WORK_DELAY)); + return; + } -#ifdef CONFIG_MTK_MUSB_PHY -#include + DBG(0, "register OTG <%p> ok\n", otg_tcpc_dev); +} +#endif #endif -MODULE_LICENSE("GPL v2"); +static void mt_usb_host_connect(int delay); +static void mt_usb_host_disconnect(int delay); #include -struct device_node *usb_node; -static int iddig_eint_num; -static ktime_t ktime_start, ktime_end; -static struct regulator *reg_vbus; +struct device_node *usb_node; +static int iddig_eint_num; +static ktime_t ktime_start, ktime_end; +static struct regulator *reg_vbus; static struct musb_fifo_cfg fifo_cfg_host[] = { -{ .hw_ep_num = 1, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 1, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_RX, - .maxpacket = 64, .mode = BUF_SINGLE}, +{ .hw_ep_num = 1, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 1, .style = MUSB_FIFO_RX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 2, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 2, .style = MUSB_FIFO_RX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 3, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 3, .style = MUSB_FIFO_RX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 4, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 4, .style = MUSB_FIFO_RX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 5, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 5, .style = MUSB_FIFO_RX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 6, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 6, .style = MUSB_FIFO_RX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 7, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 7, .style = MUSB_FIFO_RX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 8, .style = MUSB_FIFO_TX, + .maxpacket = 512, .mode = MUSB_BUF_SINGLE}, +{ .hw_ep_num = 8, .style = MUSB_FIFO_RX, + .maxpacket = 64, .mode = MUSB_BUF_SINGLE}, }; u32 delay_time = 15; @@ -89,34 +116,11 @@ module_param(vbus_on, bool, 0644); static int vbus_control; module_param(vbus_control, int, 0644); -#ifdef CONFIG_MTK_MUSB_PHY -void set_usb_phy_mode(int mode) +bool usb20_check_vbus_on(void) { - switch (mode) { - case PHY_MODE_USB_DEVICE: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ - USBPHY_CLR32(0x6C, (0x10<<0)); - USBPHY_SET32(0x6C, (0x2F<<0)); - USBPHY_SET32(0x6C, (0x3F<<8)); - break; - case PHY_MODE_USB_HOST: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ - USBPHY_CLR32(0x6c, (0x12<<0)); - USBPHY_SET32(0x6c, (0x2d<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - case PHY_MODE_INVALID: - /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ - USBPHY_SET32(0x6c, (0x11<<0)); - USBPHY_CLR32(0x6c, (0x2e<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - default: - DBG(0, "mode error %d\n", mode); - } - DBG(0, "force PHY to mode %d, 0x6c=%x\n", mode, USBPHY_READ32(0x6c)); + DBG(0, "vbus_on<%d>\n", vbus_on); + return vbus_on; } -#endif extern void eta6937_set_otg_enable(void); extern void eta6937_set_otg_disable(void); @@ -161,6 +165,22 @@ static void _set_vbus(int is_on) } } +void mt_usb_set_vbus(struct musb *musb, int is_on) +{ +#ifndef FPGA_PLATFORM + + DBG(0, "is_on<%d>, control<%d>\n", is_on, vbus_control); + + if (!vbus_control) + return; + + if (is_on) + _set_vbus(1); + else + _set_vbus(0); +#endif +} + int mt_usb_get_vbus_status(struct musb *musb) { return true; @@ -188,7 +208,6 @@ module_param(sw_deboun_time, int, 0644); u32 typec_control; module_param(typec_control, int, 0644); - static bool typec_req_host; static bool iddig_req_host; @@ -228,15 +247,129 @@ void mt_usb_host_connect(int delay) DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); issue_host_work(CONNECTION_OPS_CONN, delay, true); } -EXPORT_SYMBOL(mt_usb_host_connect); - void mt_usb_host_disconnect(int delay) { typec_req_host = false; DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); issue_host_work(CONNECTION_OPS_DISC, delay, true); } -EXPORT_SYMBOL(mt_usb_host_disconnect); +#ifdef CONFIG_MTK_USB_TYPEC +#ifdef CONFIG_TCPC_CLASS +static void do_vbus_work(struct work_struct *data) +{ + struct mt_usb_work *work = + container_of(data, struct mt_usb_work, dwork.work); + bool vbus_on = (work->ops == + VBUS_OPS_ON ? true : false); + + _set_vbus(vbus_on); + /* free kfree */ + kfree(work); +} + +static void issue_vbus_work(int ops, int delay) +{ + struct mt_usb_work *work; + + if (!mtk_musb) { + DBG(0, "mtk_musb = NULL\n"); + return; + } + /* create and prepare worker */ + work = kzalloc(sizeof(struct mt_usb_work), GFP_ATOMIC); + if (!work) { + DBG(0, "work is NULL, directly return\n"); + return; + } + work->ops = ops; + INIT_DELAYED_WORK(&work->dwork, do_vbus_work); + + /* issue vbus work */ + DBG(0, "issue work, ops<%d>, delay<%d>\n", ops, delay); + + queue_delayed_work(mtk_musb->st_wq, + &work->dwork, msecs_to_jiffies(delay)); +} + +static void mt_usb_vbus_on(int delay) +{ + DBG(0, "vbus_on\n"); + issue_vbus_work(VBUS_OPS_ON, delay); +} + +static void mt_usb_vbus_off(int delay) +{ + DBG(0, "vbus_off\n"); + issue_vbus_work(VBUS_OPS_OFF, delay); +} + +static int otg_tcp_notifier_call(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct tcp_notify *noti = data; + + switch (event) { + case TCP_NOTIFY_SOURCE_VBUS: + DBG(0, "source vbus = %dmv\n", noti->vbus_state.mv); + if (noti->vbus_state.mv) + mt_usb_vbus_on(0); + else + mt_usb_vbus_off(0); + break; + case TCP_NOTIFY_TYPEC_STATE: + DBG(0, "TCP_NOTIFY_TYPEC_STATE, old_state=%d, new_state=%d\n", + noti->typec_state.old_state, + noti->typec_state.new_state); + if (noti->typec_state.old_state == TYPEC_UNATTACHED && + noti->typec_state.new_state == TYPEC_ATTACHED_SRC) { + DBG(0, "OTG Plug in\n"); + mt_usb_host_connect(0); + } else if ((noti->typec_state.old_state == TYPEC_ATTACHED_SRC || + noti->typec_state.old_state == TYPEC_ATTACHED_SNK || + noti->typec_state.old_state == + TYPEC_ATTACHED_NORP_SRC) && + noti->typec_state.new_state == TYPEC_UNATTACHED) { + if (is_host_active(mtk_musb)) { + DBG(0, "OTG Plug out\n"); + mt_usb_host_disconnect(0); + } else { + DBG(0, "USB Plug out\n"); + mt_usb_dev_disconnect(); + } +#ifdef CONFIG_MTK_UART_USB_SWITCH + } else if ((noti->typec_state.new_state == + TYPEC_ATTACHED_SNK || + noti->typec_state.new_state == + TYPEC_ATTACHED_CUSTOM_SRC || + noti->typec_state.new_state == + TYPEC_ATTACHED_NORP_SRC) && + in_uart_mode) { + pr_info("%s USB cable plugged-in in UART mode. + Switch to USB mode.\n", __func__); + usb_phy_switch_to_usb(); +#endif + } + break; + case TCP_NOTIFY_DR_SWAP: + DBG(0, "TCP_NOTIFY_DR_SWAP, new role=%d\n", + noti->swap_state.new_role); + if (is_host_active(mtk_musb) && + noti->swap_state.new_role == PD_ROLE_UFP) { + DBG(0, "switch role to device\n"); + mt_usb_host_disconnect(0); + mt_usb_connect(); + } else if (is_peripheral_active(mtk_musb) && + noti->swap_state.new_role == PD_ROLE_DFP) { + DBG(0, "switch role to host\n"); + mt_usb_dev_disconnect(); + mt_usb_host_connect(0); + } + break; + } + return NOTIFY_OK; +} +#endif +#endif static bool musb_is_host(void) { @@ -257,7 +390,6 @@ void musb_session_restart(struct musb *musb) musb_writeb(mbase, MUSB_DEVCTL, (musb_readb(mbase, MUSB_DEVCTL) & (~MUSB_DEVCTL_SESSION))); -#ifdef CONFIG_MTK_MUSB_PHY DBG(0, "[MUSB] stopped session for VBUSERROR interrupt\n"); USBPHY_SET32(0x6c, (0x3c<<8)); USBPHY_SET32(0x6c, (0x10<<0)); @@ -268,13 +400,11 @@ void musb_session_restart(struct musb *musb) USBPHY_CLR32(0x6c, (0x3c<<0)); DBG(0, "[MUSB] let PHY resample VBUS, 0x6c=%x\n" , USBPHY_READ32(0x6c)); -#endif musb_writeb(mbase, MUSB_DEVCTL, (musb_readb(mbase, MUSB_DEVCTL) | MUSB_DEVCTL_SESSION)); DBG(0, "[MUSB] restart session\n"); } -EXPORT_SYMBOL(musb_session_restart); static struct delayed_work host_plug_test_work; int host_plug_test_enable; /* default disable */ @@ -380,10 +510,8 @@ static void do_host_work(struct work_struct *data) int usb_clk_state = NO_CHANGE; struct mt_usb_work *work = container_of(data, struct mt_usb_work, dwork.work); - struct mt_usb_glue *glue = mtk_musb->glue; - /* - * kernel_init_done should be set in + /* kernel_init_done should be set in * early-init stage through init.$platform.usb.rc */ while (!inited && !kernel_init_done && @@ -443,9 +571,8 @@ static void do_host_work(struct work_struct *data) #endif /* setup fifo for host mode */ ep_config_from_table_for_host(mtk_musb); - - if (!mtk_musb->host_suspend) - __pm_stay_awake(mtk_musb->usb_lock); + __pm_stay_awake(mtk_musb->usb_lock); + mt_usb_set_vbus(mtk_musb, 1); /* this make PHY operation workable */ musb_platform_enable(mtk_musb); @@ -458,20 +585,16 @@ static void do_host_work(struct work_struct *data) devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, (devctl&(~MUSB_DEVCTL_SESSION))); - - phy_set_mode(glue->phy, PHY_MODE_INVALID); - + set_usb_phy_mode(PHY_IDLE_MODE); /* wait */ mdelay(5); /* restart session */ devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, (devctl | MUSB_DEVCTL_SESSION)); - - phy_set_mode(glue->phy, PHY_MODE_USB_HOST); + set_usb_phy_mode(PHY_HOST_ACTIVE); musb_start(mtk_musb); - if (!typec_control && !host_plug_test_triggered) switch_int_to_device(mtk_musb); @@ -495,9 +618,10 @@ static void do_host_work(struct work_struct *data) musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); if (mtk_musb->usb_lock->active) __pm_relax(mtk_musb->usb_lock); + mt_usb_set_vbus(mtk_musb, 0); /* for no VBUS sensing IP */ - phy_set_mode(glue->phy, PHY_MODE_INVALID); + set_usb_phy_mode(PHY_IDLE_MODE); musb_stop(mtk_musb); @@ -612,31 +736,32 @@ void mt_usb_otg_init(struct musb *musb) DBG(0, "host controlled by TYPEC\n"); typec_control = 1; #ifdef CONFIG_TCPC_CLASS + INIT_DELAYED_WORK(®ister_otg_work, do_register_otg_work); + queue_delayed_work(mtk_musb->st_wq, ®ister_otg_work, 0); + vbus_control = 0; +#endif +#else DBG(0, "host controlled by IDDIG\n"); iddig_int_init(); vbus_control = 1; -#endif /* CONFIG_TCPC_CLASS */ -#endif /* CONFIG_MTK_USB_TYPEC */ +#endif /* EP table */ musb->fifo_cfg_host = fifo_cfg_host; musb->fifo_cfg_host_size = ARRAY_SIZE(fifo_cfg_host); } -EXPORT_SYMBOL(mt_usb_otg_init); - void mt_usb_otg_exit(struct musb *musb) { DBG(0, "OTG disable vbus\n"); + mt_usb_set_vbus(mtk_musb, 0); } -EXPORT_SYMBOL(mt_usb_otg_exit); enum { DO_IT = 0, REVERT, }; -#ifdef CONFIG_MTK_MUSB_PHY static void bypass_disc_circuit(int act) { u32 val; @@ -682,7 +807,6 @@ static void disc_threshold_to_max(int act) usb_prepare_enable_clock(false); } -#endif static int option; static int set_option(const char *val, const struct kernel_param *kp) @@ -723,7 +847,6 @@ static int set_option(const char *val, const struct kernel_param *kp) DBG(0, "case %d\n", local_option); mt_usb_host_disconnect(3000); break; -#ifdef CONFIG_MTK_MUSB_PHY case 5: DBG(0, "case %d\n", local_option); disc_threshold_to_max(DO_IT); @@ -740,7 +863,6 @@ static int set_option(const char *val, const struct kernel_param *kp) DBG(0, "case %d\n", local_option); bypass_disc_circuit(REVERT); break; -#endif case 9: DBG(0, "case %d\n", local_option); _set_vbus(1); @@ -763,16 +885,10 @@ module_param_cb(option, &option_param_ops, &option, 0644); #include "musb_core.h" /* for not define CONFIG_USB_MTK_OTG */ void mt_usb_otg_init(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_init); - void mt_usb_otg_exit(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_exit); - void mt_usb_set_vbus(struct musb *musb, int is_on) {} int mt_usb_get_vbus_status(struct musb *musb) {return 1; } void switch_int_to_device(struct musb *musb) {} void switch_int_to_host(struct musb *musb) {} - void musb_session_restart(struct musb *musb) {} -EXPORT_SYMBOL(musb_session_restart); #endif diff --git a/drivers/misc/mediatek/usb20/mt6765/usb20_phy.c b/drivers/misc/mediatek/usb20/mt6765/usb20_phy.c index a446a164441d..2092b9ea0275 100644 --- a/drivers/misc/mediatek/usb20/mt6765/usb20_phy.c +++ b/drivers/misc/mediatek/usb20/mt6765/usb20_phy.c @@ -16,7 +16,6 @@ #include #include "usb20.h" #include -#include #ifdef CONFIG_OF #include @@ -485,19 +484,19 @@ void usb_phy_switch_to_usb(void) void set_usb_phy_mode(int mode) { switch (mode) { - case PHY_MODE_USB_DEVICE: + case PHY_DEV_ACTIVE: /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ USBPHY_CLR32(0x6C, (0x10<<0)); USBPHY_SET32(0x6C, (0x2F<<0)); USBPHY_SET32(0x6C, (0x3F<<8)); break; - case PHY_MODE_USB_HOST: + case PHY_HOST_ACTIVE: /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ USBPHY_CLR32(0x6c, (0x12<<0)); USBPHY_SET32(0x6c, (0x2d<<0)); USBPHY_SET32(0x6c, (0x3f<<8)); break; - case PHY_MODE_INVALID: + case PHY_IDLE_MODE: /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ USBPHY_SET32(0x6c, (0x11<<0)); USBPHY_CLR32(0x6c, (0x2e<<0)); @@ -656,7 +655,7 @@ static void usb_phy_savecurrent_internal(void) udelay(1); - set_usb_phy_mode(PHY_MODE_INVALID); + set_usb_phy_mode(PHY_IDLE_MODE); } void usb_phy_savecurrent(void) @@ -777,7 +776,7 @@ void usb_phy_recover(struct musb *musb) udelay(800); /* force enter device mode */ - set_usb_phy_mode(PHY_MODE_USB_DEVICE); + set_usb_phy_mode(PHY_DEV_ACTIVE); hs_slew_rate_cal(); diff --git a/drivers/misc/mediatek/usb20/mt6768/Makefile b/drivers/misc/mediatek/usb20/mt6768/Makefile deleted file mode 100644 index d6b08abbecd5..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/Makefile +++ /dev/null @@ -1,36 +0,0 @@ -# -# Copyright (C) 2015 MediaTek Inc. -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License version 2 as -# published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# - -# -# for USB OTG silicon based on Mentor Graphics INVENTRA designs -# -ccflags-$(CONFIG_USB_MTK_HDRC) += -I$(srctree)/drivers/misc/mediatek/usb20 - -# for battery related -ccflags-y += -I$(srctree)/drivers/misc/mediatek/include/mt-plat - -# for SPM control usage -ccflags-y += -I$(srctree)/drivers/misc/mediatek/base/power/include/ - -# for TYPEC connection management -ccflags-y += -I$(srctree)/drivers/misc/mediatek/typec/inc -ifeq ($(CONFIG_TCPC_CLASS),y) - ccflags-y += -I$(srctree)/drivers/misc/mediatek/typec/tcpc/inc -endif -# for ep0 test -ccflags-y += -I$(srctree)/drivers/usb/core/ - -# Phy -obj-$(CONFIG_MTK_MUSB_PHY) += mtk_usb20_phy.o -mtk_usb20_phy-y += usb20_phy.o -mtk_usb20_phy-$(CONFIG_DEBUG_FS) += usb20_phy_debugfs.o diff --git a/drivers/misc/mediatek/usb20/mt6768/mtk-phy-a60810.h b/drivers/misc/mediatek/usb20/mt6768/mtk-phy-a60810.h deleted file mode 100644 index 460e157a9b8e..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/mtk-phy-a60810.h +++ /dev/null @@ -1,3125 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#ifndef __MTK_PHY_A60810_H -#define __MTK_PHY_A60810_H - -#define U2_SR_COEF_A60810 22 - -struct u2phy_reg_a { - /* 0x0 */ - __le32 usbphyacr0; - __le32 usbphyacr1; - __le32 usbphyacr2; - __le32 reserve0; - /* 0x10 */ - __le32 usbphyacr4; - __le32 usbphyacr5; - __le32 usbphyacr6; - __le32 u2phyacr3; - /* 0x20 */ - __le32 u2phyacr4; - __le32 u2phyamon0; - __le32 reserve1[2]; - /* 0x30~0x50 */ - __le32 reserve2[12]; - /* 0x60 */ - __le32 u2phydcr0; - __le32 u2phydcr1; - __le32 u2phydtm0; - __le32 u2phydtm1; - /* 0x70 */ - __le32 u2phydmon0; - __le32 u2phydmon1; - __le32 u2phydmon2; - __le32 u2phydmon3; - /* 0x80 */ - __le32 u2phybc12c; - __le32 u2phybc12c1; - __le32 reserve3[2]; - /* 0x90~0xd0 */ - __le32 reserve4[20]; - /* 0xe0 */ - __le32 regfppc; - __le32 reserve5[3]; - /* 0xf0 */ - __le32 versionc; - __le32 reserve6[2]; - __le32 regfcom; -}; - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL (0x7<<28) /* 30:28 */ -#define A60810_RG_USB20_TX_PH_ROT_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_USB20_PLL_DIVEN (0x7<<20) /* 22:20 */ -#define A60810_RG_USB20_PLL_BR (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_PLL_BP (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_PLL_BLP (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_USBPLL_FORCE_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_PLL_FBDIV (0x7f<<8) /* 14:8 */ -#define A60810_RG_USB20_PLL_PREDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_USB20_INTR_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_REF_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_BGR_DIV (0x3<<2) /* 3:2 */ -#define A60810_RG_SIFSLV_CHP_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SIFSLV_BGR_EN (0x1<<0) /* 0:0 */ - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL (0x1f<<19) /* 23:19 */ -#define A60810_RG_USB20_OTG_VBUSTH (0x7<<16) /* 18:16 */ -#define A60810_RG_USB20_VRT_VREF_SEL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_TERM_VREF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_MPX_SEL (0xff<<0) /* 7:0 */ - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_CLKREF_REV (0xffff<<0) /* 15:0 */ - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_DP_ABIST_SELE (0xf<<24) /* 27:24 */ -#define A60810_RG_USB20_ICUSB_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_LS_CR (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_FS_CR (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_LS_SR (0x7<<4) /* 6:4 */ -#define A60810_RG_USB20_FS_SR (0x7<<0) /* 2:0 */ - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_INIT_SQ_EN_DG (0x3<<26) /* 27:26 */ -#define A60810_RG_USB20_HSTX_TMODE_SEL (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_SQD (0x3<<22) /* 23:22 */ -#define A60810_RG_USB20_DISCD (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_HSTX_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_PHYD_MONEN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_INLPBK_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_CHIRP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HSTX_SRCAL_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_HSTX_SRCTRL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_HS_100U_U3_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_GBIAS_ENB (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_DM_ABIST_SELE (0xf<<0) /* 3:0 */ - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN (0x1 << 31) /* 31:31 */ -#define A60810_RG_USB20_PHY_REV (0xff<<24) /*31:24*/ -#define A60810_RG_USB20_BC11_SW_EN (0x1<<23) /*23:23*/ -#define A60810_RG_USB20_SR_CLK_SEL (0x1<<22) /*22:22*/ -#define A60810_RG_USB20_OTG_VBUSCMP_EN (0x1<<20) /*20:20*/ -#define A60810_RG_USB20_OTG_ABIST_EN (0x1<<19) /*19:19*/ -#define A60810_RG_USB20_OTG_ABIST_SELE (0x7<<16) /*18:16*/ -#define A60810_RG_USB20_HSRX_MMODE_SELE (0x3<<12) /*13:12*/ -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL (0x3<<9) /*10:9*/ -#define A60810_RG_USB20_HSRX_TMODE_EN (0x1<<8) /*8:8*/ -#define A60810_RG_USB20_DISCTH (0xf<<4) /*7:4*/ -#define A60810_RG_USB20_SQTH (0xf<<0) /*3:0*/ - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST (0xf<<28) /* 31:28 */ -#define A60810_RG_USB20_HSTX_BIST_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_USB20_HSTX_I_EN_MODE (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_USB11_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_TMODE_FS_LS_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HS_TERM_EN_MODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_PUPD_BIST_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_EN_PU_DM (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_EN_PD_DM (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_EN_PU_DP (0x1<<9) /* 9:9 */ -#define A60810_RG_USB20_EN_PD_DP (0x1<<8) /* 8:8 */ - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_DM_100K_EN (0x1<<17) /* 17:17 */ -#define A60810_USB20_DP_100K_EN (0x1<<16) /* 16:16 */ -#define A60810_USB20_GPIO_DM_I (0x1<<15) /* 15:15 */ -#define A60810_USB20_GPIO_DP_I (0x1<<14) /* 14:14 */ -#define A60810_USB20_GPIO_DM_OE (0x1<<13) /* 13:13 */ -#define A60810_USB20_GPIO_DP_OE (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_GPIO_CTL (0x1<<9) /* 9:9 */ -#define A60810_USB20_GPIO_MODE (0x1<<8) /* 8:8 */ -#define A60810_RG_USB20_TX_BIAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_TX_VCMPDN_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_HS_SQ_EN_MODE (0x3<<2) /* 3:2 */ -#define A60810_RG_USB20_HS_RCV_EN_MODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_GPIO_DP_O (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST (0x3<<30) /* 31:30 */ -#define A60810_RG_USB20_GATED_ENB (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_TESTMODE (0x3<<26) /* 27:26 */ -#define A60810_RG_SIFSLV_USB20_PLL_STABLE (0x1<<25) /* 25:25 */ -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON (0x1<<24) /* 24:24 */ -#define A60810_RG_USB20_PHYD_RESERVE (0xffff<<8) /* 23:8 */ -#define A60810_RG_USB20_EBTHRLD (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_EARLY_HSTX_I (0x1<<6) /* 6:6 */ -#define A60810_RG_USB20_TX_TST (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_NEGEDGE_ENB (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_CDR_FILT (0xf<<0) /* 3:0 */ - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL (0xff<<24) /* 31:24 */ -#define A60810_RG_USB20_DRVVBUS (0x1<<23) /* 23:23 */ -#define A60810_RG_DEBUG_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_USB20_OTG_PROBE (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_SW_PLLMODE (0x3<<18) /* 19:18 */ -#define A60810_RG_USB20_BERTH (0x3<<16) /* 17:16 */ -#define A60810_RG_USB20_LBMODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_FORCE_TAP (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_TAPSEL (0xfff<<0) /* 11:0 */ - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE (0x3<<30) /* 31:30 */ -#define A60810_FORCE_UART_I (0x1<<29) /* 29:29 */ -#define A60810_FORCE_UART_BIAS_EN (0x1<<28) /* 28:28 */ -#define A60810_FORCE_UART_TX_OE (0x1<<27) /* 27:27 */ -#define A60810_FORCE_UART_EN (0x1<<26) /* 26:26 */ -#define A60810_FORCE_USB_CLKEN (0x1<<25) /* 25:25 */ -#define A60810_FORCE_DRVVBUS (0x1<<24) /* 24:24 */ -#define A60810_FORCE_DATAIN (0x1<<23) /* 23:23 */ -#define A60810_FORCE_TXVALID (0x1<<22) /* 22:22 */ -#define A60810_FORCE_DM_PULLDOWN (0x1<<21) /* 21:21 */ -#define A60810_FORCE_DP_PULLDOWN (0x1<<20) /* 20:20 */ -#define A60810_FORCE_XCVRSEL (0x1<<19) /* 19:19 */ -#define A60810_FORCE_SUSPENDM (0x1<<18) /* 18:18 */ -#define A60810_FORCE_TERMSEL (0x1<<17) /* 17:17 */ -#define A60810_FORCE_OPMODE (0x1<<16) /* 16:16 */ -#define A60810_UTMI_MUXSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_RESET (0x1<<14) /* 14:14 */ -#define A60810_RG_DATAIN (0xf<<10) /* 13:10 */ -#define A60810_RG_TXVALIDH (0x1<<9) /* 9:9 */ -#define A60810_RG_TXVALID (0x1<<8) /* 8:8 */ -#define A60810_RG_DMPULLDOWN (0x1<<7) /* 7:7 */ -#define A60810_RG_DPPULLDOWN (0x1<<6) /* 6:6 */ -#define A60810_RG_XCVRSEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SUSPENDM (0x1<<3) /* 3:3 */ -#define A60810_RG_TERMSEL (0x1<<2) /* 2:2 */ -#define A60810_RG_OPMODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_PRBS7_BITCNT (0x3f<<24) /* 29:24 */ -#define A60810_RG_USB20_CLK48M_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_USB20_CLK60M_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_UART_I (0x1<<19) /* 19:19 */ -#define A60810_RG_UART_BIAS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_UART_TX_OE (0x1<<17) /* 17:17 */ -#define A60810_RG_UART_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_IP_U2_PORT_POWER (0x1<<15) /* 15:15 */ -#define A60810_FORCE_IP_U2_PORT_POWER (0x1<<14) /* 14:14 */ -#define A60810_FORCE_VBUSVALID (0x1<<13) /* 13:13 */ -#define A60810_FORCE_SESSEND (0x1<<12) /* 12:12 */ -#define A60810_FORCE_BVALID (0x1<<11) /* 11:11 */ -#define A60810_FORCE_AVALID (0x1<<10) /* 10:10 */ -#define A60810_FORCE_IDDIG (0x1<<9) /* 9:9 */ -#define A60810_FORCE_IDPULLUP (0x1<<8) /* 8:8 */ -#define A60810_RG_VBUSVALID (0x1<<5) /* 5:5 */ -#define A60810_RG_SESSEND (0x1<<4) /* 4:4 */ -#define A60810_RG_BVALID (0x1<<3) /* 3:3 */ -#define A60810_RG_AVALID (0x1<<2) /* 2:2 */ -#define A60810_RG_IDDIG (0x1<<1) /* 1:1 */ -#define A60810_RG_IDPULLUP (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH (0xff<<0) /* 7:0 */ -#define E60802_RG_USB20_EOP_CTL (0xf<<16) /* 19:16 */ - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O (0x1<<31) /* 31:31 */ -#define A60810_RGO_USB20_LB_PASS (0x1<<30) /* 30:30 */ -#define A60810_RGO_USB20_LB_DONE (0x1<<29) /* 29:29 */ -#define A60810_AD_USB20_BVALID (0x1<<28) /* 28:28 */ -#define A60810_USB20_IDDIG (0x1<<27) /* 27:27 */ -#define A60810_AD_USB20_VBUSVALID (0x1<<26) /* 26:26 */ -#define A60810_AD_USB20_SESSEND (0x1<<25) /* 25:25 */ -#define A60810_AD_USB20_AVALID (0x1<<24) /* 24:24 */ -#define A60810_USB20_LINE_STATE (0x3<<22) /* 23:22 */ -#define A60810_USB20_HST_DISCON (0x1<<21) /* 21:21 */ -#define A60810_USB20_TX_READY (0x1<<20) /* 20:20 */ -#define A60810_USB20_RX_ERROR (0x1<<19) /* 19:19 */ -#define A60810_USB20_RX_ACTIVE (0x1<<18) /* 18:18 */ -#define A60810_USB20_RX_VALIDH (0x1<<17) /* 17:17 */ -#define A60810_USB20_RX_VALID (0x1<<16) /* 16:16 */ -#define A60810_USB20_DATA_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT (0xff<<24) /* 31:24 */ -#define A60810_RGO_RXACTIVE_CNT (0xff<<16) /* 23:16 */ -#define A60810_RGO_USB20_LB_BERCNT (0xff<<8) /* 15:8 */ -#define A60810_USB20_PROBE_OUT (0xff<<0) /* 7:0 */ - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGO_USB20_PRBS7_DONE (0x1<<3) /* 3:3 */ -#define A60810_RGO_USB20_PRBS7_LOCK (0x1<<2) /* 2:2 */ -#define A60810_RGO_USB20_PRBS7_PASS (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_PRBS7_PASSTH (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT (0xf<<28) /* 31:28 */ -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT (0xf<<24) /* 27:24 */ -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_CHGDT_ISRC_LEV (0x3<<14) /* 15:14 */ -#define A60810_RG_CHGDT_VDATSRC (0x1<<13) /* 13:13 */ -#define A60810_RG_CHGDT_BGVREF_SEL (0x7<<10) /* 12:10 */ -#define A60810_RG_CHGDT_RDVREF_SEL (0x3<<8) /* 9:8 */ -#define A60810_RG_CHGDT_ISRC_DP (0x1<<7) /* 7:7 */ -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM (0x1<<6) /* 6:6 */ -#define A60810_RG_CHGDT_VDAT_DM (0x1<<5) /* 5:5 */ -#define A60810_RG_CHGDT_OPOUT_DP (0x1<<4) /* 4:4 */ -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP (0x1<<3) /* 3:3 */ -#define A60810_RG_SIFSLV_CHGDT_COMP_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_CHGDT_EN (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV (0xff<<0) /* 7:0 */ - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG (0x1<<4) /* 4:4 */ -#define A60810_USB20_OTG_REG (0x1<<3) /* 3:3 */ -#define A60810_CHGDT_REG (0x1<<2) /* 2:2 */ -#define A60810_USB11_REG (0x1<<1) /* 1:1 */ -#define A60810_USB20_REG (0x1<<0) /* 0:0 */ - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE (0xff<<24) /* 31:24 */ -#define A60810_USB11_VERSION_CODE (0xff<<16) /* 23:16 */ -#define A60810_VERSION_CODE_ANA (0xff<<8) /* 15:8 */ -#define A60810_VERSION_CODE_DIG (0xff<<0) /* 7:0 */ - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE (0xff<<24) /* 31:24 */ -#define A60810_I2C_MODE (0x1<<16) /* 16:16 */ - -/* OFFSET */ - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL_OFST (28) -#define A60810_RG_USB20_TX_PH_ROT_SEL_OFST (24) -#define A60810_RG_USB20_PLL_DIVEN_OFST (20) -#define A60810_RG_USB20_PLL_BR_OFST (18) -#define A60810_RG_USB20_PLL_BP_OFST (17) -#define A60810_RG_USB20_PLL_BLP_OFST (16) -#define A60810_RG_USB20_USBPLL_FORCE_ON_OFST (15) -#define A60810_RG_USB20_PLL_FBDIV_OFST (8) -#define A60810_RG_USB20_PLL_PREDIV_OFST (6) -#define A60810_RG_USB20_INTR_EN_OFST (5) -#define A60810_RG_USB20_REF_EN_OFST (4) -#define A60810_RG_USB20_BGR_DIV_OFST (2) -#define A60810_RG_SIFSLV_CHP_EN_OFST (1) -#define A60810_RG_SIFSLV_BGR_EN_OFST (0) - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL_OFST (19) -#define A60810_RG_USB20_OTG_VBUSTH_OFST (16) -#define A60810_RG_USB20_VRT_VREF_SEL_OFST (12) -#define A60810_RG_USB20_TERM_VREF_SEL_OFST (8) -#define A60810_RG_USB20_MPX_SEL_OFST (0) - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN_OFST (17) -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN_OFST (16) -#define A60810_RG_USB20_CLKREF_REV_OFST (0) - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN_OFST (31) -#define A60810_RG_USB20_DP_ABIST_SELE_OFST (24) -#define A60810_RG_USB20_ICUSB_EN_OFST (16) -#define A60810_RG_USB20_LS_CR_OFST (12) -#define A60810_RG_USB20_FS_CR_OFST (8) -#define A60810_RG_USB20_LS_SR_OFST (4) -#define A60810_RG_USB20_FS_SR_OFST (0) - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN_OFST (28) -#define A60810_RG_USB20_INIT_SQ_EN_DG_OFST (26) -#define A60810_RG_USB20_HSTX_TMODE_SEL_OFST (24) -#define A60810_RG_USB20_SQD_OFST (22) -#define A60810_RG_USB20_DISCD_OFST (20) -#define A60810_RG_USB20_HSTX_TMODE_EN_OFST (19) -#define A60810_RG_USB20_PHYD_MONEN_OFST (18) -#define A60810_RG_USB20_INLPBK_EN_OFST (17) -#define A60810_RG_USB20_CHIRP_EN_OFST (16) -#define A60810_RG_USB20_HSTX_SRCAL_EN_OFST (15) -#define A60810_RG_USB20_HSTX_SRCTRL_OFST (12) -#define A60810_RG_USB20_HS_100U_U3_EN_OFST (11) -#define A60810_RG_USB20_GBIAS_ENB_OFST (10) -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN_OFST (7) -#define A60810_RG_USB20_DM_ABIST_SELE_OFST (0) - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN_OFST (31) -#define A60810_RG_USB20_PHY_REV_OFST (24) -#define A60810_RG_USB20_BC11_SW_EN_OFST (23) -#define A60810_RG_USB20_SR_CLK_SEL_OFST (22) -#define A60810_RG_USB20_OTG_VBUSCMP_EN_OFST (20) -#define A60810_RG_USB20_OTG_ABIST_EN_OFST (19) -#define A60810_RG_USB20_OTG_ABIST_SELE_OFST (16) -#define A60810_RG_USB20_HSRX_MMODE_SELE_OFST (12) -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL_OFST (9) -#define A60810_RG_USB20_HSRX_TMODE_EN_OFST (8) -#define A60810_RG_USB20_DISCTH_OFST (4) -#define A60810_RG_USB20_SQTH_OFST (0) - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST_OFST (28) -#define A60810_RG_USB20_HSTX_BIST_EN_OFST (26) -#define A60810_RG_USB20_HSTX_I_EN_MODE_OFST (24) -#define A60810_RG_USB20_USB11_TMODE_EN_OFST (19) -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN_OFST (18) -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN_OFST (17) -#define A60810_RG_USB20_TMODE_FS_LS_MODE_OFST (16) -#define A60810_RG_USB20_HS_TERM_EN_MODE_OFST (13) -#define A60810_RG_USB20_PUPD_BIST_EN_OFST (12) -#define A60810_RG_USB20_EN_PU_DM_OFST (11) -#define A60810_RG_USB20_EN_PD_DM_OFST (10) -#define A60810_RG_USB20_EN_PU_DP_OFST (9) -#define A60810_RG_USB20_EN_PD_DP_OFST (8) - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE_OFST (18) -#define A60810_RG_USB20_DM_100K_EN_OFST (17) -#define A60810_USB20_DP_100K_EN_OFST (16) -#define A60810_USB20_GPIO_DM_I_OFST (15) -#define A60810_USB20_GPIO_DP_I_OFST (14) -#define A60810_USB20_GPIO_DM_OE_OFST (13) -#define A60810_USB20_GPIO_DP_OE_OFST (12) -#define A60810_RG_USB20_GPIO_CTL_OFST (9) -#define A60810_USB20_GPIO_MODE_OFST (8) -#define A60810_RG_USB20_TX_BIAS_EN_OFST (5) -#define A60810_RG_USB20_TX_VCMPDN_EN_OFST (4) -#define A60810_RG_USB20_HS_SQ_EN_MODE_OFST (2) -#define A60810_RG_USB20_HS_RCV_EN_MODE_OFST (0) - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O_OFST (1) -#define A60810_RGO_USB20_GPIO_DP_O_OFST (0) - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST_OFST (30) -#define A60810_RG_USB20_GATED_ENB_OFST (29) -#define A60810_RG_USB20_TESTMODE_OFST (26) -#define A60810_RG_SIFSLV_USB20_PLL_STABLE_OFST (25) -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON_OFST (24) -#define A60810_RG_USB20_PHYD_RESERVE_OFST (8) -#define A60810_RG_USB20_EBTHRLD_OFST (7) -#define A60810_RG_USB20_EARLY_HSTX_I_OFST (6) -#define A60810_RG_USB20_TX_TST_OFST (5) -#define A60810_RG_USB20_NEGEDGE_ENB_OFST (4) -#define A60810_RG_USB20_CDR_FILT_OFST (0) - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL_OFST (24) -#define A60810_RG_USB20_DRVVBUS_OFST (23) -#define A60810_RG_DEBUG_EN_OFST (22) -#define A60810_RG_USB20_OTG_PROBE_OFST (20) -#define A60810_RG_USB20_SW_PLLMODE_OFST (18) -#define A60810_RG_USB20_BERTH_OFST (16) -#define A60810_RG_USB20_LBMODE_OFST (13) -#define A60810_RG_USB20_FORCE_TAP_OFST (12) -#define A60810_RG_USB20_TAPSEL_OFST (0) - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE_OFST (30) -#define A60810_FORCE_UART_I_OFST (29) -#define A60810_FORCE_UART_BIAS_EN_OFST (28) -#define A60810_FORCE_UART_TX_OE_OFST (27) -#define A60810_FORCE_UART_EN_OFST (26) -#define A60810_FORCE_USB_CLKEN_OFST (25) -#define A60810_FORCE_DRVVBUS_OFST (24) -#define A60810_FORCE_DATAIN_OFST (23) -#define A60810_FORCE_TXVALID_OFST (22) -#define A60810_FORCE_DM_PULLDOWN_OFST (21) -#define A60810_FORCE_DP_PULLDOWN_OFST (20) -#define A60810_FORCE_XCVRSEL_OFST (19) -#define A60810_FORCE_SUSPENDM_OFST (18) -#define A60810_FORCE_TERMSEL_OFST (17) -#define A60810_FORCE_OPMODE_OFST (16) -#define A60810_UTMI_MUXSEL_OFST (15) -#define A60810_RG_RESET_OFST (14) -#define A60810_RG_DATAIN_OFST (10) -#define A60810_RG_TXVALIDH_OFST (9) -#define A60810_RG_TXVALID_OFST (8) -#define A60810_RG_DMPULLDOWN_OFST (7) -#define A60810_RG_DPPULLDOWN_OFST (6) -#define A60810_RG_XCVRSEL_OFST (4) -#define A60810_RG_SUSPENDM_OFST (3) -#define A60810_RG_TERMSEL_OFST (2) -#define A60810_RG_OPMODE_OFST (0) - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN_OFST (31) -#define A60810_RG_USB20_PRBS7_BITCNT_OFST (24) -#define A60810_RG_USB20_CLK48M_EN_OFST (23) -#define A60810_RG_USB20_CLK60M_EN_OFST (22) -#define A60810_RG_UART_I_OFST (19) -#define A60810_RG_UART_BIAS_EN_OFST (18) -#define A60810_RG_UART_TX_OE_OFST (17) -#define A60810_RG_UART_EN_OFST (16) -#define A60810_RG_IP_U2_PORT_POWER_OFST (15) -#define A60810_FORCE_IP_U2_PORT_POWER_OFST (14) -#define A60810_FORCE_VBUSVALID_OFST (13) -#define A60810_FORCE_SESSEND_OFST (12) -#define A60810_FORCE_BVALID_OFST (11) -#define A60810_FORCE_AVALID_OFST (10) -#define A60810_FORCE_IDDIG_OFST (9) -#define A60810_FORCE_IDPULLUP_OFST (8) -#define A60810_RG_VBUSVALID_OFST (5) -#define A60810_RG_SESSEND_OFST (4) -#define A60810_RG_BVALID_OFST (3) -#define A60810_RG_AVALID_OFST (2) -#define A60810_RG_IDDIG_OFST (1) -#define A60810_RG_IDPULLUP_OFST (0) - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH_OFST (0) -#define E60802_RG_USB20_EOP_CTL_OFST (16) - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O_OFST (31) -#define A60810_RGO_USB20_LB_PASS_OFST (30) -#define A60810_RGO_USB20_LB_DONE_OFST (29) -#define A60810_AD_USB20_BVALID_OFST (28) -#define A60810_USB20_IDDIG_OFST (27) -#define A60810_AD_USB20_VBUSVALID_OFST (26) -#define A60810_AD_USB20_SESSEND_OFST (25) -#define A60810_AD_USB20_AVALID_OFST (24) -#define A60810_USB20_LINE_STATE_OFST (22) -#define A60810_USB20_HST_DISCON_OFST (21) -#define A60810_USB20_TX_READY_OFST (20) -#define A60810_USB20_RX_ERROR_OFST (19) -#define A60810_USB20_RX_ACTIVE_OFST (18) -#define A60810_USB20_RX_VALIDH_OFST (17) -#define A60810_USB20_RX_VALID_OFST (16) -#define A60810_USB20_DATA_OUT_OFST (0) - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT_OFST (24) -#define A60810_RGO_RXACTIVE_CNT_OFST (16) -#define A60810_RGO_USB20_LB_BERCNT_OFST (8) -#define A60810_USB20_PROBE_OUT_OFST (0) - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT_OFST (16) -#define A60810_RGO_USB20_PRBS7_DONE_OFST (3) -#define A60810_RGO_USB20_PRBS7_LOCK_OFST (2) -#define A60810_RGO_USB20_PRBS7_PASS_OFST (1) -#define A60810_RGO_USB20_PRBS7_PASSTH_OFST (0) - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT_OFST (28) -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT_OFST (24) -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE_OFST (16) -#define A60810_RG_CHGDT_ISRC_LEV_OFST (14) -#define A60810_RG_CHGDT_VDATSRC_OFST (13) -#define A60810_RG_CHGDT_BGVREF_SEL_OFST (10) -#define A60810_RG_CHGDT_RDVREF_SEL_OFST (8) -#define A60810_RG_CHGDT_ISRC_DP_OFST (7) -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM_OFST (6) -#define A60810_RG_CHGDT_VDAT_DM_OFST (5) -#define A60810_RG_CHGDT_OPOUT_DP_OFST (4) -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP_OFST (3) -#define A60810_RG_SIFSLV_CHGDT_COMP_EN_OFST (2) -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN_OFST (1) -#define A60810_RG_CHGDT_EN_OFST (0) - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV_OFST (0) - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG_OFST (4) -#define A60810_USB20_OTG_REG_OFST (3) -#define A60810_CHGDT_REG_OFST (2) -#define A60810_USB11_REG_OFST (1) -#define A60810_USB20_REG_OFST (0) - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE_OFST (24) -#define A60810_USB11_VERSION_CODE_OFST (16) -#define A60810_VERSION_CODE_ANA_OFST (8) -#define A60810_VERSION_CODE_DIG_OFST (0) - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE_OFST (24) -#define A60810_I2C_MODE_OFST (16) - -/* ///////////////////////////////////////////////////////////////// */ - -struct u3phya_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg2; - __le32 reg3; - /* 0x10 */ - __le32 reg4; - __le32 reg5; - __le32 reg6; - __le32 reg7; - /* 0x20 */ - __le32 reg8; - __le32 reg9; - __le32 rega; - __le32 regb; - /* 0x30 */ - __le32 regc; -}; - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CHPEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_BG_DIV (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_INTR_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_MPX_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_MPX_SEL (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_REF_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_VRT_VREF_SEL (0xf<<11) /* 14:11 */ -#define A60810_RG_SSUSB_BG_MONEN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_INT_BIAS_SEL (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EXT_BIAS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_CLKDRV_OFFSET (0x3<<2) /* 3:2 */ -#define A60810_RG_PCIE_CLKDRV_SLEW (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP (0x7<<29) /* 31:29 */ -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_XTAL_MON_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_XTAL_HYS (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE (0xffff<<10) /* 25:10 */ -#define A60810_RG_SSUSB_SYSPLL_PREDIV (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_SYSPLL_POSDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_SYSPLL_VOD_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_SYSPLL_RST_DLY (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_SYSPLL_BLP (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_SYSPLL_BP (0x1<<0) /* 0:0 */ - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_BC (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_SYSPLL_BACK_EN (0x1<<24) /* 24:24 */ - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV (0x7fffffff<<1)/* 31:1 */ -#define A60810_RG_SSUSB_SYSPLL_HR_EN (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS (0x3<<29) /* 30:29 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD (0x3<<27) /* 28:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_SYSPLL_RESERVE (0xff<<17)/* 24:17 */ -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE (0xffff<<1)/* 16:1 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_CALIB (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_IDEM_BIAS (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_TX_R50_FON (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_TX_SR (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_RXDET_RSEL (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXDET_UPDN_SEL (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_L (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CKMON_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TX_VLMON_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_TX_VLMON_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CKMON_SEL (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_RXLBTX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXLBRX_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RESERVE (0x3ff<<16)/* 25:16 */ -#define A60810_RG_SSUSB_PLL_POSDIV (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_PLL_VOD_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_PLL_MONREF_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_MONCK_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_PLL_MONVC_EN (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_PLL_RLH_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KS (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KF (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_RST_DLY (0x3<<2) /* 3:2 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_CLK_PH_INV (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_VADJ (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDS_MONEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE (0x7<<20) /* 22:20 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_DDS_C (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2 (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_LFPS_LPF (0x3<<13) /* 14:13 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_CDR_OSCDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_MONMUX (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_CDR_RST_DLY (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CDR_BYPASS (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_CDR_PI_SLEW (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_CDR_EPEN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_MONEN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_CDR_MONEN_DIG (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_REGOD (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KS (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KF (0x3<<9) /* 10:9 */ -#define A60810_RG_SSUSB_RX_DAC_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DAC_PWD (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_CURSEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MUX (0x1f<<1) /* 5:1 */ -#define A60810_RG_SSUSB_RX_R2T_EN (0x1<<0) /* 0:0 */ - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_50_LOWER (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_RX_50_TAR (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_RX_SW_CTRL (0xf<<21) /* 24:21 */ -#define A60810_RG_PCIE_SIGDET_VTH (0x3<<19) /* 20:19 */ -#define A60810_RG_PCIE_SIGDET_LPF (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_LFPS_MON_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RX_PD_RST (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_PD_RST_PASS (0x1<<9) /* 9:9 */ - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_RXAFE_RESERVE (0xff<<16) /* 23:16 */ -#define A60810_RG_PCIE_RX_RESERVE (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_VRT_25M_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_MPX_SEL_L0 (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_SIGDET_HF (0x3<<0) /* 1:0 */ - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN_OFST (31) -#define A60810_RG_SSUSB_CHPEN_OFST (30) -#define A60810_RG_SSUSB_BG_DIV_OFST (28) -#define A60810_RG_SSUSB_INTR_EN_OFST (26) -#define A60810_RG_SSUSB_MPX_EN_OFST (24) -#define A60810_RG_SSUSB_MPX_SEL_OFST (16) -#define A60810_RG_SSUSB_REF_EN_OFST (15) -#define A60810_RG_SSUSB_VRT_VREF_SEL_OFST (11) -#define A60810_RG_SSUSB_BG_MONEN_OFST (8) -#define A60810_RG_SSUSB_INT_BIAS_SEL_OFST (7) -#define A60810_RG_SSUSB_EXT_BIAS_SEL_OFST (6) -#define A60810_RG_PCIE_CLKDRV_OFFSET_OFST (2) -#define A60810_RG_PCIE_CLKDRV_SLEW_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP_OFST (29) -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN_OFST (28) -#define A60810_RG_SSUSB_XTAL_MON_EN_OFST (27) -#define A60810_RG_SSUSB_XTAL_HYS_OFST (26) -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE_OFST (10) -#define A60810_RG_SSUSB_SYSPLL_PREDIV_OFST (8) -#define A60810_RG_SSUSB_SYSPLL_POSDIV_OFST (6) -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL_OFST (5) -#define A60810_RG_SSUSB_SYSPLL_VOD_EN_OFST (4) -#define A60810_RG_SSUSB_SYSPLL_RST_DLY_OFST (2) -#define A60810_RG_SSUSB_SYSPLL_BLP_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_BP_OFST (0) - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_BC_OFST (30) -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN_OFST (28) -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM_OFST (26) -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_BACK_EN_OFST (24) - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_HR_EN_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_RESERVE_OFST (17) -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE_OFST (1) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB_OFST (31) -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN_OFST (30) -#define A60810_RG_SSUSB_IDRV_CALIB_OFST (24) -#define A60810_RG_SSUSB_IDEM_BIAS_OFST (20) -#define A60810_RG_SSUSB_TX_R50_FON_OFST (19) -#define A60810_RG_SSUSB_TX_SR_OFST (16) -#define A60810_RG_SSUSB_RXDET_RSEL_OFST (14) -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE_OFST (13) -#define A60810_RG_SSUSB_RXDET_UPDN_SEL_OFST (12) -#define A60810_RG_SSUSB_RXDET_VTHSEL_L_OFST (10) -#define A60810_RG_SSUSB_RXDET_VTHSEL_H_OFST (8) -#define A60810_RG_SSUSB_CKMON_EN_OFST (7) -#define A60810_RG_SSUSB_TX_VLMON_EN_OFST (6) -#define A60810_RG_SSUSB_TX_VLMON_SEL_OFST (4) -#define A60810_RG_SSUSB_CKMON_SEL_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM_OFST (28) -#define A60810_RG_SSUSB_RXLBTX_EN_OFST (27) -#define A60810_RG_SSUSB_TXLBRX_EN_OFST (26) -#define A60810_RG_SSUSB_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_POSDIV_OFST (14) -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD_OFST (13) -#define A60810_RG_SSUSB_PLL_VOD_EN_OFST (12) -#define A60810_RG_SSUSB_PLL_MONREF_EN_OFST (11) -#define A60810_RG_SSUSB_PLL_MONCK_EN_OFST (10) -#define A60810_RG_SSUSB_PLL_MONVC_EN_OFST (9) -#define A60810_RG_SSUSB_PLL_RLH_EN_OFST (8) -#define A60810_RG_SSUSB_PLL_AUTOK_KS_OFST (6) -#define A60810_RG_SSUSB_PLL_AUTOK_KF_OFST (4) -#define A60810_RG_SSUSB_PLL_RST_DLY_OFST (2) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_PRD_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI_OFST (31) -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN_OFST (30) -#define A60810_RG_SSUSB_PLL_CLK_PH_INV_OFST (29) -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_VADJ_OFST (26) -#define A60810_RG_SSUSB_PLL_DDS_MONEN_OFST (25) -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT_OFST (24) -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN_OFST (23) -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE_OFST (20) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_DDS_C_OFST (16) -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2_OFST (15) -#define A60810_RG_SSUSB_LFPS_LPF_OFST (13) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS_OFST (31) -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL_OFST (30) -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL_OFST (29) -#define A60810_RG_SSUSB_CDR_OSCDET_EN_OFST (28) -#define A60810_RG_SSUSB_CDR_MONMUX_OFST (27) -#define A60810_RG_SSUSB_CDR_RST_DLY_OFST (25) -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL_OFST (24) -#define A60810_RG_SSUSB_CDR_BYPASS_OFST (22) -#define A60810_RG_SSUSB_CDR_PI_SLEW_OFST (20) -#define A60810_RG_SSUSB_CDR_EPEN_OFST (19) -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD_OFST (18) -#define A60810_RG_SSUSB_CDR_MONEN_OFST (16) -#define A60810_RG_SSUSB_CDR_MONEN_DIG_OFST (15) -#define A60810_RG_SSUSB_CDR_REGOD_OFST (13) -#define A60810_RG_SSUSB_CDR_AUTOK_KS_OFST (11) -#define A60810_RG_SSUSB_CDR_AUTOK_KF_OFST (9) -#define A60810_RG_SSUSB_RX_DAC_EN_OFST (8) -#define A60810_RG_SSUSB_RX_DAC_PWD_OFST (7) -#define A60810_RG_SSUSB_EQ_CURSEL_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MUX_OFST (1) -#define A60810_RG_SSUSB_RX_R2T_EN_OFST (0) - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN_OFST (31) -#define A60810_RG_SSUSB_RX_50_LOWER_OFST (28) -#define A60810_RG_SSUSB_RX_50_TAR_OFST (26) -#define A60810_RG_SSUSB_RX_SW_CTRL_OFST (21) -#define A60810_RG_PCIE_SIGDET_VTH_OFST (19) -#define A60810_RG_PCIE_SIGDET_LPF_OFST (17) -#define A60810_RG_SSUSB_LFPS_MON_EN_OFST (16) -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL_OFST (12) -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS_OFST (11) -#define A60810_RG_SSUSB_RX_PD_RST_OFST (10) -#define A60810_RG_SSUSB_RX_PD_RST_PASS_OFST (9) - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE_OFST (24) -#define A60810_RG_SSUSB_RXAFE_RESERVE_OFST (16) -#define A60810_RG_PCIE_RX_RESERVE_OFST (8) -#define A60810_RG_SSUSB_VRT_25M_EN_OFST (7) -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN_OFST (5) -#define A60810_RG_SSUSB_MPX_SEL_L0_OFST (4) -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL_OFST (3) -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL_OFST (2) -#define A60810_RG_PCIE_SIGDET_HF_OFST (0) - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phya_da_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg4; - __le32 reg5; - /* 0x10 */ - __le32 reg6; - __le32 reg7; - __le32 reg8; - __le32 reg9; - /* 0x20 */ - __le32 reg10; - __le32 reg12; - __le32 reg13; - __le32 reg14; - /* 0x30 */ - __le32 reg15; - __le32 reg16; - __le32 reg19; - __le32 reg20; - /* 0x40 */ - __le32 reg21; - __le32 reg23; - __le32 reg25; - __le32 reg26; - /* 0x50 */ - __le32 reg28; - __le32 reg29; - __le32 reg30; - __le32 reg31; - /* 0x60 */ - __le32 reg32; - __le32 reg33; -}; - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_SPEED_PE2H (0x1<<23) /* 23:23 */ -#define A60810_RG_PCIE_SPEED_PE1D (0x1<<22) /* 22:22 */ -#define A60810_RG_PCIE_SPEED_PE1H (0x1<<21) /* 21:21 */ -#define A60810_RG_PCIE_SPEED_U3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3 (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D (0x1<<30) /* 30:30 */ -#define A60810_RG_USB20_REFCK_SEL_PE2H (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_REFCK_SEL_PE1D (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_REFCK_SEL_PE1H (0x1<<27) /* 27:27 */ -#define A60810_RG_USB20_REFCK_SEL_U3 (0x1<<26) /* 26:26 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1D (0x1<<18) /* 18:18 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1H (0x1<<17) /* 17:17 */ -#define A60810_RG_PCIE_REFCK_DIV4_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_PCIE_MODE_PE2D (0x1<<8) /* 8:8 */ -#define A60810_RG_PCIE_MODE_PE2H (0x1<<3) /* 3:3 */ -#define A60810_RG_PCIE_MODE_PE1D (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_MODE_PE1H (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_MODE_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D (0x7<<22) /* 24:22 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H (0x7<<19) /* 21:19 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H (0x7<<13) /* 15:13 */ -#define A60810_RG_SSUSB_PLL_DIVEN_U3 (0x7<<10) /* 12:10 */ -#define A60810_RG_SSUSB_PLL_BC_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_BC_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_BC_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_BC_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_BC_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_PLL_BR_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_PLL_BR_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_BR_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_BR_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_PLL_IC_PE2D (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IC_PE2H (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_PLL_IC_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IC_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IC_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_IR_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IR_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IR_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IR_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_BP_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_BP_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_BP_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_BP_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H (0x7f<<24)/* 30:24 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D (0x7f<<16)/* 22:16 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_PREDIV_U3 (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3 (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3 (0xffff<<0) /* 15:0 */ - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D (0xffff<<0) /* 15:0 */ - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D (0xffff<<0) /* 15:0 */ - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H (0xffff<<0) /* 15:0 */ - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H (0xffff<<0) /* 15:0 */ - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1D (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_BPA_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BPB_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BR_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BR_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BR_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BR_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_CDR_FBDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3 (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_KVSEL_U3 (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2H (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1D (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_CMPWD_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_U3 (0x3<<0) /* 1:0 */ - -/* OFFSET DEFINITION */ - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D_OFST (24) -#define A60810_RG_PCIE_SPEED_PE2H_OFST (23) -#define A60810_RG_PCIE_SPEED_PE1D_OFST (22) -#define A60810_RG_PCIE_SPEED_PE1H_OFST (21) -#define A60810_RG_PCIE_SPEED_U3_OFST (20) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D_OFST (18) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H_OFST (16) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D_OFST (14) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H_OFST (12) -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3_OFST (10) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D_OFST (8) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H_OFST (6) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D_OFST (4) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D_OFST (30) -#define A60810_RG_USB20_REFCK_SEL_PE2H_OFST (29) -#define A60810_RG_USB20_REFCK_SEL_PE1D_OFST (28) -#define A60810_RG_USB20_REFCK_SEL_PE1H_OFST (27) -#define A60810_RG_USB20_REFCK_SEL_U3_OFST (26) -#define A60810_RG_PCIE_REFCK_DIV4_PE2D_OFST (25) -#define A60810_RG_PCIE_REFCK_DIV4_PE2H_OFST (24) -#define A60810_RG_PCIE_REFCK_DIV4_PE1D_OFST (18) -#define A60810_RG_PCIE_REFCK_DIV4_PE1H_OFST (17) -#define A60810_RG_PCIE_REFCK_DIV4_U3_OFST (16) -#define A60810_RG_PCIE_MODE_PE2D_OFST (8) -#define A60810_RG_PCIE_MODE_PE2H_OFST (3) -#define A60810_RG_PCIE_MODE_PE1D_OFST (2) -#define A60810_RG_PCIE_MODE_PE1H_OFST (1) -#define A60810_RG_PCIE_MODE_U3_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D_OFST (22) -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H_OFST (19) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H_OFST (13) -#define A60810_RG_SSUSB_PLL_DIVEN_U3_OFST (10) -#define A60810_RG_SSUSB_PLL_BC_PE2D_OFST (8) -#define A60810_RG_SSUSB_PLL_BC_PE2H_OFST (6) -#define A60810_RG_SSUSB_PLL_BC_PE1D_OFST (4) -#define A60810_RG_SSUSB_PLL_BC_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_BC_U3_OFST (0) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D_OFST (30) -#define A60810_RG_SSUSB_PLL_BR_PE2H_OFST (28) -#define A60810_RG_SSUSB_PLL_BR_PE1D_OFST (26) -#define A60810_RG_SSUSB_PLL_BR_PE1H_OFST (24) -#define A60810_RG_SSUSB_PLL_BR_U3_OFST (22) -#define A60810_RG_SSUSB_PLL_IC_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_IC_PE2H_OFST (12) -#define A60810_RG_SSUSB_PLL_IC_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IC_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IC_U3_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_IR_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_IR_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IR_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IR_U3_OFST (0) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_BP_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_BP_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_BP_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_BP_U3_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_FBKSEL_U3_OFST (0) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_U3_OFST (0) - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D_OFST (26) -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D_OFST (18) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_PREDIV_U3_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D_OFST (0) - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3_OFST (0) - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H_OFST (0) - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D_OFST (0) - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H_OFST (0) - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D_OFST (0) - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST (0) - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D_OFST (0) - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D_OFST (0) - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H_OFST (0) - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H_OFST (0) - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D_OFST (25) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3_OFST (0) - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPA_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPA_PE1D_OFST (10) -#define A60810_RG_SSUSB_CDR_BPA_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_BPA_U3_OFST (0) - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPB_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPB_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BPB_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BPB_U3_OFST (0) - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BR_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BR_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BR_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BR_U3_OFST (0) - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_FBDIV_U3_OFST (0) - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D_OFST (30) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H_OFST (28) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D_OFST (26) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H_OFST (24) -#define A60810_RG_SSUSB_EQ_RSTEP1_U3_OFST (22) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D_OFST (20) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H_OFST (18) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D_OFST (16) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H_OFST (14) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3_OFST (12) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D_OFST (11) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H_OFST (10) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D_OFST (9) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_KVSEL_U3_OFST (7) -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D_OFST (0) - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D_OFST (26) -#define A60810_RG_SSUSB_RX_CMPWD_PE2H_OFST (25) -#define A60810_RG_SSUSB_RX_CMPWD_PE1D_OFST (24) -#define A60810_RG_SSUSB_RX_CMPWD_PE1H_OFST (23) -#define A60810_RG_SSUSB_RX_CMPWD_U3_OFST (16) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D_OFST (8) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H_OFST (6) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D_OFST (4) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H_OFST (2) -#define A60810_RG_SSUSB_EQ_RSTEP2_U3_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phyd_reg_a { - /* 0x0 */ - __le32 phyd_mix0; - __le32 phyd_mix1; - __le32 phyd_lfps0; - __le32 phyd_lfps1; - /* 0x10 */ - __le32 phyd_impcal0; - __le32 phyd_impcal1; - __le32 phyd_txpll0; - __le32 phyd_txpll1; - /* 0x20 */ - __le32 phyd_txpll2; - __le32 phyd_fl0; - __le32 phyd_mix2; - __le32 phyd_rx0; - /* 0x30 */ - __le32 phyd_t2rlb; - __le32 phyd_cppat; - __le32 phyd_mix3; - __le32 phyd_ebufctl; - /* 0x40 */ - __le32 phyd_pipe0; - __le32 phyd_pipe1; - __le32 phyd_mix4; - __le32 phyd_ckgen0; - /* 0x50 */ - __le32 phyd_mix5; - __le32 phyd_reserved; - __le32 phyd_cdr0; - __le32 phyd_cdr1; - /* 0x60 */ - __le32 phyd_pll_0; - __le32 phyd_pll_1; - __le32 phyd_bcn_det_1; - __le32 phyd_bcn_det_2; - /* 0x70 */ - __le32 eq0; - __le32 eq1; - __le32 eq2; - __le32 eq3; - /* 0x80 */ - __le32 eq_eye0; - __le32 eq_eye1; - __le32 eq_eye2; - __le32 eq_dfe0; - /* 0x90 */ - __le32 eq_dfe1; - __le32 eq_dfe2; - __le32 eq_dfe3; - __le32 reserve0; - /* 0xa0 */ - __le32 phyd_mon0; - __le32 phyd_mon1; - __le32 phyd_mon2; - __le32 phyd_mon3; - /* 0xb0 */ - __le32 phyd_mon4; - __le32 phyd_mon5; - __le32 phyd_mon6; - __le32 phyd_mon7; - /* 0xc0 */ - __le32 phya_rx_mon0; - __le32 phya_rx_mon1; - __le32 phya_rx_mon2; - __le32 phya_rx_mon3; - /* 0xd0 */ - __le32 phya_rx_mon4; - __le32 phya_rx_mon5; - __le32 phyd_cppat2; - __le32 eq_eye3; - /* 0xe0 */ - __le32 kband_out; - __le32 kband_out1; -}; - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TSEQ_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TSEQ_POLEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TSEQ_POL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_P3_PCLK_NG (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TSEQ_TH (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PRBS_BERTH (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_PRBS_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_BPSLOCK (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RTCOMCNT (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_COMCNT (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PRBSEL_CALIB (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PRBSEL_PCS (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_TXLFPS_PRD (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_P_RX_P0S_CK (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P_TX_P0S_CK (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PDNCTL (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_DRV_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TX_DRV_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TX_DRV_DLY (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_BERT_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_SCP_TH (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_SCP_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXANSIDEC_TEST (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_LFPS_PWD (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXLFPS_OVF (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_P3_ENTRY_SEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P3_ENTRY (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_RXLFPS_CDRSEL (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_RXLFPS_CDRTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LOCK5G_BLOCK (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_LOB (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_TXLFPS_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TXLFPS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RXLFPS_UPB (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_TX_IMP_BIAS (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_FWAKE_TH (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_P1_ENTRY_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_P1_ENTRY (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_UDF (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_TXPLL_ON (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_TXPLLON (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_TXPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_NCPO_CHG (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RSTB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_PWDB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDSEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_AUTOK_VCO (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_PWD (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_AFE_PWD (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_TCADJ (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PLL_PWD (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FLT_1_DISPERR_B (0x1<<2) /* 2:2 */ - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TX_LFPS (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXPLL_STB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXPLL_STB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_RXPLL_STB (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TXPLL_STB (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RXPLL_REFCKSEL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXPLL_STBMODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RXPLL_ON (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_FORCE_RXPLLON (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_AUTOK_VCO (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_PWD (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_CDR_TCADJ (0x3f<<0) /* 5:0 */ - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET (0xffff<<16)/* 31:16 */ -#define A60810_RG_SSUSB_RX_FL_CYCLECNT (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_EQ_RST_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXVAL_RST (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXVAL_CNT (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDROS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_LCKOP (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_RX_FL_LOCKTH (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_RX_FL_OFFSET (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_T2RLB_PAT (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_T2RLB_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_T2RLB_SERIAL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_T2RLB_MODE (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_RX_DFE_OPTION (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DFE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_DFE_EN_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_EQ_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RX_EQ_EN_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_RX_DFE_RST (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RX_DFE_RST_SEL (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PRB_OUT_CPPAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_BPANSIENC (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_VALID_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_EBUF_SRST (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_K_EMP (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_K_FUL (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_T2RLB_BDATRST (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PATMODE (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_T2RLB_TSEQCNT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CPPAT_TOZ (0x3<<21) /* 22:21 */ -#define A60810_RG_SSUSB_CPPAT_PRBS_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_CDROS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_PLL_SSCEN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_PI_PWD (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CDR_PI_MODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXEQTRAINING (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXPOLARITY (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_TXDEEMPH (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_POWERDOWN (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_TXONESZEROS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_TXELECIDLE (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_TXDETECTRX (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_PIPE_SEL (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_TXDATAK (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CDR_STABLE_SEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_STABLE (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CDR_RSTB_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_RSTB (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P_TXBCN_DIS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_ERROR_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_TXMARGIN (0x7<<1) /* 3:1 */ -#define A60810_RG_SSUSB_TXCOMPLIANCE (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_T2RLB_BER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_T2RLB_BER_RATE (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TFIFO_PSEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CKGEN_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_RXCK_INV (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RXPLL_STBCYC (0x7ff<<0) /* 10:0 */ - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_CDR_BC_LTD1 (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1 (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDR_BIR_LTR (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BW_SEL (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_EQ_T_SEL (0x3ff<<15)/* 24:15 */ -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC (0x3ff<<5)/* 14:5 */ -#define A60810_RG_SSUSB_PLLBAND_RECAL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_U_BCN_OBS_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL (0xfff<<16) /* 27:16 */ -#define A60810_RG_SSUSB_BCN_DET_DIS (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_U_BCN_OBS_SEL (0xfff<<0) /* 11:0 */ - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHL_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DE0OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DE1OS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_STOPTIME (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL (0x7<<11) /* 13:11 */ -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_STARTTIME (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL (0x7<<0) /* 2:0 */ - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2 (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_TH (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET (0x7f<<25) /* 31:25 */ -#define A60810_RG_SSUSB_EQ_EYE_MON_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_EQ_EYE0_Y (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_EYE1_Y (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PILPO_ROUT (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_PI_KPGAIN (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN (0x1<<3) /* 3:3 */ - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_EYE_MASK (0x3ff<<7) /* 16:7 */ - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_EQ_SD_CNT1 (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_EQ_SD_CNT0 (0x3f<<16) /* 21:16 */ - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DFEX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_CHK_EYE_H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EQ_PIEYE_INI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_PI90_INI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PI0_INI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR (0x7<<12) /* 14:12 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_DFEX_RST (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_GATED_RXD_B (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_EQ_PI90CK_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_DFEX_DIS (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL (0x1<<0) /* 0:0 */ - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_EQ_DFE_TOG (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO (0x3<<0) /* 1:0 */ - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_LFPS (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_TRAINDEC (0x7<<8) /* 10:8 */ -#define A60810_RGS_SSUSB_SCP_PAT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RETRACK (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_RXPLL_LOCK (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PDNCTL (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_PRBS_ERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_SCP_DETCNT (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_TSEQ_DETCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_BERT_LOCK (0x1<<15) /* 15:15 */ -#define A60810_RGS_SSUSB_SCP_DET (0x1<<14) /* 14:14 */ -#define A60810_RGS_SSUSB_TSEQ_DET (0x1<<13) /* 13:13 */ -#define A60810_RGS_SSUSB_EBUF_UDF (0x1<<12) /* 12:12 */ -#define A60810_RGS_SSUSB_EBUF_OVF (0x1<<11) /* 11:11 */ -#define A60810_RGS_SSUSB_PRBS_PASSTH (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_PRBS_PASS (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PRBS_LOCK (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_T2RLB_ERR (0x1<<6) /* 6:6 */ -#define A60810_RGS_SSUSB_T2RLB_PASSTH (0x1<<5) /* 5:5 */ -#define A60810_RGS_SSUSB_T2RLB_PASS (0x1<<4) /* 4:4 */ -#define A60810_RGS_SSUSB_T2RLB_LOCK (0x1<<3) /* 3:3 */ -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE (0x1<<2) /* 2:2 */ -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE (0x1<<1) /* 1:1 */ -#define A60810_RGS_SSUSB_RXDETECTED (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE (0x1<<30) /* 30:30 */ -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT (0x1<<29) /* 29:29 */ -#define A60810_RGS_SSUSB_SIGCAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RGS_SSUSB_RX_IMP_SEL (0x1f<<16) /* 20:16 */ -#define A60810_RGS_SSUSB_TX_IMP_SEL (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_TFIFO_MSG (0xf<<4) /* 7:4 */ -#define A60810_RGS_SSUSB_RFIFO_MSG (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PRB_OUT (0xff<<0) /* 7:0 */ - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_EQ_DCD0H (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCD0L (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCD1H (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_DCE0 (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCE1 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCHHL (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP (0x1<<31) /* 31:31 */ -#define A60810_RGS_SSUSB_EQ_DCLHL (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_STATUS (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_EQ_DCEYE0 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCEYE1 (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY (0x1<<7) /* 7:7 */ -#define A60810_RGS_SSUSB_EQ_PILPO (0x7f<<0) /* 6:0 */ - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT (0xfffff<<0) /* 19:0 */ - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RGS_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL (0x1<<24) /* 24:24 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG_OFST (31) -#define A60810_RG_SSUSB_TSEQ_EN_OFST (30) -#define A60810_RG_SSUSB_TSEQ_POLEN_OFST (29) -#define A60810_RG_SSUSB_TSEQ_POL_OFST (28) -#define A60810_RG_SSUSB_P_P3_PCLK_NG_OFST (27) -#define A60810_RG_SSUSB_TSEQ_TH_OFST (24) -#define A60810_RG_SSUSB_PRBS_BERTH_OFST (16) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON_OFST (15) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF_OFST (14) -#define A60810_RG_SSUSB_PRBS_EN_OFST (13) -#define A60810_RG_SSUSB_BPSLOCK_OFST (12) -#define A60810_RG_SSUSB_RTCOMCNT_OFST (8) -#define A60810_RG_SSUSB_COMCNT_OFST (4) -#define A60810_RG_SSUSB_PRBSEL_CALIB_OFST (0) - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN_OFST (31) -#define A60810_RG_SSUSB_PRBSEL_PCS_OFST (28) -#define A60810_RG_SSUSB_TXLFPS_PRD_OFST (24) -#define A60810_RG_SSUSB_P_RX_P0S_CK_OFST (23) -#define A60810_RG_SSUSB_P_TX_P0S_CK_OFST (22) -#define A60810_RG_SSUSB_PDNCTL_OFST (16) -#define A60810_RG_SSUSB_TX_DRV_EN_OFST (15) -#define A60810_RG_SSUSB_TX_DRV_SEL_OFST (14) -#define A60810_RG_SSUSB_TX_DRV_DLY_OFST (8) -#define A60810_RG_SSUSB_BERT_EN_OFST (7) -#define A60810_RG_SSUSB_SCP_TH_OFST (4) -#define A60810_RG_SSUSB_SCP_EN_OFST (3) -#define A60810_RG_SSUSB_RXANSIDEC_TEST_OFST (0) - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD_OFST (30) -#define A60810_RG_SSUSB_FORCE_LFPS_PWD_OFST (29) -#define A60810_RG_SSUSB_RXLFPS_OVF_OFST (24) -#define A60810_RG_SSUSB_P3_ENTRY_SEL_OFST (23) -#define A60810_RG_SSUSB_P3_ENTRY_OFST (22) -#define A60810_RG_SSUSB_RXLFPS_CDRSEL_OFST (20) -#define A60810_RG_SSUSB_RXLFPS_CDRTH_OFST (16) -#define A60810_RG_SSUSB_LOCK5G_BLOCK_OFST (15) -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL_OFST (14) -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_LOB_OFST (8) -#define A60810_RG_SSUSB_TXLFPS_EN_OFST (7) -#define A60810_RG_SSUSB_TXLFPS_SEL_OFST (6) -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK_OFST (5) -#define A60810_RG_SSUSB_RXLFPS_UPB_OFST (0) - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS_OFST (28) -#define A60810_RG_SSUSB_TX_IMP_BIAS_OFST (24) -#define A60810_RG_SSUSB_FWAKE_TH_OFST (16) -#define A60810_RG_SSUSB_P1_ENTRY_SEL_OFST (14) -#define A60810_RG_SSUSB_P1_ENTRY_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_UDF_OFST (8) -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH_OFST (0) - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_TX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_TX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_RX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_RX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_TXPLL_ON_OFST (26) -#define A60810_RG_SSUSB_FORCE_TXPLLON_OFST (25) -#define A60810_RG_SSUSB_TXPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC_OFST (10) -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN_OFST (31) -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN_OFST (30) -#define A60810_RG_SSUSB_PLL_NCPO_CHG_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RSTB_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_PWDB_OFST (26) -#define A60810_RG_SSUSB_PLL_DDSEN_OFST (25) -#define A60810_RG_SSUSB_PLL_AUTOK_VCO_OFST (24) -#define A60810_RG_SSUSB_PLL_PWD_OFST (23) -#define A60810_RG_SSUSB_RX_AFE_PWD_OFST (22) -#define A60810_RG_SSUSB_PLL_TCADJ_OFST (16) -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ_OFST (15) -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PWD_OFST (13) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN_OFST (12) -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN_OFST (11) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG_OFST (9) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB_OFST (8) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB_OFST (7) -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN_OFST (6) -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ_OFST (5) -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO_OFST (4) -#define A60810_RG_SSUSB_FORCE_PLL_PWD_OFST (3) -#define A60810_RG_SSUSB_FLT_1_DISPERR_B_OFST (2) - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN_OFST (31) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN_OFST (30) -#define A60810_RG_SSUSB_TX_LFPS_OFST (29) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_OFST (28) -#define A60810_RG_SSUSB_RXPLL_STB_OFST (27) -#define A60810_RG_SSUSB_TXPLL_STB_OFST (26) -#define A60810_RG_SSUSB_FORCE_RXPLL_STB_OFST (25) -#define A60810_RG_SSUSB_FORCE_TXPLL_STB_OFST (24) -#define A60810_RG_SSUSB_RXPLL_REFCKSEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBMODE_OFST (11) -#define A60810_RG_SSUSB_RXPLL_ON_OFST (10) -#define A60810_RG_SSUSB_FORCE_RXPLLON_OFST (9) -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD_OFST (8) -#define A60810_RG_SSUSB_CDR_AUTOK_VCO_OFST (7) -#define A60810_RG_SSUSB_CDR_PWD_OFST (6) -#define A60810_RG_SSUSB_CDR_TCADJ_OFST (0) - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET_OFST (16) -#define A60810_RG_SSUSB_RX_FL_CYCLECNT_OFST (0) - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST_OFST (31) -#define A60810_RG_SSUSB_RX_EQ_RST_SEL_OFST (30) -#define A60810_RG_SSUSB_RXVAL_RST_OFST (29) -#define A60810_RG_SSUSB_RXVAL_CNT_OFST (24) -#define A60810_RG_SSUSB_CDROS_EN_OFST (18) -#define A60810_RG_SSUSB_CDR_LCKOP_OFST (16) -#define A60810_RG_SSUSB_RX_FL_LOCKTH_OFST (8) -#define A60810_RG_SSUSB_RX_FL_OFFSET_OFST (0) - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH_OFST (24) -#define A60810_RG_SSUSB_T2RLB_PAT_OFST (16) -#define A60810_RG_SSUSB_T2RLB_EN_OFST (15) -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB_OFST (14) -#define A60810_RG_SSUSB_T2RLB_SERIAL_OFST (13) -#define A60810_RG_SSUSB_T2RLB_MODE_OFST (11) -#define A60810_RG_SSUSB_RX_SAOSC_EN_OFST (10) -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL_OFST (9) -#define A60810_RG_SSUSB_RX_DFE_OPTION_OFST (8) -#define A60810_RG_SSUSB_RX_DFE_EN_OFST (7) -#define A60810_RG_SSUSB_RX_DFE_EN_SEL_OFST (6) -#define A60810_RG_SSUSB_RX_EQ_EN_OFST (5) -#define A60810_RG_SSUSB_RX_EQ_EN_SEL_OFST (4) -#define A60810_RG_SSUSB_RX_SAOSC_RST_OFST (3) -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL_OFST (2) -#define A60810_RG_SSUSB_RX_DFE_RST_OFST (1) -#define A60810_RG_SSUSB_RX_DFE_RST_SEL_OFST (0) - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE_OFST (28) -#define A60810_RG_SSUSB_PRB_OUT_CPPAT_OFST (27) -#define A60810_RG_SSUSB_BPANSIENC_OFST (26) -#define A60810_RG_SSUSB_VALID_EN_OFST (25) -#define A60810_RG_SSUSB_EBUF_SRST_OFST (24) -#define A60810_RG_SSUSB_K_EMP_OFST (20) -#define A60810_RG_SSUSB_K_FUL_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BDATRST_OFST (12) -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PATMODE_OFST (8) -#define A60810_RG_SSUSB_T2RLB_TSEQCNT_OFST (0) - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN_OFST (24) -#define A60810_RG_SSUSB_CPPAT_TOZ_OFST (21) -#define A60810_RG_SSUSB_CPPAT_PRBS_EN_OFST (20) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0_OFST (0) - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS_OFST (31) -#define A60810_RG_SSUSB_P_CDROS_EN_OFST (30) -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS_OFST (28) -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET_OFST (24) -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN_OFST (20) -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET_OFST (16) -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN_OFST (15) -#define A60810_RG_SSUSB_PLL_SSCEN_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD_OFST (13) -#define A60810_RG_SSUSB_CDR_PI_PWD_OFST (12) -#define A60810_RG_SSUSB_CDR_PI_MODE_OFST (11) -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC_OFST (0) - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL_OFST (0) - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION_OFST (30) -#define A60810_RG_SSUSB_RXEQTRAINING_OFST (29) -#define A60810_RG_SSUSB_RXPOLARITY_OFST (28) -#define A60810_RG_SSUSB_TXDEEMPH_OFST (26) -#define A60810_RG_SSUSB_POWERDOWN_OFST (24) -#define A60810_RG_SSUSB_TXONESZEROS_OFST (23) -#define A60810_RG_SSUSB_TXELECIDLE_OFST (22) -#define A60810_RG_SSUSB_TXDETECTRX_OFST (21) -#define A60810_RG_SSUSB_PIPE_SEL_OFST (20) -#define A60810_RG_SSUSB_TXDATAK_OFST (16) -#define A60810_RG_SSUSB_CDR_STABLE_SEL_OFST (15) -#define A60810_RG_SSUSB_CDR_STABLE_OFST (14) -#define A60810_RG_SSUSB_CDR_RSTB_SEL_OFST (13) -#define A60810_RG_SSUSB_CDR_RSTB_OFST (12) -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN_OFST (11) -#define A60810_RG_SSUSB_P_TXBCN_DIS_OFST (6) -#define A60810_RG_SSUSB_P_ERROR_SEL_OFST (4) -#define A60810_RG_SSUSB_TXMARGIN_OFST (1) -#define A60810_RG_SSUSB_TXCOMPLIANCE_OFST (0) - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA_OFST (0) - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT_OFST (24) -#define A60810_RG_SSUSB_T2RLB_BER_EN_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BER_RATE_OFST (0) - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT_OFST (27) -#define A60810_RG_SSUSB_TFIFO_PSEL_OFST (24) -#define A60810_RG_SSUSB_CKGEN_PSEL_OFST (8) -#define A60810_RG_SSUSB_RXCK_INV_OFST (0) - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBCYC_OFST (0) - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE_OFST (0) - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_CDR_BC_LTD0_OFST (0) - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_CDR_BW_SEL_OFST (6) -#define A60810_RG_SSUSB_CDR_BIC_LTD1_OFST (0) - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G_OFST (28) -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G_OFST (27) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G_OFST (26) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G_OFST (25) -#define A60810_RG_SSUSB_P_EQ_T_SEL_OFST (15) -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC_OFST (5) -#define A60810_RG_SSUSB_PLLBAND_RECAL_OFST (4) -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN_OFST (3) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN_OFST (2) -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON_OFST (0) - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RG_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RG_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RG_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD_OFST (16) -#define A60810_RG_SSUSB_U_BCN_OBS_PRD_OFST (0) - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL_OFST (16) -#define A60810_RG_SSUSB_BCN_DET_DIS_OFST (12) -#define A60810_RG_SSUSB_U_BCN_OBS_SEL_OFST (0) - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHL_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI_OFST (0) - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DE0OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DE1OS_LFI_OFST (0) - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_STOPTIME_OFST (14) -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL_OFST (11) -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL_OFST (8) -#define A60810_RG_SSUSB_EQ_STARTTIME_OFST (6) -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL_OFST (3) -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL_OFST (0) - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2_OFST (28) -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1_OFST (24) -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_TRI_DET_EN_OFST (7) -#define A60810_RG_SSUSB_EQ_TRI_DET_TH_OFST (0) - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET_OFST (25) -#define A60810_RG_SSUSB_EQ_EYE_MON_EN_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE0_Y_OFST (16) -#define A60810_RG_SSUSB_EQ_EYE1_Y_OFST (8) -#define A60810_RG_SSUSB_EQ_PILPO_ROUT_OFST (7) -#define A60810_RG_SSUSB_EQ_PI_KPGAIN_OFST (4) -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN_OFST (3) - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_MASK_OFST (7) - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL_OFST (31) -#define A60810_RG_SSUSB_EQ_SD_CNT1_OFST (24) -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL_OFST (22) -#define A60810_RG_SSUSB_EQ_SD_CNT0_OFST (16) - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX_OFST (28) -#define A60810_RG_SSUSB_EQ_DFEX_EN_OFST (27) -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_CHK_EYE_H_OFST (23) -#define A60810_RG_SSUSB_EQ_PIEYE_INI_OFST (16) -#define A60810_RG_SSUSB_EQ_PI90_INI_OFST (8) -#define A60810_RG_SSUSB_EQ_PI0_INI_OFST (0) - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV_OFST (16) -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR_OFST (12) -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR_OFST (8) -#define A60810_RG_SSUSB_EQ_DFEX_RST_OFST (7) -#define A60810_RG_SSUSB_EQ_GATED_RXD_B_OFST (6) -#define A60810_RG_SSUSB_EQ_PI90CK_SEL_OFST (4) -#define A60810_RG_SSUSB_EQ_DFEX_DIS_OFST (2) -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS_OFST (1) -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL_OFST (0) - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT_OFST (16) -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DFE_TOG_OFST (2) -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO_OFST (0) - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED_OFST (0) - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC_OFST (16) -#define A60810_RGS_SSUSB_LFPS_OFST (12) -#define A60810_RGS_SSUSB_TRAINDEC_OFST (8) -#define A60810_RGS_SSUSB_SCP_PAT_OFST (0) - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT_OFST (0) - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_RETRACK_OFST (12) -#define A60810_RGS_SSUSB_RXPLL_LOCK_OFST (10) -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D_OFST (9) -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D_OFST (8) -#define A60810_RGS_SSUSB_PDNCTL_OFST (0) - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_PRBS_ERRCNT_OFST (0) - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT_OFST (24) -#define A60810_RGS_SSUSB_SCP_DETCNT_OFST (16) -#define A60810_RGS_SSUSB_TSEQ_DETCNT_OFST (0) - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG_OFST (16) -#define A60810_RGS_SSUSB_BERT_LOCK_OFST (15) -#define A60810_RGS_SSUSB_SCP_DET_OFST (14) -#define A60810_RGS_SSUSB_TSEQ_DET_OFST (13) -#define A60810_RGS_SSUSB_EBUF_UDF_OFST (12) -#define A60810_RGS_SSUSB_EBUF_OVF_OFST (11) -#define A60810_RGS_SSUSB_PRBS_PASSTH_OFST (10) -#define A60810_RGS_SSUSB_PRBS_PASS_OFST (9) -#define A60810_RGS_SSUSB_PRBS_LOCK_OFST (8) -#define A60810_RGS_SSUSB_T2RLB_ERR_OFST (6) -#define A60810_RGS_SSUSB_T2RLB_PASSTH_OFST (5) -#define A60810_RGS_SSUSB_T2RLB_PASS_OFST (4) -#define A60810_RGS_SSUSB_T2RLB_LOCK_OFST (3) -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE_OFST (2) -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE_OFST (1) -#define A60810_RGS_SSUSB_RXDETECTED_OFST (0) - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE_OFST (30) -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT_OFST (29) -#define A60810_RGS_SSUSB_SIGCAL_OFFSET_OFST (24) -#define A60810_RGS_SSUSB_RX_IMP_SEL_OFST (16) -#define A60810_RGS_SSUSB_TX_IMP_SEL_OFST (8) -#define A60810_RGS_SSUSB_TFIFO_MSG_OFST (4) -#define A60810_RGS_SSUSB_RFIFO_MSG_OFST (0) - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT_OFST (8) -#define A60810_RGS_SSUSB_PRB_OUT_OFST (0) - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCD0H_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCD0L_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCD1H_OFST (0) - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCE0_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCE1_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCHHL_OFST (0) - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP_OFST (31) -#define A60810_RGS_SSUSB_EQ_DCLHL_OFST (24) -#define A60810_RGS_SSUSB_EQ_STATUS_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCEYE0_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCEYE1_OFST (0) - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0_OFST (0) - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1_OFST (0) - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS_OFST (8) -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY_OFST (7) -#define A60810_RGS_SSUSB_EQ_PILPO_OFST (0) - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0_OFST (0) - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_CNT_OFST (0) - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RGS_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RGS_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RGS_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL_OFST (24) -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE_OFST (16) -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phyd_bank2_reg_a { - /* 0x0 */ - __le32 b2_phyd_top1; - __le32 b2_phyd_top2; - __le32 b2_phyd_top3; - __le32 b2_phyd_top4; - /* 0x10 */ - __le32 b2_phyd_top5; - __le32 b2_phyd_top6; - __le32 b2_phyd_top7; - __le32 b2_phyd_p_sigdet1; - /* 0x20 */ - __le32 b2_phyd_p_sigdet2; - __le32 b2_phyd_p_sigdet_cal1; - __le32 b2_phyd_rxdet1; - __le32 b2_phyd_rxdet2; - /* 0x30 */ - __le32 b2_phyd_misc0; - __le32 b2_phyd_misc2; - __le32 b2_phyd_misc3; - __le32 b2_phyd_l1ss; - /* 0x40 */ - __le32 b2_rosc_0; - __le32 b2_rosc_1; - __le32 b2_rosc_2; - __le32 b2_rosc_3; - /* 0x50 */ - __le32 b2_rosc_4; - __le32 b2_rosc_5; - __le32 b2_rosc_6; - __le32 b2_rosc_7; - /* 0x60 */ - __le32 b2_rosc_8; - __le32 b2_rosc_9; - __le32 b2_rosc_a; - __le32 reserve1; - /* 0x70~0xd0 */ - __le32 reserve2[28]; - /* 0xe0 */ - __le32 phyd_version; - __le32 phyd_model; -}; - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_PCIE2_K_FUL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_SIGDET_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CLKRX_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_CLKRX_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CLKTX_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_CLKTX_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CLK_REQ_N_I (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RATE (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_RATE (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_PCIE_MODE_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_PHY_MODE (0x3<<1) /* 2:1 */ -#define A60810_RG_SSUSB_FORCE_PHY_MODE (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_6DB (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_IDEM_3P5DB (0x3f<<16) /* 21:16 */ -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_IDRV_3P5DB (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_FORCE_IDRV_0DB (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_IDRV_0DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI (0x7<<25) /* 27:25 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TX_BIASI_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_IDEM_6DB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_IDEM_6DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL (0x7f<<0) /* 6:0 */ - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL (0x3<<0) /* 1:0 */ - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_P_SIGDET_REK (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_CMDET (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXDET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_RXDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXDET_K_TWICE (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET (0x1ff<<18) /* 26:18 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB1_SET (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_PDN_T_SEL (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3 (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3 (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC (0x3f<<26) /* 31:26 */ -#define A60810_RG_SSUSB_TX_SER_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TX_SER_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TXPLL_REFCKSEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LFPS_PSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P3_CLS_CK_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PPCTL_PSEL (0x7<<5) /* 7:5 */ -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_BERTLB_PSEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_RETRACK_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_PPERRCNT_CLR (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2 (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ (0xf<<27) /* 30:27 */ -#define A60810_RG_SSUSB_P_SIGDET_125FILTER (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EIDLE_BF_RXDET (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC (0x1ff<<13) /* 21:13 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY (0x3f<<7) /* 12:7 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY (0x3f<<1) /* 6:1 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE (0x7<<16) /* 18:16 */ -#define A60810_RGS_SSUSB_PPERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1 (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_L1SS_REV0 (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_PLL_REK_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_TXDRV_MASKDLY (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RXSTS_VAL (0x1<<7) /* 7:7 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT (0x1<<4) /* 4:4 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXPLL_STB_PX0 (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_L1SS_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_FORCE_L1SS_EN (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND (0x1ff<<23) /* 31:23 */ -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_RING_OSC_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_BYPASS_DET (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RING_OSC_P3 (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_RING_OSC_RECAL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RING_OSC_SEL (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_ROSC_PROB_SEL (0xf<<2) /* 5:2 */ -#define A60810_RG_SSUSB_RING_FREQMETER_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RING_OSC_STATE (0x3<<10) /* 11:10 */ -#define A60810_RGS_SSUSB_RING_OSC_STABLE (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL (0xff<<0) /* 7:0 */ - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT (0xff<<0)/* 7:0 */ - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL (0xffffffff<<0)/* 31:0 */ - -/* OFFSET */ - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP_OFST (28) -#define A60810_RG_SSUSB_PCIE2_K_FUL_OFST (24) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_OFST (17) -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN_OFST (16) -#define A60810_RG_SSUSB_SIGDET_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_CLKRX_EN_OFST (13) -#define A60810_RG_SSUSB_FORCE_CLKRX_EN_OFST (12) -#define A60810_RG_SSUSB_CLKTX_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_CLKTX_EN_OFST (10) -#define A60810_RG_SSUSB_CLK_REQ_N_I_OFST (9) -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I_OFST (8) -#define A60810_RG_SSUSB_RATE_OFST (6) -#define A60810_RG_SSUSB_FORCE_RATE_OFST (5) -#define A60810_RG_SSUSB_PCIE_MODE_SEL_OFST (4) -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL_OFST (3) -#define A60810_RG_SSUSB_PHY_MODE_OFST (1) -#define A60810_RG_SSUSB_FORCE_PHY_MODE_OFST (0) - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB_OFST (30) -#define A60810_RG_SSUSB_IDRV_6DB_OFST (24) -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB_OFST (22) -#define A60810_RG_SSUSB_IDEM_3P5DB_OFST (16) -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB_OFST (14) -#define A60810_RG_SSUSB_IDRV_3P5DB_OFST (8) -#define A60810_RG_SSUSB_FORCE_IDRV_0DB_OFST (6) -#define A60810_RG_SSUSB_IDRV_0DB_OFST (0) - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN_OFST (24) -#define A60810_RG_SSUSB_TX_BIASI_EN_OFST (16) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_OFST (13) -#define A60810_RG_SSUSB_FORCE_IDEM_6DB_OFST (8) -#define A60810_RG_SSUSB_IDEM_6DB_OFST (0) - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G1_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G2_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS_OFST (31) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL_OFST (28) -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL_OFST (10) -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS_OFST (6) -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD_OFST (5) -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ_OFST (4) -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET_OFST (24) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN_OFST (8) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN_OFST (3) -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD_OFST (1) -#define A60810_RG_SSUSB_P_SIGDET_REK_OFST (0) - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL_OFST (31) -#define A60810_RG_SSUSB_FORCE_CMDET_OFST (30) -#define A60810_RG_SSUSB_RXDET_EN_OFST (29) -#define A60810_RG_SSUSB_FORCE_RXDET_EN_OFST (28) -#define A60810_RG_SSUSB_RXDET_K_TWICE_OFST (27) -#define A60810_RG_SSUSB_RXDET_STB3_SET_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB2_SET_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB1_SET_OFST (0) - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN_OFST (31) -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN_OFST (30) -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN_OFST (29) -#define A60810_RG_SSUSB_LCK2REF_EXT_EN_OFST (28) -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL_OFST (24) -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL_OFST (20) -#define A60810_RG_SSUSB_PDN_T_SEL_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3_OFST (0) - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC_OFST (26) -#define A60810_RG_SSUSB_TX_SER_EN_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_SER_EN_OFST (24) -#define A60810_RG_SSUSB_TXPLL_REFCKSEL_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN_OFST (22) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN_OFST (21) -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV_OFST (20) -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH_OFST (16) -#define A60810_RG_SSUSB_LFPS_PSEL_OFST (15) -#define A60810_RG_SSUSB_RX_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL_OFST (13) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_OFST (12) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL_OFST (11) -#define A60810_RG_SSUSB_P3_CLS_CK_SEL_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PSEL_OFST (8) -#define A60810_RG_SSUSB_PPCTL_PSEL_OFST (5) -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV_OFST (4) -#define A60810_RG_SSUSB_BERTLB_PSEL_OFST (2) -#define A60810_RG_SSUSB_RETRACK_DIS_OFST (1) -#define A60810_RG_SSUSB_PPERRCNT_CLR_OFST (0) - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2_OFST (31) -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_125FILTER_OFST (26) -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW_OFST (23) -#define A60810_RG_SSUSB_EIDLE_BF_RXDET_OFST (22) -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC_OFST (13) -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY_OFST (7) -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY_OFST (1) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV_OFST (0) - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE_OFST (16) -#define A60810_RGS_SSUSB_PPERRCNT_OFST (0) - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1_OFST (24) -#define A60810_RG_SSUSB_L1SS_REV0_OFST (16) -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS_OFST (11) -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS_OFST (10) -#define A60810_RG_SSUSB_P_PLL_REK_SEL_OFST (9) -#define A60810_RG_SSUSB_TXDRV_MASKDLY_OFST (8) -#define A60810_RG_SSUSB_RXSTS_VAL_OFST (7) -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN_OFST (6) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN_OFST (5) -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT_OFST (4) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT_OFST (3) -#define A60810_RG_SSUSB_RXPLL_STB_PX0_OFST (2) -#define A60810_RG_PCIE_L1SS_EN_OFST (1) -#define A60810_RG_PCIE_FORCE_L1SS_EN_OFST (0) - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND_OFST (23) -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_EN_OFST (3) -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN_OFST (2) -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET_OFST (1) -#define A60810_RG_SSUSB_RING_BYPASS_DET_OFST (0) - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3_OFST (20) -#define A60810_RG_SSUSB_RING_OSC_P3_OFST (19) -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL_OFST (17) -#define A60810_RG_SSUSB_RING_OSC_RECAL_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_SEL_OFST (8) -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL_OFST (0) - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC1_OFST (0) - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC3_OFST (0) - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_DETWIN2_OFST (0) - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND1_OFST (0) - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND2_OFST (0) - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND3_OFST (0) - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE_OFST (16) -#define A60810_RG_SSUSB_ROSC_PROB_SEL_OFST (2) -#define A60810_RG_SSUSB_RING_FREQMETER_EN_OFST (1) -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND_OFST (0) - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT_OFST (16) -#define A60810_RGS_SSUSB_RING_OSC_STATE_OFST (10) -#define A60810_RGS_SSUSB_RING_OSC_STABLE_OFST (9) -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_RING_OSC_CAL_OFST (0) - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT_OFST (0) - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION_OFST (0) - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct sifslv_chip_reg_a { - /* 0x0 */ - __le32 gpio_ctla; - __le32 gpio_ctlb; - __le32 gpio_ctlc; -}; - -/* //////////////////////////////////////////////////////////////////////// */ - -struct sifslv_fm_reg_a { - /* 0x0 */ - __le32 fmcr0; - __le32 fmcr1; - __le32 fmcr2; - __le32 fmmonr0; - /* 0X10 */ - __le32 fmmonr1; -}; - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH (0xf<<28)/* 31:28 */ -#define A60810_RG_MONCLK_SEL (0x3<<26)/* 27:26 */ -#define A60810_RG_FM_MODE (0x1<<25)/* 25:25 */ -#define A60810_RG_FREQDET_EN (0x1<<24)/* 24:24 */ -#define A60810_RG_CYCLECNT (0xffffff<<0)/* 23:0 */ - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2 (0x1<<9)/* 9:9 */ -#define A60810_RG_FRCK_EN (0x1<<8)/* 8:8 */ -#define A60810_USBPLL_LOCK (0x1<<1)/* 1:1 */ -#define A60810_USB_FM_VLD (0x1<<0)/* 0:0 */ - -/* OFFSET */ - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH_OFST (28) -#define A60810_RG_MONCLK_SEL_OFST (26) -#define A60810_RG_FM_MODE_OFST (25) -#define A60810_RG_FREQDET_EN_OFST (24) -#define A60810_RG_CYCLECNT_OFST (0) - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET_OFST (0) - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET_OFST (0) - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT_OFST (0) - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2_OFST (9) -#define A60810_RG_FRCK_EN_OFST (8) -#define A60810_USBPLL_LOCK_OFST (1) -#define A60810_USB_FM_VLD_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct spllc_reg_a { - /* 0x0 */ - __le32 u3d_syspll_0; - __le32 u3d_syspll_1; - __le32 u3d_syspll_2; - __le32 u3d_syspll_sdm; - /* 0x10 */ - __le32 u3d_xtalctl_1; - __le32 u3d_xtalctl_2; - __le32 u3d_xtalctl3; -}; - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC (0x3<<25)/* 26:25 */ -#define A60810_RG_SSUSB_SPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_SYSPLL_ON (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SYSPLLON (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC (0x7<<0)/* 2:0 */ - -/* U3D_SYSPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_SYSPLL_STB (0x1<<23)/* 23:23 */ -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB (0x1<<22)/* 22:22 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN (0x1<<21)/* 21:21 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_PLL_BIAS_PWD (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN (0x1<<14)/* 14:14 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FORCE_SPLL_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_SPLL_NCPO_EN (0x1<<7)/* 7:7 */ -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN (0x1<<6)/* 6:6 */ -#define A60810_RG_SSUSB_SPLL_NCPO_CHG (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_SPLL_DDS_RSTB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWDB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_SPLL_DDSEN (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC (0x3ff<<14)/* 23:14 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN (0x1<<13)/* 13:13 */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC (0x3ff<<2)/* 11:2 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC (0x3fff<<17)/* 30:17 */ -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_XTAL_STBCYC (0x7fff<<0)/* 14:0 */ - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL (0x1<<29)/* 29:29 */ -#define A60810_RG_SSUSB_BG_LPF_DLY (0x3<<27)/* 28:27 */ -#define A60810_RG_SSUSB_BG_LPF_EN (0x1<<26)/* 26:26 */ -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN (0x1<<25)/* 25:25 */ -#define A60810_RG_SSUSB_P3_BIAS_PWD (0x1<<24)/* 24:24 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_EN (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_USB20_BIAS_EN (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_USB20_SLEEP (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_OSC_ONLY (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_OSC_EN (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_XTALBIAS_STB (0x1<<5)/* 5:5 */ -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_BIAS_PWD (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_PWD (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_FORCE_BIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_FORCE_XTAL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_BIASIMR_EN (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_XTAL_RX_PWD (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_CKBG_PROB_SEL (0x3<<6)/* 7:6 */ -#define A60810_RG_SSUSB_XTAL_PROB_SEL (0x3<<4)/* 5:4 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD (0x1<<0)/* 0:0 */ - - -/* SSUSB_SIFSLV_SPLLC FIELD OFFSET DEFINITION */ - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC_OFST (25) -#define A60810_RG_SSUSB_SPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_SYSPLL_ON_OFST (11) -#define A60810_RG_SSUSB_FORCE_SYSPLLON_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_SYA60810_SPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC_OFST (24) -#define A60810_RG_SSUSB_SYSPLL_STB_OFST (23) -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB_OFST (22) -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN_OFST (21) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN_OFST (20) -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON_OFST (19) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON_OFST (18) -#define A60810_RG_SSUSB_PLL_BIAS_PWD_OFST (17) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD_OFST (16) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN_OFST (14) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG_OFST (12) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB_OFST (11) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB_OFST (10) -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN_OFST (9) -#define A60810_RG_SSUSB_FORCE_SPLL_PWD_OFST (8) -#define A60810_RG_SSUSB_SPLL_NCPO_EN_OFST (7) -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN_OFST (6) -#define A60810_RG_SSUSB_SPLL_NCPO_CHG_OFST (4) -#define A60810_RG_SSUSB_SPLL_DDS_RSTB_OFST (3) -#define A60810_RG_SSUSB_SPLL_DDS_PWDB_OFST (2) -#define A60810_RG_SSUSB_SPLL_DDSEN_OFST (1) -#define A60810_RG_SSUSB_SPLL_PWD_OFST (0) - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL_OFST (11) -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC_OFST (0) - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC_OFST (14) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN_OFST (13) -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_OFST (12) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC_OFST (2) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_OFST (0) - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC_OFST (17) -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N_OFST (16) -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N_OFST (15) -#define A60810_RG_SSUSB_XTAL_STBCYC_OFST (0) - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL_OFST (29) -#define A60810_RG_SSUSB_BG_LPF_DLY_OFST (27) -#define A60810_RG_SSUSB_BG_LPF_EN_OFST (26) -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN_OFST (25) -#define A60810_RG_SSUSB_P3_BIAS_PWD_OFST (24) -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT_OFST (20) -#define A60810_RG_SSUSB_PCIE_CLKDET_EN_OFST (19) -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN_OFST (18) -#define A60810_RG_SSUSB_USB20_BIAS_EN_OFST (17) -#define A60810_RG_SSUSB_USB20_SLEEP_OFST (16) -#define A60810_RG_SSUSB_OSC_ONLY_OFST (9) -#define A60810_RG_SSUSB_OSC_EN_OFST (8) -#define A60810_RG_SSUSB_XTALBIAS_STB_OFST (5) -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB_OFST (4) -#define A60810_RG_SSUSB_BIAS_PWD_OFST (3) -#define A60810_RG_SSUSB_XTAL_PWD_OFST (2) -#define A60810_RG_SSUSB_FORCE_BIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_FORCE_XTAL_PWD_OFST (0) - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV_OFST (12) -#define A60810_RG_SSUSB_BIASIMR_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN_OFST (10) -#define A60810_RG_SSUSB_XTAL_RX_PWD_OFST (9) -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD_OFST (8) -#define A60810_RG_SSUSB_CKBG_PROB_SEL_OFST (6) -#define A60810_RG_SSUSB_XTAL_PROB_SEL_OFST (4) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB_OFST (3) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB_OFST (2) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD_OFST (0) - -struct u3phy_info { - struct u2phy_reg_a *u2phy_regs_a; - struct u3phya_reg_a *u3phya_regs_a; - struct u3phya_da_reg_a *u3phya_da_regs_a; - struct u3phyd_reg_a *u3phyd_regs_a; - struct u3phyd_bank2_reg_a *u3phyd_bank2_regs_a; - struct sifslv_chip_reg_a *sifslv_chip_regs_a; - struct spllc_reg_a *spllc_regs_a; - struct sifslv_fm_reg_a *sifslv_fm_regs_a; -}; - -#endif diff --git a/drivers/misc/mediatek/usb20/mt6768/otg.c b/drivers/misc/mediatek/usb20/mt6768/otg.c deleted file mode 100644 index 2c54b9cc224c..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/otg.c +++ /dev/null @@ -1,136 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include "musb_core.h" - -#ifdef CONFIG_MTK_MUSB_CARPLAY_SUPPORT - -struct carplay_dev { - struct usb_interface *intf; - struct usb_device *dev; -}; - -struct carplay_dev *apple_dev; -bool apple; - -int send_switch_cmd(void) -{ - int retval; - - if (apple_dev == NULL) { - DBG(0, "no apple device attach.\n"); - return -1; - } - DBG(0, "before usb_control_msg\n"); - retval = usb_control_msg(apple_dev->dev, - usb_rcvctrlpipe(apple_dev->dev, 0), - 0x51, 0x40, 1, 0, NULL, 0, - USB_CTRL_GET_TIMEOUT); - - DBG(0, "after usb_control_msg retval = %d\n", retval); - - if (retval != 0) { - DBG(0, "%s fail retval = %d\n", __func__, retval); - return -1; - } - - return 0; -} - -static int carplay_probe(struct usb_interface *intf, - const struct usb_device_id *id) -{ - struct usb_device *udev; - struct carplay_dev *car_dev; - - DBG(0, "++ carplay probe ++\n"); - udev = interface_to_usbdev(intf); - - car_dev = kzalloc(sizeof(*car_dev), GFP_KERNEL); - if (!car_dev) - return -ENOMEM; - - usb_set_intfdata(intf, car_dev); - car_dev->dev = udev; - car_dev->intf = intf; - apple_dev = car_dev; - apple = true; - if (car_dev->dev == NULL) - DBG(0, "car_dev->dev error\n"); - - return 0; -} - -static void carplay_disconnect(struct usb_interface *intf) -{ - struct carplay_dev *car_dev = usb_get_intfdata(intf); - - usb_set_intfdata(intf, NULL); - dev_dbg(&intf->dev, "disconnect\n"); - car_dev->dev = NULL; - car_dev->intf = NULL; - kfree(car_dev); - apple_dev = NULL; - apple = false; - DBG(0, "%s.\n", __func__); -} - -static const struct usb_device_id id_table[] = { - - /*-------------------------------------------------------------*/ - - /* EZ-USB devices which download firmware to replace (or in our - * case augment) the default device implementation. - */ - - /* generic EZ-USB FX2 controller (or development board) */ - {USB_DEVICE(0x05ac, 0x12a8), - }, - - /*-------------------------------------------------------------*/ - - {} -}; - -/* MODULE_DEVICE_TABLE(usb, id_table); */ - -static struct usb_driver carplay_driver = { - .name = "carplay", - .id_table = id_table, - .probe = carplay_probe, - .disconnect = carplay_disconnect, -}; - -/*-------------------------------------------------------------------------*/ - -static int __init carplay_init(void) -{ - DBG(0, "%s register carplay_driver\n", __func__); - return usb_register(&carplay_driver); -} -module_init(carplay_init); - -static void __exit carplay_exit(void) -{ - usb_deregister(&carplay_driver); -} -module_exit(carplay_exit); - -MODULE_DESCRIPTION("USB Core/HCD Testing Driver"); -MODULE_LICENSE("GPL"); -#endif diff --git a/drivers/misc/mediatek/usb20/mt6768/usb20.c b/drivers/misc/mediatek/usb20/mt6768/usb20.c deleted file mode 100644 index 353977888002..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/usb20.c +++ /dev/null @@ -1,2198 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -#include -MODULE_LICENSE("GPL v2"); - -struct musb *mtk_musb; -EXPORT_SYMBOL(mtk_musb); - -bool mtk_usb_power; -EXPORT_SYMBOL(mtk_usb_power); - -int musb_force_on; -EXPORT_SYMBOL(musb_force_on); - -static void (*usb_hal_dpidle_request_fptr)(int); -void usb_hal_dpidle_request(int mode) -{ - if (usb_hal_dpidle_request_fptr) - usb_hal_dpidle_request_fptr(mode); -} -EXPORT_SYMBOL(usb_hal_dpidle_request); - -void register_usb_hal_dpidle_request(void (*function)(int)) -{ - usb_hal_dpidle_request_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_dpidle_request); - -void (*usb_hal_disconnect_check_fptr)(void); -void usb_hal_disconnect_check(void) -{ - if (usb_hal_disconnect_check_fptr) - usb_hal_disconnect_check_fptr(); -} -EXPORT_SYMBOL(usb_hal_disconnect_check); - -void register_usb_hal_disconnect_check(void (*function)(void)) -{ - usb_hal_disconnect_check_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_disconnect_check); - -#ifdef FPGA_PLATFORM -#include -#include "mtk-phy-a60810.h" -#endif - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT -#include "musb_qmu.h" -#endif - -#ifdef CONFIG_MTK_USB2JTAG_SUPPORT -#include -#endif - -#if defined(CONFIG_MTK_BASE_POWER) -#include "mtk_spm_resource_req.h" - -static int dpidle_status = USB_DPIDLE_ALLOWED; -module_param(dpidle_status, int, 0644); - -static int dpidle_debug; -module_param(dpidle_debug, int, 0644); - -static DEFINE_SPINLOCK(usb_hal_dpidle_lock); - -#define DPIDLE_TIMER_INTERVAL_MS 30 - -static void issue_dpidle_timer(void); - -static void dpidle_timer_wakeup_func(struct timer_list *timer) -{ - - DBG_LIMIT(1, "dpidle_timer<%p> alive", timer); - DBG(2, "dpidle_timer<%p> alive...\n", timer); - - if (dpidle_status == USB_DPIDLE_TIMER) - issue_dpidle_timer(); - kfree(timer); -} - -static void issue_dpidle_timer(void) -{ - struct timer_list *timer; - - timer = kzalloc(sizeof(struct timer_list), GFP_ATOMIC); - if (!timer) - return; - - DBG(2, "add dpidle_timer<%p>\n", timer); - timer_setup(timer, dpidle_timer_wakeup_func, 0); - timer->expires = jiffies + msecs_to_jiffies(DPIDLE_TIMER_INTERVAL_MS); - add_timer(timer); -} - -static void usb_dpidle_request(int mode) -{ - unsigned long flags; - - spin_lock_irqsave(&usb_hal_dpidle_lock, flags); - - /* update dpidle_status */ - dpidle_status = mode; - - switch (mode) { - case USB_DPIDLE_ALLOWED: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, SPM_RESOURCE_RELEASE); - if (likely(!dpidle_debug)) - DBG_LIMIT(1, "USB_DPIDLE_ALLOWED"); - else - DBG(0, "USB_DPIDLE_ALLOWED\n"); - break; - case USB_DPIDLE_FORBIDDEN: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, SPM_RESOURCE_ALL); - if (likely(!dpidle_debug)) - DBG_LIMIT(1, "USB_DPIDLE_FORBIDDEN"); - else - DBG(0, "USB_DPIDLE_FORBIDDEN\n"); - break; - case USB_DPIDLE_SRAM: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, - SPM_RESOURCE_CK_26M | SPM_RESOURCE_MAINPLL); - if (likely(!dpidle_debug)) - DBG_LIMIT(1, "USB_DPIDLE_SRAM"); - else - DBG(0, "USB_DPIDLE_SRAM\n"); - break; - case USB_DPIDLE_TIMER: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, - SPM_RESOURCE_CK_26M | SPM_RESOURCE_MAINPLL); - DBG(0, "USB_DPIDLE_TIMER\n"); - issue_dpidle_timer(); - break; - case USB_DPIDLE_SUSPEND: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, - SPM_RESOURCE_MAINPLL | SPM_RESOURCE_CK_26M | - SPM_RESOURCE_AXI_BUS); - DBG(0, "DPIDLE_SUSPEND\n"); - break; - case USB_DPIDLE_RESUME: - spm_resource_req(SPM_RESOURCE_USER_SSUSB, - SPM_RESOURCE_RELEASE); - DBG(0, "DPIDLE_RESUME\n"); - break; - default: - DBG(0, "[ERROR] Are you kidding!?!?\n"); - break; - } - - spin_unlock_irqrestore(&usb_hal_dpidle_lock, flags); -} -#endif - -/* default value 0 */ -static int usb_rdy; -bool is_usb_rdy(void) -{ - if (mtk_musb->is_ready) { - usb_rdy = 1; - DBG(0, "set usb_rdy, wake up bat\n"); - } - - if (usb_rdy) - return true; - else - return false; -} -EXPORT_SYMBOL(is_usb_rdy); - -/* BC1.2 */ -/* Duplicate define in phy-mtk-tphy */ -#define PHY_MODE_BC11_SW_SET 1 -#define PHY_MODE_BC11_SW_CLR 2 - -void Charger_Detect_Init(void) -{ - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_SET); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Init); - -void Charger_Detect_Release(void) -{ - usb_prepare_enable_clock(true); - - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_CLR); - - udelay(1); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Release); - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool in_uart_mode; -bool usb_phy_check_in_uart_mode(void) -{ - int mode; - - usb_enable_clock(true); - udelay(50); - - /* get phy mode */ - mode = phy_get_mode_ext(glue->phy); - - /* usb_port_mode = USBPHY_READ32(0x68); */ - usb_enable_clock(false); - - if (mode == PHY_MODE_UART) { - DBG(0, "%s:%d - IN UART MODE : 0x%x\n", - __func__, __LINE__, mode); - mode = true; - } else { - DBG(0, "%s:%d - NOT IN UART MODE : 0x%x\n", - __func__, __LINE__, mode); - mode = false; - } - return mode; -} - -void usb_phy_switch_to_uart(void) -{ - unsigned int val = 0; - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - DBG(0, "Already in UART mode.\n"); - return; - } - - udelay(50); - - /* set PHY UART mode */ - phy_set_mode(glue->phy, PHY_MODE_UART); - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - val = readl(ap_gpio_base); - writel(val | (GPIO_SEL_UART0), ap_gpio_base); - - in_uart_mode = true; -} - -void usb_phy_switch_to_usb(void) -{ - unsigned int val = 0; - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - /* set UART mode to USB */ - phy_set_mode(glue->phy, PHY_MODE_USB_OTG); - - in_uart_mode = false; - - phy_power_on(glue->phy); -} - -void usb_phy_context_save(void) -{ - in_uart_mode = usb_phy_check_in_uart_mode(); -} -EXPORT_SYMBOL(usb_phy_context_save); - -void usb_phy_context_restore(void) -{ - if (in_uart_mode) - usb_phy_switch_to_uart(); -} -EXPORT_SYMBOL(usb_phy_context_restore); -#endif - -#ifdef CONFIG_USB_MTK_OTG -static struct regmap *pericfg; - -static void mt_usb_wakeup(struct musb *musb, bool enable) -{ - u32 tmp; - bool is_con = musb->port1_status & USB_PORT_STAT_CONNECTION; - - if (IS_ERR_OR_NULL(pericfg)) { - DBG(0, "init fail"); - return; - } - - DBG(0, "connection=%d\n", is_con); - - if (enable) { - regmap_read(pericfg, USB_WAKEUP_DEC_CON1, &tmp); - tmp |= USB1_CDDEBOUNCE(0x8) | USB1_CDEN; - regmap_write(pericfg, USB_WAKEUP_DEC_CON1, tmp); - - tmp = musb_readw(musb->mregs, RESREG); - if (is_con) - tmp &= ~HSTPWRDWN_OPT; - else - tmp |= HSTPWRDWN_OPT; - musb_writew(musb->mregs, RESREG, tmp); - } else { - regmap_read(pericfg, USB_WAKEUP_DEC_CON1, &tmp); - tmp &= ~(USB1_CDEN | USB1_CDDEBOUNCE(0xf)); - regmap_write(pericfg, USB_WAKEUP_DEC_CON1, tmp); - - tmp = musb_readw(musb->mregs, RESREG); - tmp &= ~HSTPWRDWN_OPT; - musb_writew(musb->mregs, RESREG, tmp); - } -} - -static int mt_usb_wakeup_init(struct musb *musb) -{ - struct device_node *node; - - node = of_find_compatible_node(NULL, NULL, - "mediatek,mt6768-usb20"); - if (!node) { - DBG(0, "map node failed\n"); - return -ENODEV; - } - - pericfg = syscon_regmap_lookup_by_phandle(node, - "pericfg"); - if (IS_ERR(pericfg)) { - DBG(0, "fail to get pericfg regs\n"); - return PTR_ERR(pericfg); - } - - return 0; -} -#endif - -static u32 cable_mode = CABLE_MODE_NORMAL; -#ifndef FPGA_PLATFORM -struct clk *musb_clk; -struct clk *musb_clk_top_sel; -struct clk *musb_clk_univpll3_d4; -static struct regulator *reg_vusb; -static struct regulator *reg_vio18; -static struct regulator *reg_va12; -#endif - -void __iomem *usb_phy_base; - -#ifdef CONFIG_MTK_UART_USB_SWITCH -static u32 port_mode = PORT_MODE_USB; -#define AP_GPIO_COMPATIBLE_NAME "mediatek,gpio" -void __iomem *ap_gpio_base; -#endif - -/* EP Fifo Config */ -static struct musb_fifo_cfg fifo_cfg[] __initdata = { - {.hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, - {.hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, -}; - - -/*=======================================================================*/ -/* USB GADGET */ -/*=======================================================================*/ -static const struct of_device_id apusb_of_ids[] = { - {.compatible = "mediatek,mt6768-usb20",}, - {}, -}; - -MODULE_DEVICE_TABLE(of, apusb_of_ids); - -#ifdef FPGA_PLATFORM -bool usb_enable_clock(bool enable) -{ - return true; -} -EXPORT_SYMBOL(usb_enable_clock); - -bool usb_prepare_clock(bool enable) -{ - return true; -} -EXPORT_SYMBOL(usb_prepare_clock); - -void usb_prepare_enable_clock(bool enable) -{ -} -EXPORT_SYMBOL(usb_prepare_enable_clock); -#else -void usb_prepare_enable_clock(bool enable) -{ - if (enable) { - usb_prepare_clock(true); - usb_enable_clock(true); - } else { - usb_enable_clock(false); - usb_prepare_clock(false); - } -} -EXPORT_SYMBOL(usb_prepare_enable_clock); - -DEFINE_MUTEX(prepare_lock); -static atomic_t clk_prepare_cnt = ATOMIC_INIT(0); - -bool usb_prepare_clock(bool enable) -{ - int before_cnt = atomic_read(&clk_prepare_cnt); - - mutex_lock(&prepare_lock); - - if (IS_ERR_OR_NULL(glue->musb_clk) || - IS_ERR_OR_NULL(glue->musb_clk_top_sel) || - IS_ERR_OR_NULL(glue->musb_clk_univpll3_d4)) { - DBG(0, "clk not ready\n"); - mutex_unlock(&prepare_lock); - return 0; - } - - if (enable) { - if (clk_prepare(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel prepare fail\n"); - } else { - if (clk_set_parent(glue->musb_clk_top_sel, - glue->musb_clk_univpll3_d4)) - DBG(0, "musb_clk_top_sel set_parent fail\n"); - } - if (clk_prepare(glue->musb_clk)) - DBG(0, "musb_clk prepare fail\n"); - - atomic_inc(&clk_prepare_cnt); - } else { - clk_unprepare(glue->musb_clk_top_sel); - clk_unprepare(glue->musb_clk); - - atomic_dec(&clk_prepare_cnt); - } - - mutex_unlock(&prepare_lock); - - DBG(1, "enable(%d), usb prepare_cnt, before(%d), after(%d)\n", - enable, before_cnt, atomic_read(&clk_prepare_cnt)); - -#ifdef CONFIG_MTK_AEE_FEATURE - if (atomic_read(&clk_prepare_cnt) < 0) - aee_kernel_warning("usb20", "usb clock prepare_cnt error\n"); -#endif - - return 1; -} -EXPORT_SYMBOL(usb_prepare_clock); - -static DEFINE_SPINLOCK(musb_reg_clock_lock); - -bool usb_enable_clock(bool enable) -{ - static int count; - static int real_enable = 0, real_disable; - static int virt_enable = 0, virt_disable; - unsigned long flags; - - DBG(1, "enable(%d),count(%d),<%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - - spin_lock_irqsave(&musb_reg_clock_lock, flags); - - if (unlikely(atomic_read(&clk_prepare_cnt) <= 0)) { - DBG_LIMIT(1, "clock not prepare"); - goto exit; - } - - if (enable && count == 0) { - if (clk_enable(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel enable fail\n"); - goto exit; - } - - if (clk_enable(glue->musb_clk)) { - DBG(0, "musb_clk enable fail\n"); - clk_disable(glue->musb_clk_top_sel); - goto exit; - } - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); - real_enable++; - - } else if (!enable && count == 1) { - clk_disable(glue->musb_clk); - clk_disable(glue->musb_clk_top_sel); - - usb_hal_dpidle_request(USB_DPIDLE_ALLOWED); - real_disable++; - } - - if (enable) - count++; - else - count = (count == 0) ? 0 : (count - 1); - -exit: - if (enable) - virt_enable++; - else - virt_disable++; - - spin_unlock_irqrestore(&musb_reg_clock_lock, flags); - - DBG(1, "enable(%d),count(%d), <%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - return 1; -} -EXPORT_SYMBOL(usb_enable_clock); -#endif - -static struct delayed_work idle_work; - -void do_idle_work(struct work_struct *data) -{ - struct musb *musb = mtk_musb; - unsigned long flags; - u8 devctl; - enum usb_otg_state old_state; - - usb_prepare_clock(true); - - spin_lock_irqsave(&musb->lock, flags); - old_state = musb->xceiv->otg->state; - if (musb->is_active) { - DBG(0, - "%s active, igonre do_idle\n", - otg_state_string(musb->xceiv->otg->state)); - goto exit; - } - - switch (musb->xceiv->otg->state) { - case OTG_STATE_B_PERIPHERAL: - case OTG_STATE_A_WAIT_BCON: - devctl = musb_readb(musb->mregs, MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) { - musb->xceiv->otg->state = OTG_STATE_B_IDLE; - MUSB_DEV_MODE(musb); - } else { - musb->xceiv->otg->state = OTG_STATE_A_IDLE; - MUSB_HST_MODE(musb); - } - break; - case OTG_STATE_A_HOST: - devctl = musb_readb(musb->mregs, MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) - musb->xceiv->otg->state = OTG_STATE_B_IDLE; - else - musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON; - break; - default: - break; - } - DBG(0, "otg_state %s to %s, is_active<%d>\n", - otg_state_string(old_state), - otg_state_string(musb->xceiv->otg->state), - musb->is_active); -exit: - spin_unlock_irqrestore(&musb->lock, flags); - - usb_prepare_clock(false); -} - -#if defined(CONFIG_MTK_BASE_POWER) -static void musb_do_idle(struct timer_list *t) -{ - struct musb *musb = from_timer(musb, t, idle_timer); - - queue_delayed_work(musb->st_wq, &idle_work, 0); -} - -static void mt_usb_try_idle(struct musb *musb, unsigned long timeout) -{ - unsigned long default_timeout = jiffies + msecs_to_jiffies(3); - static unsigned long last_timer; - - DBG(0, "skip %s\n", __func__); - return; - - if (timeout == 0) - timeout = default_timeout; - - /* Never idle if active, or when VBUS timeout is not set as host */ - if (musb->is_active || ((musb->a_wait_bcon == 0) - && (musb->xceiv->otg->state - == OTG_STATE_A_WAIT_BCON))) { - DBG(0, "%s active, deleting timer\n", - otg_state_string(musb->xceiv->otg->state)); - del_timer(&musb->idle_timer); - last_timer = jiffies; - return; - } - - if (time_after(last_timer, timeout)) { - if (!timer_pending(&musb->idle_timer)) - last_timer = timeout; - else { - DBG(0, "Longer idle timer already pending, ignoring\n"); - return; - } - } - last_timer = timeout; - - DBG(0, "%s inactive, for idle timer for %lu ms\n", - otg_state_string(musb->xceiv->otg->state), - (unsigned long)jiffies_to_msecs(timeout - jiffies)); - mod_timer(&musb->idle_timer, timeout); -} -#endif - -static int real_enable = 0, real_disable; -static int virt_enable = 0, virt_disable; -static void mt_usb_enable(struct musb *musb) -{ - unsigned long flags; - #ifdef CONFIG_MTK_UART_USB_SWITCH - static int is_check; - #endif - - virt_enable++; - DBG(0, "begin <%d,%d>,<%d,%d,%d,%d>\n", - mtk_usb_power, musb->power, - virt_enable, virt_disable, - real_enable, real_disable); - if (musb->power == true) - return; - - /* clock alredy prepare before enter here */ - usb_enable_clock(true); - - mdelay(10); - #ifdef CONFIG_MTK_UART_USB_SWITCH - if (!is_check) { - in_uart_mode = usb_phy_check_in_uart_mode(); - is_check = 1; - } - #endif - - flags = musb_readl(musb->mregs, USB_L1INTM); - - /* update musb->power & mtk_usb_power in the same time */ - musb->power = true; - mtk_usb_power = true; - real_enable++; - if (in_interrupt()) { - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - } - DBG(0, "end, <%d,%d,%d,%d>\n", - virt_enable, virt_disable, - real_enable, real_disable); - musb_writel(mtk_musb->mregs, USB_L1INTM, flags); -} - -static void mt_usb_disable(struct musb *musb) -{ - virt_disable++; - - DBG(0, "begin, <%d,%d>,<%d,%d,%d,%d>\n", - mtk_usb_power, musb->power, - virt_enable, virt_disable, - real_enable, real_disable); - if (musb->power == false) - return; - - usb_enable_clock(false); - /* clock will unprepare when leave here */ - - real_disable++; - DBG(0, "end, <%d,%d,%d,%d>\n", - virt_enable, virt_disable, - real_enable, real_disable); - - /* update musb->power & mtk_usb_power in the same time */ - musb->power = 0; - mtk_usb_power = false; -} - -/* ================================ */ -/* connect and disconnect functions */ -/* ================================ */ -bool mt_usb_is_device(void) -{ - DBG(4, "called\n"); - - if (!mtk_musb) { - DBG(0, "mtk_musb is NULL\n"); - /* don't do charger detection when usb is not ready */ - return false; - } - DBG(4, "is_host=%d\n", mtk_musb->is_host); - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "in UART Mode\n"); - return false; - } -#endif -#ifdef CONFIG_USB_MTK_OTG - return !mtk_musb->is_host; -#else - return true; -#endif -} - -static struct delayed_work disconnect_check_work; -static bool musb_hal_is_vbus_exist(void); -void do_disconnect_check_work(struct work_struct *data) -{ - bool vbus_exist = false; - unsigned long flags = 0; - struct musb *musb = mtk_musb; - - msleep(200); - - vbus_exist = musb_hal_is_vbus_exist(); - DBG(1, "vbus_exist:<%d>\n", vbus_exist); - if (vbus_exist) - return; - - spin_lock_irqsave(&mtk_musb->lock, flags); - DBG(1, "speed <%d>\n", musb->g.speed); - /* notify gadget driver, g.speed judge is very important */ - if (!musb->is_host && musb->g.speed != USB_SPEED_UNKNOWN) { - DBG(0, "musb->gadget_driver:%p\n", musb->gadget_driver); - if (musb->gadget_driver && musb->gadget_driver->disconnect) { - DBG(0, "musb->gadget_driver->disconnect:%p\n", - musb->gadget_driver->disconnect); - /* align musb_g_disconnect */ - spin_unlock(&musb->lock); - musb->gadget_driver->disconnect(&musb->g); - spin_lock(&musb->lock); - - } - musb->g.speed = USB_SPEED_UNKNOWN; - } - DBG(1, "speed <%d>\n", musb->g.speed); - spin_unlock_irqrestore(&mtk_musb->lock, flags); -} -void trigger_disconnect_check_work(void) -{ - static int inited; - - if (!inited) { - INIT_DELAYED_WORK(&disconnect_check_work, - do_disconnect_check_work); - inited = 1; - } - queue_delayed_work(mtk_musb->st_wq, &disconnect_check_work, 0); -} - -static bool musb_hal_is_vbus_exist(void) -{ - bool vbus_exist = true; - - return vbus_exist; -} - -/* be aware this could not be used in non-sleep context */ -bool usb_cable_connected(struct musb *musb) -{ - if (musb->usb_connected) - return true; - else - return false; -} - -static bool cmode_effect_on(void) -{ - bool effect = false; - - /* CMODE CHECK */ - if (cable_mode == CABLE_MODE_CHRG_ONLY /*|| - (cable_mode == CABLE_MODE_HOST_ONLY && - chg_type != CHARGING_HOST)*/) - effect = true; - - DBG(0, "cable_mode=%d, effect=%d\n", cable_mode, effect); - return effect; -} - -void do_connection_work(struct work_struct *data) -{ - unsigned long flags = 0; - int usb_clk_state = NO_CHANGE; - bool usb_on, usb_connected; - struct mt_usb_work *work = - container_of(data, struct mt_usb_work, dwork.work); - - DBG(0, "is_host<%d>, power<%d>, ops<%d>\n", - mtk_musb->is_host, mtk_musb->power, work->ops); - - /* always prepare clock and check if need to unprepater later */ - /* clk_prepare_cnt +1 here*/ - usb_prepare_clock(true); - - /* be aware this could not be used in non-sleep context */ - usb_connected = mtk_musb->usb_connected; - - /* additional check operation here */ - if (musb_force_on) - usb_on = true; - else if (work->ops == CONNECTION_OPS_CHECK) - usb_on = usb_connected; - else - usb_on = (work->ops == - CONNECTION_OPS_CONN ? true : false); - - if (cmode_effect_on()) - usb_on = false; - /* additional check operation done */ - - spin_lock_irqsave(&mtk_musb->lock, flags); - - if (mtk_musb->is_host) { - DBG(0, "is host, return\n"); - goto exit; - } - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "in uart mode, return\n"); - goto exit; - } -#endif - - if (!mtk_musb->power && (usb_on == true)) { - /* enable usb */ - if (!mtk_musb->usb_lock->active) { - __pm_stay_awake(mtk_musb->usb_lock); - DBG(0, "lock\n"); - } else { - DBG(0, "already lock\n"); - } - - /* note this already put SOFTCON */ - musb_start(mtk_musb); - usb_clk_state = OFF_TO_ON; - - } else if (mtk_musb->power && (usb_on == false)) { - /* disable usb */ - musb_stop(mtk_musb); - if (mtk_musb->usb_lock->active) { - DBG(0, "unlock\n"); - __pm_relax(mtk_musb->usb_lock); - } else { - DBG(0, "lock not active\n"); - } - usb_clk_state = ON_TO_OFF; - mtk_musb->xceiv->otg->state = OTG_STATE_B_IDLE; - } else - DBG(0, "do nothing, usb_on:%d, power:%d\n", - usb_on, mtk_musb->power); -exit: - spin_unlock_irqrestore(&mtk_musb->lock, flags); - - if (usb_clk_state == ON_TO_OFF) { - /* clock on -> of: clk_prepare_cnt -2 */ - usb_prepare_clock(false); - usb_prepare_clock(false); - } else if (usb_clk_state == NO_CHANGE) { - /* clock no change : clk_prepare_cnt -1 */ - usb_prepare_clock(false); - } - - /* free mt_usb_work */ - kfree(work); -} - -static void issue_connection_work(int ops) -{ - struct mt_usb_work *work; - - if (!mtk_musb) { - DBG(0, "mtk_musb = NULL\n"); - return; - } - /* create and prepare worker */ - work = kzalloc(sizeof(struct mt_usb_work), GFP_ATOMIC); - if (!work) { - DBG(0, "wrap is NULL, directly return\n"); - return; - } - work->ops = ops; - INIT_DELAYED_WORK(&work->dwork, do_connection_work); - /* issue connection work */ - DBG(0, "issue work, ops<%d>\n", ops); - queue_delayed_work(mtk_musb->st_wq, &work->dwork, 0); -} - -void mt_usb_connect(void) -{ - DBG(0, "[MUSB] USB connect\n"); - issue_connection_work(CONNECTION_OPS_CONN); -} -EXPORT_SYMBOL(mt_usb_connect); - -void mt_usb_disconnect(void) -{ - DBG(0, "[MUSB] USB disconnect\n"); - issue_connection_work(CONNECTION_OPS_DISC); -} - -void mt_usb_reconnect(void) -{ - DBG(0, "[MUSB] USB reconnect\n"); - issue_connection_work(CONNECTION_OPS_CHECK); -} -EXPORT_SYMBOL(mt_usb_reconnect); - -/* build time force on */ -#if defined(CONFIG_FPGA_EARLY_PORTING) ||\ - defined(U3_COMPLIANCE) || defined(FOR_BRING_UP) -#define BYPASS_PMIC_LINKAGE -#endif - -void musb_platform_reset(struct musb *musb) -{ - u16 swrst = 0; - void __iomem *mbase = musb->mregs; - u8 bit; - - /* clear all DMA enable bit */ - for (bit = 0; bit < MUSB_HSDMA_CHANNELS; bit++) - musb_writew(mbase, - MUSB_HSDMA_CHANNEL_OFFSET(bit, MUSB_HSDMA_CONTROL), 0); - - /* set DMA channel 0 burst mode to boost QMU speed */ - musb_writel(musb->mregs, 0x204, - musb_readl(musb->mregs, 0x204) | 0x600); -#ifdef CONFIG_MTK_MUSB_DRV_36BIT - /* eanble DMA channel 0 36-BIT support */ - musb_writel(musb->mregs, 0x204, - musb_readl(musb->mregs, 0x204) | 0x4000); -#endif - - swrst = musb_readw(mbase, MUSB_SWRST); - swrst |= (MUSB_SWRST_DISUSBRESET | MUSB_SWRST_SWRST); - musb_writew(mbase, MUSB_SWRST, swrst); -} -EXPORT_SYMBOL(musb_platform_reset); - -bool is_switch_charger(void) -{ -#ifdef SWITCH_CHARGER - return true; -#else - return false; -#endif -} - -void pmic_chrdet_int_en(int is_on) -{ -#ifndef FPGA_PLATFORM -#ifdef CONFIG_MTK_PMIC - DBG(0, "is_on<%d>\n", is_on); - upmu_interrupt_chrdet_int_en(is_on); -#else - DBG(0, "FIXME, no upmu_interrupt_chrdet_int_en ???\n"); -#endif -#endif -} - -void musb_sync_with_bat(struct musb *musb, int usb_state) -{ -#ifndef FPGA_PLATFORM - DBG(1, "BATTERY_SetUSBState, state=%d\n", usb_state); -#ifdef CONFIG_MTK_CHARGER - BATTERY_SetUSBState(usb_state); -#endif -#endif -} -EXPORT_SYMBOL(musb_sync_with_bat); - -/*-------------------------------------------------------------------------*/ -static irqreturn_t generic_interrupt(int irq, void *__hci) -{ - irqreturn_t retval = IRQ_NONE; - struct musb *musb = __hci; - - /* musb_read_clear_generic_interrupt */ - musb->int_usb = - musb_readb(musb->mregs, MUSB_INTRUSB) & - musb_readb(musb->mregs, MUSB_INTRUSBE); - musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX) & - musb_readw(musb->mregs, MUSB_INTRTXE); - musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX) & - musb_readw(musb->mregs, MUSB_INTRRXE); -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - musb->int_queue = musb_readl(musb->mregs, MUSB_QISAR); -#endif - /* hw status up to date before W1C */ - mb(); - musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx); - musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx); - musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb); -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - if (musb->int_queue) { - musb_writel(musb->mregs, MUSB_QISAR, musb->int_queue); - musb->int_queue &= ~(musb_readl(musb->mregs, MUSB_QIMR)); - } -#endif - /* musb_read_clear_generic_interrupt */ - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - if (musb->int_usb || musb->int_tx || musb->int_rx || musb->int_queue) - retval = musb_interrupt(musb); -#else - if (musb->int_usb || musb->int_tx || musb->int_rx) - retval = musb_interrupt(musb); -#endif - - - return retval; -} - -static irqreturn_t mt_usb_interrupt(int irq, void *dev_id) -{ - irqreturn_t tmp_status; - irqreturn_t status = IRQ_NONE; - struct musb *musb = (struct musb *)dev_id; - u32 usb_l1_ints; - unsigned long flags; - - spin_lock_irqsave(&musb->lock, flags); - usb_l1_ints = musb_readl(musb->mregs, USB_L1INTS) & - musb_readl(mtk_musb->mregs, USB_L1INTM); - DBG(1, "usb interrupt assert %x %x %x %x %x %x %x\n", usb_l1_ints, - musb_readl(mtk_musb->mregs, USB_L1INTM), - musb_readb(musb->mregs, MUSB_INTRUSBE), - musb_readw(musb->mregs, MUSB_INTRTX), - musb_readw(musb->mregs, MUSB_INTRTXE), - musb_readw(musb->mregs, MUSB_INTRRX), - musb_readw(musb->mregs, MUSB_INTRRXE)); - - if ((usb_l1_ints & TX_INT_STATUS) || (usb_l1_ints & RX_INT_STATUS) - || (usb_l1_ints & USBCOM_INT_STATUS) -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - || (usb_l1_ints & QINT_STATUS) -#endif - ) { - tmp_status = generic_interrupt(irq, musb); - if (tmp_status != IRQ_NONE) - status = tmp_status; - } - spin_unlock_irqrestore(&musb->lock, flags); - - /* FIXME, workaround for device_qmu + host_dma */ -#if 1 -/* #ifndef CONFIG_MTK_MUSB_QMU_SUPPORT */ - if (usb_l1_ints & DMA_INT_STATUS) { - tmp_status = dma_controller_irq(irq, musb->dma_controller); - if (tmp_status != IRQ_NONE) - status = tmp_status; - } -#endif - - return status; - -} - -static bool saving_mode; - -static ssize_t saving_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - return scnprintf(buf, PAGE_SIZE, "%d\n", saving_mode); -} - -static ssize_t saving_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - int saving; - long tmp_val; - - if (!dev) { - DBG(0, "dev is null!!\n"); - return count; - /* } else if (1 == sscanf(buf, "%d", &saving)) { */ - } else if (kstrtol(buf, 10, (long *)&tmp_val) == 0) { - saving = tmp_val; - DBG(0, "old=%d new=%d\n", saving, saving_mode); - if (saving_mode == (!saving)) - saving_mode = !saving_mode; - } - return count; -} - -bool is_saving_mode(void) -{ - DBG(0, "%d\n", saving_mode); - return saving_mode; -} -EXPORT_SYMBOL(is_saving_mode); - -void usb_dump_debug_register(void) -{ - struct musb *musb = mtk_musb; - - usb_enable_clock(true); - - /* 1:Read 0x11200620; */ - pr_notice("[IPI USB dump]addr: 0x620, value: %x\n", - musb_readl(musb->mregs, 0x620)); - - /* 2: set 0x11200600[5:0] = 0x23; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x23); - pr_notice("[IPI USB dump]addr: 0x634, 0x23 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 3: set 0x11200600[5:0] = 0x24; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x24); - pr_notice("[IPI USB dump]addr: 0x634, 0x24 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 4:set 0x11200600[5:0] = 0x25; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x25); - pr_notice("[IPI USB dump]addr: 0x634, 0x25 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 5:set 0x11200600[5:0] = 0x26; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x26); - pr_notice("[IPI USB dump]addr: 0x634, 0x26 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - usb_enable_clock(false); -} - -DEVICE_ATTR_RW(saving); - -#ifdef CONFIG_MTK_UART_USB_SWITCH -static void uart_usb_switch_dump_register(void) -{ - usb_enable_clock(true); - -#ifdef CONFIG_MTK_MUSB_PHY - /* Todo: should phase out: not supported by tphy */ - DBG(0, "[MUSB]addr: 0x68, value: %x\n" - "[MUSB]addr: 0x6C, value: %x\n" - "[MUSB]addr: 0x20, value: %x\n" - "[MUSB]addr: 0x18, value: %x\n", - USBPHY_READ32(0x68), - USBPHY_READ32(0x6C), - USBPHY_READ32(0x20), - USBPHY_READ32(0x18)); -#endif - - usb_enable_clock(false); - DBG(0, "[MUSB]GPIO_SEL=%x\n", GET_GPIO_SEL_VAL(readl(ap_gpio_base))); -} - -static ssize_t mt_usb_show_portmode(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - usb_prepare_enable_clock(true); - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) - port_mode = PORT_MODE_UART; - else - port_mode = PORT_MODE_USB; - - if (port_mode == PORT_MODE_USB) - DBG(0, "\nUSB Port mode -> USB\n"); - else if (port_mode == PORT_MODE_UART) - DBG(0, "\nUSB Port mode -> UART\n"); - - uart_usb_switch_dump_register(); - - usb_prepare_enable_clock(false); - - return scnprintf(buf, PAGE_SIZE, "%d\n", port_mode); -} - -static ssize_t portmode_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - unsigned int portmode; - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) - port_mode = PORT_MODE_UART; - if (!dev) { - DBG(0, "dev is null!!\n"); - return count; - } else if (kstrtouint(buf, 10, &portmode) == 0) { - usb_prepare_enable_clock(true); - DBG(0, - "\nUSB Port mode: current => %d (port_mode), change to => %d (portmode)\n", - port_mode, portmode); - if (portmode >= PORT_MODE_MAX) - portmode = PORT_MODE_USB; - - if (port_mode != portmode) { - /* Changing to USB Mode */ - if (portmode == PORT_MODE_USB) { - DBG(0, "USB Port mode -> USB\n"); - usb_phy_switch_to_usb(); - /* Changing to UART Mode */ - } else if (portmode == PORT_MODE_UART) { - DBG(0, "USB Port mode -> UART\n"); - usb_phy_switch_to_uart(); - } - uart_usb_switch_dump_register(); - port_mode = portmode; - } - usb_prepare_enable_clock(false); - } - return count; -} - -DEVICE_ATTR_RW(portmode); - -static ssize_t mt_usb_show_uart_path(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - u32 var; - - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - - var = GET_GPIO_SEL_VAL(readl(ap_gpio_base)); - DBG(0, "[MUSB]GPIO SELECT=%x\n", var); - - return scnprintf(buf, PAGE_SIZE, "%x\n", var); -} - -DEVICE_ATTR(uartpath, 0444, mt_usb_show_uart_path, NULL); -#endif - -#ifndef FPGA_PLATFORM -static struct device_attribute *mt_usb_attributes[] = { - &dev_attr_saving, -#ifdef CONFIG_MTK_UART_USB_SWITCH - &dev_attr_portmode, - &dev_attr_uartpath, -#endif - NULL -}; - -static int init_sysfs(struct device *dev) -{ - struct device_attribute **attr; - int rc; - - for (attr = mt_usb_attributes; *attr; attr++) { - rc = device_create_file(dev, *attr); - if (rc) - goto out_unreg; - } - return 0; - -out_unreg: - for (; attr >= mt_usb_attributes; attr--) - device_remove_file(dev, *attr); - return rc; -} -#endif - -#ifdef FPGA_PLATFORM -static struct i2c_client *usb_i2c_client; -static const struct i2c_device_id usb_i2c_id[] = { {"mtk-usb", 0}, {} }; - -void USB_PHY_Write_Register8(u8 var, u8 addr) -{ - char buffer[2]; - - buffer[0] = addr; - buffer[1] = var; - i2c_master_send(usb_i2c_client, buffer, 2); -} - -u8 USB_PHY_Read_Register8(u8 addr) -{ - u8 var; - - i2c_master_send(usb_i2c_client, &addr, 1); - i2c_master_recv(usb_i2c_client, &var, 1); - return var; -} - -#define U3_PHY_PAGE 0xff - -void _u3_write_bank(u32 value) -{ - USB_PHY_Write_Register8((u8)value, (u8)U3_PHY_PAGE); -} - -u32 _u3_read_reg(u32 address) -{ - u8 databuffer = 0; - - databuffer = USB_PHY_Read_Register8((u8)address); - return databuffer; -} - -void _u3_write_reg(u32 address, u32 value) -{ - USB_PHY_Write_Register8((u8)value, (u8)address); -} - -u32 u3_phy_read_reg32(u32 addr) -{ - u32 bank; - u32 addr8; - u32 data; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - - _u3_write_bank(bank); - data = _u3_read_reg(addr8); - data |= (_u3_read_reg(addr8 + 1) << 8); - data |= (_u3_read_reg(addr8 + 2) << 16); - data |= (_u3_read_reg(addr8 + 3) << 24); - return data; -} - -u32 u3_phy_write_reg32(u32 addr, u32 data) -{ - u32 bank; - u32 addr8; - u32 data_0, data_1, data_2, data_3; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - data_0 = data & 0xff; - data_1 = (data >> 8) & 0xff; - data_2 = (data >> 16) & 0xff; - data_3 = (data >> 24) & 0xff; - - _u3_write_bank(bank); - _u3_write_reg(addr8, data_0); - _u3_write_reg(addr8 + 1, data_1); - _u3_write_reg(addr8 + 2, data_2); - _u3_write_reg(addr8 + 3, data_3); - - return 0; -} - -void u3_phy_write_field32(int addr, int offset, int mask, int value) -{ - u32 cur_value; - u32 new_value; - - cur_value = u3_phy_read_reg32(addr); - new_value = (cur_value & (~mask)) | ((value << offset) & mask); - - u3_phy_write_reg32(addr, new_value); -} - -u32 u3_phy_write_reg8(u32 addr, u8 data) -{ - u32 bank; - u32 addr8; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - _u3_write_bank(bank); - _u3_write_reg(addr8, data); - - return 0; -} - -static int usb_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - void __iomem *base; - u32 val = 0; - /* if i2c probe before musb prob, this would cause KE */ - /* base = (unsigned long)((unsigned long)mtk_musb->xceiv->io_priv); */ - base = usb_phy_base; - DBG(0, "[MUSB]%s, start, base:%p\n", __func__, base); - - usb_i2c_client = client; - - - /* disable usb mac suspend */ - val = musb_readl(base, 0x868); - DBG(0, "[MUSB]0x868=0x%x\n", val); - - musb_writel(base, 0x868, (val & ~(0x4 << 16))); - - DBG(0, "[MUSB]0x868=0x%x\n" - "[MUSB]addr: 0xFF, value: %x\n", - musb_readl(base, 0x868), - USB_PHY_Read_Register8(0xFF)); - - USB_PHY_Write_Register8(0x20, 0xFF); - - DBG(0, "[MUSB]version=[%02x %02x %02x %02x]\n", - USB_PHY_Read_Register8(0xE4), - USB_PHY_Read_Register8(0xE5), - USB_PHY_Read_Register8(0xE6), - USB_PHY_Read_Register8(0xE7)); - - if (USB_PHY_Read_Register8(0xE7) == 0xa) { - static struct u3phy_info info; - - DBG(0, "[A60801A] Phy version is %x\n", - u3_phy_read_reg32(0x2000e4)); - - info.u2phy_regs_a = (struct u2phy_reg_a *)0x0; - info.u3phyd_regs_a = (struct u3phyd_reg_a *)0x100000; - info.u3phyd_bank2_regs_a = - (struct u3phyd_bank2_reg_a *)0x200000; - info.u3phya_regs_a = (struct u3phya_reg_a *)0x300000; - info.u3phya_da_regs_a = (struct u3phya_da_reg_a *)0x400000; - info.sifslv_chip_regs_a = (struct sifslv_chip_reg_a *)0x500000; - info.spllc_regs_a = (struct spllc_reg_a *)0x600000; - info.sifslv_fm_regs_a = (struct sifslv_fm_reg_a *)0xf00000; - - /* BANK 0x00 */ - /* for U2 hS eye diagram */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr1) - , A60810_RG_USB20_TERM_VREF_SEL_OFST - , A60810_RG_USB20_TERM_VREF_SEL - , 0x05); - /* for U2 hS eye diagram */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr1) - , A60810_RG_USB20_VRT_VREF_SEL_OFST - , A60810_RG_USB20_VRT_VREF_SEL - , 0x05); - /* for U2 sensititvity */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr6) - , A60810_RG_USB20_SQTH_OFST - , A60810_RG_USB20_SQTH - , 0x04); - - /* BANK 0x10 */ - /* disable ssusb_p3_entry to work around resume from P3 bug */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phyd_regs_a->phyd_lfps0) - , A60810_RG_SSUSB_P3_ENTRY_OFST - , A60810_RG_SSUSB_P3_ENTRY - , 0x00); - /* force disable ssusb_p3_entry to - * work around resume from P3 bug - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phyd_regs_a->phyd_lfps0) - , A60810_RG_SSUSB_P3_ENTRY_SEL_OFST - , A60810_RG_SSUSB_P3_ENTRY_SEL - , 0x01); - - /* BANK 0x40 */ - /* fine tune SSC delta1 to let SSC min average ~0ppm */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg19) - , A60810_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST - , A60810_RG_SSUSB_PLL_SSC_DELTA1_U3 - , 0x46); - /* U3PhyWriteField32(((u32)&info.u3phya_da_regs_a->reg19) */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg21) - , A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST - , A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H - , 0x40); - - /* fine tune SSC delta to let SSC min average ~0ppm */ - - /* Fine tune SYSPLL to improve phase noise */ - /* I2C 60 0x08[01:00] 0x03 - * RW RG_SSUSB_PLL_BC_U3 - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg4) - , A60810_RG_SSUSB_PLL_BC_U3_OFST - , A60810_RG_SSUSB_PLL_BC_U3 - , 0x3); - /* I2C 60 0x08[12:10] 0x03 - * RW RG_SSUSB_PLL_DIVEN_U3 - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg4) - , A60810_RG_SSUSB_PLL_DIVEN_U3_OFST - , A60810_RG_SSUSB_PLL_DIVEN_U3 - , 0x3); - /* I2C 60 0x0C[03:00] 0x01 RW RG_SSUSB_PLL_IC_U3 */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg5) - , A60810_RG_SSUSB_PLL_IC_U3_OFST - , A60810_RG_SSUSB_PLL_IC_U3 - , 0x1); - /* I2C 60 0x0C[23:22] 0x01 RW RG_SSUSB_PLL_BR_U3 */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg5) - , A60810_RG_SSUSB_PLL_BR_U3_OFST - , A60810_RG_SSUSB_PLL_BR_U3 - , 0x1); - /* I2C 60 0x10[03:00] 0x01 - * RW RG_SSUSB_PLL_IR_U3 - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg6) - , A60810_RG_SSUSB_PLL_IR_U3_OFST - , A60810_RG_SSUSB_PLL_IR_U3 - , 0x1); - /* I2C 60 0x14[03:00] 0x0F RW RG_SSUSB_PLL_BP_U3 */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg7) - , A60810_RG_SSUSB_PLL_BP_U3_OFST - , A60810_RG_SSUSB_PLL_BP_U3 - , 0x0f); - - /* BANK 0x60 */ - /* force xtal pwd mode enable */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_FORCE_XTAL_PWD_OFST - , A60810_RG_SSUSB_FORCE_XTAL_PWD - , 0x1); - /* force bias pwd mode enable */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_FORCE_BIAS_PWD_OFST - , A60810_RG_SSUSB_FORCE_BIAS_PWD - , 0x1); - /* force xtal pwd mode off to work around xtal drv de */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_XTAL_PWD_OFST - , A60810_RG_SSUSB_XTAL_PWD - , 0x0); - /* force bias pwd mode off to work around xtal drv de */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_BIAS_PWD_OFST - , A60810_RG_SSUSB_BIAS_PWD - , 0x0); - - /********* test chip settings ***********/ - /* BANK 0x00 */ - /* slew rate setting */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr5) - , A60810_RG_USB20_HSTX_SRCTRL_OFST - , A60810_RG_USB20_HSTX_SRCTRL - , 0x4); - - /* BANK 0x50 */ - - /* PIPE setting BANK5 */ - /* PIPE drv = 2 */ - u3_phy_write_reg8(((phys_addr_t)(uintptr_t) - &info.sifslv_chip_regs_a->gpio_ctla) + 2, 0x10); - /* PIPE phase */ - /* U3PhyWriteReg8(((u32)&info.sifslv_chip_regs_a->gpio_ctla)+3, - * 0xdc); - */ - u3_phy_write_reg8(((phys_addr_t)(uintptr_t) - &info.sifslv_chip_regs_a->gpio_ctla) + 3, 0x24); - } else { - USB_PHY_Write_Register8(0x00, 0xFF); - - DBG(0, "[MUSB]addr: 0xFF, value: %x\n", - USB_PHY_Read_Register8(0xFF)); - - /* usb phy initial sequence */ - USB_PHY_Write_Register8(0x00, 0xFF); - USB_PHY_Write_Register8(0x04, 0x61); - USB_PHY_Write_Register8(0x00, 0x68); - USB_PHY_Write_Register8(0x00, 0x6a); - USB_PHY_Write_Register8(0x6e, 0x00); - USB_PHY_Write_Register8(0x0c, 0x1b); - USB_PHY_Write_Register8(0x44, 0x08); - USB_PHY_Write_Register8(0x55, 0x11); - USB_PHY_Write_Register8(0x68, 0x1a); - - - DBG(0, "[MUSB]addr: 0xFF, value: %x\n" - "[MUSB]addr: 0x61, value: %x\n" - "[MUSB]addr: 0x68, value: %x\n" - "[MUSB]addr: 0x6a, value: %x\n" - "[MUSB]addr: 0x00, value: %x\n" - "[MUSB]addr: 0x1b, value: %x\n" - "[MUSB]addr: 0x08, value: %x\n" - "[MUSB]addr: 0x11, value: %x\n" - "[MUSB]addr: 0x1a, value: %x\n", - USB_PHY_Read_Register8(0xFF), - USB_PHY_Read_Register8(0x61), - USB_PHY_Read_Register8(0x68), - USB_PHY_Read_Register8(0x6a), - USB_PHY_Read_Register8(0x00), - USB_PHY_Read_Register8(0x1b), - USB_PHY_Read_Register8(0x08), - USB_PHY_Read_Register8(0x11), - USB_PHY_Read_Register8(0x1a)); - } - - DBG(0, "[MUSB]%s, end\n", __func__); - return 0; - -} - -static int usb_i2c_remove(struct i2c_client *client) -{ - return 0; -} - -static const struct of_device_id usb_of_match[] = { - {.compatible = "mediatek,mtk-usb"}, - {}, -}; - -struct i2c_driver usb_i2c_driver = { - .probe = usb_i2c_probe, - .remove = usb_i2c_remove, - .driver = { - .name = "mtk-usb", - .of_match_table = usb_of_match, - }, - .id_table = usb_i2c_id, -}; - -static int add_usb_i2c_driver(void) -{ - DBG(0, "%s\n", __func__); - - if (i2c_add_driver(&usb_i2c_driver) != 0) { - DBG(0, "[MUSB]usb_i2c_driver initialization failed!!\n"); - return -1; - } - DBG(0, "[MUSB]usb_i2c_driver initialization succeed!!\n"); - return 0; -} -#endif /* End of FPGA_PLATFORM */ - -static int __init mt_usb_init(struct musb *musb) -{ - int ret; - - DBG(1, "%s\n", __func__); - - musb->phy = glue->phy; - musb->xceiv = glue->xceiv; - - musb->dma_irq = (int)SHARE_IRQ; - musb->fifo_cfg = fifo_cfg; - musb->fifo_cfg_size = ARRAY_SIZE(fifo_cfg); - musb->dyn_fifo = true; - musb->power = false; - musb->is_host = false; - musb->fifo_size = 8 * 1024; - musb->usb_lock = wakeup_source_register(NULL, "USB suspend lock"); - - ret = phy_init(glue->phy); - if (ret) - goto err_phy_init; - -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - glue->phy_mode = PHY_MODE_UART; - DBG(0, "At UART mode. Switch to USB is not support\n"); - } -#endif - phy_set_mode(glue->phy, glue->phy_mode); - - if (glue->phy_mode != PHY_MODE_UART) - ret = phy_power_on(glue->phy); - - if (ret) - goto err_phy_power_on; - -#ifndef FPGA_PLATFORM - reg_vusb = regulator_get(musb->controller, "vusb"); - if (!IS_ERR(reg_vusb)) { -#ifdef NEVER -#define VUSB33_VOL_MIN 3070000 -#define VUSB33_VOL_MAX 3070000 - ret = regulator_set_voltage(reg_vusb, - VUSB33_VOL_MIN, VUSB33_VOL_MAX); - if (ret < 0) - pr_err("regulator set vol failed: %d\n", ret); - else - DBG(0, "regulator set vol ok, <%d,%d>\n", - VUSB33_VOL_MIN, VUSB33_VOL_MAX); -#endif /* NEVER */ - ret = regulator_enable(reg_vusb); - if (ret < 0) { - pr_err("regulator_enable vusb failed: %d\n", ret); - regulator_put(reg_vusb); - } - } else - pr_err("regulator_get vusb failed\n"); - - reg_vio18 = regulator_get(musb->controller, "vio18"); - if (!IS_ERR(reg_vio18)) { - ret = regulator_enable(reg_vio18); - if (ret < 0) { - pr_err("regulator_enable vio18 failed: %d\n", ret); - regulator_put(reg_vio18); - } - } else - pr_err("regulator_get vio18 failed\n"); - - reg_va12 = regulator_get(musb->controller, "va12"); - if (!IS_ERR(reg_va12)) { - ret = regulator_enable(reg_va12); - if (ret < 0) { - pr_err("regulator_enable va12 failed: %d\n", ret); - regulator_put(reg_va12); - } - } else - pr_err("regulator_get va12 failed\n"); - -#endif - - /*ret = device_create_file(musb->controller, &dev_attr_cmode);*/ - - /* mt_usb_enable(musb); */ - - musb->isr = mt_usb_interrupt; - musb_writel(musb->mregs, - MUSB_HSDMA_INTR, 0xff | - (0xff << DMA_INTR_UNMASK_SET_OFFSET)); - DBG(1, "musb platform init %x\n", - musb_readl(musb->mregs, MUSB_HSDMA_INTR)); - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - /* FIXME, workaround for device_qmu + host_dma */ - musb_writel(musb->mregs, - USB_L1INTM, - TX_INT_STATUS | - RX_INT_STATUS | - USBCOM_INT_STATUS | - DMA_INT_STATUS | - QINT_STATUS); -#else - musb_writel(musb->mregs, - USB_L1INTM, - TX_INT_STATUS | - RX_INT_STATUS | - USBCOM_INT_STATUS | - DMA_INT_STATUS); -#endif - -#if defined(CONFIG_MTK_BASE_POWER) - timer_setup(&musb->idle_timer, musb_do_idle, 0); -#endif - -#ifdef CONFIG_USB_MTK_OTG - mt_usb_otg_init(musb); - /* enable host suspend mode */ - mt_usb_wakeup_init(musb); - musb->host_suspend = true; -#endif - return 0; -err_phy_power_on: - phy_exit(glue->phy); -err_phy_init: - - return ret; -} - -static int mt_usb_exit(struct musb *musb) -{ - del_timer_sync(&musb->idle_timer); -#ifndef FPGA_PLATFORM - if (reg_vusb) { - regulator_put(reg_vusb); - reg_vusb = NULL; - } - if (reg_va12) { - regulator_put(reg_va12); - reg_va12 = NULL; - } - if (reg_vio18) { - regulator_put(reg_vio18); - reg_vio18 = NULL; - } -#endif -#ifdef CONFIG_USB_MTK_OTG - mt_usb_otg_exit(musb); -#endif - phy_power_off(glue->phy); - phy_exit(glue->phy); - return 0; -} - -static void mt_usb_enable_clk(struct musb *musb) -{ - usb_enable_clock(true); -} - -static void mt_usb_disable_clk(struct musb *musb) -{ - usb_enable_clock(false); -} - -static void mt_usb_prepare_clk(struct musb *musb) -{ - usb_prepare_clock(true); -} - -static void mt_usb_unprepare_clk(struct musb *musb) -{ - usb_prepare_clock(false); -} - -static const struct musb_platform_ops mt_usb_ops = { - .init = mt_usb_init, - .exit = mt_usb_exit, - /*.set_mode = mt_usb_set_mode, */ -#if defined(CONFIG_MTK_BASE_POWER) - .try_idle = mt_usb_try_idle, -#endif - .enable = mt_usb_enable, - .disable = mt_usb_disable, - /* .set_vbus = mt_usb_set_vbus, */ - .vbus_status = mt_usb_get_vbus_status, - .enable_clk = mt_usb_enable_clk, - .disable_clk = mt_usb_disable_clk, - .prepare_clk = mt_usb_prepare_clk, - .unprepare_clk = mt_usb_unprepare_clk, -#ifdef CONFIG_USB_MTK_OTG - .enable_wakeup = mt_usb_wakeup, -#endif -}; - -#ifdef CONFIG_MTK_MUSB_DRV_36BIT -static u64 mt_usb_dmamask = DMA_BIT_MASK(36); -#else -static u64 mt_usb_dmamask = DMA_BIT_MASK(32); -#endif - -struct mt_usb_glue *glue; -EXPORT_SYMBOL(glue); - -static int mt_usb_probe(struct platform_device *pdev) -{ - struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data; - struct platform_device *musb_pdev; - struct musb_hdrc_config *config; - struct device_node *np = pdev->dev.of_node; -#ifdef CONFIG_MTK_UART_USB_SWITCH - struct device_node *ap_gpio_node = NULL; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk *otg_sx; -#endif - int ret = -ENOMEM; - - glue = kzalloc(sizeof(*glue), GFP_KERNEL); - if (!glue) - goto err0; - - /* Device name is required */ - musb_pdev = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_NONE); - if (!musb_pdev) { - dev_notice(&pdev->dev, "failed to allocate musb pdev\n"); - goto err1; - } - - glue->phy = devm_of_phy_get_by_index(&pdev->dev, np, 0); - if (IS_ERR(glue->phy)) { - dev_err(&pdev->dev, "fail to getting phy %ld\n", - PTR_ERR(glue->phy)); - return PTR_ERR(glue->phy); - } - - glue->usb_phy = usb_phy_generic_register(); - if (IS_ERR(glue->usb_phy)) { - dev_err(&pdev->dev, "fail to registering usb-phy %ld\n", - PTR_ERR(glue->usb_phy)); - return PTR_ERR(glue->usb_phy); - } - glue->xceiv = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2); - if (IS_ERR(glue->xceiv)) { - dev_err(&pdev->dev, "fail to getting usb-phy %d\n", ret); - ret = PTR_ERR(glue->xceiv); - goto err_unregister_usb_phy; - } - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) { - dev_notice(&pdev->dev, "failed to allocate musb platform data\n"); - goto err2; - } - - config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); - if (!config) { - /* dev_notice(&pdev->dev, - * "failed to allocate musb hdrc config\n"); - */ - goto err2; - } - -#ifdef CONFIG_MTK_UART_USB_SWITCH - ap_gpio_node = - of_find_compatible_node(NULL, NULL, AP_GPIO_COMPATIBLE_NAME); - - if (ap_gpio_node == NULL) { - dev_notice(&pdev->dev, "USB get ap_gpio_node failed\n"); - if (ap_gpio_base) - iounmap(ap_gpio_base); - ap_gpio_base = 0; - } else { - ap_gpio_base = of_iomap(ap_gpio_node, 0); - ap_gpio_base += RG_GPIO_SELECT; - } -#endif - - of_property_read_u32(np, "num_eps", (u32 *) &config->num_eps); - config->multipoint = of_property_read_bool(np, "multipoint"); - - pdata->config = config; - - musb_pdev->dev.parent = &pdev->dev; - musb_pdev->dev.dma_mask = &mt_usb_dmamask; - musb_pdev->dev.coherent_dma_mask = mt_usb_dmamask; - - pdev->dev.dma_mask = &mt_usb_dmamask; - pdev->dev.coherent_dma_mask = mt_usb_dmamask; - arch_setup_dma_ops(&musb_pdev->dev, 0, mt_usb_dmamask, NULL, 0); - - glue->dev = &pdev->dev; - glue->musb_pdev = musb_pdev; - - pdata->platform_ops = &mt_usb_ops; - - /* - * Don't use the name from dtsi, like "11200000.usb0". - * So modify the device name. And rc can use the same path for - * all platform, like "/sys/devices/platform/mt_usb/". - */ - ret = device_rename(&pdev->dev, "mt_usb"); - if (ret) - dev_notice(&pdev->dev, "failed to rename\n"); - - /* - * fix uaf(use afer free) issue:backup pdev->name, - * device_rename will free pdev->name - */ - pdev->name = pdev->dev.kobj.name; - - platform_set_drvdata(pdev, glue); - - ret = platform_device_add_resources(musb_pdev, - pdev->resource, pdev->num_resources); - if (ret) { - dev_notice(&pdev->dev, "failed to add resources\n"); - goto err2; - } - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - isoc_ep_end_idx = 1; - isoc_ep_gpd_count = 248; /* 30 ms for HS, at most (30*8 + 1) */ - - mtk_host_qmu_force_isoc_restart = 0; -#endif -#ifndef FPGA_PLATFORM -#if defined(CONFIG_MTK_BASE_POWER) - register_usb_hal_dpidle_request(usb_dpidle_request); -#endif -#endif - register_usb_hal_disconnect_check(trigger_disconnect_check_work); - - INIT_DELAYED_WORK(&idle_work, do_idle_work); - - DBG(0, "keep musb->power & mtk_usb_power in the samae value\n"); - mtk_usb_power = false; - -#ifndef FPGA_PLATFORM - glue->musb_clk = devm_clk_get(&pdev->dev, "usb0"); - if (IS_ERR(glue->musb_clk)) { - DBG(0, "cannot get musb_clk clock\n"); - goto err2; - } - - glue->musb_clk_top_sel = devm_clk_get(&pdev->dev, "usb0_clk_top_sel"); - if (IS_ERR(glue->musb_clk_top_sel)) { - DBG(0, "cannot get musb_clk_top_sel clock\n"); - goto err2; - } - - glue->musb_clk_univpll3_d4 = - devm_clk_get(&pdev->dev, "usb0_clk_univpll3_d4"); - if (IS_ERR(glue->musb_clk_univpll3_d4)) { - DBG(0, "cannot get musb_clk_univpll3_d4 clock\n"); - goto err2; - } - - if (init_sysfs(&pdev->dev)) { - DBG(0, "failed to init_sysfs\n"); - goto err2; - } -#ifdef CONFIG_USB_MTK_OTG - pdata->dr_mode = usb_get_dr_mode(&pdev->dev); -#else - of_property_read_u32(np, "dr_mode", (u32 *) &pdata->dr_mode); -#endif - - switch (pdata->dr_mode) { - case USB_DR_MODE_HOST: - glue->phy_mode = PHY_MODE_USB_HOST; - break; - case USB_DR_MODE_PERIPHERAL: - glue->phy_mode = PHY_MODE_USB_DEVICE; - break; - case USB_DR_MODE_OTG: - glue->phy_mode = PHY_MODE_USB_OTG; - break; - default: - dev_err(&pdev->dev, "Error 'dr_mode' property\n"); - return -EINVAL; - } - - DBG(0, "get dr_mode: %d\n", pdata->dr_mode); - - /* assign usb-role-sw */ - otg_sx = &glue->otg_sx; - -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - otg_sx->manual_drd_enabled = - of_property_read_bool(np, "enable-manual-drd"); - otg_sx->role_sw_used = of_property_read_bool(np, "usb-role-switch"); - - if (!otg_sx->role_sw_used && of_property_read_bool(np, "extcon")) { - otg_sx->edev = extcon_get_edev_by_phandle(&musb_pdev->dev, 0); - if (IS_ERR(otg_sx->edev)) { - dev_err(&musb_pdev->dev, "couldn't get extcon device\n"); - return PTR_ERR(otg_sx->edev); - } - } -#endif - - ret = platform_device_add_data(musb_pdev, pdata, sizeof(*pdata)); - if (ret) { - dev_notice(&pdev->dev, "failed to add platform_data\n"); - goto err2; - } - ret = platform_device_add(musb_pdev); - - if (ret) { - dev_notice(&pdev->dev, "failed to register musb device\n"); - goto err2; - } -#endif /* FPGA_PLATFORM */ - DBG(0, "USB probe done!\n"); - -#if defined(FPGA_PLATFORM) || defined(FOR_BRING_UP) - musb_force_on = 1; -#endif - - return 0; - -err2: - platform_device_put(musb_pdev); - platform_device_unregister(glue->musb_pdev); -err_unregister_usb_phy: - usb_phy_generic_unregister(glue->usb_phy); -err1: - kfree(glue); -err0: - return ret; -} - -static int mt_usb_remove(struct platform_device *pdev) -{ - struct mt_usb_glue *glue = platform_get_drvdata(pdev); - struct platform_device *usb_phy = glue->usb_phy; - - platform_device_unregister(glue->musb_pdev); - usb_phy_generic_unregister(usb_phy); - kfree(glue); - - return 0; -} - -static struct platform_driver mt_usb_driver = { - .remove = mt_usb_remove, - .probe = mt_usb_probe, - .driver = { - .name = "mt_usb", - .of_match_table = apusb_of_ids, - }, -}; -module_platform_driver(mt_usb_driver); - -static int __init usb20_init(void) -{ - int ret; - - DBG(0, "usb20 init\n"); - -#ifdef CONFIG_MTK_USB2JTAG_SUPPORT - if (usb2jtag_mode()) { - pr_notice("[USB2JTAG] in usb2jtag mode, not to initialize usb driver\n"); - return 0; - } -#endif - - /* Fix musb_plat build-in */ - /* ret = platform_driver_register(&mt_usb_driver); */ - ret = 0; - -#ifdef FPGA_PLATFORM - add_usb_i2c_driver(); -#endif - - DBG(0, "usb20 init ret:%d\n", ret); - return ret; -} -fs_initcall(usb20_init); - -static void __exit usb20_exit(void) -{ - /* Fix musb_plat build-in */ - /* platform_driver_unregister(&mt_usb_driver); */ -} -module_exit(usb20_exit); diff --git a/drivers/misc/mediatek/usb20/mt6768/usb20.h b/drivers/misc/mediatek/usb20/mt6768/usb20.h deleted file mode 100644 index 9247bb8fd378..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/usb20.h +++ /dev/null @@ -1,139 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#ifndef __USB20_H__ -#define __USB20_H__ - -#ifdef CONFIG_FPGA_EARLY_PORTING -#define FPGA_PLATFORM -#endif - -#include -#include - -struct mt_usb_work { - struct delayed_work dwork; - int ops; -}; - -/* ToDo: should be moved to glue */ -extern struct musb *mtk_musb; -extern struct musb *musb; - -struct mt_usb_glue { - struct device *dev; - struct platform_device *musb_pdev; - struct musb *mtk_musb; - /* common power & clock */ - struct clk *musb_clk; - struct clk *musb_clk_top_sel; - struct clk *musb_clk_univpll3_d4; -#ifdef CONFIG_PHY_MTK_TPHY - struct platform_device *usb_phy; - struct phy *phy; - struct usb_phy *xceiv; - enum phy_mode phy_mode; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk otg_sx; -#endif -}; - -extern struct mt_usb_glue *glue; - -#define glue_to_musb(g) platform_get_drvdata(g->musb) - -extern int kernel_init_done; - -extern unsigned int upmu_get_rgs_chrdet(void); -extern bool upmu_is_chr_det(void); - -extern enum charger_type mt_charger_type_detection(void); -extern void BATTERY_SetUSBState(int usb_state); -extern void upmu_interrupt_chrdet_int_en(unsigned int val); - -/* specific USB fuctnion */ -enum CABLE_MODE { - CABLE_MODE_CHRG_ONLY = 0, - CABLE_MODE_NORMAL, - CABLE_MODE_HOST_ONLY, - CABLE_MODE_MAX -}; - -enum USB_CLK_STATE { - NO_CHANGE = 0, - ON_TO_OFF, - OFF_TO_ON, -}; - -/* specific USB operation */ -enum CONNECTION_OPS { - CONNECTION_OPS_DISC = 0, - CONNECTION_OPS_CHECK, - CONNECTION_OPS_CONN -}; - -enum VBUS_OPS { - VBUS_OPS_OFF = 0, - VBUS_OPS_ON -}; - -#ifdef CONFIG_MTK_UART_USB_SWITCH -enum PORT_MODE { - PORT_MODE_USB = 0, - PORT_MODE_UART, - PORT_MODE_MAX -}; - -extern bool usb_phy_check_in_uart_mode(void); -extern void usb_phy_switch_to_usb(void); -extern void usb_phy_switch_to_uart(void); -#endif - -#ifdef FPGA_PLATFORM -extern void USB_PHY_Write_Register8(u8 var, u8 addr); -extern u8 USB_PHY_Read_Register8(u8 addr); -#endif - -#ifdef CONFIG_MTK_UART_USB_SWITCH - -#define RG_GPIO_SELECT (0x600) -#define GPIO_SEL_OFFSET (4) -#define GPIO_SEL_MASK (0x7 << GPIO_SEL_OFFSET) -#define GPIO_SEL_UART0 (0x1 << GPIO_SEL_OFFSET) -#define GPIO_SEL_UART1 (0x2 << GPIO_SEL_OFFSET) -#define GET_GPIO_SEL_VAL(x) ((x & GPIO_SEL_MASK) >> GPIO_SEL_OFFSET) - -extern void __iomem *ap_gpio_base; -extern bool in_uart_mode; -#endif -extern int usb20_phy_init_debugfs(void); -extern enum charger_type mt_get_charger_type(void); -#ifndef CONFIG_FPGA_EARLY_PORTING -#include -#endif -#define PHY_IDLE_MODE 0 -#define PHY_DEV_ACTIVE 1 -#define PHY_HOST_ACTIVE 2 -void set_usb_phy_mode(int mode); -#ifdef CONFIG_USB_MTK_OTG -extern void mt_usb_otg_init(struct musb *musb); -extern void mt_usb_otg_exit(struct musb *musb); -extern int mt_usb_get_vbus_status(struct musb *musb); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); -#endif -extern void musb_platform_reset(struct musb *musb); -extern bool usb_enable_clock(bool enable); -extern bool usb_prepare_clock(bool enable); -extern void usb_prepare_enable_clock(bool enable); - -/* usb host mode wakeup */ -#define USB_WAKEUP_DEC_CON1 0x404 -#define USB1_CDEN BIT(0) -#define USB1_CDDEBOUNCE(x) (((x) & 0xf) << 1) -#endif diff --git a/drivers/misc/mediatek/usb20/mt6768/usb20_host.c b/drivers/misc/mediatek/usb20/mt6768/usb20_host.c deleted file mode 100644 index 29c09d70fd36..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/usb20_host.c +++ /dev/null @@ -1,762 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include - -#ifdef CONFIG_USB_MTK_OTG -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_MTK_USB_TYPEC -#ifdef CONFIG_TCPC_CLASS -#include -#endif -#endif -#include -#include -#include - -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -MODULE_LICENSE("GPL v2"); - -#include - -struct device_node *usb_node; -static int iddig_eint_num; -static ktime_t ktime_start, ktime_end; -static struct regulator *reg_vbus; - -static struct musb_fifo_cfg fifo_cfg_host[] = { -{ .hw_ep_num = 1, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 1, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_RX, - .maxpacket = 64, .mode = BUF_SINGLE}, -}; - -u32 delay_time = 15; -module_param(delay_time, int, 0644); -u32 delay_time1 = 55; -module_param(delay_time1, int, 0644); -u32 iddig_cnt; -module_param(iddig_cnt, int, 0644); - -static bool vbus_on; -module_param(vbus_on, bool, 0644); -static int vbus_control; -module_param(vbus_control, int, 0644); - -#ifdef CONFIG_MTK_MUSB_PHY -void set_usb_phy_mode(int mode) -{ - switch (mode) { - case PHY_MODE_USB_DEVICE: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ - USBPHY_CLR32(0x6C, (0x10<<0)); - USBPHY_SET32(0x6C, (0x2F<<0)); - USBPHY_SET32(0x6C, (0x3F<<8)); - break; - case PHY_MODE_USB_HOST: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ - USBPHY_CLR32(0x6c, (0x12<<0)); - USBPHY_SET32(0x6c, (0x2d<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - case PHY_MODE_INVALID: - /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ - USBPHY_SET32(0x6c, (0x11<<0)); - USBPHY_CLR32(0x6c, (0x2e<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - default: - DBG(0, "mode error %d\n", mode); - } - DBG(0, "force PHY to mode %d, 0x6c=%x\n", mode, USBPHY_READ32(0x6c)); -} -#endif - -static void _set_vbus(int is_on) -{ - if (!reg_vbus) { - DBG(0, "vbus_init\n"); - reg_vbus = regulator_get(mtk_musb->controller, "usb-otg-vbus"); - if (IS_ERR_OR_NULL(reg_vbus)) { - DBG(0, "failed to get vbus\n"); - return; - } - } - - DBG(0, "op<%d>, status<%d>\n", is_on, vbus_on); - if (is_on && !vbus_on) { - /* update flag 1st then enable VBUS to make - * host mode correct used by PMIC - */ - vbus_on = true; - if (regulator_set_voltage(reg_vbus, 5000000, 5000000)) - DBG(0, "vbus regulator set voltage failed\n"); - - if (regulator_set_current_limit(reg_vbus, 1500000, 1800000)) - DBG(0, "vbus regulator set current limit failed\n"); - - if (regulator_enable(reg_vbus)) - DBG(0, "vbus regulator enable failed\n"); - } else if (!is_on && vbus_on) { - /* disable VBUS 1st then update flag - * to make host mode correct used by PMIC - */ - vbus_on = false; - - regulator_disable(reg_vbus); - } -} - -int mt_usb_get_vbus_status(struct musb *musb) -{ -#if 1 - return true; -#else - int ret = 0; - - if ((musb_readb(musb->mregs, MUSB_DEVCTL) & - MUSB_DEVCTL_VBUS) != MUSB_DEVCTL_VBUS) - ret = 1; - else - DBG(0, "VBUS error, devctl=%x, power=%d\n", - musb_readb(musb->mregs, MUSB_DEVCTL), - musb->power); - pr_debug("vbus ready = %d\n", ret); - return ret; -#endif -} - -#if defined(CONFIG_USBIF_COMPLIANCE) -u32 sw_deboun_time = 1; -#else -u32 sw_deboun_time = 400; -#endif -module_param(sw_deboun_time, int, 0644); - -u32 typec_control; -module_param(typec_control, int, 0644); -static bool typec_req_host; -static bool iddig_req_host; - -static void do_host_work(struct work_struct *data); -static void issue_host_work(int ops, int delay, bool on_st) -{ - struct mt_usb_work *work; - - if (!mtk_musb) { - DBG(0, "mtk_musb = NULL\n"); - return; - } - - /* create and prepare worker */ - work = kzalloc(sizeof(struct mt_usb_work), GFP_ATOMIC); - if (!work) { - DBG(0, "work is NULL, directly return\n"); - return; - } - work->ops = ops; - INIT_DELAYED_WORK(&work->dwork, do_host_work); - - /* issue connection work */ - DBG(0, "issue work, ops<%d>, delay<%d>, on_st<%d>\n", - ops, delay, on_st); - - if (on_st) - queue_delayed_work(mtk_musb->st_wq, - &work->dwork, msecs_to_jiffies(delay)); - else - schedule_delayed_work(&work->dwork, - msecs_to_jiffies(delay)); -} -void mt_usb_host_connect(int delay) -{ - typec_req_host = true; - DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); - issue_host_work(CONNECTION_OPS_CONN, delay, true); -} -void mt_usb_host_disconnect(int delay) -{ - typec_req_host = false; - DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); - issue_host_work(CONNECTION_OPS_DISC, delay, true); -} -EXPORT_SYMBOL(mt_usb_host_disconnect); - -static bool musb_is_host(void) -{ - bool host_mode = 0; - - if (typec_control) - host_mode = typec_req_host; - else - host_mode = iddig_req_host; - - return host_mode; -} - -void musb_session_restart(struct musb *musb) -{ - void __iomem *mbase = musb->mregs; - - musb_writeb(mbase, MUSB_DEVCTL, - (musb_readb(mbase, - MUSB_DEVCTL) & (~MUSB_DEVCTL_SESSION))); -#ifdef CONFIG_MTK_MUSB_PHY - DBG(0, "[MUSB] stopped session for VBUSERROR interrupt\n"); - USBPHY_SET32(0x6c, (0x3c<<8)); - USBPHY_SET32(0x6c, (0x10<<0)); - USBPHY_CLR32(0x6c, (0x2c<<0)); - DBG(0, "[MUSB] force PHY to idle, 0x6c=%x\n", USBPHY_READ32(0x6c)); - mdelay(5); - USBPHY_CLR32(0x6c, (0x3c<<8)); - USBPHY_CLR32(0x6c, (0x3c<<0)); - DBG(0, "[MUSB] let PHY resample VBUS, 0x6c=%x\n" - , USBPHY_READ32(0x6c)); -#endif - musb_writeb(mbase, MUSB_DEVCTL, - (musb_readb(mbase, - MUSB_DEVCTL) | MUSB_DEVCTL_SESSION)); - DBG(0, "[MUSB] restart session\n"); -} -EXPORT_SYMBOL(musb_session_restart); - -static struct delayed_work host_plug_test_work; -int host_plug_test_enable; /* default disable */ -module_param(host_plug_test_enable, int, 0644); -int host_plug_in_test_period_ms = 5000; -module_param(host_plug_in_test_period_ms, int, 0644); -int host_plug_out_test_period_ms = 5000; -module_param(host_plug_out_test_period_ms, int, 0644); -int host_test_vbus_off_time_us = 3000; -module_param(host_test_vbus_off_time_us, int, 0644); -int host_test_vbus_only = 1; -module_param(host_test_vbus_only, int, 0644); -static int host_plug_test_triggered; -void switch_int_to_device(struct musb *musb) -{ - irq_set_irq_type(iddig_eint_num, IRQF_TRIGGER_HIGH); - enable_irq(iddig_eint_num); - DBG(0, "%s is done\n", __func__); -} - -void switch_int_to_host(struct musb *musb) -{ - irq_set_irq_type(iddig_eint_num, IRQF_TRIGGER_LOW); - enable_irq(iddig_eint_num); - DBG(0, "%s is done\n", __func__); -} - -static void do_host_plug_test_work(struct work_struct *data) -{ - static ktime_t ktime_begin, ktime_end; - static s64 diff_time; - static int host_on; - static struct wakeup_source *host_test_wakelock; - static int wake_lock_inited; - - if (!wake_lock_inited) { - DBG(0, "wake_lock_init\n"); - host_test_wakelock = wakeup_source_register(NULL, - "host.test.lock"); - wake_lock_inited = 1; - } - - host_plug_test_triggered = 1; - /* sync global status */ - mb(); - __pm_stay_awake(host_test_wakelock); - DBG(0, "BEGIN"); - ktime_begin = ktime_get(); - - host_on = 1; - while (1) { - if (!musb_is_host() && host_on) { - DBG(0, "about to exit"); - break; - } - msleep(50); - - ktime_end = ktime_get(); - diff_time = ktime_to_ms(ktime_sub(ktime_end, ktime_begin)); - if (host_on && diff_time >= host_plug_in_test_period_ms) { - host_on = 0; - DBG(0, "OFF\n"); - - ktime_begin = ktime_get(); - - /* simulate plug out */ - _set_vbus(0); - udelay(host_test_vbus_off_time_us); - - if (!host_test_vbus_only) - issue_host_work(CONNECTION_OPS_DISC, 0, false); - } else if (!host_on && diff_time >= - host_plug_out_test_period_ms) { - host_on = 1; - DBG(0, "ON\n"); - - ktime_begin = ktime_get(); - if (!host_test_vbus_only) - issue_host_work(CONNECTION_OPS_CONN, 0, false); - - _set_vbus(1); - msleep(100); - - } - } - - /* wait host_work done */ - msleep(1000); - host_plug_test_triggered = 0; - __pm_relax(host_test_wakelock); - DBG(0, "END\n"); -} - -#define ID_PIN_WORK_RECHECK_TIME 30 /* 30 ms */ -#define ID_PIN_WORK_BLOCK_TIMEOUT 30000 /* 30000 ms */ -static void do_host_work(struct work_struct *data) -{ - u8 devctl = 0; - unsigned long flags; - static int inited, timeout; /* default to 0 */ - static s64 diff_time; - bool host_on; - int usb_clk_state = NO_CHANGE; - struct mt_usb_work *work = - container_of(data, struct mt_usb_work, dwork.work); - struct mt_usb_glue *glue = mtk_musb->glue; - - /* - * kernel_init_done should be set in - * early-init stage through init.$platform.usb.rc - */ - while (!inited && !kernel_init_done && - !mtk_musb->is_ready && !timeout) { - ktime_end = ktime_get(); - diff_time = ktime_to_ms(ktime_sub(ktime_end, ktime_start)); - - DBG_LIMIT(3, - "init_done:%d, is_ready:%d, inited:%d, TO:%d, diff:%lld", - kernel_init_done, - mtk_musb->is_ready, - inited, - timeout, - diff_time); - - if (diff_time > ID_PIN_WORK_BLOCK_TIMEOUT) { - DBG(0, "diff_time:%lld\n", diff_time); - timeout = 1; - } - msleep(ID_PIN_WORK_RECHECK_TIME); - } - - if (!inited) { - DBG(0, "PASS,init_done:%d,is_ready:%d,inited:%d, TO:%d\n", - kernel_init_done, mtk_musb->is_ready, - inited, timeout); - inited = 1; - } - - /* always prepare clock and check if need to unprepater later */ - /* clk_prepare_cnt +1 here */ - usb_prepare_clock(true); - - down(&mtk_musb->musb_lock); - - host_on = (work->ops == - CONNECTION_OPS_CONN ? true : false); - - DBG(0, "work start, is_host=%d, host_on=%d\n", - mtk_musb->is_host, host_on); - - if (host_on && !mtk_musb->is_host) { - /* switch to HOST state before turn on VBUS */ - MUSB_HST_MODE(mtk_musb); - - /* to make sure all event clear */ - msleep(32); -#ifdef CONFIG_MTK_UAC_POWER_SAVING - if (!usb_on_sram) { - int ret; - - ret = gpd_switch_to_sram(mtk_musb->controller); - DBG(0, "gpd_switch_to_sram, ret<%d>\n", ret); - if (ret == 0) - usb_on_sram = 1; - } -#endif - /* setup fifo for host mode */ - ep_config_from_table_for_host(mtk_musb); - - if (!mtk_musb->host_suspend) - __pm_stay_awake(mtk_musb->usb_lock); - - - /* this make PHY operation workable */ - musb_platform_enable(mtk_musb); - - /* for no VBUS sensing IP*/ - /* wait VBUS ready */ - msleep(100); - /* clear session*/ - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, (devctl&(~MUSB_DEVCTL_SESSION))); - phy_set_mode(glue->phy, PHY_MODE_INVALID); - /* wait */ - mdelay(5); - /* restart session */ - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, (devctl | MUSB_DEVCTL_SESSION)); - phy_set_mode(glue->phy, PHY_MODE_USB_HOST); - - musb_start(mtk_musb); - if (!typec_control && !host_plug_test_triggered) - switch_int_to_device(mtk_musb); - - if (host_plug_test_enable && !host_plug_test_triggered) - queue_delayed_work(mtk_musb->st_wq, - &host_plug_test_work, 0); - usb_clk_state = OFF_TO_ON; - } else if (!host_on && mtk_musb->is_host) { - /* switch from host -> device */ - /* for device no disconnect interrupt */ - spin_lock_irqsave(&mtk_musb->lock, flags); - if (mtk_musb->is_active) { - DBG(0, "for not receiving disconnect interrupt\n"); - usb_hcd_resume_root_hub(musb_to_hcd(mtk_musb)); - musb_root_disconnect(mtk_musb); - } - spin_unlock_irqrestore(&mtk_musb->lock, flags); - - DBG(1, "devctl is %x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - if (mtk_musb->usb_lock->active) - __pm_relax(mtk_musb->usb_lock); - - /* for no VBUS sensing IP */ - phy_set_mode(glue->phy, PHY_MODE_INVALID); - - musb_stop(mtk_musb); - - if (!typec_control && !host_plug_test_triggered) - switch_int_to_host(mtk_musb); - -#ifdef CONFIG_MTK_UAC_POWER_SAVING - if (usb_on_sram) { - gpd_switch_to_dram(mtk_musb->controller); - usb_on_sram = 0; - } -#endif - /* to make sure all event clear */ - msleep(32); - - mtk_musb->xceiv->otg->state = OTG_STATE_B_IDLE; - /* switch to DEV state after turn off VBUS */ - MUSB_DEV_MODE(mtk_musb); - - usb_clk_state = ON_TO_OFF; - } - DBG(0, "work end, is_host=%d\n", mtk_musb->is_host); - up(&mtk_musb->musb_lock); - - if (usb_clk_state == ON_TO_OFF) { - /* clock on -> of: clk_prepare_cnt -2 */ - usb_prepare_clock(false); - usb_prepare_clock(false); - } else if (usb_clk_state == NO_CHANGE) { - /* clock no change : clk_prepare_cnt -1 */ - usb_prepare_clock(false); - } - /* free mt_usb_work */ - kfree(work); -} - -static irqreturn_t mt_usb_ext_iddig_int(int irq, void *dev_id) -{ - iddig_cnt++; - - iddig_req_host = !iddig_req_host; - DBG(0, "id pin assert, %s\n", iddig_req_host ? - "connect" : "disconnect"); - - if (iddig_req_host) - mt_usb_host_connect(0); - else - mt_usb_host_disconnect(0); - disable_irq_nosync(iddig_eint_num); - return IRQ_HANDLED; -} - -static const struct of_device_id otg_iddig_of_match[] = { - {.compatible = "mediatek,usb_iddig_bi_eint"}, - {}, -}; - -static int otg_iddig_probe(struct platform_device *pdev) -{ - int ret; - struct device *dev = &pdev->dev; - struct device_node *node = dev->of_node; - - iddig_eint_num = irq_of_parse_and_map(node, 0); - DBG(0, "iddig_eint_num<%d>\n", iddig_eint_num); - if (iddig_eint_num < 0) - return -ENODEV; - - ret = request_irq(iddig_eint_num, mt_usb_ext_iddig_int, - IRQF_TRIGGER_LOW, "USB_IDDIG", NULL); - if (ret) { - DBG(0, - "request EINT <%d> fail, ret<%d>\n", - iddig_eint_num, ret); - return ret; - } - - return 0; -} - -static struct platform_driver otg_iddig_driver = { - .probe = otg_iddig_probe, - /* .remove = otg_iddig_remove, */ - /* .shutdown = otg_iddig_shutdown, */ - .driver = { - .name = "otg_iddig", - .owner = THIS_MODULE, - .of_match_table = of_match_ptr(otg_iddig_of_match), - }, -}; - - -static int iddig_int_init(void) -{ - int ret = 0; - - ret = platform_driver_register(&otg_iddig_driver); - if (ret) - DBG(0, "ret:%d\n", ret); - - return 0; -} - -void mt_usb_otg_init(struct musb *musb) -{ - - /* test */ - INIT_DELAYED_WORK(&host_plug_test_work, do_host_plug_test_work); - ktime_start = ktime_get(); - - /* CONNECTION MANAGEMENT*/ -#ifdef CONFIG_MTK_USB_TYPEC - DBG(0, "host controlled by TYPEC\n"); - typec_control = 1; -#ifdef CONFIG_TCPC_CLASS - DBG(0, "host controlled by IDDIG\n"); - iddig_int_init(); - vbus_control = 1; -#endif /* CONFIG_TCPC_CLASS */ -#endif /* CONFIG_MTK_USB_TYPEC */ - - /* EP table */ - musb->fifo_cfg_host = fifo_cfg_host; - musb->fifo_cfg_host_size = ARRAY_SIZE(fifo_cfg_host); - -} -EXPORT_SYMBOL(mt_usb_otg_init); - -void mt_usb_otg_exit(struct musb *musb) -{ - DBG(0, "OTG disable vbus\n"); -} -EXPORT_SYMBOL(mt_usb_otg_exit); - -enum { - DO_IT = 0, - REVERT, -}; - -#ifdef CONFIG_MTK_MUSB_PHY -static void bypass_disc_circuit(int act) -{ - u32 val; - - usb_prepare_enable_clock(true); - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - /* 0x18, 13-12 RG_USB20_HSRX_MMODE_SELE, dft:00 */ - if (act == DO_IT) { - USBPHY_CLR32(0x18, (0x10<<8)); - USBPHY_SET32(0x18, (0x20<<8)); - } else { - USBPHY_CLR32(0x18, (0x10<<8)); - USBPHY_CLR32(0x18, (0x20<<8)); - } - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - usb_prepare_enable_clock(false); -} - -static void disc_threshold_to_max(int act) -{ - u32 val; - - usb_prepare_enable_clock(true); - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - /* 0x18, 7-4 RG_USB20_DISCTH, dft:1000 */ - if (act == DO_IT) { - USBPHY_SET32(0x18, (0xf0<<0)); - } else { - USBPHY_CLR32(0x18, (0x70<<0)); - USBPHY_SET32(0x18, (0x80<<0)); - } - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - usb_prepare_enable_clock(false); -} -#endif - -static int option; -static int set_option(const char *val, const struct kernel_param *kp) -{ - int local_option; - int rv; - - /* update module parameter */ - rv = param_set_int(val, kp); - if (rv) - return rv; - - /* update local_option */ - rv = kstrtoint(val, 10, &local_option); - if (rv != 0) - return rv; - - DBG(0, "option:%d, local_option:%d\n", option, local_option); - - switch (local_option) { - case 0: - DBG(0, "case %d\n", local_option); - iddig_int_init(); - break; - case 1: - DBG(0, "case %d\n", local_option); - mt_usb_host_connect(0); - break; - case 2: - DBG(0, "case %d\n", local_option); - mt_usb_host_disconnect(0); - break; - case 3: - DBG(0, "case %d\n", local_option); - mt_usb_host_connect(3000); - break; - case 4: - DBG(0, "case %d\n", local_option); - mt_usb_host_disconnect(3000); - break; -#ifdef CONFIG_MTK_MUSB_PHY - case 5: - DBG(0, "case %d\n", local_option); - disc_threshold_to_max(DO_IT); - break; - case 6: - DBG(0, "case %d\n", local_option); - disc_threshold_to_max(REVERT); - break; - case 7: - DBG(0, "case %d\n", local_option); - bypass_disc_circuit(DO_IT); - break; - case 8: - DBG(0, "case %d\n", local_option); - bypass_disc_circuit(REVERT); - break; -#endif - case 9: - DBG(0, "case %d\n", local_option); - _set_vbus(1); - break; - case 10: - DBG(0, "case %d\n", local_option); - _set_vbus(0); - break; - default: - break; - } - return 0; -} -static struct kernel_param_ops option_param_ops = { - .set = set_option, - .get = param_get_int, -}; -module_param_cb(option, &option_param_ops, &option, 0644); -#else -#include "musb_core.h" -/* for not define CONFIG_USB_MTK_OTG */ -void mt_usb_otg_init(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_init); -void mt_usb_otg_exit(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_exit); -void mt_usb_set_vbus(struct musb *musb, int is_on) {} -int mt_usb_get_vbus_status(struct musb *musb) {return 1; } -void switch_int_to_device(struct musb *musb) {} -void switch_int_to_host(struct musb *musb) {} -void musb_session_restart(struct musb *musb) {} -EXPORT_SYMBOL(musb_session_restart); -#endif diff --git a/drivers/misc/mediatek/usb20/mt6768/usb20_otg_if.c b/drivers/misc/mediatek/usb20/mt6768/usb20_otg_if.c deleted file mode 100644 index c95322f54c4b..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/usb20_otg_if.c +++ /dev/null @@ -1,1497 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "musb_core.h" -#ifdef CONFIG_OF -#include -#endif -#define DRIVER_AUTHOR "Mediatek" -#define DRIVER_DESC "driver for OTG USB-IF test" -#define MUSB_OTG_CSR0 0x102 -#define MUSB_OTG_COUNT0 0x108 - -#define TEST_DRIVER_NAME "mt_otg_test" - -#define DX_DBG - -#define TEST_IS_STOP 0xfff1 -#define DEV_NOT_CONNECT 0xfff2 -#define DEV_HNP_TIMEOUT 0xfff3 -#define DEV_NOT_RESET 0xfff4 - -MODULE_AUTHOR(DRIVER_AUTHOR); -MODULE_LICENSE("GPL"); - - -/*for USB-IF OTG test*/ -/* - * when this func is called in EM, it will reset the USB hw. - * and tester should not connet the uut to PC or connect a A-cable to it - * macro for USB-IF for OTG driver - */ -#define OTG_CMD_E_ENABLE_VBUS 0x00 -#define OTG_CMD_E_ENABLE_SRP 0x01 -#define OTG_CMD_E_START_DET_SRP 0x02 -#define OTG_CMD_E_START_DET_VBUS 0x03 -#define OTG_CMD_P_A_UUT 0x04 -#define OTG_CMD_P_B_UUT 0x05 -#define HOST_CMD_TEST_SE0_NAK 0x6 -#define HOST_CMD_TEST_J 0x7 -#define HOST_CMD_TEST_K 0x8 -#define HOST_CMD_TEST_PACKET 0x9 -#define HOST_CMD_SUSPEND_RESUME 0xa -#define HOST_CMD_GET_DESCRIPTOR 0xb -#define HOST_CMD_SET_FEATURE 0xc -#define OTG_CMD_P_B_UUT_TD59 0xd -#define HOST_CMD_ENV_INIT 0xe -#define HOST_CMD_ENV_EXIT 0xf - -#define OTG_MSG_DEV_NOT_SUPPORT 0x01 -#define OTG_MSG_DEV_NOT_RESPONSE 0x02 -#define OTG_MSG_HUB_NOT_SUPPORT 0x03 - -#define OTG_STOP_CMD 0x10 -#define OTG_INIT_MSG 0x20 - -struct otg_message { - spinlock_t lock; - unsigned int msg; -}; - -static struct otg_message g_otg_message; -static atomic_t g_exec; - -unsigned long usb_l1intm_store; -unsigned short usb_intrrxe_store; -unsigned short usb_intrtxe_store; -unsigned char usb_intrusbe_store; -unsigned long pericfg_base; -bool device_enumed; -bool set_hnp; -bool high_speed; -bool is_td_59; - -struct completion stop_event; - -void musb_otg_reset_usb(void) -{ - /* reset all of the USB IP, including PHY and MAC */ - unsigned int usb_reset; - - usb_reset = __raw_readl((void __iomem *)pericfg_base); - usb_reset |= 1 << 29; - __raw_writel(usb_reset, (void __iomem *)pericfg_base); - mdelay(10); - usb_reset &= ~(1 << 29); - __raw_writel(usb_reset, (void __iomem *)pericfg_base); - /* power on the USB */ - usb_phy_poweron(); - /* enable interrupt */ - musb_writel(mtk_musb->mregs, USB_L1INTM, 0x105); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 1); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0xf7); -} - -int musb_otg_env_init(void) -{ - u8 power; - /* u8 intrusb; */ - /* step1: mask the PMU/PMIC EINT */ - mtk_musb->usb_if = true; - /* workaround for PMIC charger detection */ - mtk_musb->is_host = true; - /* mt65xx_eint_mask(EINT_CHR_DET_NUM); */ - - pmic_chrdet_int_en(0); - - mt_usb_init_drvvbus(); - - /* step5: make sure to power on the USB module */ - if (mtk_musb->power) - mtk_musb->power = FALSE; - - musb_platform_enable(mtk_musb); - /* step6: clear session bit */ - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - /* step7: disable and enable usb interrupt */ - usb_l1intm_store = musb_readl(mtk_musb->mregs, USB_L1INTM); - usb_intrrxe_store = musb_readw(mtk_musb->mregs, MUSB_INTRRXE); - usb_intrtxe_store = musb_readw(mtk_musb->mregs, MUSB_INTRTXE); - usb_intrusbe_store = musb_readb(mtk_musb->mregs, MUSB_INTRUSBE); - - musb_writel(mtk_musb->mregs, USB_L1INTM, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 0); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - free_irq(mtk_musb->nIrq, mtk_musb); - musb_writel(mtk_musb->mregs, USB_L1INTM, 0x105); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 1); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0xf7); - /* setp8: set the index to 0 for ep0, maybe no need. - * Designers said it is better not to use the index register. - */ - musb_writeb(mtk_musb->mregs, MUSB_INDEX, 0); - /* setp9: init message */ - g_otg_message.msg = 0; - spin_lock_init(&g_otg_message.lock); - - init_completion(&stop_event); -#ifdef DX_DBG - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - DBG(0, "start the USB-IF test in EM,power=0x%x!\n", power); -#endif - - return 0; -} - -int musb_otg_env_exit(void) -{ - DBG(0, "stop the USB-IF test in EM!\n"); - musb_writel(mtk_musb->mregs, USB_L1INTM, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 0); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - musb_writel(mtk_musb->mregs, USB_L1INTM, usb_l1intm_store); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, usb_intrrxe_store); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, usb_intrtxe_store); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, usb_intrusbe_store); - mtk_musb->usb_if = false; - mtk_musb->is_host = false; - pmic_chrdet_int_en(1); - return 0; -} - -void musb_otg_write_fifo(u16 len, u8 *buf) -{ - int i; - - DBG(0, "%s,len=%d\n", __func__, len); - for (i = 0; i < len; i++) - musb_writeb(mtk_musb->mregs, 0x20, *(buf + i)); -} - -void musb_otg_read_fifo(u16 len, u8 *buf) -{ - int i; - - DBG(0, "%s,len=%d\n", __func__, len); - for (i = 0; i < len; i++) - *(buf + i) = musb_readb(mtk_musb->mregs, 0x20); -} - -unsigned int musb_polling_ep0_interrupt(void) -{ - unsigned short intrtx; - - DBG(0, "polling ep0 interrupt\n"); - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - if (intrtx & 0x1) { /* ep0 interrupt happen */ - DBG(0, "get ep0 interrupt,csr0=0x%x\n", - musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0)); - break; - } - DBG(0, "polling ep0 interrupt,csr0=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_OTG_CSR0)); - wait_for_completion_timeout(&stop_event, 1); - if (atomic_read(&g_exec) == 0) - return TEST_IS_STOP; - } while (atomic_read(&g_exec) == 1); - return 0; -} - -void musb_h_setup(struct usb_ctrlrequest *setup) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - musb_otg_write_fifo(sizeof(struct usb_ctrlrequest), (u8 *) setup); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "%s,csr0=0x%x\n", __func__, csr0); - csr0 |= MUSB_CSR0_H_SETUPPKT | MUSB_CSR0_TXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - /* polling the Tx interrupt */ - if (musb_polling_ep0_interrupt()) - return; - DBG(0, "%s--\n", __func__); -} - -void musb_h_in_data(unsigned char *buf, u16 len) -{ - /* will receive all of the data in this transfer. */ - unsigned short csr0; - u16 received = 0; - bool bshort = false; - - DBG(0, "%s++\n", __func__); - while ((received < len) && (!bshort)) { - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_REQPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); - if (csr0 & MUSB_CSR0_RXPKTRDY) { - /* get the data from ep fifo */ - u8 count = musb_readb(mtk_musb->mregs, MUSB_OTG_COUNT0); - - if (count < 64) - bshort = true; - - if (received + count > len) { - DBG(0, "Data is too large\n"); - - /* read FIFO until data end (maximum size of len) */ - musb_otg_read_fifo(len - received, buf); - } else { - musb_otg_read_fifo(count, buf + received); - } - - received += count; - csr0 &= ~MUSB_CSR0_RXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - } else - DBG(0, "error, not receive the rxpktrdy interrupt!\n"); - DBG(0, "%s--\n", __func__); - } -} - -void musb_h_in_status(void) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_REQPKT | MUSB_CSR0_H_STATUSPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); - - if (csr0 & MUSB_CSR0_RXPKTRDY) { - csr0 &= ~MUSB_CSR0_RXPKTRDY; - /* whether this bit will be cleared auto, - * need to clear by sw?? - */ - if (csr0 & MUSB_CSR0_H_STATUSPKT) - csr0 &= ~MUSB_CSR0_H_STATUSPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - } else if (csr0 & MUSB_CSR0_H_RXSTALL) { - DBG(0, "stall!\n"); - if (set_hnp) { - DBG(0, "will pop up:DEV_NOT_RESPONSE!\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - set_hnp = false; - msleep(1000); - } - } - DBG(0, "%s--\n", __func__); -} - -void musb_h_out_status(void) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_STATUSPKT | MUSB_CSR0_TXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; -#ifdef DX_DBG - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); -#endif - DBG(0, "%s--\n", __func__); -} - -void musb_d_reset(void) -{ - unsigned short swrst; - - swrst = musb_readw(mtk_musb->mregs, 0x74); - swrst |= 0x2; - musb_writew(mtk_musb->mregs, 0x74, swrst); -} - -void musb_d_setup(struct usb_ctrlrequest *setup_packet, u16 len) -{ - musb_otg_read_fifo(len, (u8 *) setup_packet); - DBG(0, - "receive setup packet:0x%x 0x%x 0x%x 0x%x 0x%x\n", - setup_packet->bRequest, - setup_packet->bRequestType, - setup_packet->wIndex, - setup_packet->wValue, - setup_packet->wLength); -} - -void musb_d_out_data(struct usb_ctrlrequest *setup_packet) -{ - unsigned short csr0; - - static struct usb_device_descriptor device_descriptor = { - 0x12, - 0x01, - 0x0200, - 0x00, - 0x00, - 0x00, - 0x40, - 0x0951, - 0x1603, - 0x0200, - 0x01, - 0x02, - 0x03, - 0x01 - }; - static struct usb_config_descriptor configuration_descriptor = { - 0x09, - 0x02, - 0x0023, - 0x01, - 0x01, - 0x00, - 0x80, - 0x32 - }; - static struct usb_interface_descriptor interface_descriptor = { - 0x09, - 0x04, - 0x00, - 0x00, - 0x02, - 0x08, - 0x06, - 0x50, - 0x00 - }; - static struct usb_endpoint_descriptor endpoint_descriptor_in = { - 0x07, - 0x05, - 0x81, - 0x02, - 0x0200, - 0x00 - }; - static struct usb_endpoint_descriptor endpoint_descriptor_out = { - 0x07, - 0x05, - 0x02, - 0x02, - 0x0200, - 0x00 - }; - static struct usb_otg_descriptor usb_otg_descriptor = { - 0x03, - 0x09, - 0x03 - }; - - if (setup_packet->wValue == 0x0100) { - musb_otg_write_fifo(sizeof(struct usb_device_descriptor), - (u8 *) &device_descriptor); - } else if (setup_packet->wValue == 0x0200) { - if (setup_packet->wLength == 9) { - musb_otg_write_fifo( - sizeof(struct usb_config_descriptor), - (u8 *) &configuration_descriptor); - } else { - musb_otg_write_fifo( - sizeof(struct usb_config_descriptor), - (u8 *) &configuration_descriptor); - musb_otg_write_fifo( - sizeof(struct usb_interface_descriptor), - (u8 *) &interface_descriptor); - musb_otg_write_fifo(7, (u8 *) &endpoint_descriptor_in); - musb_otg_write_fifo(7, (u8 *) &endpoint_descriptor_out); - musb_otg_write_fifo(sizeof(struct usb_otg_descriptor), - (u8 *) &usb_otg_descriptor); - } - } - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_TXPKTRDY | MUSB_CSR0_P_DATAEND; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; -} - -unsigned int musb_polling_bus_interrupt(unsigned int intr) -{ - unsigned char intrusb; - unsigned long timeout; - - if (intr == MUSB_INTR_CONNECT) - timeout = jiffies + 15 * HZ; - if (intr == (MUSB_INTR_CONNECT | MUSB_INTR_RESUME)) - timeout = jiffies + 1; - if (intr == MUSB_INTR_RESET) - timeout = jiffies + 2 * HZ; - - do { - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrusb & intr) { - DBG(0, - "interrupt happen, intrusb=0x%x, intr=0x%x\n", - intrusb, intr); - break; - } - - /* check the timeout */ - if ((intr == MUSB_INTR_CONNECT) && - time_after(jiffies, timeout)) { - DBG(0, "time out for MUSB_INTR_CONNECT\n"); - return DEV_NOT_CONNECT; - } - if ((intr == (MUSB_INTR_CONNECT | MUSB_INTR_RESUME)) - && time_after(jiffies, timeout)) { - DBG(0, - "time out for MUSB_INTR_CONNECT|MUSB_INTR_RESUME\n"); - return DEV_HNP_TIMEOUT; - } - if ((intr == MUSB_INTR_RESET) && time_after(jiffies, timeout)) { - DBG(0, "time out for MUSB_INTR_RESET\n"); - return DEV_NOT_RESET; - } - /* delay for the interrupt */ - if (intr != MUSB_INTR_RESET) { - wait_for_completion_timeout(&stop_event, 1); - if (atomic_read(&g_exec) == 0) - break; - } - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) { - DBG(0, "TEST_IS_STOP\n"); - return TEST_IS_STOP; - } - if (intrusb & MUSB_INTR_RESUME) { /* for TD.4.8, remote wakeup */ - DBG(0, "MUSB_INTR_RESUME\n"); - return MUSB_INTR_RESUME; - } else { - return intrusb; - } -} - -void musb_h_suspend(void) -{ - unsigned char power; - /* before suspend, should to send SOF for a while (USB-IF plan need) */ - /* mdelay(100); */ - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - DBG(0, "before suspend,power=0x%x\n", power); - if (high_speed) - power = 0x63; - else - power = 0x43; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -void musb_h_remote_wakeup(void) -{ - unsigned char power; - - msleep(25); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power &= ~MUSB_POWER_RESUME; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -bool musb_h_reset(void) -{ - unsigned char power; - - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_RESET | MUSB_POWER_HSENAB; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - msleep(60); - power &= ~MUSB_POWER_RESET; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (power & MUSB_POWER_HSMODE) { - DBG(0, "the device is a hs device!\n"); - high_speed = true; - return true; - } - DBG(0, "the device is a fs device!\n"); - high_speed = false; - return false; -} - -void musb_d_soft_connect(bool connect) -{ - unsigned char power; - - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (connect) - power |= MUSB_POWER_SOFTCONN; - else - power &= ~MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -void musb_otg_set_session(bool set) -{ - unsigned char devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - if (set) - devctl |= MUSB_DEVCTL_SESSION; - else - devctl &= ~MUSB_DEVCTL_SESSION; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); -} - -void musb_h_enumerate(void) -{ - struct usb_ctrlrequest setup_packet; - struct usb_device_descriptor device_descriptor; - struct usb_config_descriptor configuration_descriptor; - struct usb_otg_descriptor *otg_descriptor; - unsigned char descriptor[65535]; - - /* set address */ - musb_writew(mtk_musb->mregs, MUSB_TXFUNCADDR, 0); - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_ADDRESS; - setup_packet.wIndex = 0; - setup_packet.wValue = 1; - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - musb_writew(mtk_musb->mregs, MUSB_TXFUNCADDR, 1); - DBG(0, "set address OK!\n"); - /* get device descriptor */ - setup_packet.bRequestType = USB_DIR_IN | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0100; - setup_packet.wLength = 0x40; - musb_h_setup(&setup_packet); - musb_h_in_data((char *)&device_descriptor, - sizeof(struct usb_device_descriptor)); - musb_h_out_status(); - - if (device_descriptor.idProduct == 0x1234) { - pr_debug("device pid not match!\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_SUPPORT; - /* msleep(1000); */ - } - - DBG(0, - "get device descriptor OK!device class=0x%x PID=0x%x VID=0x%x\n", - device_descriptor.bDeviceClass, device_descriptor.idProduct, - device_descriptor.idVendor); - DBG(0, - "get device descriptor OK!DescriptorType=0x%x DeviceSubClass=0x%x\n", - device_descriptor.bDescriptorType, - device_descriptor.bDeviceSubClass); - /* get configuration descriptor */ - setup_packet.bRequestType = USB_DIR_IN - | USB_TYPE_STANDARD - | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0200; - setup_packet.wLength = 0x9; - musb_h_setup(&setup_packet); - musb_h_in_data((char *)&configuration_descriptor, - sizeof(struct usb_config_descriptor)); - musb_h_out_status(); - DBG(0, "get configuration descriptor OK!\n"); - /* get all configuration descriptor */ - setup_packet.bRequestType = USB_DIR_IN - | USB_TYPE_STANDARD - | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0200; - setup_packet.wLength = configuration_descriptor.wTotalLength; - musb_h_setup(&setup_packet); - - /* - * According to USB specification, - * the maximum length of wTotalLength is 65535 bytes - */ - if (configuration_descriptor.wTotalLength <= sizeof(descriptor)) - musb_h_in_data(descriptor, - configuration_descriptor.wTotalLength); - musb_h_out_status(); - DBG(0, "get all configuration descriptor OK!\n"); - /* get otg descriptor */ - otg_descriptor = - (struct usb_otg_descriptor *) - (descriptor + configuration_descriptor.wTotalLength - 3); - DBG(0, "otg descriptor::bLegth=%d,bDescriptorTye=%d,bmAttr=%d\n", - otg_descriptor->bLength, - otg_descriptor->bDescriptorType, otg_descriptor->bmAttributes); - if (otg_descriptor->bLength == 3 && - otg_descriptor->bDescriptorType == 9) { - - DBG(0, "get an otg descriptor!\n"); - } else { - DBG(0, "not an otg device, will pop Unsupported Device\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_SUPPORT; - msleep(1000); - } - /* set hnp, need before set_configuration */ - set_hnp = true; - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_FEATURE; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x3; /* b_hnp_enable */ - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - DBG(0, "set hnp OK!\n"); - /* set configuration */ - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_CONFIGURATION; - setup_packet.wIndex = 0; - setup_packet.wValue = configuration_descriptor.iConfiguration; - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - DBG(0, "set configuration OK!\n"); -} - -void musb_d_enumerated(void) -{ - unsigned char devctl; - unsigned short csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - - DBG(0, "csr0=0x%x\n", csr0); - if (csr0 & MUSB_CSR0_P_SETUPEND) { - DBG(0, "SETUPEND\n"); - csr0 |= MUSB_CSR0_P_SVDSETUPEND; - musb_writeb(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - csr0 &= ~MUSB_CSR0_P_SVDSETUPEND; - } - if (csr0 & MUSB_CSR0_RXPKTRDY) { - u8 count0; - - count0 = musb_readb(mtk_musb->mregs, MUSB_OTG_COUNT0); - if (count0 == 8) { - struct usb_ctrlrequest setup_packet; - /* get the setup packet */ - musb_d_setup(&setup_packet, count0); - - if (setup_packet.bRequest == - USB_REQ_SET_ADDRESS) { - device_enumed = false; - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) { - DBG(0, - "B-UUT:when set address, do not detect ep0 interrupt\n"); - return; - } - musb_writeb(mtk_musb->mregs, - MUSB_FADDR, - (u8) setup_packet.wValue); - } else if (setup_packet.bRequest == - USB_REQ_GET_DESCRIPTOR) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - /* device --> host */ - musb_d_out_data(&setup_packet); - } else if (setup_packet.bRequest == - USB_REQ_SET_CONFIGURATION) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - device_enumed = true; - /* will set host_req for B-device */ - devctl = musb_readb(mtk_musb->mregs, - MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) { - devctl |= MUSB_DEVCTL_HR; - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, devctl); - } - } else if (setup_packet.bRequest == - USB_REQ_SET_FEATURE) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - } - } - } -} - -void musb_otg_test_return(void) -{ -} - -static int musb_host_test_mode(unsigned char cmd); - -void otg_cmd_a_uut(void) -{ - unsigned long timeout; - unsigned char devctl; - bool timeout_flag = false; - unsigned int ret; - unsigned char power; - unsigned short csr0; - unsigned char intrusb; - unsigned short intrtx; - - /* polling the session req from B-OPT and start a new session */ - device_enumed = false; -TD_4_6: - musb_otg_reset_usb(); - DBG(0, "A-UUT reset success\n"); - timeout = jiffies + 5 * HZ; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - while ((atomic_read(&g_exec) == 1) && (devctl & 0x18)) { - DBG(0, "musb::not below session end!\n"); - msleep(100); - if (time_after(jiffies, timeout)) { - timeout_flag = true; - return TEST_IS_STOP; - } - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - if (timeout_flag) { - timeout_flag = false; - musb_otg_reset_usb(); - BG(0, - "timeout for below session end, after reset usb, devctl=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - } - BG(0, "polling session request,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_SESSREQ); - pBG(0, "polling session request,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - /* session is set and VBUS will be out. */ - musb_otg_set_session(true); -#if 1 - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power &= ~MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -#endif - /* polling the connect interrupt from B-OPT */ - DBG(0, "polling connect interrupt,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT); - DBG(0, "polling connect interrupt,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == DEV_NOT_CONNECT) { - DBG(0, "device is not connected in 15s\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - return TEST_IS_STOP; - } - DBG(0, "musb::connect interrupt is detected!\n"); - /* the test is fail because the reset starts less than100 ms - * from the B-OPT connect. the IF test needs - */ - msleep(100); - /* reset the bus,check whether it is a hs device */ - musb_h_reset(); /* should last for more than 50ms, TD.4.2 */ - musb_h_enumerate(); - /* suspend the bus */ - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "after enum B-OPT,csr0=0x%x\n", csr0); - musb_h_suspend(); - - /* polling the disconnect interrupt from B-OPT, - * and remote wakeup(TD.4.8) - */ - DBG(0, "polling disconnect or remote wakeup,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_DISCONNECT - | MUSB_INTR_RESUME); - DBG(0, "polling disconnect or remote wakeup,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == MUSB_INTR_RESUME) { - /* for TD4.8 */ - musb_h_remote_wakeup(); - /* maybe need to access the B-OPT, get device descriptor */ - if (atomic_read(&g_exec) == 1) - wait_for_completion(&stop_event); - return TEST_IS_STOP; - } - /* polling the reset interrupt from B-OPT */ - if (!(ret & MUSB_INTR_RESET)) { - DBG(0, "polling reset for B-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - DBG(0, "polling reset for B-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == DEV_NOT_RESET) { - if (atomic_read(&g_exec) == 1) - wait_for_completion(&stop_event); - return TEST_IS_STOP; - } - } - - DBG(0, "after receive reset,devctl=0x%x,csr0=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL), - musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0)); - - /* enumerate and polling the suspend interrupt form B-OPT */ - - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrtx || (intrusb & MUSB_INTR_SUSPEND)) { - if (intrtx) { - if (intrtx & 0x1) - musb_d_enumerated(); - } - if (intrusb) { - /* maybe receive disconnect interrupt when the session is end */ - if (intrusb & MUSB_INTR_SUSPEND) { - if (device_enumed) { - /* return form the while loop */ - break; - } - /* TD.4.6 */ - musb_d_soft_connect(false); - goto TD_4_6; - } - } - } else - wait_for_completion_timeout(&stop_event, 1); - /* the enum will be repeated for 5 times */ - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) { - /* return form the switch-case */ - return TEST_IS_STOP; - } - DBG(0, "polling connect form B-OPT,begin\n"); - /* B-OPT will connect again 100ms after A disconnect */ - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT); - DBG(0, "polling connect form B-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - musb_h_reset(); /* should reset bus again, TD.4.7 */ - wait_for_completion(&stop_event); -} - -void otg_cmd_b_uut(void) -{ - unsigned long timeout; - unsigned char devctl; - bool timeout_flag = false; - unsigned int ret; - unsigned char power; - unsigned char intrusb; - unsigned short intrtx; - - musb_otg_reset_usb(); - /* The B-UUT issues an SRP to start a session with the A-OPT */ - musb_otg_set_session(true); - /* 100ms after VBUS begins to decay the A-OPT powers VBUS */ - timeout = jiffies + 5 * HZ; - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - while (((devctl & MUSB_DEVCTL_VBUS) >> MUSB_DEVCTL_VBUS_SHIFT) < 0x3) { - if (time_after(jiffies, timeout)) { - timeout_flag = true; - break; - } - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - if (timeout_flag) { - DBG(0, "B-UUT set vbus timeout\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - timeout_flag = false; - return TEST_IS_STOP; - } - - /* After detecting the VBUS, B-UUT should connect to the A_OPT */ - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_HSENAB; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -/* TD5_5: */ - musb_d_soft_connect(true); - - device_enumed = false; - /* polling the reset single form the A-OPT */ - DBG(0, "polling reset form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - DBG(0, "polling reset form A-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (power & MUSB_POWER_HSMODE) - high_speed = true; - else - high_speed = false; - /* The A-OPT enumerates the B-UUT */ -TD6_13: - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrtx || (intrusb & 0xf7)) { - if (intrtx) { - /* DBG(0,"B-enum,intrtx=0x%x\n",intrtx); */ - if (intrtx & 0x1) - DBG(0, "ep0 interrupt\n"); - musb_d_enumerated(); - } - if (intrusb) { - if (intrusb & 0xf7) - DBG(0, - "B-enum,intrusb=0x%x,power=0x%x\n", - intrusb, - musb_readb(mtk_musb->mregs, - MUSB_POWER)); - if ((device_enumed) && - (intrusb & MUSB_INTR_SUSPEND)) { - DBG(0, - "suspend interrupt is received,power=0x%x,devctl=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_POWER), - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - break; - } - } - } else { - DBG(0, - "power=0x%x,devctl=0x%x,intrtx=0x%x,intrusb=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_POWER), - musb_readb(mtk_musb->mregs, - MUSB_DEVCTL), - musb_readw(mtk_musb->mregs, - MUSB_INTRTX), - musb_readb(mtk_musb->mregs, - MUSB_INTRUSB)); - wait_for_completion_timeout(&stop_event, 1); - } - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) - return TEST_IS_STOP; - DBG(0, "hnp start\n"); - if (intrusb & MUSB_INTR_RESUME) - goto TD6_13; - if (!(intrusb & MUSB_INTR_CONNECT)) { - /* polling the connect from A-OPT, the UUT acts as host */ - DBG(0, "polling connect or resume form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT - | MUSB_INTR_RESUME); - DBG(0, "polling connect or resume form A-OPT,done,ret=0x%x\n", - ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == MUSB_INTR_RESUME) - goto TD6_13; - if (ret == DEV_HNP_TIMEOUT) { - DBG(0, "B-UUT HNP timeout\n"); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - devctl &= ~MUSB_DEVCTL_HR; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); - if (is_td_59) - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - return TEST_IS_STOP; - } - } - /* reset the bus and check whether it is a hs device */ - musb_h_reset(); - musb_h_enumerate(); - /* suspend the bus */ - musb_h_suspend(); - /* polling the disconnect interrupt from A-OPT */ - DBG(0, "polling disconnect form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_DISCONNECT); - DBG(0, "polling disconnect form A-OPT,done,ret=0x%x\n", ret); - - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - DBG(0, "A-OPT is disconnected, UUT will be back to device\n"); - if (!(ret & MUSB_INTR_RESET)) { - musb_d_soft_connect(true); - /* polling the reset single form the A-OPT */ - DBG(0, "polling reset form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - /* musb_d_reset (); */ - DBG(0, "polling reset form A-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - } - device_enumed = false; - if (atomic_read(&g_exec) == 1) - goto TD6_13; /* TD5_5 */ - wait_for_completion(&stop_event); -} - -int musb_otg_exec_cmd(unsigned int cmd) -{ - - unsigned char devctl; - unsigned char intrusb; - unsigned char power; - unsigned short csr0; - unsigned int usb_l1intp; - unsigned int usb_l1ints; - - if (!mtk_musb) { - DBG(0, "mtk_musb is NULL,error!\n"); - return false; - } - - switch (cmd) { - case HOST_CMD_ENV_INIT: - musb_otg_env_init(); - return 0; - case HOST_CMD_ENV_EXIT: - musb_otg_env_exit(); - return 0; - } - - /* init */ - musb_writeb(mtk_musb->mregs, MUSB_POWER, 0x21); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - msleep(300); - -#ifdef DX_DBG - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - DBG(0, "1:cmd=%d,devctl=0x%x,power=0x%x,intrusb=0x%x\n", - cmd, devctl, power, intrusb); -#endif - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - mdelay(10); -#ifdef DX_DBG - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - DBG(0, "2:cmd=%d,devctl=0x%x,power=0x%x,intrusb=0x%x\n", - cmd, devctl, power, intrusb); -#endif - high_speed = false; - atomic_set(&g_exec, 1); - - DBG(0, "before exec:cmd=%d\n", cmd); - - switch (cmd) { - /* electrical */ - case OTG_CMD_E_ENABLE_VBUS: - DBG(0, "musb::enable VBUS!\n"); - musb_otg_set_session(true); - musb_platform_set_vbus(mtk_musb, 1); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_otg_set_session(false); - musb_platform_set_vbus(mtk_musb, 0); - break; - case OTG_CMD_E_ENABLE_SRP: /* need to clear session? */ - DBG(0, "musb::enable srp!\n"); - musb_otg_reset_usb(); - { - u32 val = 0; - - val = USBPHY_READ32(0x6c); - val = (val & ~(0xff<<0)) | (0x1<<0); - USBPHY_WRITE32(0x6c, val); - - val = USBPHY_READ32(0x6c); - val = (val & ~(0xff<<8)) | (0x1<<8); - USBPHY_WRITE32(0x6c, val); - } - musb_writeb(mtk_musb->mregs, 0x7B, 1); - musb_otg_set_session(true); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_otg_set_session(false); - break; - case OTG_CMD_E_START_DET_SRP: - /* need as a A-device */ - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - while ((atomic_read(&g_exec) == 1) && (devctl & 0x18)) { - DBG(0, "musb::not below session end!\n"); - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - while ((atomic_read(&g_exec) == 1) && (!(devctl & 0x10))) { - DBG(0, "musb::not above session end!\n"); - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - devctl |= MUSB_DEVCTL_SESSION; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - break; - case OTG_CMD_E_START_DET_VBUS: - usb_l1intp = musb_readl(mtk_musb->mregs, USB_L1INTP); - usb_l1intp &= ~(1 << 10); - musb_writel(mtk_musb->mregs, USB_L1INTP, usb_l1intp); - usb_l1ints = musb_readl(mtk_musb->mregs, USB_L1INTS); - while ((usb_l1ints & (1 << 8)) == 0) { - DBG(0, "musb::vbus is 0!\n"); - msleep(100); - usb_l1ints = musb_readl(mtk_musb->mregs, USB_L1INTS); - } - DBG(0, "musb::vbus is detected!\n"); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_writeb(mtk_musb->mregs, MUSB_POWER, 0x21); - break; - - case OTG_CMD_P_B_UUT_TD59: - is_td_59 = true; - if (is_td_59) - DBG(0, "TD5.9 will be tested!\n"); - break; - - /* protocal */ - case OTG_CMD_P_A_UUT: - DBG(0, "A-UUT starts...\n"); - otg_cmd_a_uut(); - DBG(0, "the test as A-UUT is done\n"); - break; - - case OTG_CMD_P_B_UUT: - DBG(0, "B-UUT starts...\n"); - otg_cmd_b_uut(); - DBG(0, "the test as B_UUT is done\n"); - break; - - case HOST_CMD_TEST_SE0_NAK: - case HOST_CMD_TEST_J: - case HOST_CMD_TEST_K: - case HOST_CMD_TEST_PACKET: - case HOST_CMD_SUSPEND_RESUME: - case HOST_CMD_GET_DESCRIPTOR: - case HOST_CMD_SET_FEATURE: - musb_host_test_mode(cmd); - while (atomic_read(&g_exec) == 1) - msleep(100); - break; - } - DBG(0, "%s--\n", __func__); - return 0; - -} - -void musb_otg_stop_cmd(void) -{ - DBG(0, "%s++\n", __func__); - atomic_set(&g_exec, 0); - is_td_59 = false; - complete(&stop_event); -} - -unsigned int musb_otg_message(void) -{ - /* for EM to pop the message */ - unsigned int msg; - - msg = g_otg_message.msg; - g_otg_message.msg = 0; - return msg; -} - -void musb_otg_message_cb(void) -{ - /* when the OK button is clicked on EM, this func is called. */ - spin_lock(&g_otg_message.lock); - g_otg_message.msg = 0; - spin_unlock(&g_otg_message.lock); -} - -static int musb_otg_test_open(struct inode *inode, struct file *file) -{ - DBG(0, "%s++\n", __func__); - return 0; -} - -static int musb_otg_test_release(struct inode *inode, struct file *file) -{ - return 0; -} - -ssize_t musb_otg_test_read(struct file *filp, - char __user *buf, size_t count, loff_t *ppos) -{ - int ret = 0; - unsigned int message = musb_otg_message(); - - if (message) - DBG(0, "%s:message=0x%x\n", __func__, message); - if (put_user((unsigned int)message, (unsigned int *)buf)) - ret = -EFAULT; - return ret; -} - -ssize_t musb_otg_test_write(struct file *filp, - const char __user *buf, size_t count, - loff_t *ppos) -{ - int ret = 0; - unsigned char value; - - if (get_user(value, (unsigned char *)buf)) - ret = -EFAULT; - else { - if (value == OTG_STOP_CMD) { - DBG(0, "%s::OTG_STOP_CMD\n", __func__); - musb_otg_stop_cmd(); - } else if (value == OTG_INIT_MSG) { - DBG(0, "%s::OTG_INIT_MSG\n", __func__); - musb_otg_message_cb(); - } else { - DBG(0, "musb_otg_test_write::the - value is invalid,0x%x\n", - value); - ret = -EFAULT; - } - } - return ret; -} - -static long musb_otg_test_ioctl - (struct file *file, unsigned int cmd, unsigned long arg) -{ - int ret = 0; - - DBG(0, "%s :cmd=0x%x\n", __func__, cmd); - ret = musb_otg_exec_cmd(cmd); - return (long)ret; -} - - -static const struct file_operations musb_otg_test_fops = { - .owner = THIS_MODULE, - .open = musb_otg_test_open, - .release = musb_otg_test_release, - .read = musb_otg_test_read, - .write = musb_otg_test_write, - .unlocked_ioctl = musb_otg_test_ioctl, -}; - -static struct miscdevice musb_otg_test_dev = { - .minor = MISC_DYNAMIC_MINOR, - /* .minor = 254, */ - .name = TEST_DRIVER_NAME, - .fops = &musb_otg_test_fops, - .mode = 0666, -}; - - -static const u8 musb_host_test_packet[53] = { - /* implicit SYNC then DATA0 to start */ - - /* JKJKJKJK x9 */ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - /* JJKKJJKK x8 */ - 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, - /* JJJJKKKK x8 */ - 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, - /* JJJJJJJKKKKKKK x8 */ - 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - /* JJJJJJJK x8 */ - 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, - /* JKKKKKKK x10, JK */ - 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e - /* implicit CRC16 then EOP to end */ -}; - -void musb_host_load_testpacket(struct musb *musb) -{ - unsigned short csr0 = musb_readw(musb->mregs, 0x102); - - DBG(0, "csr0=0x%x\n", csr0); - musb->ignore_disconnect = 1; - musb_otg_write_fifo(53, (u8 *) musb_host_test_packet); -} - - -void host_test_mode(struct musb *musb, unsigned int wIndex) -{ - unsigned char temp; - unsigned char power; - struct usb_ctrlrequest setup_packet; - struct usb_device_descriptor device_descriptor; - - setup_packet.bRequestType = USB_DIR_IN | - USB_TYPE_STANDARD | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0100; - setup_packet.wLength = 0x40; - musb_otg_set_session(true); - msleep(200); - pr_debug("devctl = 0x%x\n", musb_readb(musb->mregs, MUSB_DEVCTL)); - switch (wIndex) { - case HOST_CMD_TEST_SE0_NAK: - DBG(0, "TEST_SE0_NAK\n"); - temp = MUSB_TEST_SE0_NAK; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_J: - DBG(0, "TEST_J\n"); - temp = MUSB_TEST_J; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_K: - DBG(0, "TEST_K\n"); - temp = MUSB_TEST_K; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_PACKET: - DBG(0, "TEST_PACKET\n"); - temp = MUSB_TEST_PACKET; - musb_host_load_testpacket(musb); - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - musb_writew(musb->mregs, 0x102, MUSB_CSR0_TXPKTRDY); - break; - - case HOST_CMD_SUSPEND_RESUME: - /* HS_HOST_PORT_SUSPEND_RESUME */ - DBG(0, "HS_HOST_PORT_SUSPEND_RESUME\n"); - msleep(5000); - /* the host must continue sending SOFs for 15s */ - DBG(0, "please begin to trigger suspend!\n"); - msleep(10000); - power = musb_readb(musb->mregs, MUSB_POWER); - power |= MUSB_POWER_SUSPENDM | MUSB_POWER_ENSUSPEND; - musb_writeb(musb->mregs, MUSB_POWER, power); - msleep(5000); - DBG(0, "please begin to trigger resume!\n"); - msleep(10000); - power &= ~MUSB_POWER_SUSPENDM; - power |= MUSB_POWER_RESUME; - musb_writeb(musb->mregs, MUSB_POWER, power); - mdelay(25); - power &= ~MUSB_POWER_RESUME; - musb_writeb(musb->mregs, MUSB_POWER, power); - /* SOF continue */ - musb_h_setup(&setup_packet); - break; - case HOST_CMD_GET_DESCRIPTOR: - /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR setup */ - DBG(0, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR\n"); - /* the host issues SOFs for 15s allowing the test engineer - * to raise the scope trigger just above the SOF voltage level. - */ - msleep(15000); - musb_h_setup(&setup_packet); - break; - case HOST_CMD_SET_FEATURE: - /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR execute */ - DBG(0, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR\n"); - /* get device descriptor */ - musb_h_setup(&setup_packet); - msleep(15000); - musb_h_in_data((char *)&device_descriptor, - sizeof(struct usb_device_descriptor)); - musb_h_out_status(); - break; - default: - break; - - } - /* while(1); */ -} - -static int musb_host_test_mode(unsigned char cmd) -{ - musb_platform_set_vbus(mtk_musb, 1); - musb_otg_reset_usb(); - host_test_mode(mtk_musb, cmd); - return 0; -} - -static int __init musb_otg_test_init(void) -{ -#ifdef CONFIG_OF - struct device_node *np; - - np = of_find_compatible_node(NULL, NULL, "mediatek,PERICFG"); - if (!np) - pr_debug("get PERICFG node fail"); - pericfg_base = (unsigned long)of_iomap(np, 0); -#else - pericfg_base = PERICFG_BASE; -#endif - misc_register(&musb_otg_test_dev); - return 0; -} - -static void __exit musb_otg_test_exit(void) -{ - misc_deregister(&musb_otg_test_dev); -} - - -module_init(musb_otg_test_init); -module_exit(musb_otg_test_exit); diff --git a/drivers/misc/mediatek/usb20/mt6768/usb20_phy.c b/drivers/misc/mediatek/usb20/mt6768/usb20_phy.c deleted file mode 100644 index afc222b5914c..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/usb20_phy.c +++ /dev/null @@ -1,848 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#ifdef CONFIG_MTK_CLKMGR -#include -#else -#include -#endif -#include -#include -#include -#include -#include -#include -#include "usb20.h" -#include "mtk_devinfo.h" -#include - -#ifdef CONFIG_OF -#include -#endif -#ifdef CONFIG_MTK_AEE_FEATURE -#include -#endif - -#include - -#define FRA (48) -#define PARA (28) - -#ifdef FPGA_PLATFORM -bool usb_enable_clock(bool enable) -{ - return true; -} - -bool usb_prepare_clock(bool enable) -{ - return true; -} - -void usb_prepare_enable_clock(bool enable) -{ -} - -void usb_phy_poweron(void) -{ -} - -void usb_phy_savecurrent(void) -{ -} - -void usb_phy_recover(void) -{ -} - -/* BC1.2 */ -void Charger_Detect_Init(void) -{ -} - -void Charger_Detect_Release(void) -{ -} - -void usb_phy_context_save(void) -{ -} - -void usb_phy_context_restore(void) -{ -} - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool usb_phy_check_in_uart_mode(void) -{ - return false; -} - -void usb_phy_switch_to_uart(void) -{ -} - -void usb_phy_switch_to_usb(void) -{ -} -#endif - -#else -#include -#include -#define VAL_MAX_WIDTH_2 0x3 -#define VAL_MAX_WIDTH_3 0x7 -#define OFFSET_RG_USB20_VRT_VREF_SEL 0x4 -#define SHFT_RG_USB20_VRT_VREF_SEL 12 -#define OFFSET_RG_USB20_TERM_VREF_SEL 0x4 -#define SHFT_RG_USB20_TERM_VREF_SEL 8 -#define OFFSET_RG_USB20_PHY_REV6 0x18 -#define SHFT_RG_USB20_PHY_REV6 30 -void usb_phy_tuning(void) -{ - static bool inited; - static s32 u2_vrt_ref, u2_term_ref, u2_enhance; - static struct device_node *of_node; - - if (!inited) { - u2_vrt_ref = u2_term_ref = u2_enhance = -1; - of_node = of_find_compatible_node(NULL, - NULL, "mediatek,phy_tuning"); - if (of_node) { - /* value won't be updated if property not being found */ - of_property_read_u32(of_node, - "u2_vrt_ref", (u32 *) &u2_vrt_ref); - of_property_read_u32(of_node, - "u2_term_ref", (u32 *) &u2_term_ref); - of_property_read_u32(of_node, - "u2_enhance", (u32 *) &u2_enhance); - } - inited = true; - } else if (!of_node) - return; - - if (u2_vrt_ref != -1) { - if (u2_vrt_ref <= VAL_MAX_WIDTH_3) { - USBPHY_CLR32(OFFSET_RG_USB20_VRT_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_VRT_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_VRT_VREF_SEL, - u2_vrt_ref << SHFT_RG_USB20_VRT_VREF_SEL); - } - } - if (u2_term_ref != -1) { - if (u2_term_ref <= VAL_MAX_WIDTH_3) { - USBPHY_CLR32(OFFSET_RG_USB20_TERM_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_TERM_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_TERM_VREF_SEL, - u2_term_ref << SHFT_RG_USB20_TERM_VREF_SEL); - } - } - if (u2_enhance != -1) { - if (u2_enhance <= VAL_MAX_WIDTH_2) { - USBPHY_CLR32(OFFSET_RG_USB20_PHY_REV6, - VAL_MAX_WIDTH_2 << SHFT_RG_USB20_PHY_REV6); - USBPHY_SET32(OFFSET_RG_USB20_PHY_REV6, - u2_enhance<\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - - spin_lock_irqsave(&musb_reg_clock_lock, flags); - - if (unlikely(atomic_read(&clk_prepare_cnt) <= 0)) { - DBG_LIMIT(1, "clock not prepare"); - goto exit; - } - - if (enable && count == 0) { - if (clk_enable(musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel enable fail\n"); - goto exit; - } - - if (clk_enable(musb_clk)) { - DBG(0, "musb_clk enable fail\n"); - clk_disable(musb_clk_top_sel); - goto exit; - } - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); - real_enable++; - - } else if (!enable && count == 1) { - clk_disable(musb_clk); - clk_disable(musb_clk_top_sel); - - usb_hal_dpidle_request(USB_DPIDLE_ALLOWED); - real_disable++; - } - - if (enable) - count++; - else - count = (count == 0) ? 0 : (count - 1); - -exit: - if (enable) - virt_enable++; - else - virt_disable++; - - spin_unlock_irqrestore(&musb_reg_clock_lock, flags); - - DBG(1, "enable(%d),count(%d), <%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - return 1; -} - -static void hs_slew_rate_cal(void) -{ - unsigned long data; - unsigned long x; - unsigned char value; - unsigned long start_time, timeout; - unsigned int timeout_flag = 0; - /* enable usb ring oscillator. */ - USBPHY_SET32(0x14, (0x1 << 15)); - - /* wait 1us. */ - udelay(1); - - /* enable free run clock */ - USBPHY_SET32(0xF10 - 0x800, (0x01 << 8)); - /* setting cyclecnt. */ - USBPHY_SET32(0xF00 - 0x800, (0x04 << 8)); - /* enable frequency meter */ - USBPHY_SET32(0xF00 - 0x800, (0x01 << 24)); - - /* wait for frequency valid. */ - start_time = jiffies; - timeout = jiffies + 3 * HZ; - - while (!((USBPHY_READ32(0xF10 - 0x800) & 0xFF) == 0x1)) { - if (time_after(jiffies, timeout)) { - timeout_flag = 1; - break; - } - } - - /* read result. */ - if (timeout_flag) { - DBG(0, "[USBPHY] Slew Rate Calibration: Timeout\n"); - value = 0x4; - } else { - data = USBPHY_READ32(0xF0C - 0x800); - x = ((1024 * FRA * PARA) / data); - value = (unsigned char)(x / 1000); - if ((x - value * 1000) / 100 >= 5) - value += 1; - DBG(1, "[USBPHY]slew calibration:FM_OUT =%lu,x=%lu,value=%d\n", - data, x, value); - } - - /* disable Frequency and disable free run clock. */ - USBPHY_CLR32(0xF00 - 0x800, (0x01 << 24)); - USBPHY_CLR32(0xF10 - 0x800, (0x01 << 8)); - -#define MSK_RG_USB20_HSTX_SRCTRL 0x7 - /* all clr first then set */ - USBPHY_CLR32(0x14, (MSK_RG_USB20_HSTX_SRCTRL << 12)); - USBPHY_SET32(0x14, ((value & MSK_RG_USB20_HSTX_SRCTRL) << 12)); - - /* disable usb ring oscillator. */ - USBPHY_CLR32(0x14, (0x1 << 15)); -} - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool usb_phy_check_in_uart_mode(void) -{ - u32 usb_port_mode; - - usb_enable_clock(true); - udelay(50); - usb_port_mode = USBPHY_READ32(0x68); - usb_enable_clock(false); - - if (((usb_port_mode >> 30) & 0x3) == 1) { - DBG(0, "%s:%d - IN UART MODE : 0x%x\n", - __func__, __LINE__, usb_port_mode); - in_uart_mode = true; - } else { - DBG(0, "%s:%d - NOT IN UART MODE : 0x%x\n", - __func__, __LINE__, usb_port_mode); - in_uart_mode = false; - } - return in_uart_mode; -} - -void usb_phy_switch_to_uart(void) -{ - unsigned int val = 0; - - if (usb_phy_check_in_uart_mode()) { - DBG(0, "Already in UART mode.\n"); - return; - } - - udelay(50); - - /* RG_USB20_BC11_SW_EN 0x11F4_0818[23] = 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - /* Set RG_SUSPENDM 0x11F4_0868[3] to 1 */ - USBPHY_SET32(0x68, (0x1 << 3)); - - /* force suspendm 0x11F4_0868[18] = 1 */ - USBPHY_SET32(0x68, (0x1 << 18)); - - /* Set rg_uart_mode 0x11F4_0868[31:30] to 2'b01 */ - USBPHY_CLR32(0x68, (0x3 << 30)); - USBPHY_SET32(0x68, (0x1 << 30)); - - /* force_uart_i 0x11F4_0868[29] = 0*/ - USBPHY_CLR32(0x68, (0x1 << 29)); - - /* force_uart_bias_en 0x11F4_0868[28] = 1 */ - USBPHY_SET32(0x68, (0x1 << 28)); - - /* force_uart_tx_oe 0x11F4_0868[27] = 1 */ - USBPHY_SET32(0x68, (0x1 << 27)); - - /* force_uart_en 0x11F4_0868[26] = 1 */ - USBPHY_SET32(0x68, (0x1 << 26)); - - /* RG_UART_BIAS_EN 0x11F4_086c[18] = 1 */ - USBPHY_SET32(0x6C, (0x1 << 18)); - - /* RG_UART_TX_OE 0x11F4_086c[17] = 1 */ - USBPHY_SET32(0x6C, (0x1 << 17)); - - /* Set RG_UART_EN to 1 */ - USBPHY_SET32(0x6C, (0x1 << 16)); - - /* Set RG_USB20_DM_100K_EN to 1 */ - USBPHY_SET32(0x20, (0x1 << 17)); - - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - val = readl(ap_gpio_base); - writel(val | (GPIO_SEL_UART0), ap_gpio_base); - - in_uart_mode = true; -} - -void usb_phy_switch_to_usb(void) -{ - unsigned int val = 0; - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - /* clear force_uart_en */ - USBPHY_CLR32(0x68, (0x1 << 26)); - - /* Set rg_uart_mode 0x11F4_0868[31:30] to 2'b00 */ - USBPHY_CLR32(0x68, (0x3 << 30)); - - in_uart_mode = false; - - usb_phy_poweron(); -} -#endif - -void set_usb_phy_mode(int mode) -{ - switch (mode) { - case PHY_MODE_USB_DEVICE: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ - USBPHY_CLR32(0x6C, (0x10<<0)); - USBPHY_SET32(0x6C, (0x2F<<0)); - USBPHY_SET32(0x6C, (0x3F<<8)); - break; - case PHY_MODE_USB_HOST: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ - USBPHY_CLR32(0x6c, (0x12<<0)); - USBPHY_SET32(0x6c, (0x2d<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - case PHY_MODE_INVALID: - /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ - USBPHY_SET32(0x6c, (0x11<<0)); - USBPHY_CLR32(0x6c, (0x2e<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - default: - DBG(0, "mode error %d\n", mode); - } - DBG(0, "force PHY to mode %d, 0x6c=%x\n", mode, USBPHY_READ32(0x6c)); -} - -void usb_rev6_setting(int value) -{ - static int direct_return; - - if (direct_return) - return; - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - USBPHY_CLR32(0x18, (0xFF << 24)); - - if (value) - USBPHY_SET32(0x18, (value << 24)); - else - direct_return = 1; -} - -/* M17_USB_PWR Sequence 20160603.xls */ -void usb_phy_poweron(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* wait 50 usec for PHY3.3v/1.8v stable. */ - udelay(50); - - /* - * force_uart_en 1'b0 0x68 26 - * RG_UART_EN 1'b0 0x6c 16 - * rg_usb20_gpio_ctl 1'b0 0x20 09 - * usb20_gpio_mode 1'b0 0x20 08 - * RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * rg_usb20_dp_100k_mode 1'b1 0x20 18 - * USB20_DP_100K_EN 1'b0 0x20 16 - * RG_USB20_DM_100K_EN 1'b0 0x20 17 - * RG_USB20_OTG_VBUSCMP_EN 1'b1 0x18 20 - * force_suspendm 1'b0 0x68 18 - */ - - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6c, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, ((0x1 << 9) | (0x1 << 8))); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - /* rg_usb20_dp_100k_mode, 1'b1 */ - USBPHY_SET32(0x20, (0x1 << 18)); - /* USB20_DP_100K_EN 1'b0, RG_USB20_DM_100K_EN, 1'b0 */ - USBPHY_CLR32(0x20, ((0x1 << 16) | (0x1 << 17))); - - /* RG_USB20_OTG_VBUSCMP_EN, 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 20)); - - /* force_suspendm, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 18)); - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - USBPHY_CLR32(0x18, (0xFF << 24)); - USBPHY_SET32(0x18, (0x40 << 24)); - - /* wait for 800 usec. */ - udelay(800); - - DBG(0, "usb power on success\n"); -} - -/* M17_USB_PWR Sequence 20160603.xls */ -static void usb_phy_savecurrent_internal(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* - * force_uart_en 1'b0 0x68 26 - * RG_UART_EN 1'b0 0x6c 16 - * rg_usb20_gpio_ctl 1'b0 0x20 09 - * usb20_gpio_mode 1'b0 0x20 08 - - * RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * RG_USB20_OTG_VBUSCMP_EN 1'b0 0x18 20 - * RG_SUSPENDM 1'b1 0x68 03 - * force_suspendm 1'b1 0x68 18 - - * RG_DPPULLDOWN 1'b1 0x68 06 - * RG_DMPULLDOWN 1'b1 0x68 07 - * RG_XCVRSEL[1:0] 2'b01 0x68 [04-05] - * RG_TERMSEL 1'b1 0x68 02 - * RG_DATAIN[3:0] 4'b0000 0x68 [10-13] - * force_dp_pulldown 1'b1 0x68 20 - * force_dm_pulldown 1'b1 0x68 21 - * force_xcversel 1'b1 0x68 19 - * force_termsel 1'b1 0x68 17 - * force_datain 1'b1 0x68 23 - - * RG_SUSPENDM 1'b0 0x68 03 - */ - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6c, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, (0x1 << 9)); - USBPHY_CLR32(0x20, (0x1 << 8)); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - /* RG_USB20_OTG_VBUSCMP_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 20)); - - /* RG_SUSPENDM, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 3)); - /* force_suspendm, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 18)); - - /* RG_DPPULLDOWN, 1'b1, RG_DMPULLDOWN, 1'b1 */ - USBPHY_SET32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* RG_XCVRSEL[1:0], 2'b01. */ - USBPHY_CLR32(0x68, (0x3 << 4)); - USBPHY_SET32(0x68, (0x1 << 4)); - /* RG_TERMSEL, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 2)); - /* RG_DATAIN[3:0], 4'b0000 */ - USBPHY_CLR32(0x68, (0xF << 10)); - - /* force_dp_pulldown, 1'b1, force_dm_pulldown, 1'b1, - * force_xcversel, 1'b1, force_termsel, 1'b1, force_datain, 1'b1 - */ - USBPHY_SET32(0x68, ((0x1 << 20) | (0x1 << 21) | - (0x1 << 19) | (0x1 << 17) | (0x1 << 23))); - - udelay(800); - - /* RG_SUSPENDM, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 3)); - - udelay(1); - - set_usb_phy_mode(PHY_MODE_INVALID); -} - -void usb_phy_savecurrent(void) -{ - usb_phy_savecurrent_internal(); - DBG(0, "usb save current success\n"); -} - -/* M17_USB_PWR Sequence 20160603.xls */ -void usb_phy_recover(void) -{ - unsigned int efuse_val = 0; - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - - /* wait 50 usec. */ - udelay(50); - - /* - * 04.force_uart_en 1'b0 0x68 26 - * 04.RG_UART_EN 1'b0 0x6C 16 - * 04.rg_usb20_gpio_ctl 1'b0 0x20 09 - * 04.usb20_gpio_mode 1'b0 0x20 08 - - * 05.force_suspendm 1'b0 0x68 18 - - * 06.RG_DPPULLDOWN 1'b0 0x68 06 - * 07.RG_DMPULLDOWN 1'b0 0x68 07 - * 08.RG_XCVRSEL[1:0] 2'b00 0x68 [04:05] - * 09.RG_TERMSEL 1'b0 0x68 02 - * 10.RG_DATAIN[3:0] 4'b0000 0x68 [10:13] - * 11.force_dp_pulldown 1'b0 0x68 20 - * 12.force_dm_pulldown 1'b0 0x68 21 - * 13.force_xcversel 1'b0 0x68 19 - * 14.force_termsel 1'b0 0x68 17 - * 15.force_datain 1'b0 0x68 23 - * 16.RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * 17.RG_USB20_OTG_VBUSCMP_EN 1'b1 0x18 20 - */ - - /* clean PUPD_BIST_EN */ - /* PUPD_BIST_EN = 1'b0 */ - /* PMIC will use it to detect charger type */ - /* NEED?? USBPHY_CLR8(0x1d, 0x10);*/ - USBPHY_CLR32(0x1c, (0x1 << 12)); - - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6C, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, (0x1 << 9)); - USBPHY_CLR32(0x20, (0x1 << 8)); - - /* force_suspendm, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 18)); - - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* RG_XCVRSEL[1:0], 2'b00. */ - USBPHY_CLR32(0x68, (0x3 << 4)); - - /* RG_TERMSEL, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 2)); - /* RG_DATAIN[3:0], 4'b0000 */ - USBPHY_CLR32(0x68, (0xF << 10)); - - /* force_dp_pulldown, 1'b0, force_dm_pulldown, 1'b0, - * force_xcversel, 1'b0, force_termsel, 1'b0, force_datain, 1'b0 - */ - USBPHY_CLR32(0x68, ((0x1 << 20) | (0x1 << 21) | - (0x1 << 19) | (0x1 << 17) | (0x1 << 23))); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - /* RG_USB20_OTG_VBUSCMP_EN, 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 20)); - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - usb_rev6_setting(0x40); - - /* wait 800 usec. */ - udelay(800); - - /* force enter device mode */ - set_usb_phy_mode(PHY_DEV_ACTIVE); - - hs_slew_rate_cal(); - - /* M_ANALOG8[4:0] => RG_USB20_INTR_CAL[4:0] */ - efuse_val = (get_devinfo_with_index(107) & (0x1f<<0)) >> 0; - if (efuse_val) { - DBG(0, "apply efuse setting, RG_USB20_INTR_CAL=0x%x\n", - efuse_val); - USBPHY_CLR32(0x04, (0x1F<<19)); - USBPHY_SET32(0x04, (efuse_val<<19)); - } - - /* RG_USB20_DISCTH[7:4], 4'b0111 for 700 mV */ - USBPHY_CLR32(0x18, (0xf0<<0)); - USBPHY_SET32(0x18, (0x70<<0)); - - /* HQA special request */ - { - USBPHY_CLR32(OFFSET_RG_USB20_VRT_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_VRT_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_VRT_VREF_SEL, - 5 << SHFT_RG_USB20_VRT_VREF_SEL); - - USBPHY_CLR32(OFFSET_RG_USB20_TERM_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_TERM_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_TERM_VREF_SEL, - 5 << SHFT_RG_USB20_TERM_VREF_SEL); - - /* discth = 7, u2_enhance = 1 already in */ - } - - usb_phy_tuning(); - - DBG(0, "usb recovery success\n"); -} - -/* BC1.2 */ -void Charger_Detect_Init(void) -{ - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } - - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - - /* RG_USB20_BC11_SW_EN = 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 23)); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Init); - -void Charger_Detect_Release(void) -{ - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } - - usb_prepare_enable_clock(true); - - /* RG_USB20_BC11_SW_EN = 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - udelay(1); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Release); - -void usb_phy_context_save(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); -#endif -} - -void usb_phy_context_restore(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) - usb_phy_switch_to_uart(); -#endif -} - -#endif diff --git a/drivers/misc/mediatek/usb20/mt6768/usb20_phy_debugfs.c b/drivers/misc/mediatek/usb20/mt6768/usb20_phy_debugfs.c deleted file mode 100644 index 53fb7d3f6449..000000000000 --- a/drivers/misc/mediatek/usb20/mt6768/usb20_phy_debugfs.c +++ /dev/null @@ -1,725 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* general */ -#define BIT_WIDTH_1 1 -#define MSK_WIDTH_1 0x1 -#define VAL_MAX_WDITH_1 0x1 -#define VAL_0_WIDTH_1 0x0 -#define VAL_1_WIDTH_1 0x1 -#define STRNG_0_WIDTH_1 "0" -#define STRNG_1_WIDTH_1 "1" - -#define BIT_WIDTH_2 2 -#define MSK_WIDTH_2 0x3 -#define VAL_MAX_WDITH_2 0x3 -#define VAL_0_WIDTH_2 0x0 -#define VAL_1_WIDTH_2 0x1 -#define VAL_2_WIDTH_2 0x2 -#define VAL_3_WIDTH_2 0x3 -#define STRNG_0_WIDTH_2 "00" -#define STRNG_1_WIDTH_2 "01" -#define STRNG_2_WIDTH_2 "10" -#define STRNG_3_WIDTH_2 "11" - -#define BIT_WIDTH_3 3 -#define MSK_WIDTH_3 0x7 -#define VAL_MAX_WDITH_3 0x7 -#define VAL_0_WIDTH_3 0x0 -#define VAL_1_WIDTH_3 0x1 -#define VAL_2_WIDTH_3 0x2 -#define VAL_3_WIDTH_3 0x3 -#define VAL_4_WIDTH_3 0x4 -#define VAL_5_WIDTH_3 0x5 -#define VAL_6_WIDTH_3 0x6 -#define VAL_7_WIDTH_3 0x7 -#define STRNG_0_WIDTH_3 "000" -#define STRNG_1_WIDTH_3 "001" -#define STRNG_2_WIDTH_3 "010" -#define STRNG_3_WIDTH_3 "011" -#define STRNG_4_WIDTH_3 "100" -#define STRNG_5_WIDTH_3 "101" -#define STRNG_6_WIDTH_3 "110" -#define STRNG_7_WIDTH_3 "111" - -/* specific */ -#define FILE_USB_DRIVING_CAPABILITY "USB_DRIVING_CAPABILITY" - -#define FILE_RG_USB20_TERM_VREF_SEL "RG_USB20_TERM_VREF_SEL" -#define MSK_RG_USB20_TERM_VREF_SEL MSK_WIDTH_3 -#define SHFT_RG_USB20_TERM_VREF_SEL 8 -#define OFFSET_RG_USB20_TERM_VREF_SEL 0x4 - -#define FILE_RG_USB20_HSTX_SRCTRL "RG_USB20_HSTX_SRCTRL" -#define MSK_RG_USB20_HSTX_SRCTRL MSK_WIDTH_3 -#define SHFT_RG_USB20_HSTX_SRCTRL 12 -#define OFFSET_RG_USB20_HSTX_SRCTRL 0x14 - -#define FILE_RG_USB20_VRT_VREF_SEL "RG_USB20_VRT_VREF_SEL" -#define MSK_RG_USB20_VRT_VREF_SEL MSK_WIDTH_3 -#define SHFT_RG_USB20_VRT_VREF_SEL 12 -#define OFFSET_RG_USB20_VRT_VREF_SEL 0x4 - -#define FILE_RG_USB20_INTR_EN "RG_USB20_INTR_EN" -#define MSK_RG_USB20_INTR_EN MSK_WIDTH_1 -#define SHFT_RG_USB20_INTR_EN 5 -#define OFFSET_RG_USB20_INTR_EN 0x0 - -#define FILE_RG_USB20_PHY_REV6 "RG_USB20_PHY_REV6" -#define MSK_RG_USB20_PHY_REV6 MSK_WIDTH_2 -#define SHFT_RG_USB20_PHY_REV6 30 -#define OFFSET_RG_USB20_PHY_REV6 0x18 - -static struct proc_dir_entry *usb20_phy_procfs_root; - -void usb20_phy_debugfs_write_width1(u8 offset, u8 shift, char *buf) -{ - u32 clr_val = 0, set_val = 0; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_1, BIT_WIDTH_1)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_1); - clr_val = VAL_1_WIDTH_1; - } - if (!strncmp(buf, STRNG_1_WIDTH_1, BIT_WIDTH_1)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_1); - set_val = VAL_1_WIDTH_1; - } - - if (clr_val || set_val) { - clr_val = VAL_MAX_WDITH_1 - set_val; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, before shft\n", - __func__, __LINE__, - offset, clr_val, - set_val); - clr_val <<= shift; - set_val <<= shift; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, after shft\n", - __func__, __LINE__, - offset, clr_val, - set_val); - - USBPHY_CLR32(offset, clr_val); - USBPHY_SET32(offset, set_val); - } else { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> do nothing\n" - , __func__, __LINE__); - } -} - -void usb20_phy_debugfs_rev6_write(u8 offset, u8 shift, char *buf) -{ - u8 set_val = 0xFF; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_2); - set_val = VAL_0_WIDTH_2; - } - if (!strncmp(buf, STRNG_1_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_2); - set_val = VAL_1_WIDTH_2; - } - if (!strncmp(buf, STRNG_2_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_2); - set_val = VAL_2_WIDTH_2; - } - if (!strncmp(buf, STRNG_3_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_2); - set_val = VAL_3_WIDTH_2; - } - - if (set_val <= VAL_MAX_WDITH_2) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> case offset:%x, set_val:%x, before shft\n", - __func__, __LINE__, offset, set_val); - USBPHY_CLR32(offset, (VAL_MAX_WDITH_2< do nothing\n", - __func__, __LINE__); - } -} - -void usb20_phy_debugfs_write_width3(u8 offset, u8 shift, char *buf) -{ - u32 clr_val = 0, set_val = 0; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - clr_val = VAL_7_WIDTH_3; - } - if (!strncmp(buf, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - set_val = VAL_1_WIDTH_3; - } - if (!strncmp(buf, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - set_val = VAL_2_WIDTH_3; - } - if (!strncmp(buf, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - set_val = VAL_3_WIDTH_3; - } - if (!strncmp(buf, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - set_val = VAL_4_WIDTH_3; - } - if (!strncmp(buf, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - set_val = VAL_5_WIDTH_3; - } - if (!strncmp(buf, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - set_val = VAL_6_WIDTH_3; - } - if (!strncmp(buf, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - set_val = VAL_7_WIDTH_3; - } - - if (clr_val || set_val) { - clr_val = VAL_MAX_WDITH_3 - set_val; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, before shft\n", - __func__, __LINE__, offset, clr_val, set_val); - clr_val <<= shift; - set_val <<= shift; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, after shft\n", - __func__, __LINE__, offset, clr_val, set_val); - - USBPHY_CLR32(offset, clr_val); - USBPHY_SET32(offset, set_val); - } else { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> do nothing\n", - __func__, __LINE__); - } -} - -u8 usb20_phy_debugfs_read_val(u8 offset, u8 shft, u8 msk, u8 width, char *str) -{ - u32 val; - int i, temp; - - val = USBPHY_READ32(offset); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - val = val >> shft; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - val = val & msk; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - - temp = val; - str[width] = '\0'; - for (i = (width - 1); i >= 0; i--) { - if (val % 2) - str[i] = '1'; - else - str[i] = '0'; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> str[%d]:%c\n\n", - __func__, __LINE__, i, str[i]); - val /= 2; - } - pr_notice("MTK_ICUSB [DBG], <%s(), %d> str(%s)\n", - __func__, __LINE__, str); - return val; -} - -static int usb_driving_capability_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - u8 combined_val, tmp_val = 0xff; - - val = usb20_phy_debugfs_read_val(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - MSK_RG_USB20_TERM_VREF_SEL, BIT_WIDTH_3, str); - if (!strncmp(str, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - tmp_val = VAL_0_WIDTH_3; - } - if (!strncmp(str, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - tmp_val = VAL_1_WIDTH_3; - } - if (!strncmp(str, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - tmp_val = VAL_2_WIDTH_3; - } - if (!strncmp(str, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - tmp_val = VAL_3_WIDTH_3; - } - if (!strncmp(str, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - tmp_val = VAL_4_WIDTH_3; - } - if (!strncmp(str, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - tmp_val = VAL_5_WIDTH_3; - } - if (!strncmp(str, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - tmp_val = VAL_6_WIDTH_3; - } - if (!strncmp(str, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - tmp_val = VAL_7_WIDTH_3; - } - - combined_val = tmp_val; - - val = usb20_phy_debugfs_read_val(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - MSK_RG_USB20_VRT_VREF_SEL, - BIT_WIDTH_3, str); - if (!strncmp(str, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - tmp_val = VAL_0_WIDTH_3; - } - if (!strncmp(str, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - tmp_val = VAL_1_WIDTH_3; - } - if (!strncmp(str, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - tmp_val = VAL_2_WIDTH_3; - } - if (!strncmp(str, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - tmp_val = VAL_3_WIDTH_3; - } - if (!strncmp(str, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - tmp_val = VAL_4_WIDTH_3; - } - if (!strncmp(str, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - tmp_val = VAL_5_WIDTH_3; - } - if (!strncmp(str, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - tmp_val = VAL_6_WIDTH_3; - } - if (!strncmp(str, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - tmp_val = VAL_7_WIDTH_3; - } - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> combined_val(%d), tmp_val(%d)\n", - __func__, __LINE__, combined_val, tmp_val); - - if ((tmp_val == (combined_val - 1)) || (tmp_val == combined_val)) - combined_val += tmp_val; - else - combined_val = tmp_val * (VAL_MAX_WDITH_3 + 1) + combined_val; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> combined_val(%d), tmp_val(%d)\n", - __func__, __LINE__, combined_val, tmp_val); - - seq_printf(s, "\n%s = %d\n", FILE_USB_DRIVING_CAPABILITY, combined_val); - return 0; -} - -static int rg_usb20_term_vref_sel_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - MSK_RG_USB20_TERM_VREF_SEL, - BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_TERM_VREF_SEL, str); - return 0; -} - -static int rg_usb20_hstx_srctrl_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_HSTX_SRCTRL, - SHFT_RG_USB20_HSTX_SRCTRL, - MSK_RG_USB20_HSTX_SRCTRL, BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_HSTX_SRCTRL, str); - return 0; -} - -static int rg_usb20_vrt_vref_sel_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - MSK_RG_USB20_VRT_VREF_SEL, BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_VRT_VREF_SEL, str); - return 0; -} - -static int rg_usb20_intr_en_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_INTR_EN, - SHFT_RG_USB20_INTR_EN, - MSK_RG_USB20_INTR_EN, BIT_WIDTH_1, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_INTR_EN, str); - return 0; -} - -static int rg_usb20_rev6_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_PHY_REV6, - SHFT_RG_USB20_PHY_REV6, - MSK_RG_USB20_PHY_REV6, BIT_WIDTH_2, str); - - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_PHY_REV6, str); - return 0; -} - -static int usb_driving_capability_open(struct inode *inode, struct file *file) -{ - return single_open(file, usb_driving_capability_show, PDE_DATA(inode)); -} - -static int rg_usb20_term_vref_sel_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_term_vref_sel_show, PDE_DATA(inode)); -} - -static int rg_usb20_hstx_srctrl_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_hstx_srctrl_show, PDE_DATA(inode)); -} - -static int rg_usb20_vrt_vref_sel_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_vrt_vref_sel_show, PDE_DATA(inode)); -} - -static int rg_usb20_intr_en_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_intr_en_show, PDE_DATA(inode)); -} - -static int rg_usb20_rev6_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_rev6_show, PDE_DATA(inode)); -} - -void val_to_bstring_width3(u8 val, char *str) -{ - - if (val == VAL_0_WIDTH_3) - memcpy(str, STRNG_0_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_1_WIDTH_3) - memcpy(str, STRNG_1_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_2_WIDTH_3) - memcpy(str, STRNG_2_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_3_WIDTH_3) - memcpy(str, STRNG_3_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_4_WIDTH_3) - memcpy(str, STRNG_4_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_5_WIDTH_3) - memcpy(str, STRNG_5_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_6_WIDTH_3) - memcpy(str, STRNG_6_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_7_WIDTH_3) - memcpy(str, STRNG_7_WIDTH_3, BIT_WIDTH_3 + 1); - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> val(%d), str(%s)\n", - __func__, __LINE__, val, str); -} - -static ssize_t usb_driving_capability_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - u8 val, tmp_val; - char str_rg_usb20_term_vref_sel[18], str_rg_usb20_vrt_vref_sel[18]; - - memset(buf, 0x00, sizeof(buf)); - pr_notice("\n"); - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - - if (kstrtol(buf, 10, (long *)&val) != 0) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> kstrtol, err(%d)\n)\n", - __func__, __LINE__, kstrtol(buf, 10, (long *)&val)); - return count; - } - pr_notice("MTK_ICUSB [DBG], <%s(), %d> kstrtol, val(%d)\n)\n", - __func__, __LINE__, val); - - if (val > VAL_7_WIDTH_3 * 2) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> wrong val set(%d), direct return\n", - __func__, __LINE__, val); - return count; - } - tmp_val = val; - val /= 2; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> val(%d), tmp_val(%d)\n", - __func__, __LINE__, val, tmp_val); - - val_to_bstring_width3(tmp_val - val, str_rg_usb20_term_vref_sel); - val_to_bstring_width3(val, str_rg_usb20_vrt_vref_sel); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> Config TERM_VREF_SEL %s\n", - __func__, __LINE__, str_rg_usb20_term_vref_sel); - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - str_rg_usb20_term_vref_sel); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> Config VRT_VREF_SEL %s\n\n", - __func__, __LINE__, str_rg_usb20_vrt_vref_sel); - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - str_rg_usb20_vrt_vref_sel); - return count; -} - -static ssize_t rg_usb20_term_vref_sel_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, buf); - return count; -} - -static ssize_t rg_usb20_hstx_srctrl_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_HSTX_SRCTRL, - SHFT_RG_USB20_HSTX_SRCTRL, buf); - return count; -} - -static ssize_t rg_usb20_vrt_vref_sel_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, buf); - return count; -} - -static ssize_t rg_usb20_intr_en_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width1(OFFSET_RG_USB20_INTR_EN, - SHFT_RG_USB20_INTR_EN, buf); - return count; -} - -static ssize_t rg_usb20_rev6_write(struct file *file, - const char __user *ubuf, size_t count, - loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_rev6_write(OFFSET_RG_USB20_PHY_REV6, - SHFT_RG_USB20_PHY_REV6, buf); - return count; -} - - -static const struct file_operations usb_driving_capability_fops = { - .open = usb_driving_capability_open, - .write = usb_driving_capability_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_term_vref_sel_fops = { - .open = rg_usb20_term_vref_sel_open, - .write = rg_usb20_term_vref_sel_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_hstx_srctrl_fops = { - .open = rg_usb20_hstx_srctrl_open, - .write = rg_usb20_hstx_srctrl_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_vrt_vref_sel_fops = { - .open = rg_usb20_vrt_vref_sel_open, - .write = rg_usb20_vrt_vref_sel_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_intr_en_fops = { - .open = rg_usb20_intr_en_open, - .write = rg_usb20_intr_en_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_rev6_fops = { - .open = rg_usb20_rev6_open, - .write = rg_usb20_rev6_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -int usb20_phy_init_debugfs(void) -{ - struct proc_dir_entry *root; - struct proc_dir_entry *file; - int ret; - - proc_mkdir("mtk_usb", NULL); - - root = proc_mkdir("mtk_usb/usb20_phy", NULL); - if (!root) { - ret = -ENOMEM; - goto err0; - } - - file = proc_create(FILE_USB_DRIVING_CAPABILITY, 0644, - root, &usb_driving_capability_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_TERM_VREF_SEL, 0644, - root, &rg_usb20_term_vref_sel_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_HSTX_SRCTRL, 0644, - root, &rg_usb20_hstx_srctrl_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_VRT_VREF_SEL, 0644, - root, &rg_usb20_vrt_vref_sel_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_INTR_EN, 0644, - root, &rg_usb20_intr_en_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_PHY_REV6, 0644, - root, &rg_usb20_rev6_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - - usb20_phy_procfs_root = root; - return 0; - -err1: - proc_remove(root); - -err0: - return ret; -} - -void /* __init_or_exit */ usb20_phy_exit_debugfs(struct musb *musb) -{ - proc_remove(usb20_phy_procfs_root); -} diff --git a/drivers/misc/mediatek/usb20/mt6781/Makefile b/drivers/misc/mediatek/usb20/mt6781/Makefile deleted file mode 100644 index d6b08abbecd5..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/Makefile +++ /dev/null @@ -1,36 +0,0 @@ -# -# Copyright (C) 2015 MediaTek Inc. -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License version 2 as -# published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# - -# -# for USB OTG silicon based on Mentor Graphics INVENTRA designs -# -ccflags-$(CONFIG_USB_MTK_HDRC) += -I$(srctree)/drivers/misc/mediatek/usb20 - -# for battery related -ccflags-y += -I$(srctree)/drivers/misc/mediatek/include/mt-plat - -# for SPM control usage -ccflags-y += -I$(srctree)/drivers/misc/mediatek/base/power/include/ - -# for TYPEC connection management -ccflags-y += -I$(srctree)/drivers/misc/mediatek/typec/inc -ifeq ($(CONFIG_TCPC_CLASS),y) - ccflags-y += -I$(srctree)/drivers/misc/mediatek/typec/tcpc/inc -endif -# for ep0 test -ccflags-y += -I$(srctree)/drivers/usb/core/ - -# Phy -obj-$(CONFIG_MTK_MUSB_PHY) += mtk_usb20_phy.o -mtk_usb20_phy-y += usb20_phy.o -mtk_usb20_phy-$(CONFIG_DEBUG_FS) += usb20_phy_debugfs.o diff --git a/drivers/misc/mediatek/usb20/mt6781/mtk-phy-a60810.h b/drivers/misc/mediatek/usb20/mt6781/mtk-phy-a60810.h deleted file mode 100644 index 93c443d171fd..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/mtk-phy-a60810.h +++ /dev/null @@ -1,3126 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - - -#ifndef __MTK_PHY_A60810_H -#define __MTK_PHY_A60810_H - -#define U2_SR_COEF_A60810 22 - -struct u2phy_reg_a { - /* 0x0 */ - __le32 usbphyacr0; - __le32 usbphyacr1; - __le32 usbphyacr2; - __le32 reserve0; - /* 0x10 */ - __le32 usbphyacr4; - __le32 usbphyacr5; - __le32 usbphyacr6; - __le32 u2phyacr3; - /* 0x20 */ - __le32 u2phyacr4; - __le32 u2phyamon0; - __le32 reserve1[2]; - /* 0x30~0x50 */ - __le32 reserve2[12]; - /* 0x60 */ - __le32 u2phydcr0; - __le32 u2phydcr1; - __le32 u2phydtm0; - __le32 u2phydtm1; - /* 0x70 */ - __le32 u2phydmon0; - __le32 u2phydmon1; - __le32 u2phydmon2; - __le32 u2phydmon3; - /* 0x80 */ - __le32 u2phybc12c; - __le32 u2phybc12c1; - __le32 reserve3[2]; - /* 0x90~0xd0 */ - __le32 reserve4[20]; - /* 0xe0 */ - __le32 regfppc; - __le32 reserve5[3]; - /* 0xf0 */ - __le32 versionc; - __le32 reserve6[2]; - __le32 regfcom; -}; - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL (0x7<<28) /* 30:28 */ -#define A60810_RG_USB20_TX_PH_ROT_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_USB20_PLL_DIVEN (0x7<<20) /* 22:20 */ -#define A60810_RG_USB20_PLL_BR (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_PLL_BP (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_PLL_BLP (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_USBPLL_FORCE_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_PLL_FBDIV (0x7f<<8) /* 14:8 */ -#define A60810_RG_USB20_PLL_PREDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_USB20_INTR_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_REF_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_BGR_DIV (0x3<<2) /* 3:2 */ -#define A60810_RG_SIFSLV_CHP_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SIFSLV_BGR_EN (0x1<<0) /* 0:0 */ - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL (0x1f<<19) /* 23:19 */ -#define A60810_RG_USB20_OTG_VBUSTH (0x7<<16) /* 18:16 */ -#define A60810_RG_USB20_VRT_VREF_SEL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_TERM_VREF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_MPX_SEL (0xff<<0) /* 7:0 */ - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_CLKREF_REV (0xffff<<0) /* 15:0 */ - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_DP_ABIST_SELE (0xf<<24) /* 27:24 */ -#define A60810_RG_USB20_ICUSB_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_LS_CR (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_FS_CR (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_LS_SR (0x7<<4) /* 6:4 */ -#define A60810_RG_USB20_FS_SR (0x7<<0) /* 2:0 */ - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_INIT_SQ_EN_DG (0x3<<26) /* 27:26 */ -#define A60810_RG_USB20_HSTX_TMODE_SEL (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_SQD (0x3<<22) /* 23:22 */ -#define A60810_RG_USB20_DISCD (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_HSTX_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_PHYD_MONEN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_INLPBK_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_CHIRP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HSTX_SRCAL_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_HSTX_SRCTRL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_HS_100U_U3_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_GBIAS_ENB (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_DM_ABIST_SELE (0xf<<0) /* 3:0 */ - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN (0x1 << 31) /* 31:31 */ -#define A60810_RG_USB20_PHY_REV (0xff<<24) /*31:24*/ -#define A60810_RG_USB20_BC11_SW_EN (0x1<<23) /*23:23*/ -#define A60810_RG_USB20_SR_CLK_SEL (0x1<<22) /*22:22*/ -#define A60810_RG_USB20_OTG_VBUSCMP_EN (0x1<<20) /*20:20*/ -#define A60810_RG_USB20_OTG_ABIST_EN (0x1<<19) /*19:19*/ -#define A60810_RG_USB20_OTG_ABIST_SELE (0x7<<16) /*18:16*/ -#define A60810_RG_USB20_HSRX_MMODE_SELE (0x3<<12) /*13:12*/ -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL (0x3<<9) /*10:9*/ -#define A60810_RG_USB20_HSRX_TMODE_EN (0x1<<8) /*8:8*/ -#define A60810_RG_USB20_DISCTH (0xf<<4) /*7:4*/ -#define A60810_RG_USB20_SQTH (0xf<<0) /*3:0*/ - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST (0xf<<28) /* 31:28 */ -#define A60810_RG_USB20_HSTX_BIST_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_USB20_HSTX_I_EN_MODE (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_USB11_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_TMODE_FS_LS_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HS_TERM_EN_MODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_PUPD_BIST_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_EN_PU_DM (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_EN_PD_DM (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_EN_PU_DP (0x1<<9) /* 9:9 */ -#define A60810_RG_USB20_EN_PD_DP (0x1<<8) /* 8:8 */ - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_DM_100K_EN (0x1<<17) /* 17:17 */ -#define A60810_USB20_DP_100K_EN (0x1<<16) /* 16:16 */ -#define A60810_USB20_GPIO_DM_I (0x1<<15) /* 15:15 */ -#define A60810_USB20_GPIO_DP_I (0x1<<14) /* 14:14 */ -#define A60810_USB20_GPIO_DM_OE (0x1<<13) /* 13:13 */ -#define A60810_USB20_GPIO_DP_OE (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_GPIO_CTL (0x1<<9) /* 9:9 */ -#define A60810_USB20_GPIO_MODE (0x1<<8) /* 8:8 */ -#define A60810_RG_USB20_TX_BIAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_TX_VCMPDN_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_HS_SQ_EN_MODE (0x3<<2) /* 3:2 */ -#define A60810_RG_USB20_HS_RCV_EN_MODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_GPIO_DP_O (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST (0x3<<30) /* 31:30 */ -#define A60810_RG_USB20_GATED_ENB (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_TESTMODE (0x3<<26) /* 27:26 */ -#define A60810_RG_SIFSLV_USB20_PLL_STABLE (0x1<<25) /* 25:25 */ -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON (0x1<<24) /* 24:24 */ -#define A60810_RG_USB20_PHYD_RESERVE (0xffff<<8) /* 23:8 */ -#define A60810_RG_USB20_EBTHRLD (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_EARLY_HSTX_I (0x1<<6) /* 6:6 */ -#define A60810_RG_USB20_TX_TST (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_NEGEDGE_ENB (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_CDR_FILT (0xf<<0) /* 3:0 */ - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL (0xff<<24) /* 31:24 */ -#define A60810_RG_USB20_DRVVBUS (0x1<<23) /* 23:23 */ -#define A60810_RG_DEBUG_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_USB20_OTG_PROBE (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_SW_PLLMODE (0x3<<18) /* 19:18 */ -#define A60810_RG_USB20_BERTH (0x3<<16) /* 17:16 */ -#define A60810_RG_USB20_LBMODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_FORCE_TAP (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_TAPSEL (0xfff<<0) /* 11:0 */ - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE (0x3<<30) /* 31:30 */ -#define A60810_FORCE_UART_I (0x1<<29) /* 29:29 */ -#define A60810_FORCE_UART_BIAS_EN (0x1<<28) /* 28:28 */ -#define A60810_FORCE_UART_TX_OE (0x1<<27) /* 27:27 */ -#define A60810_FORCE_UART_EN (0x1<<26) /* 26:26 */ -#define A60810_FORCE_USB_CLKEN (0x1<<25) /* 25:25 */ -#define A60810_FORCE_DRVVBUS (0x1<<24) /* 24:24 */ -#define A60810_FORCE_DATAIN (0x1<<23) /* 23:23 */ -#define A60810_FORCE_TXVALID (0x1<<22) /* 22:22 */ -#define A60810_FORCE_DM_PULLDOWN (0x1<<21) /* 21:21 */ -#define A60810_FORCE_DP_PULLDOWN (0x1<<20) /* 20:20 */ -#define A60810_FORCE_XCVRSEL (0x1<<19) /* 19:19 */ -#define A60810_FORCE_SUSPENDM (0x1<<18) /* 18:18 */ -#define A60810_FORCE_TERMSEL (0x1<<17) /* 17:17 */ -#define A60810_FORCE_OPMODE (0x1<<16) /* 16:16 */ -#define A60810_UTMI_MUXSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_RESET (0x1<<14) /* 14:14 */ -#define A60810_RG_DATAIN (0xf<<10) /* 13:10 */ -#define A60810_RG_TXVALIDH (0x1<<9) /* 9:9 */ -#define A60810_RG_TXVALID (0x1<<8) /* 8:8 */ -#define A60810_RG_DMPULLDOWN (0x1<<7) /* 7:7 */ -#define A60810_RG_DPPULLDOWN (0x1<<6) /* 6:6 */ -#define A60810_RG_XCVRSEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SUSPENDM (0x1<<3) /* 3:3 */ -#define A60810_RG_TERMSEL (0x1<<2) /* 2:2 */ -#define A60810_RG_OPMODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_PRBS7_BITCNT (0x3f<<24) /* 29:24 */ -#define A60810_RG_USB20_CLK48M_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_USB20_CLK60M_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_UART_I (0x1<<19) /* 19:19 */ -#define A60810_RG_UART_BIAS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_UART_TX_OE (0x1<<17) /* 17:17 */ -#define A60810_RG_UART_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_IP_U2_PORT_POWER (0x1<<15) /* 15:15 */ -#define A60810_FORCE_IP_U2_PORT_POWER (0x1<<14) /* 14:14 */ -#define A60810_FORCE_VBUSVALID (0x1<<13) /* 13:13 */ -#define A60810_FORCE_SESSEND (0x1<<12) /* 12:12 */ -#define A60810_FORCE_BVALID (0x1<<11) /* 11:11 */ -#define A60810_FORCE_AVALID (0x1<<10) /* 10:10 */ -#define A60810_FORCE_IDDIG (0x1<<9) /* 9:9 */ -#define A60810_FORCE_IDPULLUP (0x1<<8) /* 8:8 */ -#define A60810_RG_VBUSVALID (0x1<<5) /* 5:5 */ -#define A60810_RG_SESSEND (0x1<<4) /* 4:4 */ -#define A60810_RG_BVALID (0x1<<3) /* 3:3 */ -#define A60810_RG_AVALID (0x1<<2) /* 2:2 */ -#define A60810_RG_IDDIG (0x1<<1) /* 1:1 */ -#define A60810_RG_IDPULLUP (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH (0xff<<0) /* 7:0 */ -#define E60802_RG_USB20_EOP_CTL (0xf<<16) /* 19:16 */ - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O (0x1<<31) /* 31:31 */ -#define A60810_RGO_USB20_LB_PASS (0x1<<30) /* 30:30 */ -#define A60810_RGO_USB20_LB_DONE (0x1<<29) /* 29:29 */ -#define A60810_AD_USB20_BVALID (0x1<<28) /* 28:28 */ -#define A60810_USB20_IDDIG (0x1<<27) /* 27:27 */ -#define A60810_AD_USB20_VBUSVALID (0x1<<26) /* 26:26 */ -#define A60810_AD_USB20_SESSEND (0x1<<25) /* 25:25 */ -#define A60810_AD_USB20_AVALID (0x1<<24) /* 24:24 */ -#define A60810_USB20_LINE_STATE (0x3<<22) /* 23:22 */ -#define A60810_USB20_HST_DISCON (0x1<<21) /* 21:21 */ -#define A60810_USB20_TX_READY (0x1<<20) /* 20:20 */ -#define A60810_USB20_RX_ERROR (0x1<<19) /* 19:19 */ -#define A60810_USB20_RX_ACTIVE (0x1<<18) /* 18:18 */ -#define A60810_USB20_RX_VALIDH (0x1<<17) /* 17:17 */ -#define A60810_USB20_RX_VALID (0x1<<16) /* 16:16 */ -#define A60810_USB20_DATA_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT (0xff<<24) /* 31:24 */ -#define A60810_RGO_RXACTIVE_CNT (0xff<<16) /* 23:16 */ -#define A60810_RGO_USB20_LB_BERCNT (0xff<<8) /* 15:8 */ -#define A60810_USB20_PROBE_OUT (0xff<<0) /* 7:0 */ - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGO_USB20_PRBS7_DONE (0x1<<3) /* 3:3 */ -#define A60810_RGO_USB20_PRBS7_LOCK (0x1<<2) /* 2:2 */ -#define A60810_RGO_USB20_PRBS7_PASS (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_PRBS7_PASSTH (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT (0xf<<28) /* 31:28 */ -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT (0xf<<24) /* 27:24 */ -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_CHGDT_ISRC_LEV (0x3<<14) /* 15:14 */ -#define A60810_RG_CHGDT_VDATSRC (0x1<<13) /* 13:13 */ -#define A60810_RG_CHGDT_BGVREF_SEL (0x7<<10) /* 12:10 */ -#define A60810_RG_CHGDT_RDVREF_SEL (0x3<<8) /* 9:8 */ -#define A60810_RG_CHGDT_ISRC_DP (0x1<<7) /* 7:7 */ -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM (0x1<<6) /* 6:6 */ -#define A60810_RG_CHGDT_VDAT_DM (0x1<<5) /* 5:5 */ -#define A60810_RG_CHGDT_OPOUT_DP (0x1<<4) /* 4:4 */ -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP (0x1<<3) /* 3:3 */ -#define A60810_RG_SIFSLV_CHGDT_COMP_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_CHGDT_EN (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV (0xff<<0) /* 7:0 */ - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG (0x1<<4) /* 4:4 */ -#define A60810_USB20_OTG_REG (0x1<<3) /* 3:3 */ -#define A60810_CHGDT_REG (0x1<<2) /* 2:2 */ -#define A60810_USB11_REG (0x1<<1) /* 1:1 */ -#define A60810_USB20_REG (0x1<<0) /* 0:0 */ - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE (0xff<<24) /* 31:24 */ -#define A60810_USB11_VERSION_CODE (0xff<<16) /* 23:16 */ -#define A60810_VERSION_CODE_ANA (0xff<<8) /* 15:8 */ -#define A60810_VERSION_CODE_DIG (0xff<<0) /* 7:0 */ - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE (0xff<<24) /* 31:24 */ -#define A60810_I2C_MODE (0x1<<16) /* 16:16 */ - -/* OFFSET */ - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL_OFST (28) -#define A60810_RG_USB20_TX_PH_ROT_SEL_OFST (24) -#define A60810_RG_USB20_PLL_DIVEN_OFST (20) -#define A60810_RG_USB20_PLL_BR_OFST (18) -#define A60810_RG_USB20_PLL_BP_OFST (17) -#define A60810_RG_USB20_PLL_BLP_OFST (16) -#define A60810_RG_USB20_USBPLL_FORCE_ON_OFST (15) -#define A60810_RG_USB20_PLL_FBDIV_OFST (8) -#define A60810_RG_USB20_PLL_PREDIV_OFST (6) -#define A60810_RG_USB20_INTR_EN_OFST (5) -#define A60810_RG_USB20_REF_EN_OFST (4) -#define A60810_RG_USB20_BGR_DIV_OFST (2) -#define A60810_RG_SIFSLV_CHP_EN_OFST (1) -#define A60810_RG_SIFSLV_BGR_EN_OFST (0) - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL_OFST (19) -#define A60810_RG_USB20_OTG_VBUSTH_OFST (16) -#define A60810_RG_USB20_VRT_VREF_SEL_OFST (12) -#define A60810_RG_USB20_TERM_VREF_SEL_OFST (8) -#define A60810_RG_USB20_MPX_SEL_OFST (0) - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN_OFST (17) -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN_OFST (16) -#define A60810_RG_USB20_CLKREF_REV_OFST (0) - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN_OFST (31) -#define A60810_RG_USB20_DP_ABIST_SELE_OFST (24) -#define A60810_RG_USB20_ICUSB_EN_OFST (16) -#define A60810_RG_USB20_LS_CR_OFST (12) -#define A60810_RG_USB20_FS_CR_OFST (8) -#define A60810_RG_USB20_LS_SR_OFST (4) -#define A60810_RG_USB20_FS_SR_OFST (0) - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN_OFST (28) -#define A60810_RG_USB20_INIT_SQ_EN_DG_OFST (26) -#define A60810_RG_USB20_HSTX_TMODE_SEL_OFST (24) -#define A60810_RG_USB20_SQD_OFST (22) -#define A60810_RG_USB20_DISCD_OFST (20) -#define A60810_RG_USB20_HSTX_TMODE_EN_OFST (19) -#define A60810_RG_USB20_PHYD_MONEN_OFST (18) -#define A60810_RG_USB20_INLPBK_EN_OFST (17) -#define A60810_RG_USB20_CHIRP_EN_OFST (16) -#define A60810_RG_USB20_HSTX_SRCAL_EN_OFST (15) -#define A60810_RG_USB20_HSTX_SRCTRL_OFST (12) -#define A60810_RG_USB20_HS_100U_U3_EN_OFST (11) -#define A60810_RG_USB20_GBIAS_ENB_OFST (10) -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN_OFST (7) -#define A60810_RG_USB20_DM_ABIST_SELE_OFST (0) - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN_OFST (31) -#define A60810_RG_USB20_PHY_REV_OFST (24) -#define A60810_RG_USB20_BC11_SW_EN_OFST (23) -#define A60810_RG_USB20_SR_CLK_SEL_OFST (22) -#define A60810_RG_USB20_OTG_VBUSCMP_EN_OFST (20) -#define A60810_RG_USB20_OTG_ABIST_EN_OFST (19) -#define A60810_RG_USB20_OTG_ABIST_SELE_OFST (16) -#define A60810_RG_USB20_HSRX_MMODE_SELE_OFST (12) -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL_OFST (9) -#define A60810_RG_USB20_HSRX_TMODE_EN_OFST (8) -#define A60810_RG_USB20_DISCTH_OFST (4) -#define A60810_RG_USB20_SQTH_OFST (0) - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST_OFST (28) -#define A60810_RG_USB20_HSTX_BIST_EN_OFST (26) -#define A60810_RG_USB20_HSTX_I_EN_MODE_OFST (24) -#define A60810_RG_USB20_USB11_TMODE_EN_OFST (19) -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN_OFST (18) -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN_OFST (17) -#define A60810_RG_USB20_TMODE_FS_LS_MODE_OFST (16) -#define A60810_RG_USB20_HS_TERM_EN_MODE_OFST (13) -#define A60810_RG_USB20_PUPD_BIST_EN_OFST (12) -#define A60810_RG_USB20_EN_PU_DM_OFST (11) -#define A60810_RG_USB20_EN_PD_DM_OFST (10) -#define A60810_RG_USB20_EN_PU_DP_OFST (9) -#define A60810_RG_USB20_EN_PD_DP_OFST (8) - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE_OFST (18) -#define A60810_RG_USB20_DM_100K_EN_OFST (17) -#define A60810_USB20_DP_100K_EN_OFST (16) -#define A60810_USB20_GPIO_DM_I_OFST (15) -#define A60810_USB20_GPIO_DP_I_OFST (14) -#define A60810_USB20_GPIO_DM_OE_OFST (13) -#define A60810_USB20_GPIO_DP_OE_OFST (12) -#define A60810_RG_USB20_GPIO_CTL_OFST (9) -#define A60810_USB20_GPIO_MODE_OFST (8) -#define A60810_RG_USB20_TX_BIAS_EN_OFST (5) -#define A60810_RG_USB20_TX_VCMPDN_EN_OFST (4) -#define A60810_RG_USB20_HS_SQ_EN_MODE_OFST (2) -#define A60810_RG_USB20_HS_RCV_EN_MODE_OFST (0) - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O_OFST (1) -#define A60810_RGO_USB20_GPIO_DP_O_OFST (0) - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST_OFST (30) -#define A60810_RG_USB20_GATED_ENB_OFST (29) -#define A60810_RG_USB20_TESTMODE_OFST (26) -#define A60810_RG_SIFSLV_USB20_PLL_STABLE_OFST (25) -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON_OFST (24) -#define A60810_RG_USB20_PHYD_RESERVE_OFST (8) -#define A60810_RG_USB20_EBTHRLD_OFST (7) -#define A60810_RG_USB20_EARLY_HSTX_I_OFST (6) -#define A60810_RG_USB20_TX_TST_OFST (5) -#define A60810_RG_USB20_NEGEDGE_ENB_OFST (4) -#define A60810_RG_USB20_CDR_FILT_OFST (0) - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL_OFST (24) -#define A60810_RG_USB20_DRVVBUS_OFST (23) -#define A60810_RG_DEBUG_EN_OFST (22) -#define A60810_RG_USB20_OTG_PROBE_OFST (20) -#define A60810_RG_USB20_SW_PLLMODE_OFST (18) -#define A60810_RG_USB20_BERTH_OFST (16) -#define A60810_RG_USB20_LBMODE_OFST (13) -#define A60810_RG_USB20_FORCE_TAP_OFST (12) -#define A60810_RG_USB20_TAPSEL_OFST (0) - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE_OFST (30) -#define A60810_FORCE_UART_I_OFST (29) -#define A60810_FORCE_UART_BIAS_EN_OFST (28) -#define A60810_FORCE_UART_TX_OE_OFST (27) -#define A60810_FORCE_UART_EN_OFST (26) -#define A60810_FORCE_USB_CLKEN_OFST (25) -#define A60810_FORCE_DRVVBUS_OFST (24) -#define A60810_FORCE_DATAIN_OFST (23) -#define A60810_FORCE_TXVALID_OFST (22) -#define A60810_FORCE_DM_PULLDOWN_OFST (21) -#define A60810_FORCE_DP_PULLDOWN_OFST (20) -#define A60810_FORCE_XCVRSEL_OFST (19) -#define A60810_FORCE_SUSPENDM_OFST (18) -#define A60810_FORCE_TERMSEL_OFST (17) -#define A60810_FORCE_OPMODE_OFST (16) -#define A60810_UTMI_MUXSEL_OFST (15) -#define A60810_RG_RESET_OFST (14) -#define A60810_RG_DATAIN_OFST (10) -#define A60810_RG_TXVALIDH_OFST (9) -#define A60810_RG_TXVALID_OFST (8) -#define A60810_RG_DMPULLDOWN_OFST (7) -#define A60810_RG_DPPULLDOWN_OFST (6) -#define A60810_RG_XCVRSEL_OFST (4) -#define A60810_RG_SUSPENDM_OFST (3) -#define A60810_RG_TERMSEL_OFST (2) -#define A60810_RG_OPMODE_OFST (0) - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN_OFST (31) -#define A60810_RG_USB20_PRBS7_BITCNT_OFST (24) -#define A60810_RG_USB20_CLK48M_EN_OFST (23) -#define A60810_RG_USB20_CLK60M_EN_OFST (22) -#define A60810_RG_UART_I_OFST (19) -#define A60810_RG_UART_BIAS_EN_OFST (18) -#define A60810_RG_UART_TX_OE_OFST (17) -#define A60810_RG_UART_EN_OFST (16) -#define A60810_RG_IP_U2_PORT_POWER_OFST (15) -#define A60810_FORCE_IP_U2_PORT_POWER_OFST (14) -#define A60810_FORCE_VBUSVALID_OFST (13) -#define A60810_FORCE_SESSEND_OFST (12) -#define A60810_FORCE_BVALID_OFST (11) -#define A60810_FORCE_AVALID_OFST (10) -#define A60810_FORCE_IDDIG_OFST (9) -#define A60810_FORCE_IDPULLUP_OFST (8) -#define A60810_RG_VBUSVALID_OFST (5) -#define A60810_RG_SESSEND_OFST (4) -#define A60810_RG_BVALID_OFST (3) -#define A60810_RG_AVALID_OFST (2) -#define A60810_RG_IDDIG_OFST (1) -#define A60810_RG_IDPULLUP_OFST (0) - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH_OFST (0) -#define E60802_RG_USB20_EOP_CTL_OFST (16) - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O_OFST (31) -#define A60810_RGO_USB20_LB_PASS_OFST (30) -#define A60810_RGO_USB20_LB_DONE_OFST (29) -#define A60810_AD_USB20_BVALID_OFST (28) -#define A60810_USB20_IDDIG_OFST (27) -#define A60810_AD_USB20_VBUSVALID_OFST (26) -#define A60810_AD_USB20_SESSEND_OFST (25) -#define A60810_AD_USB20_AVALID_OFST (24) -#define A60810_USB20_LINE_STATE_OFST (22) -#define A60810_USB20_HST_DISCON_OFST (21) -#define A60810_USB20_TX_READY_OFST (20) -#define A60810_USB20_RX_ERROR_OFST (19) -#define A60810_USB20_RX_ACTIVE_OFST (18) -#define A60810_USB20_RX_VALIDH_OFST (17) -#define A60810_USB20_RX_VALID_OFST (16) -#define A60810_USB20_DATA_OUT_OFST (0) - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT_OFST (24) -#define A60810_RGO_RXACTIVE_CNT_OFST (16) -#define A60810_RGO_USB20_LB_BERCNT_OFST (8) -#define A60810_USB20_PROBE_OUT_OFST (0) - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT_OFST (16) -#define A60810_RGO_USB20_PRBS7_DONE_OFST (3) -#define A60810_RGO_USB20_PRBS7_LOCK_OFST (2) -#define A60810_RGO_USB20_PRBS7_PASS_OFST (1) -#define A60810_RGO_USB20_PRBS7_PASSTH_OFST (0) - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT_OFST (28) -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT_OFST (24) -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE_OFST (16) -#define A60810_RG_CHGDT_ISRC_LEV_OFST (14) -#define A60810_RG_CHGDT_VDATSRC_OFST (13) -#define A60810_RG_CHGDT_BGVREF_SEL_OFST (10) -#define A60810_RG_CHGDT_RDVREF_SEL_OFST (8) -#define A60810_RG_CHGDT_ISRC_DP_OFST (7) -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM_OFST (6) -#define A60810_RG_CHGDT_VDAT_DM_OFST (5) -#define A60810_RG_CHGDT_OPOUT_DP_OFST (4) -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP_OFST (3) -#define A60810_RG_SIFSLV_CHGDT_COMP_EN_OFST (2) -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN_OFST (1) -#define A60810_RG_CHGDT_EN_OFST (0) - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV_OFST (0) - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG_OFST (4) -#define A60810_USB20_OTG_REG_OFST (3) -#define A60810_CHGDT_REG_OFST (2) -#define A60810_USB11_REG_OFST (1) -#define A60810_USB20_REG_OFST (0) - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE_OFST (24) -#define A60810_USB11_VERSION_CODE_OFST (16) -#define A60810_VERSION_CODE_ANA_OFST (8) -#define A60810_VERSION_CODE_DIG_OFST (0) - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE_OFST (24) -#define A60810_I2C_MODE_OFST (16) - -/* ///////////////////////////////////////////////////////////////// */ - -struct u3phya_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg2; - __le32 reg3; - /* 0x10 */ - __le32 reg4; - __le32 reg5; - __le32 reg6; - __le32 reg7; - /* 0x20 */ - __le32 reg8; - __le32 reg9; - __le32 rega; - __le32 regb; - /* 0x30 */ - __le32 regc; -}; - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CHPEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_BG_DIV (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_INTR_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_MPX_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_MPX_SEL (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_REF_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_VRT_VREF_SEL (0xf<<11) /* 14:11 */ -#define A60810_RG_SSUSB_BG_MONEN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_INT_BIAS_SEL (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EXT_BIAS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_CLKDRV_OFFSET (0x3<<2) /* 3:2 */ -#define A60810_RG_PCIE_CLKDRV_SLEW (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP (0x7<<29) /* 31:29 */ -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_XTAL_MON_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_XTAL_HYS (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE (0xffff<<10) /* 25:10 */ -#define A60810_RG_SSUSB_SYSPLL_PREDIV (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_SYSPLL_POSDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_SYSPLL_VOD_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_SYSPLL_RST_DLY (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_SYSPLL_BLP (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_SYSPLL_BP (0x1<<0) /* 0:0 */ - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_BC (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_SYSPLL_BACK_EN (0x1<<24) /* 24:24 */ - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV (0x7fffffff<<1)/* 31:1 */ -#define A60810_RG_SSUSB_SYSPLL_HR_EN (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS (0x3<<29) /* 30:29 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD (0x3<<27) /* 28:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_SYSPLL_RESERVE (0xff<<17)/* 24:17 */ -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE (0xffff<<1)/* 16:1 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_CALIB (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_IDEM_BIAS (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_TX_R50_FON (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_TX_SR (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_RXDET_RSEL (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXDET_UPDN_SEL (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_L (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CKMON_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TX_VLMON_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_TX_VLMON_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CKMON_SEL (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_RXLBTX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXLBRX_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RESERVE (0x3ff<<16)/* 25:16 */ -#define A60810_RG_SSUSB_PLL_POSDIV (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_PLL_VOD_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_PLL_MONREF_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_MONCK_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_PLL_MONVC_EN (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_PLL_RLH_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KS (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KF (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_RST_DLY (0x3<<2) /* 3:2 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_CLK_PH_INV (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_VADJ (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDS_MONEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE (0x7<<20) /* 22:20 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_DDS_C (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2 (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_LFPS_LPF (0x3<<13) /* 14:13 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_CDR_OSCDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_MONMUX (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_CDR_RST_DLY (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CDR_BYPASS (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_CDR_PI_SLEW (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_CDR_EPEN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_MONEN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_CDR_MONEN_DIG (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_REGOD (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KS (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KF (0x3<<9) /* 10:9 */ -#define A60810_RG_SSUSB_RX_DAC_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DAC_PWD (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_CURSEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MUX (0x1f<<1) /* 5:1 */ -#define A60810_RG_SSUSB_RX_R2T_EN (0x1<<0) /* 0:0 */ - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_50_LOWER (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_RX_50_TAR (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_RX_SW_CTRL (0xf<<21) /* 24:21 */ -#define A60810_RG_PCIE_SIGDET_VTH (0x3<<19) /* 20:19 */ -#define A60810_RG_PCIE_SIGDET_LPF (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_LFPS_MON_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RX_PD_RST (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_PD_RST_PASS (0x1<<9) /* 9:9 */ - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_RXAFE_RESERVE (0xff<<16) /* 23:16 */ -#define A60810_RG_PCIE_RX_RESERVE (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_VRT_25M_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_MPX_SEL_L0 (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_SIGDET_HF (0x3<<0) /* 1:0 */ - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN_OFST (31) -#define A60810_RG_SSUSB_CHPEN_OFST (30) -#define A60810_RG_SSUSB_BG_DIV_OFST (28) -#define A60810_RG_SSUSB_INTR_EN_OFST (26) -#define A60810_RG_SSUSB_MPX_EN_OFST (24) -#define A60810_RG_SSUSB_MPX_SEL_OFST (16) -#define A60810_RG_SSUSB_REF_EN_OFST (15) -#define A60810_RG_SSUSB_VRT_VREF_SEL_OFST (11) -#define A60810_RG_SSUSB_BG_MONEN_OFST (8) -#define A60810_RG_SSUSB_INT_BIAS_SEL_OFST (7) -#define A60810_RG_SSUSB_EXT_BIAS_SEL_OFST (6) -#define A60810_RG_PCIE_CLKDRV_OFFSET_OFST (2) -#define A60810_RG_PCIE_CLKDRV_SLEW_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP_OFST (29) -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN_OFST (28) -#define A60810_RG_SSUSB_XTAL_MON_EN_OFST (27) -#define A60810_RG_SSUSB_XTAL_HYS_OFST (26) -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE_OFST (10) -#define A60810_RG_SSUSB_SYSPLL_PREDIV_OFST (8) -#define A60810_RG_SSUSB_SYSPLL_POSDIV_OFST (6) -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL_OFST (5) -#define A60810_RG_SSUSB_SYSPLL_VOD_EN_OFST (4) -#define A60810_RG_SSUSB_SYSPLL_RST_DLY_OFST (2) -#define A60810_RG_SSUSB_SYSPLL_BLP_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_BP_OFST (0) - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_BC_OFST (30) -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN_OFST (28) -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM_OFST (26) -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_BACK_EN_OFST (24) - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_HR_EN_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_RESERVE_OFST (17) -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE_OFST (1) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB_OFST (31) -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN_OFST (30) -#define A60810_RG_SSUSB_IDRV_CALIB_OFST (24) -#define A60810_RG_SSUSB_IDEM_BIAS_OFST (20) -#define A60810_RG_SSUSB_TX_R50_FON_OFST (19) -#define A60810_RG_SSUSB_TX_SR_OFST (16) -#define A60810_RG_SSUSB_RXDET_RSEL_OFST (14) -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE_OFST (13) -#define A60810_RG_SSUSB_RXDET_UPDN_SEL_OFST (12) -#define A60810_RG_SSUSB_RXDET_VTHSEL_L_OFST (10) -#define A60810_RG_SSUSB_RXDET_VTHSEL_H_OFST (8) -#define A60810_RG_SSUSB_CKMON_EN_OFST (7) -#define A60810_RG_SSUSB_TX_VLMON_EN_OFST (6) -#define A60810_RG_SSUSB_TX_VLMON_SEL_OFST (4) -#define A60810_RG_SSUSB_CKMON_SEL_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM_OFST (28) -#define A60810_RG_SSUSB_RXLBTX_EN_OFST (27) -#define A60810_RG_SSUSB_TXLBRX_EN_OFST (26) -#define A60810_RG_SSUSB_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_POSDIV_OFST (14) -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD_OFST (13) -#define A60810_RG_SSUSB_PLL_VOD_EN_OFST (12) -#define A60810_RG_SSUSB_PLL_MONREF_EN_OFST (11) -#define A60810_RG_SSUSB_PLL_MONCK_EN_OFST (10) -#define A60810_RG_SSUSB_PLL_MONVC_EN_OFST (9) -#define A60810_RG_SSUSB_PLL_RLH_EN_OFST (8) -#define A60810_RG_SSUSB_PLL_AUTOK_KS_OFST (6) -#define A60810_RG_SSUSB_PLL_AUTOK_KF_OFST (4) -#define A60810_RG_SSUSB_PLL_RST_DLY_OFST (2) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_PRD_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI_OFST (31) -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN_OFST (30) -#define A60810_RG_SSUSB_PLL_CLK_PH_INV_OFST (29) -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_VADJ_OFST (26) -#define A60810_RG_SSUSB_PLL_DDS_MONEN_OFST (25) -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT_OFST (24) -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN_OFST (23) -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE_OFST (20) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_DDS_C_OFST (16) -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2_OFST (15) -#define A60810_RG_SSUSB_LFPS_LPF_OFST (13) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS_OFST (31) -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL_OFST (30) -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL_OFST (29) -#define A60810_RG_SSUSB_CDR_OSCDET_EN_OFST (28) -#define A60810_RG_SSUSB_CDR_MONMUX_OFST (27) -#define A60810_RG_SSUSB_CDR_RST_DLY_OFST (25) -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL_OFST (24) -#define A60810_RG_SSUSB_CDR_BYPASS_OFST (22) -#define A60810_RG_SSUSB_CDR_PI_SLEW_OFST (20) -#define A60810_RG_SSUSB_CDR_EPEN_OFST (19) -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD_OFST (18) -#define A60810_RG_SSUSB_CDR_MONEN_OFST (16) -#define A60810_RG_SSUSB_CDR_MONEN_DIG_OFST (15) -#define A60810_RG_SSUSB_CDR_REGOD_OFST (13) -#define A60810_RG_SSUSB_CDR_AUTOK_KS_OFST (11) -#define A60810_RG_SSUSB_CDR_AUTOK_KF_OFST (9) -#define A60810_RG_SSUSB_RX_DAC_EN_OFST (8) -#define A60810_RG_SSUSB_RX_DAC_PWD_OFST (7) -#define A60810_RG_SSUSB_EQ_CURSEL_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MUX_OFST (1) -#define A60810_RG_SSUSB_RX_R2T_EN_OFST (0) - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN_OFST (31) -#define A60810_RG_SSUSB_RX_50_LOWER_OFST (28) -#define A60810_RG_SSUSB_RX_50_TAR_OFST (26) -#define A60810_RG_SSUSB_RX_SW_CTRL_OFST (21) -#define A60810_RG_PCIE_SIGDET_VTH_OFST (19) -#define A60810_RG_PCIE_SIGDET_LPF_OFST (17) -#define A60810_RG_SSUSB_LFPS_MON_EN_OFST (16) -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL_OFST (12) -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS_OFST (11) -#define A60810_RG_SSUSB_RX_PD_RST_OFST (10) -#define A60810_RG_SSUSB_RX_PD_RST_PASS_OFST (9) - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE_OFST (24) -#define A60810_RG_SSUSB_RXAFE_RESERVE_OFST (16) -#define A60810_RG_PCIE_RX_RESERVE_OFST (8) -#define A60810_RG_SSUSB_VRT_25M_EN_OFST (7) -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN_OFST (5) -#define A60810_RG_SSUSB_MPX_SEL_L0_OFST (4) -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL_OFST (3) -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL_OFST (2) -#define A60810_RG_PCIE_SIGDET_HF_OFST (0) - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phya_da_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg4; - __le32 reg5; - /* 0x10 */ - __le32 reg6; - __le32 reg7; - __le32 reg8; - __le32 reg9; - /* 0x20 */ - __le32 reg10; - __le32 reg12; - __le32 reg13; - __le32 reg14; - /* 0x30 */ - __le32 reg15; - __le32 reg16; - __le32 reg19; - __le32 reg20; - /* 0x40 */ - __le32 reg21; - __le32 reg23; - __le32 reg25; - __le32 reg26; - /* 0x50 */ - __le32 reg28; - __le32 reg29; - __le32 reg30; - __le32 reg31; - /* 0x60 */ - __le32 reg32; - __le32 reg33; -}; - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_SPEED_PE2H (0x1<<23) /* 23:23 */ -#define A60810_RG_PCIE_SPEED_PE1D (0x1<<22) /* 22:22 */ -#define A60810_RG_PCIE_SPEED_PE1H (0x1<<21) /* 21:21 */ -#define A60810_RG_PCIE_SPEED_U3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3 (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D (0x1<<30) /* 30:30 */ -#define A60810_RG_USB20_REFCK_SEL_PE2H (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_REFCK_SEL_PE1D (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_REFCK_SEL_PE1H (0x1<<27) /* 27:27 */ -#define A60810_RG_USB20_REFCK_SEL_U3 (0x1<<26) /* 26:26 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1D (0x1<<18) /* 18:18 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1H (0x1<<17) /* 17:17 */ -#define A60810_RG_PCIE_REFCK_DIV4_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_PCIE_MODE_PE2D (0x1<<8) /* 8:8 */ -#define A60810_RG_PCIE_MODE_PE2H (0x1<<3) /* 3:3 */ -#define A60810_RG_PCIE_MODE_PE1D (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_MODE_PE1H (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_MODE_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D (0x7<<22) /* 24:22 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H (0x7<<19) /* 21:19 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H (0x7<<13) /* 15:13 */ -#define A60810_RG_SSUSB_PLL_DIVEN_U3 (0x7<<10) /* 12:10 */ -#define A60810_RG_SSUSB_PLL_BC_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_BC_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_BC_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_BC_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_BC_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_PLL_BR_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_PLL_BR_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_BR_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_BR_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_PLL_IC_PE2D (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IC_PE2H (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_PLL_IC_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IC_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IC_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_IR_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IR_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IR_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IR_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_BP_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_BP_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_BP_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_BP_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H (0x7f<<24)/* 30:24 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D (0x7f<<16)/* 22:16 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_PREDIV_U3 (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3 (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3 (0xffff<<0) /* 15:0 */ - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D (0xffff<<0) /* 15:0 */ - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D (0xffff<<0) /* 15:0 */ - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H (0xffff<<0) /* 15:0 */ - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H (0xffff<<0) /* 15:0 */ - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1D (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_BPA_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BPB_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BR_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BR_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BR_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BR_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_CDR_FBDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3 (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_KVSEL_U3 (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2H (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1D (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_CMPWD_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_U3 (0x3<<0) /* 1:0 */ - -/* OFFSET DEFINITION */ - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D_OFST (24) -#define A60810_RG_PCIE_SPEED_PE2H_OFST (23) -#define A60810_RG_PCIE_SPEED_PE1D_OFST (22) -#define A60810_RG_PCIE_SPEED_PE1H_OFST (21) -#define A60810_RG_PCIE_SPEED_U3_OFST (20) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D_OFST (18) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H_OFST (16) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D_OFST (14) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H_OFST (12) -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3_OFST (10) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D_OFST (8) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H_OFST (6) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D_OFST (4) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D_OFST (30) -#define A60810_RG_USB20_REFCK_SEL_PE2H_OFST (29) -#define A60810_RG_USB20_REFCK_SEL_PE1D_OFST (28) -#define A60810_RG_USB20_REFCK_SEL_PE1H_OFST (27) -#define A60810_RG_USB20_REFCK_SEL_U3_OFST (26) -#define A60810_RG_PCIE_REFCK_DIV4_PE2D_OFST (25) -#define A60810_RG_PCIE_REFCK_DIV4_PE2H_OFST (24) -#define A60810_RG_PCIE_REFCK_DIV4_PE1D_OFST (18) -#define A60810_RG_PCIE_REFCK_DIV4_PE1H_OFST (17) -#define A60810_RG_PCIE_REFCK_DIV4_U3_OFST (16) -#define A60810_RG_PCIE_MODE_PE2D_OFST (8) -#define A60810_RG_PCIE_MODE_PE2H_OFST (3) -#define A60810_RG_PCIE_MODE_PE1D_OFST (2) -#define A60810_RG_PCIE_MODE_PE1H_OFST (1) -#define A60810_RG_PCIE_MODE_U3_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D_OFST (22) -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H_OFST (19) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H_OFST (13) -#define A60810_RG_SSUSB_PLL_DIVEN_U3_OFST (10) -#define A60810_RG_SSUSB_PLL_BC_PE2D_OFST (8) -#define A60810_RG_SSUSB_PLL_BC_PE2H_OFST (6) -#define A60810_RG_SSUSB_PLL_BC_PE1D_OFST (4) -#define A60810_RG_SSUSB_PLL_BC_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_BC_U3_OFST (0) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D_OFST (30) -#define A60810_RG_SSUSB_PLL_BR_PE2H_OFST (28) -#define A60810_RG_SSUSB_PLL_BR_PE1D_OFST (26) -#define A60810_RG_SSUSB_PLL_BR_PE1H_OFST (24) -#define A60810_RG_SSUSB_PLL_BR_U3_OFST (22) -#define A60810_RG_SSUSB_PLL_IC_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_IC_PE2H_OFST (12) -#define A60810_RG_SSUSB_PLL_IC_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IC_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IC_U3_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_IR_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_IR_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IR_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IR_U3_OFST (0) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_BP_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_BP_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_BP_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_BP_U3_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_FBKSEL_U3_OFST (0) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_U3_OFST (0) - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D_OFST (26) -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D_OFST (18) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_PREDIV_U3_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D_OFST (0) - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3_OFST (0) - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H_OFST (0) - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D_OFST (0) - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H_OFST (0) - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D_OFST (0) - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST (0) - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D_OFST (0) - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D_OFST (0) - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H_OFST (0) - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H_OFST (0) - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D_OFST (25) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3_OFST (0) - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPA_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPA_PE1D_OFST (10) -#define A60810_RG_SSUSB_CDR_BPA_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_BPA_U3_OFST (0) - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPB_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPB_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BPB_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BPB_U3_OFST (0) - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BR_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BR_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BR_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BR_U3_OFST (0) - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_FBDIV_U3_OFST (0) - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D_OFST (30) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H_OFST (28) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D_OFST (26) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H_OFST (24) -#define A60810_RG_SSUSB_EQ_RSTEP1_U3_OFST (22) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D_OFST (20) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H_OFST (18) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D_OFST (16) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H_OFST (14) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3_OFST (12) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D_OFST (11) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H_OFST (10) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D_OFST (9) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_KVSEL_U3_OFST (7) -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D_OFST (0) - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D_OFST (26) -#define A60810_RG_SSUSB_RX_CMPWD_PE2H_OFST (25) -#define A60810_RG_SSUSB_RX_CMPWD_PE1D_OFST (24) -#define A60810_RG_SSUSB_RX_CMPWD_PE1H_OFST (23) -#define A60810_RG_SSUSB_RX_CMPWD_U3_OFST (16) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D_OFST (8) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H_OFST (6) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D_OFST (4) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H_OFST (2) -#define A60810_RG_SSUSB_EQ_RSTEP2_U3_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phyd_reg_a { - /* 0x0 */ - __le32 phyd_mix0; - __le32 phyd_mix1; - __le32 phyd_lfps0; - __le32 phyd_lfps1; - /* 0x10 */ - __le32 phyd_impcal0; - __le32 phyd_impcal1; - __le32 phyd_txpll0; - __le32 phyd_txpll1; - /* 0x20 */ - __le32 phyd_txpll2; - __le32 phyd_fl0; - __le32 phyd_mix2; - __le32 phyd_rx0; - /* 0x30 */ - __le32 phyd_t2rlb; - __le32 phyd_cppat; - __le32 phyd_mix3; - __le32 phyd_ebufctl; - /* 0x40 */ - __le32 phyd_pipe0; - __le32 phyd_pipe1; - __le32 phyd_mix4; - __le32 phyd_ckgen0; - /* 0x50 */ - __le32 phyd_mix5; - __le32 phyd_reserved; - __le32 phyd_cdr0; - __le32 phyd_cdr1; - /* 0x60 */ - __le32 phyd_pll_0; - __le32 phyd_pll_1; - __le32 phyd_bcn_det_1; - __le32 phyd_bcn_det_2; - /* 0x70 */ - __le32 eq0; - __le32 eq1; - __le32 eq2; - __le32 eq3; - /* 0x80 */ - __le32 eq_eye0; - __le32 eq_eye1; - __le32 eq_eye2; - __le32 eq_dfe0; - /* 0x90 */ - __le32 eq_dfe1; - __le32 eq_dfe2; - __le32 eq_dfe3; - __le32 reserve0; - /* 0xa0 */ - __le32 phyd_mon0; - __le32 phyd_mon1; - __le32 phyd_mon2; - __le32 phyd_mon3; - /* 0xb0 */ - __le32 phyd_mon4; - __le32 phyd_mon5; - __le32 phyd_mon6; - __le32 phyd_mon7; - /* 0xc0 */ - __le32 phya_rx_mon0; - __le32 phya_rx_mon1; - __le32 phya_rx_mon2; - __le32 phya_rx_mon3; - /* 0xd0 */ - __le32 phya_rx_mon4; - __le32 phya_rx_mon5; - __le32 phyd_cppat2; - __le32 eq_eye3; - /* 0xe0 */ - __le32 kband_out; - __le32 kband_out1; -}; - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TSEQ_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TSEQ_POLEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TSEQ_POL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_P3_PCLK_NG (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TSEQ_TH (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PRBS_BERTH (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_PRBS_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_BPSLOCK (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RTCOMCNT (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_COMCNT (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PRBSEL_CALIB (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PRBSEL_PCS (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_TXLFPS_PRD (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_P_RX_P0S_CK (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P_TX_P0S_CK (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PDNCTL (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_DRV_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TX_DRV_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TX_DRV_DLY (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_BERT_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_SCP_TH (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_SCP_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXANSIDEC_TEST (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_LFPS_PWD (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXLFPS_OVF (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_P3_ENTRY_SEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P3_ENTRY (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_RXLFPS_CDRSEL (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_RXLFPS_CDRTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LOCK5G_BLOCK (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_LOB (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_TXLFPS_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TXLFPS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RXLFPS_UPB (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_TX_IMP_BIAS (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_FWAKE_TH (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_P1_ENTRY_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_P1_ENTRY (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_UDF (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_TXPLL_ON (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_TXPLLON (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_TXPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_NCPO_CHG (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RSTB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_PWDB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDSEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_AUTOK_VCO (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_PWD (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_AFE_PWD (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_TCADJ (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PLL_PWD (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FLT_1_DISPERR_B (0x1<<2) /* 2:2 */ - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TX_LFPS (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXPLL_STB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXPLL_STB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_RXPLL_STB (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TXPLL_STB (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RXPLL_REFCKSEL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXPLL_STBMODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RXPLL_ON (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_FORCE_RXPLLON (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_AUTOK_VCO (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_PWD (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_CDR_TCADJ (0x3f<<0) /* 5:0 */ - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET (0xffff<<16)/* 31:16 */ -#define A60810_RG_SSUSB_RX_FL_CYCLECNT (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_EQ_RST_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXVAL_RST (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXVAL_CNT (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDROS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_LCKOP (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_RX_FL_LOCKTH (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_RX_FL_OFFSET (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_T2RLB_PAT (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_T2RLB_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_T2RLB_SERIAL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_T2RLB_MODE (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_RX_DFE_OPTION (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DFE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_DFE_EN_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_EQ_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RX_EQ_EN_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_RX_DFE_RST (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RX_DFE_RST_SEL (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PRB_OUT_CPPAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_BPANSIENC (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_VALID_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_EBUF_SRST (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_K_EMP (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_K_FUL (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_T2RLB_BDATRST (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PATMODE (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_T2RLB_TSEQCNT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CPPAT_TOZ (0x3<<21) /* 22:21 */ -#define A60810_RG_SSUSB_CPPAT_PRBS_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_CDROS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_PLL_SSCEN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_PI_PWD (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CDR_PI_MODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXEQTRAINING (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXPOLARITY (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_TXDEEMPH (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_POWERDOWN (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_TXONESZEROS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_TXELECIDLE (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_TXDETECTRX (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_PIPE_SEL (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_TXDATAK (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CDR_STABLE_SEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_STABLE (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CDR_RSTB_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_RSTB (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P_TXBCN_DIS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_ERROR_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_TXMARGIN (0x7<<1) /* 3:1 */ -#define A60810_RG_SSUSB_TXCOMPLIANCE (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_T2RLB_BER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_T2RLB_BER_RATE (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TFIFO_PSEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CKGEN_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_RXCK_INV (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RXPLL_STBCYC (0x7ff<<0) /* 10:0 */ - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_CDR_BC_LTD1 (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1 (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDR_BIR_LTR (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BW_SEL (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_EQ_T_SEL (0x3ff<<15)/* 24:15 */ -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC (0x3ff<<5)/* 14:5 */ -#define A60810_RG_SSUSB_PLLBAND_RECAL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_U_BCN_OBS_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL (0xfff<<16) /* 27:16 */ -#define A60810_RG_SSUSB_BCN_DET_DIS (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_U_BCN_OBS_SEL (0xfff<<0) /* 11:0 */ - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHL_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DE0OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DE1OS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_STOPTIME (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL (0x7<<11) /* 13:11 */ -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_STARTTIME (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL (0x7<<0) /* 2:0 */ - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2 (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_TH (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET (0x7f<<25) /* 31:25 */ -#define A60810_RG_SSUSB_EQ_EYE_MON_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_EQ_EYE0_Y (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_EYE1_Y (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PILPO_ROUT (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_PI_KPGAIN (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN (0x1<<3) /* 3:3 */ - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_EYE_MASK (0x3ff<<7) /* 16:7 */ - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_EQ_SD_CNT1 (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_EQ_SD_CNT0 (0x3f<<16) /* 21:16 */ - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DFEX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_CHK_EYE_H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EQ_PIEYE_INI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_PI90_INI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PI0_INI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR (0x7<<12) /* 14:12 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_DFEX_RST (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_GATED_RXD_B (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_EQ_PI90CK_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_DFEX_DIS (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL (0x1<<0) /* 0:0 */ - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_EQ_DFE_TOG (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO (0x3<<0) /* 1:0 */ - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_LFPS (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_TRAINDEC (0x7<<8) /* 10:8 */ -#define A60810_RGS_SSUSB_SCP_PAT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RETRACK (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_RXPLL_LOCK (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PDNCTL (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_PRBS_ERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_SCP_DETCNT (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_TSEQ_DETCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_BERT_LOCK (0x1<<15) /* 15:15 */ -#define A60810_RGS_SSUSB_SCP_DET (0x1<<14) /* 14:14 */ -#define A60810_RGS_SSUSB_TSEQ_DET (0x1<<13) /* 13:13 */ -#define A60810_RGS_SSUSB_EBUF_UDF (0x1<<12) /* 12:12 */ -#define A60810_RGS_SSUSB_EBUF_OVF (0x1<<11) /* 11:11 */ -#define A60810_RGS_SSUSB_PRBS_PASSTH (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_PRBS_PASS (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PRBS_LOCK (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_T2RLB_ERR (0x1<<6) /* 6:6 */ -#define A60810_RGS_SSUSB_T2RLB_PASSTH (0x1<<5) /* 5:5 */ -#define A60810_RGS_SSUSB_T2RLB_PASS (0x1<<4) /* 4:4 */ -#define A60810_RGS_SSUSB_T2RLB_LOCK (0x1<<3) /* 3:3 */ -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE (0x1<<2) /* 2:2 */ -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE (0x1<<1) /* 1:1 */ -#define A60810_RGS_SSUSB_RXDETECTED (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE (0x1<<30) /* 30:30 */ -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT (0x1<<29) /* 29:29 */ -#define A60810_RGS_SSUSB_SIGCAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RGS_SSUSB_RX_IMP_SEL (0x1f<<16) /* 20:16 */ -#define A60810_RGS_SSUSB_TX_IMP_SEL (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_TFIFO_MSG (0xf<<4) /* 7:4 */ -#define A60810_RGS_SSUSB_RFIFO_MSG (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PRB_OUT (0xff<<0) /* 7:0 */ - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_EQ_DCD0H (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCD0L (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCD1H (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_DCE0 (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCE1 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCHHL (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP (0x1<<31) /* 31:31 */ -#define A60810_RGS_SSUSB_EQ_DCLHL (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_STATUS (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_EQ_DCEYE0 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCEYE1 (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY (0x1<<7) /* 7:7 */ -#define A60810_RGS_SSUSB_EQ_PILPO (0x7f<<0) /* 6:0 */ - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT (0xfffff<<0) /* 19:0 */ - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RGS_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL (0x1<<24) /* 24:24 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG_OFST (31) -#define A60810_RG_SSUSB_TSEQ_EN_OFST (30) -#define A60810_RG_SSUSB_TSEQ_POLEN_OFST (29) -#define A60810_RG_SSUSB_TSEQ_POL_OFST (28) -#define A60810_RG_SSUSB_P_P3_PCLK_NG_OFST (27) -#define A60810_RG_SSUSB_TSEQ_TH_OFST (24) -#define A60810_RG_SSUSB_PRBS_BERTH_OFST (16) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON_OFST (15) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF_OFST (14) -#define A60810_RG_SSUSB_PRBS_EN_OFST (13) -#define A60810_RG_SSUSB_BPSLOCK_OFST (12) -#define A60810_RG_SSUSB_RTCOMCNT_OFST (8) -#define A60810_RG_SSUSB_COMCNT_OFST (4) -#define A60810_RG_SSUSB_PRBSEL_CALIB_OFST (0) - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN_OFST (31) -#define A60810_RG_SSUSB_PRBSEL_PCS_OFST (28) -#define A60810_RG_SSUSB_TXLFPS_PRD_OFST (24) -#define A60810_RG_SSUSB_P_RX_P0S_CK_OFST (23) -#define A60810_RG_SSUSB_P_TX_P0S_CK_OFST (22) -#define A60810_RG_SSUSB_PDNCTL_OFST (16) -#define A60810_RG_SSUSB_TX_DRV_EN_OFST (15) -#define A60810_RG_SSUSB_TX_DRV_SEL_OFST (14) -#define A60810_RG_SSUSB_TX_DRV_DLY_OFST (8) -#define A60810_RG_SSUSB_BERT_EN_OFST (7) -#define A60810_RG_SSUSB_SCP_TH_OFST (4) -#define A60810_RG_SSUSB_SCP_EN_OFST (3) -#define A60810_RG_SSUSB_RXANSIDEC_TEST_OFST (0) - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD_OFST (30) -#define A60810_RG_SSUSB_FORCE_LFPS_PWD_OFST (29) -#define A60810_RG_SSUSB_RXLFPS_OVF_OFST (24) -#define A60810_RG_SSUSB_P3_ENTRY_SEL_OFST (23) -#define A60810_RG_SSUSB_P3_ENTRY_OFST (22) -#define A60810_RG_SSUSB_RXLFPS_CDRSEL_OFST (20) -#define A60810_RG_SSUSB_RXLFPS_CDRTH_OFST (16) -#define A60810_RG_SSUSB_LOCK5G_BLOCK_OFST (15) -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL_OFST (14) -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_LOB_OFST (8) -#define A60810_RG_SSUSB_TXLFPS_EN_OFST (7) -#define A60810_RG_SSUSB_TXLFPS_SEL_OFST (6) -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK_OFST (5) -#define A60810_RG_SSUSB_RXLFPS_UPB_OFST (0) - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS_OFST (28) -#define A60810_RG_SSUSB_TX_IMP_BIAS_OFST (24) -#define A60810_RG_SSUSB_FWAKE_TH_OFST (16) -#define A60810_RG_SSUSB_P1_ENTRY_SEL_OFST (14) -#define A60810_RG_SSUSB_P1_ENTRY_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_UDF_OFST (8) -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH_OFST (0) - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_TX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_TX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_RX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_RX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_TXPLL_ON_OFST (26) -#define A60810_RG_SSUSB_FORCE_TXPLLON_OFST (25) -#define A60810_RG_SSUSB_TXPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC_OFST (10) -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN_OFST (31) -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN_OFST (30) -#define A60810_RG_SSUSB_PLL_NCPO_CHG_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RSTB_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_PWDB_OFST (26) -#define A60810_RG_SSUSB_PLL_DDSEN_OFST (25) -#define A60810_RG_SSUSB_PLL_AUTOK_VCO_OFST (24) -#define A60810_RG_SSUSB_PLL_PWD_OFST (23) -#define A60810_RG_SSUSB_RX_AFE_PWD_OFST (22) -#define A60810_RG_SSUSB_PLL_TCADJ_OFST (16) -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ_OFST (15) -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PWD_OFST (13) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN_OFST (12) -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN_OFST (11) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG_OFST (9) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB_OFST (8) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB_OFST (7) -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN_OFST (6) -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ_OFST (5) -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO_OFST (4) -#define A60810_RG_SSUSB_FORCE_PLL_PWD_OFST (3) -#define A60810_RG_SSUSB_FLT_1_DISPERR_B_OFST (2) - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN_OFST (31) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN_OFST (30) -#define A60810_RG_SSUSB_TX_LFPS_OFST (29) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_OFST (28) -#define A60810_RG_SSUSB_RXPLL_STB_OFST (27) -#define A60810_RG_SSUSB_TXPLL_STB_OFST (26) -#define A60810_RG_SSUSB_FORCE_RXPLL_STB_OFST (25) -#define A60810_RG_SSUSB_FORCE_TXPLL_STB_OFST (24) -#define A60810_RG_SSUSB_RXPLL_REFCKSEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBMODE_OFST (11) -#define A60810_RG_SSUSB_RXPLL_ON_OFST (10) -#define A60810_RG_SSUSB_FORCE_RXPLLON_OFST (9) -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD_OFST (8) -#define A60810_RG_SSUSB_CDR_AUTOK_VCO_OFST (7) -#define A60810_RG_SSUSB_CDR_PWD_OFST (6) -#define A60810_RG_SSUSB_CDR_TCADJ_OFST (0) - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET_OFST (16) -#define A60810_RG_SSUSB_RX_FL_CYCLECNT_OFST (0) - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST_OFST (31) -#define A60810_RG_SSUSB_RX_EQ_RST_SEL_OFST (30) -#define A60810_RG_SSUSB_RXVAL_RST_OFST (29) -#define A60810_RG_SSUSB_RXVAL_CNT_OFST (24) -#define A60810_RG_SSUSB_CDROS_EN_OFST (18) -#define A60810_RG_SSUSB_CDR_LCKOP_OFST (16) -#define A60810_RG_SSUSB_RX_FL_LOCKTH_OFST (8) -#define A60810_RG_SSUSB_RX_FL_OFFSET_OFST (0) - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH_OFST (24) -#define A60810_RG_SSUSB_T2RLB_PAT_OFST (16) -#define A60810_RG_SSUSB_T2RLB_EN_OFST (15) -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB_OFST (14) -#define A60810_RG_SSUSB_T2RLB_SERIAL_OFST (13) -#define A60810_RG_SSUSB_T2RLB_MODE_OFST (11) -#define A60810_RG_SSUSB_RX_SAOSC_EN_OFST (10) -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL_OFST (9) -#define A60810_RG_SSUSB_RX_DFE_OPTION_OFST (8) -#define A60810_RG_SSUSB_RX_DFE_EN_OFST (7) -#define A60810_RG_SSUSB_RX_DFE_EN_SEL_OFST (6) -#define A60810_RG_SSUSB_RX_EQ_EN_OFST (5) -#define A60810_RG_SSUSB_RX_EQ_EN_SEL_OFST (4) -#define A60810_RG_SSUSB_RX_SAOSC_RST_OFST (3) -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL_OFST (2) -#define A60810_RG_SSUSB_RX_DFE_RST_OFST (1) -#define A60810_RG_SSUSB_RX_DFE_RST_SEL_OFST (0) - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE_OFST (28) -#define A60810_RG_SSUSB_PRB_OUT_CPPAT_OFST (27) -#define A60810_RG_SSUSB_BPANSIENC_OFST (26) -#define A60810_RG_SSUSB_VALID_EN_OFST (25) -#define A60810_RG_SSUSB_EBUF_SRST_OFST (24) -#define A60810_RG_SSUSB_K_EMP_OFST (20) -#define A60810_RG_SSUSB_K_FUL_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BDATRST_OFST (12) -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PATMODE_OFST (8) -#define A60810_RG_SSUSB_T2RLB_TSEQCNT_OFST (0) - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN_OFST (24) -#define A60810_RG_SSUSB_CPPAT_TOZ_OFST (21) -#define A60810_RG_SSUSB_CPPAT_PRBS_EN_OFST (20) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0_OFST (0) - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS_OFST (31) -#define A60810_RG_SSUSB_P_CDROS_EN_OFST (30) -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS_OFST (28) -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET_OFST (24) -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN_OFST (20) -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET_OFST (16) -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN_OFST (15) -#define A60810_RG_SSUSB_PLL_SSCEN_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD_OFST (13) -#define A60810_RG_SSUSB_CDR_PI_PWD_OFST (12) -#define A60810_RG_SSUSB_CDR_PI_MODE_OFST (11) -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC_OFST (0) - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL_OFST (0) - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION_OFST (30) -#define A60810_RG_SSUSB_RXEQTRAINING_OFST (29) -#define A60810_RG_SSUSB_RXPOLARITY_OFST (28) -#define A60810_RG_SSUSB_TXDEEMPH_OFST (26) -#define A60810_RG_SSUSB_POWERDOWN_OFST (24) -#define A60810_RG_SSUSB_TXONESZEROS_OFST (23) -#define A60810_RG_SSUSB_TXELECIDLE_OFST (22) -#define A60810_RG_SSUSB_TXDETECTRX_OFST (21) -#define A60810_RG_SSUSB_PIPE_SEL_OFST (20) -#define A60810_RG_SSUSB_TXDATAK_OFST (16) -#define A60810_RG_SSUSB_CDR_STABLE_SEL_OFST (15) -#define A60810_RG_SSUSB_CDR_STABLE_OFST (14) -#define A60810_RG_SSUSB_CDR_RSTB_SEL_OFST (13) -#define A60810_RG_SSUSB_CDR_RSTB_OFST (12) -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN_OFST (11) -#define A60810_RG_SSUSB_P_TXBCN_DIS_OFST (6) -#define A60810_RG_SSUSB_P_ERROR_SEL_OFST (4) -#define A60810_RG_SSUSB_TXMARGIN_OFST (1) -#define A60810_RG_SSUSB_TXCOMPLIANCE_OFST (0) - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA_OFST (0) - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT_OFST (24) -#define A60810_RG_SSUSB_T2RLB_BER_EN_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BER_RATE_OFST (0) - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT_OFST (27) -#define A60810_RG_SSUSB_TFIFO_PSEL_OFST (24) -#define A60810_RG_SSUSB_CKGEN_PSEL_OFST (8) -#define A60810_RG_SSUSB_RXCK_INV_OFST (0) - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBCYC_OFST (0) - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE_OFST (0) - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_CDR_BC_LTD0_OFST (0) - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_CDR_BW_SEL_OFST (6) -#define A60810_RG_SSUSB_CDR_BIC_LTD1_OFST (0) - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G_OFST (28) -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G_OFST (27) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G_OFST (26) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G_OFST (25) -#define A60810_RG_SSUSB_P_EQ_T_SEL_OFST (15) -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC_OFST (5) -#define A60810_RG_SSUSB_PLLBAND_RECAL_OFST (4) -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN_OFST (3) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN_OFST (2) -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON_OFST (0) - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RG_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RG_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RG_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD_OFST (16) -#define A60810_RG_SSUSB_U_BCN_OBS_PRD_OFST (0) - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL_OFST (16) -#define A60810_RG_SSUSB_BCN_DET_DIS_OFST (12) -#define A60810_RG_SSUSB_U_BCN_OBS_SEL_OFST (0) - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHL_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI_OFST (0) - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DE0OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DE1OS_LFI_OFST (0) - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_STOPTIME_OFST (14) -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL_OFST (11) -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL_OFST (8) -#define A60810_RG_SSUSB_EQ_STARTTIME_OFST (6) -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL_OFST (3) -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL_OFST (0) - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2_OFST (28) -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1_OFST (24) -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_TRI_DET_EN_OFST (7) -#define A60810_RG_SSUSB_EQ_TRI_DET_TH_OFST (0) - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET_OFST (25) -#define A60810_RG_SSUSB_EQ_EYE_MON_EN_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE0_Y_OFST (16) -#define A60810_RG_SSUSB_EQ_EYE1_Y_OFST (8) -#define A60810_RG_SSUSB_EQ_PILPO_ROUT_OFST (7) -#define A60810_RG_SSUSB_EQ_PI_KPGAIN_OFST (4) -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN_OFST (3) - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_MASK_OFST (7) - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL_OFST (31) -#define A60810_RG_SSUSB_EQ_SD_CNT1_OFST (24) -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL_OFST (22) -#define A60810_RG_SSUSB_EQ_SD_CNT0_OFST (16) - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX_OFST (28) -#define A60810_RG_SSUSB_EQ_DFEX_EN_OFST (27) -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_CHK_EYE_H_OFST (23) -#define A60810_RG_SSUSB_EQ_PIEYE_INI_OFST (16) -#define A60810_RG_SSUSB_EQ_PI90_INI_OFST (8) -#define A60810_RG_SSUSB_EQ_PI0_INI_OFST (0) - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV_OFST (16) -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR_OFST (12) -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR_OFST (8) -#define A60810_RG_SSUSB_EQ_DFEX_RST_OFST (7) -#define A60810_RG_SSUSB_EQ_GATED_RXD_B_OFST (6) -#define A60810_RG_SSUSB_EQ_PI90CK_SEL_OFST (4) -#define A60810_RG_SSUSB_EQ_DFEX_DIS_OFST (2) -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS_OFST (1) -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL_OFST (0) - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT_OFST (16) -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DFE_TOG_OFST (2) -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO_OFST (0) - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED_OFST (0) - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC_OFST (16) -#define A60810_RGS_SSUSB_LFPS_OFST (12) -#define A60810_RGS_SSUSB_TRAINDEC_OFST (8) -#define A60810_RGS_SSUSB_SCP_PAT_OFST (0) - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT_OFST (0) - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_RETRACK_OFST (12) -#define A60810_RGS_SSUSB_RXPLL_LOCK_OFST (10) -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D_OFST (9) -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D_OFST (8) -#define A60810_RGS_SSUSB_PDNCTL_OFST (0) - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_PRBS_ERRCNT_OFST (0) - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT_OFST (24) -#define A60810_RGS_SSUSB_SCP_DETCNT_OFST (16) -#define A60810_RGS_SSUSB_TSEQ_DETCNT_OFST (0) - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG_OFST (16) -#define A60810_RGS_SSUSB_BERT_LOCK_OFST (15) -#define A60810_RGS_SSUSB_SCP_DET_OFST (14) -#define A60810_RGS_SSUSB_TSEQ_DET_OFST (13) -#define A60810_RGS_SSUSB_EBUF_UDF_OFST (12) -#define A60810_RGS_SSUSB_EBUF_OVF_OFST (11) -#define A60810_RGS_SSUSB_PRBS_PASSTH_OFST (10) -#define A60810_RGS_SSUSB_PRBS_PASS_OFST (9) -#define A60810_RGS_SSUSB_PRBS_LOCK_OFST (8) -#define A60810_RGS_SSUSB_T2RLB_ERR_OFST (6) -#define A60810_RGS_SSUSB_T2RLB_PASSTH_OFST (5) -#define A60810_RGS_SSUSB_T2RLB_PASS_OFST (4) -#define A60810_RGS_SSUSB_T2RLB_LOCK_OFST (3) -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE_OFST (2) -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE_OFST (1) -#define A60810_RGS_SSUSB_RXDETECTED_OFST (0) - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE_OFST (30) -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT_OFST (29) -#define A60810_RGS_SSUSB_SIGCAL_OFFSET_OFST (24) -#define A60810_RGS_SSUSB_RX_IMP_SEL_OFST (16) -#define A60810_RGS_SSUSB_TX_IMP_SEL_OFST (8) -#define A60810_RGS_SSUSB_TFIFO_MSG_OFST (4) -#define A60810_RGS_SSUSB_RFIFO_MSG_OFST (0) - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT_OFST (8) -#define A60810_RGS_SSUSB_PRB_OUT_OFST (0) - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCD0H_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCD0L_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCD1H_OFST (0) - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCE0_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCE1_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCHHL_OFST (0) - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP_OFST (31) -#define A60810_RGS_SSUSB_EQ_DCLHL_OFST (24) -#define A60810_RGS_SSUSB_EQ_STATUS_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCEYE0_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCEYE1_OFST (0) - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0_OFST (0) - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1_OFST (0) - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS_OFST (8) -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY_OFST (7) -#define A60810_RGS_SSUSB_EQ_PILPO_OFST (0) - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0_OFST (0) - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_CNT_OFST (0) - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RGS_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RGS_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RGS_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL_OFST (24) -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE_OFST (16) -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phyd_bank2_reg_a { - /* 0x0 */ - __le32 b2_phyd_top1; - __le32 b2_phyd_top2; - __le32 b2_phyd_top3; - __le32 b2_phyd_top4; - /* 0x10 */ - __le32 b2_phyd_top5; - __le32 b2_phyd_top6; - __le32 b2_phyd_top7; - __le32 b2_phyd_p_sigdet1; - /* 0x20 */ - __le32 b2_phyd_p_sigdet2; - __le32 b2_phyd_p_sigdet_cal1; - __le32 b2_phyd_rxdet1; - __le32 b2_phyd_rxdet2; - /* 0x30 */ - __le32 b2_phyd_misc0; - __le32 b2_phyd_misc2; - __le32 b2_phyd_misc3; - __le32 b2_phyd_l1ss; - /* 0x40 */ - __le32 b2_rosc_0; - __le32 b2_rosc_1; - __le32 b2_rosc_2; - __le32 b2_rosc_3; - /* 0x50 */ - __le32 b2_rosc_4; - __le32 b2_rosc_5; - __le32 b2_rosc_6; - __le32 b2_rosc_7; - /* 0x60 */ - __le32 b2_rosc_8; - __le32 b2_rosc_9; - __le32 b2_rosc_a; - __le32 reserve1; - /* 0x70~0xd0 */ - __le32 reserve2[28]; - /* 0xe0 */ - __le32 phyd_version; - __le32 phyd_model; -}; - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_PCIE2_K_FUL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_SIGDET_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CLKRX_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_CLKRX_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CLKTX_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_CLKTX_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CLK_REQ_N_I (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RATE (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_RATE (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_PCIE_MODE_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_PHY_MODE (0x3<<1) /* 2:1 */ -#define A60810_RG_SSUSB_FORCE_PHY_MODE (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_6DB (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_IDEM_3P5DB (0x3f<<16) /* 21:16 */ -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_IDRV_3P5DB (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_FORCE_IDRV_0DB (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_IDRV_0DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI (0x7<<25) /* 27:25 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TX_BIASI_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_IDEM_6DB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_IDEM_6DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL (0x7f<<0) /* 6:0 */ - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL (0x3<<0) /* 1:0 */ - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_P_SIGDET_REK (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_CMDET (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXDET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_RXDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXDET_K_TWICE (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET (0x1ff<<18) /* 26:18 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB1_SET (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_PDN_T_SEL (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3 (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3 (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC (0x3f<<26) /* 31:26 */ -#define A60810_RG_SSUSB_TX_SER_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TX_SER_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TXPLL_REFCKSEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LFPS_PSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P3_CLS_CK_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PPCTL_PSEL (0x7<<5) /* 7:5 */ -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_BERTLB_PSEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_RETRACK_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_PPERRCNT_CLR (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2 (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ (0xf<<27) /* 30:27 */ -#define A60810_RG_SSUSB_P_SIGDET_125FILTER (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EIDLE_BF_RXDET (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC (0x1ff<<13) /* 21:13 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY (0x3f<<7) /* 12:7 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY (0x3f<<1) /* 6:1 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE (0x7<<16) /* 18:16 */ -#define A60810_RGS_SSUSB_PPERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1 (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_L1SS_REV0 (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_PLL_REK_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_TXDRV_MASKDLY (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RXSTS_VAL (0x1<<7) /* 7:7 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT (0x1<<4) /* 4:4 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXPLL_STB_PX0 (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_L1SS_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_FORCE_L1SS_EN (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND (0x1ff<<23) /* 31:23 */ -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_RING_OSC_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_BYPASS_DET (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RING_OSC_P3 (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_RING_OSC_RECAL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RING_OSC_SEL (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_ROSC_PROB_SEL (0xf<<2) /* 5:2 */ -#define A60810_RG_SSUSB_RING_FREQMETER_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RING_OSC_STATE (0x3<<10) /* 11:10 */ -#define A60810_RGS_SSUSB_RING_OSC_STABLE (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL (0xff<<0) /* 7:0 */ - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT (0xff<<0)/* 7:0 */ - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL (0xffffffff<<0)/* 31:0 */ - -/* OFFSET */ - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP_OFST (28) -#define A60810_RG_SSUSB_PCIE2_K_FUL_OFST (24) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_OFST (17) -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN_OFST (16) -#define A60810_RG_SSUSB_SIGDET_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_CLKRX_EN_OFST (13) -#define A60810_RG_SSUSB_FORCE_CLKRX_EN_OFST (12) -#define A60810_RG_SSUSB_CLKTX_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_CLKTX_EN_OFST (10) -#define A60810_RG_SSUSB_CLK_REQ_N_I_OFST (9) -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I_OFST (8) -#define A60810_RG_SSUSB_RATE_OFST (6) -#define A60810_RG_SSUSB_FORCE_RATE_OFST (5) -#define A60810_RG_SSUSB_PCIE_MODE_SEL_OFST (4) -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL_OFST (3) -#define A60810_RG_SSUSB_PHY_MODE_OFST (1) -#define A60810_RG_SSUSB_FORCE_PHY_MODE_OFST (0) - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB_OFST (30) -#define A60810_RG_SSUSB_IDRV_6DB_OFST (24) -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB_OFST (22) -#define A60810_RG_SSUSB_IDEM_3P5DB_OFST (16) -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB_OFST (14) -#define A60810_RG_SSUSB_IDRV_3P5DB_OFST (8) -#define A60810_RG_SSUSB_FORCE_IDRV_0DB_OFST (6) -#define A60810_RG_SSUSB_IDRV_0DB_OFST (0) - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN_OFST (24) -#define A60810_RG_SSUSB_TX_BIASI_EN_OFST (16) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_OFST (13) -#define A60810_RG_SSUSB_FORCE_IDEM_6DB_OFST (8) -#define A60810_RG_SSUSB_IDEM_6DB_OFST (0) - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G1_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G2_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS_OFST (31) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL_OFST (28) -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL_OFST (10) -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS_OFST (6) -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD_OFST (5) -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ_OFST (4) -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET_OFST (24) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN_OFST (8) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN_OFST (3) -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD_OFST (1) -#define A60810_RG_SSUSB_P_SIGDET_REK_OFST (0) - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL_OFST (31) -#define A60810_RG_SSUSB_FORCE_CMDET_OFST (30) -#define A60810_RG_SSUSB_RXDET_EN_OFST (29) -#define A60810_RG_SSUSB_FORCE_RXDET_EN_OFST (28) -#define A60810_RG_SSUSB_RXDET_K_TWICE_OFST (27) -#define A60810_RG_SSUSB_RXDET_STB3_SET_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB2_SET_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB1_SET_OFST (0) - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN_OFST (31) -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN_OFST (30) -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN_OFST (29) -#define A60810_RG_SSUSB_LCK2REF_EXT_EN_OFST (28) -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL_OFST (24) -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL_OFST (20) -#define A60810_RG_SSUSB_PDN_T_SEL_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3_OFST (0) - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC_OFST (26) -#define A60810_RG_SSUSB_TX_SER_EN_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_SER_EN_OFST (24) -#define A60810_RG_SSUSB_TXPLL_REFCKSEL_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN_OFST (22) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN_OFST (21) -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV_OFST (20) -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH_OFST (16) -#define A60810_RG_SSUSB_LFPS_PSEL_OFST (15) -#define A60810_RG_SSUSB_RX_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL_OFST (13) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_OFST (12) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL_OFST (11) -#define A60810_RG_SSUSB_P3_CLS_CK_SEL_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PSEL_OFST (8) -#define A60810_RG_SSUSB_PPCTL_PSEL_OFST (5) -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV_OFST (4) -#define A60810_RG_SSUSB_BERTLB_PSEL_OFST (2) -#define A60810_RG_SSUSB_RETRACK_DIS_OFST (1) -#define A60810_RG_SSUSB_PPERRCNT_CLR_OFST (0) - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2_OFST (31) -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_125FILTER_OFST (26) -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW_OFST (23) -#define A60810_RG_SSUSB_EIDLE_BF_RXDET_OFST (22) -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC_OFST (13) -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY_OFST (7) -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY_OFST (1) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV_OFST (0) - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE_OFST (16) -#define A60810_RGS_SSUSB_PPERRCNT_OFST (0) - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1_OFST (24) -#define A60810_RG_SSUSB_L1SS_REV0_OFST (16) -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS_OFST (11) -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS_OFST (10) -#define A60810_RG_SSUSB_P_PLL_REK_SEL_OFST (9) -#define A60810_RG_SSUSB_TXDRV_MASKDLY_OFST (8) -#define A60810_RG_SSUSB_RXSTS_VAL_OFST (7) -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN_OFST (6) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN_OFST (5) -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT_OFST (4) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT_OFST (3) -#define A60810_RG_SSUSB_RXPLL_STB_PX0_OFST (2) -#define A60810_RG_PCIE_L1SS_EN_OFST (1) -#define A60810_RG_PCIE_FORCE_L1SS_EN_OFST (0) - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND_OFST (23) -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_EN_OFST (3) -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN_OFST (2) -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET_OFST (1) -#define A60810_RG_SSUSB_RING_BYPASS_DET_OFST (0) - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3_OFST (20) -#define A60810_RG_SSUSB_RING_OSC_P3_OFST (19) -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL_OFST (17) -#define A60810_RG_SSUSB_RING_OSC_RECAL_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_SEL_OFST (8) -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL_OFST (0) - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC1_OFST (0) - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC3_OFST (0) - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_DETWIN2_OFST (0) - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND1_OFST (0) - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND2_OFST (0) - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND3_OFST (0) - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE_OFST (16) -#define A60810_RG_SSUSB_ROSC_PROB_SEL_OFST (2) -#define A60810_RG_SSUSB_RING_FREQMETER_EN_OFST (1) -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND_OFST (0) - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT_OFST (16) -#define A60810_RGS_SSUSB_RING_OSC_STATE_OFST (10) -#define A60810_RGS_SSUSB_RING_OSC_STABLE_OFST (9) -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_RING_OSC_CAL_OFST (0) - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT_OFST (0) - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION_OFST (0) - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct sifslv_chip_reg_a { - /* 0x0 */ - __le32 gpio_ctla; - __le32 gpio_ctlb; - __le32 gpio_ctlc; -}; - -/* //////////////////////////////////////////////////////////////////////// */ - -struct sifslv_fm_reg_a { - /* 0x0 */ - __le32 fmcr0; - __le32 fmcr1; - __le32 fmcr2; - __le32 fmmonr0; - /* 0X10 */ - __le32 fmmonr1; -}; - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH (0xf<<28)/* 31:28 */ -#define A60810_RG_MONCLK_SEL (0x3<<26)/* 27:26 */ -#define A60810_RG_FM_MODE (0x1<<25)/* 25:25 */ -#define A60810_RG_FREQDET_EN (0x1<<24)/* 24:24 */ -#define A60810_RG_CYCLECNT (0xffffff<<0)/* 23:0 */ - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2 (0x1<<9)/* 9:9 */ -#define A60810_RG_FRCK_EN (0x1<<8)/* 8:8 */ -#define A60810_USBPLL_LOCK (0x1<<1)/* 1:1 */ -#define A60810_USB_FM_VLD (0x1<<0)/* 0:0 */ - -/* OFFSET */ - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH_OFST (28) -#define A60810_RG_MONCLK_SEL_OFST (26) -#define A60810_RG_FM_MODE_OFST (25) -#define A60810_RG_FREQDET_EN_OFST (24) -#define A60810_RG_CYCLECNT_OFST (0) - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET_OFST (0) - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET_OFST (0) - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT_OFST (0) - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2_OFST (9) -#define A60810_RG_FRCK_EN_OFST (8) -#define A60810_USBPLL_LOCK_OFST (1) -#define A60810_USB_FM_VLD_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct spllc_reg_a { - /* 0x0 */ - __le32 u3d_syspll_0; - __le32 u3d_syspll_1; - __le32 u3d_syspll_2; - __le32 u3d_syspll_sdm; - /* 0x10 */ - __le32 u3d_xtalctl_1; - __le32 u3d_xtalctl_2; - __le32 u3d_xtalctl3; -}; - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC (0x3<<25)/* 26:25 */ -#define A60810_RG_SSUSB_SPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_SYSPLL_ON (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SYSPLLON (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC (0x7<<0)/* 2:0 */ - -/* U3D_SYSPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_SYSPLL_STB (0x1<<23)/* 23:23 */ -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB (0x1<<22)/* 22:22 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN (0x1<<21)/* 21:21 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_PLL_BIAS_PWD (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN (0x1<<14)/* 14:14 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FORCE_SPLL_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_SPLL_NCPO_EN (0x1<<7)/* 7:7 */ -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN (0x1<<6)/* 6:6 */ -#define A60810_RG_SSUSB_SPLL_NCPO_CHG (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_SPLL_DDS_RSTB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWDB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_SPLL_DDSEN (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC (0x3ff<<14)/* 23:14 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN (0x1<<13)/* 13:13 */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC (0x3ff<<2)/* 11:2 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC (0x3fff<<17)/* 30:17 */ -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_XTAL_STBCYC (0x7fff<<0)/* 14:0 */ - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL (0x1<<29)/* 29:29 */ -#define A60810_RG_SSUSB_BG_LPF_DLY (0x3<<27)/* 28:27 */ -#define A60810_RG_SSUSB_BG_LPF_EN (0x1<<26)/* 26:26 */ -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN (0x1<<25)/* 25:25 */ -#define A60810_RG_SSUSB_P3_BIAS_PWD (0x1<<24)/* 24:24 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_EN (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_USB20_BIAS_EN (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_USB20_SLEEP (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_OSC_ONLY (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_OSC_EN (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_XTALBIAS_STB (0x1<<5)/* 5:5 */ -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_BIAS_PWD (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_PWD (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_FORCE_BIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_FORCE_XTAL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_BIASIMR_EN (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_XTAL_RX_PWD (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_CKBG_PROB_SEL (0x3<<6)/* 7:6 */ -#define A60810_RG_SSUSB_XTAL_PROB_SEL (0x3<<4)/* 5:4 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD (0x1<<0)/* 0:0 */ - - -/* SSUSB_SIFSLV_SPLLC FIELD OFFSET DEFINITION */ - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC_OFST (25) -#define A60810_RG_SSUSB_SPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_SYSPLL_ON_OFST (11) -#define A60810_RG_SSUSB_FORCE_SYSPLLON_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_SYA60810_SPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC_OFST (24) -#define A60810_RG_SSUSB_SYSPLL_STB_OFST (23) -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB_OFST (22) -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN_OFST (21) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN_OFST (20) -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON_OFST (19) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON_OFST (18) -#define A60810_RG_SSUSB_PLL_BIAS_PWD_OFST (17) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD_OFST (16) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN_OFST (14) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG_OFST (12) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB_OFST (11) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB_OFST (10) -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN_OFST (9) -#define A60810_RG_SSUSB_FORCE_SPLL_PWD_OFST (8) -#define A60810_RG_SSUSB_SPLL_NCPO_EN_OFST (7) -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN_OFST (6) -#define A60810_RG_SSUSB_SPLL_NCPO_CHG_OFST (4) -#define A60810_RG_SSUSB_SPLL_DDS_RSTB_OFST (3) -#define A60810_RG_SSUSB_SPLL_DDS_PWDB_OFST (2) -#define A60810_RG_SSUSB_SPLL_DDSEN_OFST (1) -#define A60810_RG_SSUSB_SPLL_PWD_OFST (0) - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL_OFST (11) -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC_OFST (0) - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC_OFST (14) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN_OFST (13) -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_OFST (12) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC_OFST (2) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_OFST (0) - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC_OFST (17) -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N_OFST (16) -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N_OFST (15) -#define A60810_RG_SSUSB_XTAL_STBCYC_OFST (0) - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL_OFST (29) -#define A60810_RG_SSUSB_BG_LPF_DLY_OFST (27) -#define A60810_RG_SSUSB_BG_LPF_EN_OFST (26) -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN_OFST (25) -#define A60810_RG_SSUSB_P3_BIAS_PWD_OFST (24) -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT_OFST (20) -#define A60810_RG_SSUSB_PCIE_CLKDET_EN_OFST (19) -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN_OFST (18) -#define A60810_RG_SSUSB_USB20_BIAS_EN_OFST (17) -#define A60810_RG_SSUSB_USB20_SLEEP_OFST (16) -#define A60810_RG_SSUSB_OSC_ONLY_OFST (9) -#define A60810_RG_SSUSB_OSC_EN_OFST (8) -#define A60810_RG_SSUSB_XTALBIAS_STB_OFST (5) -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB_OFST (4) -#define A60810_RG_SSUSB_BIAS_PWD_OFST (3) -#define A60810_RG_SSUSB_XTAL_PWD_OFST (2) -#define A60810_RG_SSUSB_FORCE_BIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_FORCE_XTAL_PWD_OFST (0) - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV_OFST (12) -#define A60810_RG_SSUSB_BIASIMR_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN_OFST (10) -#define A60810_RG_SSUSB_XTAL_RX_PWD_OFST (9) -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD_OFST (8) -#define A60810_RG_SSUSB_CKBG_PROB_SEL_OFST (6) -#define A60810_RG_SSUSB_XTAL_PROB_SEL_OFST (4) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB_OFST (3) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB_OFST (2) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD_OFST (0) - -struct u3phy_info { - struct u2phy_reg_a *u2phy_regs_a; - struct u3phya_reg_a *u3phya_regs_a; - struct u3phya_da_reg_a *u3phya_da_regs_a; - struct u3phyd_reg_a *u3phyd_regs_a; - struct u3phyd_bank2_reg_a *u3phyd_bank2_regs_a; - struct sifslv_chip_reg_a *sifslv_chip_regs_a; - struct spllc_reg_a *spllc_regs_a; - struct sifslv_fm_reg_a *sifslv_fm_regs_a; -}; - -#endif diff --git a/drivers/misc/mediatek/usb20/mt6781/otg.c b/drivers/misc/mediatek/usb20/mt6781/otg.c deleted file mode 100644 index b104fab87b89..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/otg.c +++ /dev/null @@ -1,137 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include "musb_core.h" - -#ifdef CONFIG_MTK_MUSB_CARPLAY_SUPPORT - -struct carplay_dev { - struct usb_interface *intf; - struct usb_device *dev; -}; - -struct carplay_dev *apple_dev; -bool apple; - -int send_switch_cmd(void) -{ - int retval; - - if (apple_dev == NULL) { - DBG(0, "no apple device attach.\n"); - return -1; - } - DBG(0, "before usb_control_msg\n"); - retval = usb_control_msg(apple_dev->dev, - usb_rcvctrlpipe(apple_dev->dev, 0), - 0x51, 0x40, 1, 0, NULL, 0, - USB_CTRL_GET_TIMEOUT); - - DBG(0, "after usb_control_msg retval = %d\n", retval); - - if (retval != 0) { - DBG(0, "%s fail retval = %d\n", __func__, retval); - return -1; - } - - return 0; -} - -static int carplay_probe(struct usb_interface *intf, - const struct usb_device_id *id) -{ - struct usb_device *udev; - struct carplay_dev *car_dev; - - DBG(0, "++ carplay probe ++\n"); - udev = interface_to_usbdev(intf); - - car_dev = kzalloc(sizeof(*car_dev), GFP_KERNEL); - if (!car_dev) - return -ENOMEM; - - usb_set_intfdata(intf, car_dev); - car_dev->dev = udev; - car_dev->intf = intf; - apple_dev = car_dev; - apple = true; - if (car_dev->dev == NULL) - DBG(0, "car_dev->dev error\n"); - - return 0; -} - -static void carplay_disconnect(struct usb_interface *intf) -{ - struct carplay_dev *car_dev = usb_get_intfdata(intf); - - usb_set_intfdata(intf, NULL); - dev_dbg(&intf->dev, "disconnect\n"); - car_dev->dev = NULL; - car_dev->intf = NULL; - kfree(car_dev); - apple_dev = NULL; - apple = false; - DBG(0, "%s.\n", __func__); -} - -static const struct usb_device_id id_table[] = { - - /*-------------------------------------------------------------*/ - - /* EZ-USB devices which download firmware to replace (or in our - * case augment) the default device implementation. - */ - - /* generic EZ-USB FX2 controller (or development board) */ - {USB_DEVICE(0x05ac, 0x12a8), - }, - - /*-------------------------------------------------------------*/ - - {} -}; - -/* MODULE_DEVICE_TABLE(usb, id_table); */ - -static struct usb_driver carplay_driver = { - .name = "carplay", - .id_table = id_table, - .probe = carplay_probe, - .disconnect = carplay_disconnect, -}; - -/*-------------------------------------------------------------------------*/ - -static int __init carplay_init(void) -{ - DBG(0, "%s register carplay_driver\n", __func__); - return usb_register(&carplay_driver); -} -module_init(carplay_init); - -static void __exit carplay_exit(void) -{ - usb_deregister(&carplay_driver); -} -module_exit(carplay_exit); - -MODULE_DESCRIPTION("USB Core/HCD Testing Driver"); -MODULE_LICENSE("GPL"); -#endif diff --git a/drivers/misc/mediatek/usb20/mt6781/phy-mtk-fpga.h b/drivers/misc/mediatek/usb20/mt6781/phy-mtk-fpga.h deleted file mode 100644 index 004a8846fac1..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/phy-mtk-fpga.h +++ /dev/null @@ -1,5983 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - - -#ifndef __MTK_PHY_FPGA__H -#define __MTK_PHY_FPGA__H - -#define U2_SR_COEF_A60810 22 -#define U2_SR_COEF_A60931 22 - -struct u2phy_reg_a { - /* 0x0 */ - __le32 usbphyacr0; - __le32 usbphyacr1; - __le32 usbphyacr2; - __le32 reserve0; - /* 0x10 */ - __le32 usbphyacr4; - __le32 usbphyacr5; - __le32 usbphyacr6; - __le32 u2phyacr3; - /* 0x20 */ - __le32 u2phyacr4; - __le32 u2phyamon0; - __le32 reserve1[2]; - /* 0x30~0x50 */ - __le32 reserve2[12]; - /* 0x60 */ - __le32 u2phydcr0; - __le32 u2phydcr1; - __le32 u2phydtm0; - __le32 u2phydtm1; - /* 0x70 */ - __le32 u2phydmon0; - __le32 u2phydmon1; - __le32 u2phydmon2; - __le32 u2phydmon3; - /* 0x80 */ - __le32 u2phybc12c; - __le32 u2phybc12c1; - __le32 reserve3[2]; - /* 0x90~0xd0 */ - __le32 reserve4[20]; - /* 0xe0 */ - __le32 regfppc; - __le32 reserve5[3]; - /* 0xf0 */ - __le32 versionc; - __le32 reserve6[2]; - __le32 regfcom; -}; - -/* A60810 */ - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL (0x7<<28) /* 30:28 */ -#define A60810_RG_USB20_TX_PH_ROT_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_USB20_PLL_DIVEN (0x7<<20) /* 22:20 */ -#define A60810_RG_USB20_PLL_BR (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_PLL_BP (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_PLL_BLP (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_USBPLL_FORCE_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_PLL_FBDIV (0x7f<<8) /* 14:8 */ -#define A60810_RG_USB20_PLL_PREDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_USB20_INTR_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_REF_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_BGR_DIV (0x3<<2) /* 3:2 */ -#define A60810_RG_SIFSLV_CHP_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SIFSLV_BGR_EN (0x1<<0) /* 0:0 */ - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL (0x1f<<19) /* 23:19 */ -#define A60810_RG_USB20_OTG_VBUSTH (0x7<<16) /* 18:16 */ -#define A60810_RG_USB20_VRT_VREF_SEL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_TERM_VREF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_MPX_SEL (0xff<<0) /* 7:0 */ - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_CLKREF_REV (0xffff<<0) /* 15:0 */ - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_DP_ABIST_SELE (0xf<<24) /* 27:24 */ -#define A60810_RG_USB20_ICUSB_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_LS_CR (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_FS_CR (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_LS_SR (0x7<<4) /* 6:4 */ -#define A60810_RG_USB20_FS_SR (0x7<<0) /* 2:0 */ - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_INIT_SQ_EN_DG (0x3<<26) /* 27:26 */ -#define A60810_RG_USB20_HSTX_TMODE_SEL (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_SQD (0x3<<22) /* 23:22 */ -#define A60810_RG_USB20_DISCD (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_HSTX_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_PHYD_MONEN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_INLPBK_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_CHIRP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HSTX_SRCAL_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_HSTX_SRCTRL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_HS_100U_U3_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_GBIAS_ENB (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_DM_ABIST_SELE (0xf<<0) /* 3:0 */ - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN (0x1 << 31) /* 31:31 */ -#define A60810_RG_USB20_PHY_REV (0xff<<24) /*31:24*/ -#define A60810_RG_USB20_BC11_SW_EN (0x1<<23) /*23:23*/ -#define A60810_RG_USB20_SR_CLK_SEL (0x1<<22) /*22:22*/ -#define A60810_RG_USB20_OTG_VBUSCMP_EN (0x1<<20) /*20:20*/ -#define A60810_RG_USB20_OTG_ABIST_EN (0x1<<19) /*19:19*/ -#define A60810_RG_USB20_OTG_ABIST_SELE (0x7<<16) /*18:16*/ -#define A60810_RG_USB20_HSRX_MMODE_SELE (0x3<<12) /*13:12*/ -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL (0x3<<9) /*10:9*/ -#define A60810_RG_USB20_HSRX_TMODE_EN (0x1<<8) /*8:8*/ -#define A60810_RG_USB20_DISCTH (0xf<<4) /*7:4*/ -#define A60810_RG_USB20_SQTH (0xf<<0) /*3:0*/ - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST (0xf<<28) /* 31:28 */ -#define A60810_RG_USB20_HSTX_BIST_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_USB20_HSTX_I_EN_MODE (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_USB11_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_TMODE_FS_LS_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HS_TERM_EN_MODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_PUPD_BIST_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_EN_PU_DM (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_EN_PD_DM (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_EN_PU_DP (0x1<<9) /* 9:9 */ -#define A60810_RG_USB20_EN_PD_DP (0x1<<8) /* 8:8 */ - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_DM_100K_EN (0x1<<17) /* 17:17 */ -#define A60810_USB20_DP_100K_EN (0x1<<16) /* 16:16 */ -#define A60810_USB20_GPIO_DM_I (0x1<<15) /* 15:15 */ -#define A60810_USB20_GPIO_DP_I (0x1<<14) /* 14:14 */ -#define A60810_USB20_GPIO_DM_OE (0x1<<13) /* 13:13 */ -#define A60810_USB20_GPIO_DP_OE (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_GPIO_CTL (0x1<<9) /* 9:9 */ -#define A60810_USB20_GPIO_MODE (0x1<<8) /* 8:8 */ -#define A60810_RG_USB20_TX_BIAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_TX_VCMPDN_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_HS_SQ_EN_MODE (0x3<<2) /* 3:2 */ -#define A60810_RG_USB20_HS_RCV_EN_MODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_GPIO_DP_O (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST (0x3<<30) /* 31:30 */ -#define A60810_RG_USB20_GATED_ENB (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_TESTMODE (0x3<<26) /* 27:26 */ -#define A60810_RG_SIFSLV_USB20_PLL_STABLE (0x1<<25) /* 25:25 */ -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON (0x1<<24) /* 24:24 */ -#define A60810_RG_USB20_PHYD_RESERVE (0xffff<<8) /* 23:8 */ -#define A60810_RG_USB20_EBTHRLD (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_EARLY_HSTX_I (0x1<<6) /* 6:6 */ -#define A60810_RG_USB20_TX_TST (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_NEGEDGE_ENB (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_CDR_FILT (0xf<<0) /* 3:0 */ - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL (0xff<<24) /* 31:24 */ -#define A60810_RG_USB20_DRVVBUS (0x1<<23) /* 23:23 */ -#define A60810_RG_DEBUG_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_USB20_OTG_PROBE (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_SW_PLLMODE (0x3<<18) /* 19:18 */ -#define A60810_RG_USB20_BERTH (0x3<<16) /* 17:16 */ -#define A60810_RG_USB20_LBMODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_FORCE_TAP (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_TAPSEL (0xfff<<0) /* 11:0 */ - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE (0x3<<30) /* 31:30 */ -#define A60810_FORCE_UART_I (0x1<<29) /* 29:29 */ -#define A60810_FORCE_UART_BIAS_EN (0x1<<28) /* 28:28 */ -#define A60810_FORCE_UART_TX_OE (0x1<<27) /* 27:27 */ -#define A60810_FORCE_UART_EN (0x1<<26) /* 26:26 */ -#define A60810_FORCE_USB_CLKEN (0x1<<25) /* 25:25 */ -#define A60810_FORCE_DRVVBUS (0x1<<24) /* 24:24 */ -#define A60810_FORCE_DATAIN (0x1<<23) /* 23:23 */ -#define A60810_FORCE_TXVALID (0x1<<22) /* 22:22 */ -#define A60810_FORCE_DM_PULLDOWN (0x1<<21) /* 21:21 */ -#define A60810_FORCE_DP_PULLDOWN (0x1<<20) /* 20:20 */ -#define A60810_FORCE_XCVRSEL (0x1<<19) /* 19:19 */ -#define A60810_FORCE_SUSPENDM (0x1<<18) /* 18:18 */ -#define A60810_FORCE_TERMSEL (0x1<<17) /* 17:17 */ -#define A60810_FORCE_OPMODE (0x1<<16) /* 16:16 */ -#define A60810_UTMI_MUXSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_RESET (0x1<<14) /* 14:14 */ -#define A60810_RG_DATAIN (0xf<<10) /* 13:10 */ -#define A60810_RG_TXVALIDH (0x1<<9) /* 9:9 */ -#define A60810_RG_TXVALID (0x1<<8) /* 8:8 */ -#define A60810_RG_DMPULLDOWN (0x1<<7) /* 7:7 */ -#define A60810_RG_DPPULLDOWN (0x1<<6) /* 6:6 */ -#define A60810_RG_XCVRSEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SUSPENDM (0x1<<3) /* 3:3 */ -#define A60810_RG_TERMSEL (0x1<<2) /* 2:2 */ -#define A60810_RG_OPMODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_PRBS7_BITCNT (0x3f<<24) /* 29:24 */ -#define A60810_RG_USB20_CLK48M_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_USB20_CLK60M_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_UART_I (0x1<<19) /* 19:19 */ -#define A60810_RG_UART_BIAS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_UART_TX_OE (0x1<<17) /* 17:17 */ -#define A60810_RG_UART_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_IP_U2_PORT_POWER (0x1<<15) /* 15:15 */ -#define A60810_FORCE_IP_U2_PORT_POWER (0x1<<14) /* 14:14 */ -#define A60810_FORCE_VBUSVALID (0x1<<13) /* 13:13 */ -#define A60810_FORCE_SESSEND (0x1<<12) /* 12:12 */ -#define A60810_FORCE_BVALID (0x1<<11) /* 11:11 */ -#define A60810_FORCE_AVALID (0x1<<10) /* 10:10 */ -#define A60810_FORCE_IDDIG (0x1<<9) /* 9:9 */ -#define A60810_FORCE_IDPULLUP (0x1<<8) /* 8:8 */ -#define A60810_RG_VBUSVALID (0x1<<5) /* 5:5 */ -#define A60810_RG_SESSEND (0x1<<4) /* 4:4 */ -#define A60810_RG_BVALID (0x1<<3) /* 3:3 */ -#define A60810_RG_AVALID (0x1<<2) /* 2:2 */ -#define A60810_RG_IDDIG (0x1<<1) /* 1:1 */ -#define A60810_RG_IDPULLUP (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH (0xff<<0) /* 7:0 */ -#define E60802_RG_USB20_EOP_CTL (0xf<<16) /* 19:16 */ - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O (0x1<<31) /* 31:31 */ -#define A60810_RGO_USB20_LB_PASS (0x1<<30) /* 30:30 */ -#define A60810_RGO_USB20_LB_DONE (0x1<<29) /* 29:29 */ -#define A60810_AD_USB20_BVALID (0x1<<28) /* 28:28 */ -#define A60810_USB20_IDDIG (0x1<<27) /* 27:27 */ -#define A60810_AD_USB20_VBUSVALID (0x1<<26) /* 26:26 */ -#define A60810_AD_USB20_SESSEND (0x1<<25) /* 25:25 */ -#define A60810_AD_USB20_AVALID (0x1<<24) /* 24:24 */ -#define A60810_USB20_LINE_STATE (0x3<<22) /* 23:22 */ -#define A60810_USB20_HST_DISCON (0x1<<21) /* 21:21 */ -#define A60810_USB20_TX_READY (0x1<<20) /* 20:20 */ -#define A60810_USB20_RX_ERROR (0x1<<19) /* 19:19 */ -#define A60810_USB20_RX_ACTIVE (0x1<<18) /* 18:18 */ -#define A60810_USB20_RX_VALIDH (0x1<<17) /* 17:17 */ -#define A60810_USB20_RX_VALID (0x1<<16) /* 16:16 */ -#define A60810_USB20_DATA_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT (0xff<<24) /* 31:24 */ -#define A60810_RGO_RXACTIVE_CNT (0xff<<16) /* 23:16 */ -#define A60810_RGO_USB20_LB_BERCNT (0xff<<8) /* 15:8 */ -#define A60810_USB20_PROBE_OUT (0xff<<0) /* 7:0 */ - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGO_USB20_PRBS7_DONE (0x1<<3) /* 3:3 */ -#define A60810_RGO_USB20_PRBS7_LOCK (0x1<<2) /* 2:2 */ -#define A60810_RGO_USB20_PRBS7_PASS (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_PRBS7_PASSTH (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT (0xf<<28) /* 31:28 */ -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT (0xf<<24) /* 27:24 */ -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_CHGDT_ISRC_LEV (0x3<<14) /* 15:14 */ -#define A60810_RG_CHGDT_VDATSRC (0x1<<13) /* 13:13 */ -#define A60810_RG_CHGDT_BGVREF_SEL (0x7<<10) /* 12:10 */ -#define A60810_RG_CHGDT_RDVREF_SEL (0x3<<8) /* 9:8 */ -#define A60810_RG_CHGDT_ISRC_DP (0x1<<7) /* 7:7 */ -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM (0x1<<6) /* 6:6 */ -#define A60810_RG_CHGDT_VDAT_DM (0x1<<5) /* 5:5 */ -#define A60810_RG_CHGDT_OPOUT_DP (0x1<<4) /* 4:4 */ -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP (0x1<<3) /* 3:3 */ -#define A60810_RG_SIFSLV_CHGDT_COMP_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_CHGDT_EN (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV (0xff<<0) /* 7:0 */ - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG (0x1<<4) /* 4:4 */ -#define A60810_USB20_OTG_REG (0x1<<3) /* 3:3 */ -#define A60810_CHGDT_REG (0x1<<2) /* 2:2 */ -#define A60810_USB11_REG (0x1<<1) /* 1:1 */ -#define A60810_USB20_REG (0x1<<0) /* 0:0 */ - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE (0xff<<24) /* 31:24 */ -#define A60810_USB11_VERSION_CODE (0xff<<16) /* 23:16 */ -#define A60810_VERSION_CODE_ANA (0xff<<8) /* 15:8 */ -#define A60810_VERSION_CODE_DIG (0xff<<0) /* 7:0 */ - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE (0xff<<24) /* 31:24 */ -#define A60810_I2C_MODE (0x1<<16) /* 16:16 */ - -/* OFFSET */ - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL_OFST (28) -#define A60810_RG_USB20_TX_PH_ROT_SEL_OFST (24) -#define A60810_RG_USB20_PLL_DIVEN_OFST (20) -#define A60810_RG_USB20_PLL_BR_OFST (18) -#define A60810_RG_USB20_PLL_BP_OFST (17) -#define A60810_RG_USB20_PLL_BLP_OFST (16) -#define A60810_RG_USB20_USBPLL_FORCE_ON_OFST (15) -#define A60810_RG_USB20_PLL_FBDIV_OFST (8) -#define A60810_RG_USB20_PLL_PREDIV_OFST (6) -#define A60810_RG_USB20_INTR_EN_OFST (5) -#define A60810_RG_USB20_REF_EN_OFST (4) -#define A60810_RG_USB20_BGR_DIV_OFST (2) -#define A60810_RG_SIFSLV_CHP_EN_OFST (1) -#define A60810_RG_SIFSLV_BGR_EN_OFST (0) - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL_OFST (19) -#define A60810_RG_USB20_OTG_VBUSTH_OFST (16) -#define A60810_RG_USB20_VRT_VREF_SEL_OFST (12) -#define A60810_RG_USB20_TERM_VREF_SEL_OFST (8) -#define A60810_RG_USB20_MPX_SEL_OFST (0) - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN_OFST (17) -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN_OFST (16) -#define A60810_RG_USB20_CLKREF_REV_OFST (0) - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN_OFST (31) -#define A60810_RG_USB20_DP_ABIST_SELE_OFST (24) -#define A60810_RG_USB20_ICUSB_EN_OFST (16) -#define A60810_RG_USB20_LS_CR_OFST (12) -#define A60810_RG_USB20_FS_CR_OFST (8) -#define A60810_RG_USB20_LS_SR_OFST (4) -#define A60810_RG_USB20_FS_SR_OFST (0) - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN_OFST (28) -#define A60810_RG_USB20_INIT_SQ_EN_DG_OFST (26) -#define A60810_RG_USB20_HSTX_TMODE_SEL_OFST (24) -#define A60810_RG_USB20_SQD_OFST (22) -#define A60810_RG_USB20_DISCD_OFST (20) -#define A60810_RG_USB20_HSTX_TMODE_EN_OFST (19) -#define A60810_RG_USB20_PHYD_MONEN_OFST (18) -#define A60810_RG_USB20_INLPBK_EN_OFST (17) -#define A60810_RG_USB20_CHIRP_EN_OFST (16) -#define A60810_RG_USB20_HSTX_SRCAL_EN_OFST (15) -#define A60810_RG_USB20_HSTX_SRCTRL_OFST (12) -#define A60810_RG_USB20_HS_100U_U3_EN_OFST (11) -#define A60810_RG_USB20_GBIAS_ENB_OFST (10) -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN_OFST (7) -#define A60810_RG_USB20_DM_ABIST_SELE_OFST (0) - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN_OFST (31) -#define A60810_RG_USB20_PHY_REV_OFST (24) -#define A60810_RG_USB20_BC11_SW_EN_OFST (23) -#define A60810_RG_USB20_SR_CLK_SEL_OFST (22) -#define A60810_RG_USB20_OTG_VBUSCMP_EN_OFST (20) -#define A60810_RG_USB20_OTG_ABIST_EN_OFST (19) -#define A60810_RG_USB20_OTG_ABIST_SELE_OFST (16) -#define A60810_RG_USB20_HSRX_MMODE_SELE_OFST (12) -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL_OFST (9) -#define A60810_RG_USB20_HSRX_TMODE_EN_OFST (8) -#define A60810_RG_USB20_DISCTH_OFST (4) -#define A60810_RG_USB20_SQTH_OFST (0) - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST_OFST (28) -#define A60810_RG_USB20_HSTX_BIST_EN_OFST (26) -#define A60810_RG_USB20_HSTX_I_EN_MODE_OFST (24) -#define A60810_RG_USB20_USB11_TMODE_EN_OFST (19) -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN_OFST (18) -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN_OFST (17) -#define A60810_RG_USB20_TMODE_FS_LS_MODE_OFST (16) -#define A60810_RG_USB20_HS_TERM_EN_MODE_OFST (13) -#define A60810_RG_USB20_PUPD_BIST_EN_OFST (12) -#define A60810_RG_USB20_EN_PU_DM_OFST (11) -#define A60810_RG_USB20_EN_PD_DM_OFST (10) -#define A60810_RG_USB20_EN_PU_DP_OFST (9) -#define A60810_RG_USB20_EN_PD_DP_OFST (8) - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE_OFST (18) -#define A60810_RG_USB20_DM_100K_EN_OFST (17) -#define A60810_USB20_DP_100K_EN_OFST (16) -#define A60810_USB20_GPIO_DM_I_OFST (15) -#define A60810_USB20_GPIO_DP_I_OFST (14) -#define A60810_USB20_GPIO_DM_OE_OFST (13) -#define A60810_USB20_GPIO_DP_OE_OFST (12) -#define A60810_RG_USB20_GPIO_CTL_OFST (9) -#define A60810_USB20_GPIO_MODE_OFST (8) -#define A60810_RG_USB20_TX_BIAS_EN_OFST (5) -#define A60810_RG_USB20_TX_VCMPDN_EN_OFST (4) -#define A60810_RG_USB20_HS_SQ_EN_MODE_OFST (2) -#define A60810_RG_USB20_HS_RCV_EN_MODE_OFST (0) - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O_OFST (1) -#define A60810_RGO_USB20_GPIO_DP_O_OFST (0) - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST_OFST (30) -#define A60810_RG_USB20_GATED_ENB_OFST (29) -#define A60810_RG_USB20_TESTMODE_OFST (26) -#define A60810_RG_SIFSLV_USB20_PLL_STABLE_OFST (25) -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON_OFST (24) -#define A60810_RG_USB20_PHYD_RESERVE_OFST (8) -#define A60810_RG_USB20_EBTHRLD_OFST (7) -#define A60810_RG_USB20_EARLY_HSTX_I_OFST (6) -#define A60810_RG_USB20_TX_TST_OFST (5) -#define A60810_RG_USB20_NEGEDGE_ENB_OFST (4) -#define A60810_RG_USB20_CDR_FILT_OFST (0) - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL_OFST (24) -#define A60810_RG_USB20_DRVVBUS_OFST (23) -#define A60810_RG_DEBUG_EN_OFST (22) -#define A60810_RG_USB20_OTG_PROBE_OFST (20) -#define A60810_RG_USB20_SW_PLLMODE_OFST (18) -#define A60810_RG_USB20_BERTH_OFST (16) -#define A60810_RG_USB20_LBMODE_OFST (13) -#define A60810_RG_USB20_FORCE_TAP_OFST (12) -#define A60810_RG_USB20_TAPSEL_OFST (0) - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE_OFST (30) -#define A60810_FORCE_UART_I_OFST (29) -#define A60810_FORCE_UART_BIAS_EN_OFST (28) -#define A60810_FORCE_UART_TX_OE_OFST (27) -#define A60810_FORCE_UART_EN_OFST (26) -#define A60810_FORCE_USB_CLKEN_OFST (25) -#define A60810_FORCE_DRVVBUS_OFST (24) -#define A60810_FORCE_DATAIN_OFST (23) -#define A60810_FORCE_TXVALID_OFST (22) -#define A60810_FORCE_DM_PULLDOWN_OFST (21) -#define A60810_FORCE_DP_PULLDOWN_OFST (20) -#define A60810_FORCE_XCVRSEL_OFST (19) -#define A60810_FORCE_SUSPENDM_OFST (18) -#define A60810_FORCE_TERMSEL_OFST (17) -#define A60810_FORCE_OPMODE_OFST (16) -#define A60810_UTMI_MUXSEL_OFST (15) -#define A60810_RG_RESET_OFST (14) -#define A60810_RG_DATAIN_OFST (10) -#define A60810_RG_TXVALIDH_OFST (9) -#define A60810_RG_TXVALID_OFST (8) -#define A60810_RG_DMPULLDOWN_OFST (7) -#define A60810_RG_DPPULLDOWN_OFST (6) -#define A60810_RG_XCVRSEL_OFST (4) -#define A60810_RG_SUSPENDM_OFST (3) -#define A60810_RG_TERMSEL_OFST (2) -#define A60810_RG_OPMODE_OFST (0) - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN_OFST (31) -#define A60810_RG_USB20_PRBS7_BITCNT_OFST (24) -#define A60810_RG_USB20_CLK48M_EN_OFST (23) -#define A60810_RG_USB20_CLK60M_EN_OFST (22) -#define A60810_RG_UART_I_OFST (19) -#define A60810_RG_UART_BIAS_EN_OFST (18) -#define A60810_RG_UART_TX_OE_OFST (17) -#define A60810_RG_UART_EN_OFST (16) -#define A60810_RG_IP_U2_PORT_POWER_OFST (15) -#define A60810_FORCE_IP_U2_PORT_POWER_OFST (14) -#define A60810_FORCE_VBUSVALID_OFST (13) -#define A60810_FORCE_SESSEND_OFST (12) -#define A60810_FORCE_BVALID_OFST (11) -#define A60810_FORCE_AVALID_OFST (10) -#define A60810_FORCE_IDDIG_OFST (9) -#define A60810_FORCE_IDPULLUP_OFST (8) -#define A60810_RG_VBUSVALID_OFST (5) -#define A60810_RG_SESSEND_OFST (4) -#define A60810_RG_BVALID_OFST (3) -#define A60810_RG_AVALID_OFST (2) -#define A60810_RG_IDDIG_OFST (1) -#define A60810_RG_IDPULLUP_OFST (0) - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH_OFST (0) -#define E60802_RG_USB20_EOP_CTL_OFST (16) - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O_OFST (31) -#define A60810_RGO_USB20_LB_PASS_OFST (30) -#define A60810_RGO_USB20_LB_DONE_OFST (29) -#define A60810_AD_USB20_BVALID_OFST (28) -#define A60810_USB20_IDDIG_OFST (27) -#define A60810_AD_USB20_VBUSVALID_OFST (26) -#define A60810_AD_USB20_SESSEND_OFST (25) -#define A60810_AD_USB20_AVALID_OFST (24) -#define A60810_USB20_LINE_STATE_OFST (22) -#define A60810_USB20_HST_DISCON_OFST (21) -#define A60810_USB20_TX_READY_OFST (20) -#define A60810_USB20_RX_ERROR_OFST (19) -#define A60810_USB20_RX_ACTIVE_OFST (18) -#define A60810_USB20_RX_VALIDH_OFST (17) -#define A60810_USB20_RX_VALID_OFST (16) -#define A60810_USB20_DATA_OUT_OFST (0) - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT_OFST (24) -#define A60810_RGO_RXACTIVE_CNT_OFST (16) -#define A60810_RGO_USB20_LB_BERCNT_OFST (8) -#define A60810_USB20_PROBE_OUT_OFST (0) - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT_OFST (16) -#define A60810_RGO_USB20_PRBS7_DONE_OFST (3) -#define A60810_RGO_USB20_PRBS7_LOCK_OFST (2) -#define A60810_RGO_USB20_PRBS7_PASS_OFST (1) -#define A60810_RGO_USB20_PRBS7_PASSTH_OFST (0) - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT_OFST (28) -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT_OFST (24) -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE_OFST (16) -#define A60810_RG_CHGDT_ISRC_LEV_OFST (14) -#define A60810_RG_CHGDT_VDATSRC_OFST (13) -#define A60810_RG_CHGDT_BGVREF_SEL_OFST (10) -#define A60810_RG_CHGDT_RDVREF_SEL_OFST (8) -#define A60810_RG_CHGDT_ISRC_DP_OFST (7) -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM_OFST (6) -#define A60810_RG_CHGDT_VDAT_DM_OFST (5) -#define A60810_RG_CHGDT_OPOUT_DP_OFST (4) -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP_OFST (3) -#define A60810_RG_SIFSLV_CHGDT_COMP_EN_OFST (2) -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN_OFST (1) -#define A60810_RG_CHGDT_EN_OFST (0) - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV_OFST (0) - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG_OFST (4) -#define A60810_USB20_OTG_REG_OFST (3) -#define A60810_CHGDT_REG_OFST (2) -#define A60810_USB11_REG_OFST (1) -#define A60810_USB20_REG_OFST (0) - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE_OFST (24) -#define A60810_USB11_VERSION_CODE_OFST (16) -#define A60810_VERSION_CODE_ANA_OFST (8) -#define A60810_VERSION_CODE_DIG_OFST (0) - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE_OFST (24) -#define A60810_I2C_MODE_OFST (16) - -/* A60931 */ - -//U3D_USBPHYACR0 -#define A60931_RG_USB20_MPX_OUT_SEL (0x7<<28) //30:28 -#define A60931_RG_USB20_TX_PH_ROT_SEL (0x7<<24) //26:24 -#define A60931_RG_USB20_PLL_DIVEN (0x7<<20) //22:20 -#define A60931_RG_USB20_PLL_BR (0x1<<18) //18:18 -#define A60931_RG_USB20_PLL_BP (0x1<<17) //17:17 -#define A60931_RG_USB20_PLL_BLP (0x1<<16) //16:16 -#define A60931_RG_USB20_USBPLL_FORCE_ON (0x1<<15) //15:15 -#define A60931_RG_USB20_PLL_FBDIV (0x7f<<8) //14:8 -#define A60931_RG_USB20_PLL_PREDIV (0x3<<6) //7:6 -#define A60931_RG_USB20_INTR_EN (0x1<<5) //5:5 -#define A60931_RG_USB20_REF_EN (0x1<<4) //4:4 -#define A60931_RG_USB20_BGR_DIV (0x3<<2) //3:2 -#define A60931_RG_SIFSLV_CHP_EN (0x1<<1) //1:1 -#define A60931_RG_SIFSLV_BGR_EN (0x1<<0) //0:0 - -//U3D_USBPHYACR1 -#define A60931_RG_USB20_INTR_CAL (0x1f<<19) //23:19 -#define A60931_RG_USB20_OTG_VBUSTH (0x7<<16) //18:16 -#define A60931_RG_USB20_VRT_VREF_SEL (0x7<<12) //14:12 -#define A60931_RG_USB20_TERM_VREF_SEL (0x7<<8) //10:8 -#define A60931_RG_USB20_MPX_SEL (0xff<<0) //7:0 - -//U3D_USBPHYACR2 -#define A60931_RG_SIFSLV_MAC_BANDGAP_EN (0x1<<17) //17:17 -#define A60931_RG_SIFSLV_MAC_CHOPPER_EN (0x1<<16) //16:16 -#define A60931_RG_USB20_CLKREF_REV (0xffff<<0) //15:0 - -//U3D_USBPHYACR4 -#define A60931_RG_USB20_DP_ABIST_SOURCE_EN (0x1<<31) //31:31 -#define A60931_RG_USB20_DP_ABIST_SELE (0xf<<24) //27:24 -#define A60931_RG_USB20_ICUSB_EN (0x1<<16) //16:16 -#define A60931_RG_USB20_LS_CR (0x7<<12) //14:12 -#define A60931_RG_USB20_FS_CR (0x7<<8) //10:8 -#define A60931_RG_USB20_LS_SR (0x7<<4) //6:4 -#define A60931_RG_USB20_FS_SR (0x7<<0) //2:0 - -//U3D_USBPHYACR5 -#define A60931_RG_USB20_DISC_FIT_EN (0x1<<28) //28:28 -#define A60931_RG_USB20_INIT_SQ_EN_DG (0x3<<26) //27:26 -#define A60931_RG_USB20_HSTX_TMODE_SEL (0x3<<24) //25:24 -#define A60931_RG_USB20_SQD (0x3<<22) //23:22 -#define A60931_RG_USB20_DISCD (0x3<<20) //21:20 -#define A60931_RG_USB20_HSTX_TMODE_EN (0x1<<19) //19:19 -#define A60931_RG_USB20_PHYD_MONEN (0x1<<18) //18:18 -#define A60931_RG_USB20_INLPBK_EN (0x1<<17) //17:17 -#define A60931_RG_USB20_CHIRP_EN (0x1<<16) //16:16 -#define A60931_RG_USB20_HSTX_SRCAL_EN (0x1<<15) //15:15 -#define A60931_RG_USB20_HSTX_SRCTRL (0x7<<12) //14:12 -#define A60931_RG_USB20_HS_100U_U3_EN (0x1<<11) //11:11 -#define A60931_RG_USB20_GBIAS_ENB (0x1<<10) //10:10 -#define A60931_RG_USB20_DM_ABIST_SOURCE_EN (0x1<<7) //7:7 -#define A60931_RG_USB20_DM_ABIST_SELE (0xf<<0) //3:0 - -//U3D_USBPHYACR6 -#define A60931_RG_USB20_ISO_EN (0x1 << 31) /* 31:31 */ -#define A60931_RG_USB20_PHY_REV (0xff<<24) //31:24 -#define A60931_RG_USB20_BC11_SW_EN (0x1<<23) //23:23 -#define A60931_RG_USB20_SR_CLK_SEL (0x1<<22) //22:22 -#define A60931_RG_USB20_OTG_VBUSCMP_EN (0x1<<20) //20:20 -#define A60931_RG_USB20_OTG_ABIST_EN (0x1<<19) //19:19 -#define A60931_RG_USB20_OTG_ABIST_SELE (0x7<<16) //18:16 -#define A60931_RG_USB20_HSRX_MMODE_SELE (0x3<<12) //13:12 -#define A60931_RG_USB20_HSRX_BIAS_EN_SEL (0x3<<9) //10:9 -#define A60931_RG_USB20_HSRX_TMODE_EN (0x1<<8) //8:8 -#define A60931_RG_USB20_DISCTH (0xf<<4) //7:4 -#define A60931_RG_USB20_SQTH (0xf<<0) //3:0 - -//U3D_U2PHYACR3 -#define A60931_RG_USB20_HSTX_DBIST (0xf<<28) //31:28 -#define A60931_RG_USB20_HSTX_BIST_EN (0x1<<26) //26:26 -#define A60931_RG_USB20_HSTX_I_EN_MODE (0x3<<24) //25:24 -#define A60931_RG_USB20_USB11_TMODE_EN (0x1<<19) //19:19 -#define A60931_RG_USB20_TMODE_FS_LS_TX_EN (0x1<<18) //18:18 -#define A60931_RG_USB20_TMODE_FS_LS_RCV_EN (0x1<<17) //17:17 -#define A60931_RG_USB20_TMODE_FS_LS_MODE (0x1<<16) //16:16 -#define A60931_RG_USB20_HS_TERM_EN_MODE (0x3<<13) //14:13 -#define A60931_RG_USB20_PUPD_BIST_EN (0x1<<12) //12:12 -#define A60931_RG_USB20_EN_PU_DM (0x1<<11) //11:11 -#define A60931_RG_USB20_EN_PD_DM (0x1<<10) //10:10 -#define A60931_RG_USB20_EN_PU_DP (0x1<<9) //9:9 -#define A60931_RG_USB20_EN_PD_DP (0x1<<8) //8:8 - -//U3D_U2PHYACR4 -#define A60931_RG_USB20_DP_100K_MODE (0x1<<18) //18:18 -#define A60931_RG_USB20_DM_100K_EN (0x1<<17) //17:17 -#define A60931_USB20_DP_100K_EN (0x1<<16) //16:16 -#define A60931_USB20_GPIO_DM_I (0x1<<15) //15:15 -#define A60931_USB20_GPIO_DP_I (0x1<<14) //14:14 -#define A60931_USB20_GPIO_DM_OE (0x1<<13) //13:13 -#define A60931_USB20_GPIO_DP_OE (0x1<<12) //12:12 -#define A60931_RG_USB20_GPIO_CTL (0x1<<9) //9:9 -#define A60931_USB20_GPIO_MODE (0x1<<8) //8:8 -#define A60931_RG_USB20_TX_BIAS_EN (0x1<<5) //5:5 -#define A60931_RG_USB20_TX_VCMPDN_EN (0x1<<4) //4:4 -#define A60931_RG_USB20_HS_SQ_EN_MODE (0x3<<2) //3:2 -#define A60931_RG_USB20_HS_RCV_EN_MODE (0x3<<0) //1:0 - -//U3D_U2PHYAMON0 -#define A60931_RGO_USB20_GPIO_DM_O (0x1<<1) //1:1 -#define A60931_RGO_USB20_GPIO_DP_O (0x1<<0) //0:0 - -//U3D_U2PHYDCR0 -#define A60931_RG_USB20_CDR_TST (0x3<<30) //31:30 -#define A60931_RG_USB20_GATED_ENB (0x1<<29) //29:29 -#define A60931_RG_USB20_TESTMODE (0x3<<26) //27:26 -#define A60931_RG_SIFSLV_USB20_PLL_STABLE (0x1<<25) //25:25 -#define A60931_RG_SIFSLV_USB20_PLL_FORCE_ON (0x1<<24) //24:24 -#define A60931_RG_USB20_PHYD_RESERVE (0xffff<<8) //23:8 -#define A60931_RG_USB20_EBTHRLD (0x1<<7) //7:7 -#define A60931_RG_USB20_EARLY_HSTX_I (0x1<<6) //6:6 -#define A60931_RG_USB20_TX_TST (0x1<<5) //5:5 -#define A60931_RG_USB20_NEGEDGE_ENB (0x1<<4) //4:4 -#define A60931_RG_USB20_CDR_FILT (0xf<<0) //3:0 - -//U3D_U2PHYDCR1 -#define A60931_RG_USB20_PROBE_SEL (0xff<<24) //31:24 -#define A60931_RG_USB20_DRVVBUS (0x1<<23) //23:23 -#define A60931_RG_DEBUG_EN (0x1<<22) //22:22 -#define A60931_RG_USB20_OTG_PROBE (0x3<<20) //21:20 -#define A60931_RG_USB20_SW_PLLMODE (0x3<<18) //19:18 -#define A60931_RG_USB20_BERTH (0x3<<16) //17:16 -#define A60931_RG_USB20_LBMODE (0x3<<13) //14:13 -#define A60931_RG_USB20_FORCE_TAP (0x1<<12) //12:12 -#define A60931_RG_USB20_TAPSEL (0xfff<<0) //11:0 - -//U3D_U2PHYDTM0 -#define A60931_RG_UART_MODE (0x3<<30) //31:30 -#define A60931_FORCE_UART_I (0x1<<29) //29:29 -#define A60931_FORCE_UART_BIAS_EN (0x1<<28) //28:28 -#define A60931_FORCE_UART_TX_OE (0x1<<27) //27:27 -#define A60931_FORCE_UART_EN (0x1<<26) //26:26 -#define A60931_FORCE_USB_CLKEN (0x1<<25) //25:25 -#define A60931_FORCE_DRVVBUS (0x1<<24) //24:24 -#define A60931_FORCE_DATAIN (0x1<<23) //23:23 -#define A60931_FORCE_TXVALID (0x1<<22) //22:22 -#define A60931_FORCE_DM_PULLDOWN (0x1<<21) //21:21 -#define A60931_FORCE_DP_PULLDOWN (0x1<<20) //20:20 -#define A60931_FORCE_XCVRSEL (0x1<<19) //19:19 -#define A60931_FORCE_SUSPENDM (0x1<<18) //18:18 -#define A60931_FORCE_TERMSEL (0x1<<17) //17:17 -#define A60931_FORCE_OPMODE (0x1<<16) //16:16 -#define A60931_UTMI_MUXSEL (0x1<<15) //15:15 -#define A60931_RG_RESET (0x1<<14) //14:14 -#define A60931_RG_DATAIN (0xf<<10) //13:10 -#define A60931_RG_TXVALIDH (0x1<<9) //9:9 -#define A60931_RG_TXVALID (0x1<<8) //8:8 -#define A60931_RG_DMPULLDOWN (0x1<<7) //7:7 -#define A60931_RG_DPPULLDOWN (0x1<<6) //6:6 -#define A60931_RG_XCVRSEL (0x3<<4) //5:4 -#define A60931_RG_SUSPENDM (0x1<<3) //3:3 -#define A60931_RG_TERMSEL (0x1<<2) //2:2 -#define A60931_RG_OPMODE (0x3<<0) //1:0 - -//U3D_U2PHYDTM1 -#define A60931_RG_USB20_PRBS7_EN (0x1<<31) //31:31 -#define A60931_RG_USB20_PRBS7_BITCNT (0x3f<<24) //29:24 -#define A60931_RG_USB20_CLK48M_EN (0x1<<23) //23:23 -#define A60931_RG_USB20_CLK60M_EN (0x1<<22) //22:22 -#define A60931_RG_UART_I (0x1<<19) //19:19 -#define A60931_RG_UART_BIAS_EN (0x1<<18) //18:18 -#define A60931_RG_UART_TX_OE (0x1<<17) //17:17 -#define A60931_RG_UART_EN (0x1<<16) //16:16 -#define A60931_RG_IP_U2_PORT_POWER (0x1<<15) //15:15 -#define A60931_FORCE_IP_U2_PORT_POWER (0x1<<14) //14:14 -#define A60931_FORCE_VBUSVALID (0x1<<13) //13:13 -#define A60931_FORCE_SESSEND (0x1<<12) //12:12 -#define A60931_FORCE_BVALID (0x1<<11) //11:11 -#define A60931_FORCE_AVALID (0x1<<10) //10:10 -#define A60931_FORCE_IDDIG (0x1<<9) //9:9 -#define A60931_FORCE_IDPULLUP (0x1<<8) //8:8 -#define A60931_RG_VBUSVALID (0x1<<5) //5:5 -#define A60931_RG_SESSEND (0x1<<4) //4:4 -#define A60931_RG_BVALID (0x1<<3) //3:3 -#define A60931_RG_AVALID (0x1<<2) //2:2 -#define A60931_RG_IDDIG (0x1<<1) //1:1 -#define A60931_RG_IDPULLUP (0x1<<0) //0:0 - -//U3D_U2PHYDMON0 -#define A60931_RG_USB20_PRBS7_BERTH (0xff<<0) //7:0 -#define E60802_RG_USB20_EOP_CTL (0xf<<16) //19:16 - -//U3D_U2PHYDMON1 -#define A60931_USB20_UART_O (0x1<<31) //31:31 -#define A60931_RGO_USB20_LB_PASS (0x1<<30) //30:30 -#define A60931_RGO_USB20_LB_DONE (0x1<<29) //29:29 -#define A60931_AD_USB20_BVALID (0x1<<28) //28:28 -#define A60931_USB20_IDDIG (0x1<<27) //27:27 -#define A60931_AD_USB20_VBUSVALID (0x1<<26) //26:26 -#define A60931_AD_USB20_SESSEND (0x1<<25) //25:25 -#define A60931_AD_USB20_AVALID (0x1<<24) //24:24 -#define A60931_USB20_LINE_STATE (0x3<<22) //23:22 -#define A60931_USB20_HST_DISCON (0x1<<21) //21:21 -#define A60931_USB20_TX_READY (0x1<<20) //20:20 -#define A60931_USB20_RX_ERROR (0x1<<19) //19:19 -#define A60931_USB20_RX_ACTIVE (0x1<<18) //18:18 -#define A60931_USB20_RX_VALIDH (0x1<<17) //17:17 -#define A60931_USB20_RX_VALID (0x1<<16) //16:16 -#define A60931_USB20_DATA_OUT (0xffff<<0) //15:0 - -//U3D_U2PHYDMON2 -#define A60931_RGO_TXVALID_CNT (0xff<<24) //31:24 -#define A60931_RGO_RXACTIVE_CNT (0xff<<16) //23:16 -#define A60931_RGO_USB20_LB_BERCNT (0xff<<8) //15:8 -#define A60931_USB20_PROBE_OUT (0xff<<0) //7:0 - -//U3D_U2PHYDMON3 -#define A60931_RGO_USB20_PRBS7_ERRCNT (0xffff<<16) //31:16 -#define A60931_RGO_USB20_PRBS7_DONE (0x1<<3) //3:3 -#define A60931_RGO_USB20_PRBS7_LOCK (0x1<<2) //2:2 -#define A60931_RGO_USB20_PRBS7_PASS (0x1<<1) //1:1 -#define A60931_RGO_USB20_PRBS7_PASSTH (0x1<<0) //0:0 - -//U3D_U2PHYBC12C -#define A60931_RG_SIFSLV_CHGDT_DEGLCH_CNT (0xf<<28) //31:28 -#define A60931_RG_SIFSLV_CHGDT_CTRL_CNT (0xf<<24) //27:24 -#define A60931_RG_SIFSLV_CHGDT_FORCE_MODE (0x1<<16) //16:16 -#define A60931_RG_CHGDT_ISRC_LEV (0x3<<14) //15:14 -#define A60931_RG_CHGDT_VDATSRC (0x1<<13) //13:13 -#define A60931_RG_CHGDT_BGVREF_SEL (0x7<<10) //12:10 -#define A60931_RG_CHGDT_RDVREF_SEL (0x3<<8) //9:8 -#define A60931_RG_CHGDT_ISRC_DP (0x1<<7) //7:7 -#define A60931_RG_SIFSLV_CHGDT_OPOUT_DM (0x1<<6) //6:6 -#define A60931_RG_CHGDT_VDAT_DM (0x1<<5) //5:5 -#define A60931_RG_CHGDT_OPOUT_DP (0x1<<4) //4:4 -#define A60931_RG_SIFSLV_CHGDT_VDAT_DP (0x1<<3) //3:3 -#define A60931_RG_SIFSLV_CHGDT_COMP_EN (0x1<<2) //2:2 -#define A60931_RG_SIFSLV_CHGDT_OPDRV_EN (0x1<<1) //1:1 -#define A60931_RG_CHGDT_EN (0x1<<0) //0:0 - -//U3D_U2PHYBC12C1 -#define A60931_RG_CHGDT_REV (0xff<<0) //7:0 - -//U3D_REGFPPC -#define A60931_USB11_OTG_REG (0x1<<4) //4:4 -#define A60931_USB20_OTG_REG (0x1<<3) //3:3 -#define A60931_CHGDT_REG (0x1<<2) //2:2 -#define A60931_USB11_REG (0x1<<1) //1:1 -#define A60931_USB20_REG (0x1<<0) //0:0 - -//U3D_VERSIONC -#define A60931_VERSION_CODE_REGFILE (0xff<<24) //31:24 -#define A60931_USB11_VERSION_CODE (0xff<<16) //23:16 -#define A60931_VERSION_CODE_ANA (0xff<<8) //15:8 -#define A60931_VERSION_CODE_DIG (0xff<<0) //7:0 - -//U3D_REGFCOM -#define A60931_RG_PAGE (0xff<<24) //31:24 -#define A60931_I2C_MODE (0x1<<16) //16:16 - -/* OFFSET */ - -//U3D_USBPHYACR0 -#define A60931_RG_USB20_MPX_OUT_SEL_OFST (28) -#define A60931_RG_USB20_TX_PH_ROT_SEL_OFST (24) -#define A60931_RG_USB20_PLL_DIVEN_OFST (20) -#define A60931_RG_USB20_PLL_BR_OFST (18) -#define A60931_RG_USB20_PLL_BP_OFST (17) -#define A60931_RG_USB20_PLL_BLP_OFST (16) -#define A60931_RG_USB20_USBPLL_FORCE_ON_OFST (15) -#define A60931_RG_USB20_PLL_FBDIV_OFST (8) -#define A60931_RG_USB20_PLL_PREDIV_OFST (6) -#define A60931_RG_USB20_INTR_EN_OFST (5) -#define A60931_RG_USB20_REF_EN_OFST (4) -#define A60931_RG_USB20_BGR_DIV_OFST (2) -#define A60931_RG_SIFSLV_CHP_EN_OFST (1) -#define A60931_RG_SIFSLV_BGR_EN_OFST (0) - -//U3D_USBPHYACR1 -#define A60931_RG_USB20_INTR_CAL_OFST (19) -#define A60931_RG_USB20_OTG_VBUSTH_OFST (16) -#define A60931_RG_USB20_VRT_VREF_SEL_OFST (12) -#define A60931_RG_USB20_TERM_VREF_SEL_OFST (8) -#define A60931_RG_USB20_MPX_SEL_OFST (0) - -//U3D_USBPHYACR2 -#define A60931_RG_SIFSLV_MAC_BANDGAP_EN_OFST (17) -#define A60931_RG_SIFSLV_MAC_CHOPPER_EN_OFST (16) -#define A60931_RG_USB20_CLKREF_REV_OFST (0) - -//U3D_USBPHYACR4 -#define A60931_RG_USB20_DP_ABIST_SOURCE_EN_OFST (31) -#define A60931_RG_USB20_DP_ABIST_SELE_OFST (24) -#define A60931_RG_USB20_ICUSB_EN_OFST (16) -#define A60931_RG_USB20_LS_CR_OFST (12) -#define A60931_RG_USB20_FS_CR_OFST (8) -#define A60931_RG_USB20_LS_SR_OFST (4) -#define A60931_RG_USB20_FS_SR_OFST (0) - -//U3D_USBPHYACR5 -#define A60931_RG_USB20_DISC_FIT_EN_OFST (28) -#define A60931_RG_USB20_INIT_SQ_EN_DG_OFST (26) -#define A60931_RG_USB20_HSTX_TMODE_SEL_OFST (24) -#define A60931_RG_USB20_SQD_OFST (22) -#define A60931_RG_USB20_DISCD_OFST (20) -#define A60931_RG_USB20_HSTX_TMODE_EN_OFST (19) -#define A60931_RG_USB20_PHYD_MONEN_OFST (18) -#define A60931_RG_USB20_INLPBK_EN_OFST (17) -#define A60931_RG_USB20_CHIRP_EN_OFST (16) -#define A60931_RG_USB20_HSTX_SRCAL_EN_OFST (15) -#define A60931_RG_USB20_HSTX_SRCTRL_OFST (12) -#define A60931_RG_USB20_HS_100U_U3_EN_OFST (11) -#define A60931_RG_USB20_GBIAS_ENB_OFST (10) -#define A60931_RG_USB20_DM_ABIST_SOURCE_EN_OFST (7) -#define A60931_RG_USB20_DM_ABIST_SELE_OFST (0) - -//U3D_USBPHYACR6 -#define A60931_RG_USB20_ISO_EN_OFST (31) -#define A60931_RG_USB20_PHY_REV_OFST (24) -#define A60931_RG_USB20_BC11_SW_EN_OFST (23) -#define A60931_RG_USB20_SR_CLK_SEL_OFST (22) -#define A60931_RG_USB20_OTG_VBUSCMP_EN_OFST (20) -#define A60931_RG_USB20_OTG_ABIST_EN_OFST (19) -#define A60931_RG_USB20_OTG_ABIST_SELE_OFST (16) -#define A60931_RG_USB20_HSRX_MMODE_SELE_OFST (12) -#define A60931_RG_USB20_HSRX_BIAS_EN_SEL_OFST (9) -#define A60931_RG_USB20_HSRX_TMODE_EN_OFST (8) -#define A60931_RG_USB20_DISCTH_OFST (4) -#define A60931_RG_USB20_SQTH_OFST (0) - -//U3D_U2PHYACR3 -#define A60931_RG_USB20_HSTX_DBIST_OFST (28) -#define A60931_RG_USB20_HSTX_BIST_EN_OFST (26) -#define A60931_RG_USB20_HSTX_I_EN_MODE_OFST (24) -#define A60931_RG_USB20_USB11_TMODE_EN_OFST (19) -#define A60931_RG_USB20_TMODE_FS_LS_TX_EN_OFST (18) -#define A60931_RG_USB20_TMODE_FS_LS_RCV_EN_OFST (17) -#define A60931_RG_USB20_TMODE_FS_LS_MODE_OFST (16) -#define A60931_RG_USB20_HS_TERM_EN_MODE_OFST (13) -#define A60931_RG_USB20_PUPD_BIST_EN_OFST (12) -#define A60931_RG_USB20_EN_PU_DM_OFST (11) -#define A60931_RG_USB20_EN_PD_DM_OFST (10) -#define A60931_RG_USB20_EN_PU_DP_OFST (9) -#define A60931_RG_USB20_EN_PD_DP_OFST (8) - -//U3D_U2PHYACR4 -#define A60931_RG_USB20_DP_100K_MODE_OFST (18) -#define A60931_RG_USB20_DM_100K_EN_OFST (17) -#define A60931_USB20_DP_100K_EN_OFST (16) -#define A60931_USB20_GPIO_DM_I_OFST (15) -#define A60931_USB20_GPIO_DP_I_OFST (14) -#define A60931_USB20_GPIO_DM_OE_OFST (13) -#define A60931_USB20_GPIO_DP_OE_OFST (12) -#define A60931_RG_USB20_GPIO_CTL_OFST (9) -#define A60931_USB20_GPIO_MODE_OFST (8) -#define A60931_RG_USB20_TX_BIAS_EN_OFST (5) -#define A60931_RG_USB20_TX_VCMPDN_EN_OFST (4) -#define A60931_RG_USB20_HS_SQ_EN_MODE_OFST (2) -#define A60931_RG_USB20_HS_RCV_EN_MODE_OFST (0) - -//U3D_U2PHYAMON0 -#define A60931_RGO_USB20_GPIO_DM_O_OFST (1) -#define A60931_RGO_USB20_GPIO_DP_O_OFST (0) - -//U3D_U2PHYDCR0 -#define A60931_RG_USB20_CDR_TST_OFST (30) -#define A60931_RG_USB20_GATED_ENB_OFST (29) -#define A60931_RG_USB20_TESTMODE_OFST (26) -#define A60931_RG_SIFSLV_USB20_PLL_STABLE_OFST (25) -#define A60931_RG_SIFSLV_USB20_PLL_FORCE_ON_OFST (24) -#define A60931_RG_USB20_PHYD_RESERVE_OFST (8) -#define A60931_RG_USB20_EBTHRLD_OFST (7) -#define A60931_RG_USB20_EARLY_HSTX_I_OFST (6) -#define A60931_RG_USB20_TX_TST_OFST (5) -#define A60931_RG_USB20_NEGEDGE_ENB_OFST (4) -#define A60931_RG_USB20_CDR_FILT_OFST (0) - -//U3D_U2PHYDCR1 -#define A60931_RG_USB20_PROBE_SEL_OFST (24) -#define A60931_RG_USB20_DRVVBUS_OFST (23) -#define A60931_RG_DEBUG_EN_OFST (22) -#define A60931_RG_USB20_OTG_PROBE_OFST (20) -#define A60931_RG_USB20_SW_PLLMODE_OFST (18) -#define A60931_RG_USB20_BERTH_OFST (16) -#define A60931_RG_USB20_LBMODE_OFST (13) -#define A60931_RG_USB20_FORCE_TAP_OFST (12) -#define A60931_RG_USB20_TAPSEL_OFST (0) - -//U3D_U2PHYDTM0 -#define A60931_RG_UART_MODE_OFST (30) -#define A60931_FORCE_UART_I_OFST (29) -#define A60931_FORCE_UART_BIAS_EN_OFST (28) -#define A60931_FORCE_UART_TX_OE_OFST (27) -#define A60931_FORCE_UART_EN_OFST (26) -#define A60931_FORCE_USB_CLKEN_OFST (25) -#define A60931_FORCE_DRVVBUS_OFST (24) -#define A60931_FORCE_DATAIN_OFST (23) -#define A60931_FORCE_TXVALID_OFST (22) -#define A60931_FORCE_DM_PULLDOWN_OFST (21) -#define A60931_FORCE_DP_PULLDOWN_OFST (20) -#define A60931_FORCE_XCVRSEL_OFST (19) -#define A60931_FORCE_SUSPENDM_OFST (18) -#define A60931_FORCE_TERMSEL_OFST (17) -#define A60931_FORCE_OPMODE_OFST (16) -#define A60931_UTMI_MUXSEL_OFST (15) -#define A60931_RG_RESET_OFST (14) -#define A60931_RG_DATAIN_OFST (10) -#define A60931_RG_TXVALIDH_OFST (9) -#define A60931_RG_TXVALID_OFST (8) -#define A60931_RG_DMPULLDOWN_OFST (7) -#define A60931_RG_DPPULLDOWN_OFST (6) -#define A60931_RG_XCVRSEL_OFST (4) -#define A60931_RG_SUSPENDM_OFST (3) -#define A60931_RG_TERMSEL_OFST (2) -#define A60931_RG_OPMODE_OFST (0) - -//U3D_U2PHYDTM1 -#define A60931_RG_USB20_PRBS7_EN_OFST (31) -#define A60931_RG_USB20_PRBS7_BITCNT_OFST (24) -#define A60931_RG_USB20_CLK48M_EN_OFST (23) -#define A60931_RG_USB20_CLK60M_EN_OFST (22) -#define A60931_RG_UART_I_OFST (19) -#define A60931_RG_UART_BIAS_EN_OFST (18) -#define A60931_RG_UART_TX_OE_OFST (17) -#define A60931_RG_UART_EN_OFST (16) -#define A60931_RG_IP_U2_PORT_POWER_OFST (15) -#define A60931_FORCE_IP_U2_PORT_POWER_OFST (14) -#define A60931_FORCE_VBUSVALID_OFST (13) -#define A60931_FORCE_SESSEND_OFST (12) -#define A60931_FORCE_BVALID_OFST (11) -#define A60931_FORCE_AVALID_OFST (10) -#define A60931_FORCE_IDDIG_OFST (9) -#define A60931_FORCE_IDPULLUP_OFST (8) -#define A60931_RG_VBUSVALID_OFST (5) -#define A60931_RG_SESSEND_OFST (4) -#define A60931_RG_BVALID_OFST (3) -#define A60931_RG_AVALID_OFST (2) -#define A60931_RG_IDDIG_OFST (1) -#define A60931_RG_IDPULLUP_OFST (0) - -//U3D_U2PHYDMON0 -#define A60931_RG_USB20_PRBS7_BERTH_OFST (0) -#define E60802_RG_USB20_EOP_CTL_OFST (16) - -//U3D_U2PHYDMON1 -#define A60931_USB20_UART_O_OFST (31) -#define A60931_RGO_USB20_LB_PASS_OFST (30) -#define A60931_RGO_USB20_LB_DONE_OFST (29) -#define A60931_AD_USB20_BVALID_OFST (28) -#define A60931_USB20_IDDIG_OFST (27) -#define A60931_AD_USB20_VBUSVALID_OFST (26) -#define A60931_AD_USB20_SESSEND_OFST (25) -#define A60931_AD_USB20_AVALID_OFST (24) -#define A60931_USB20_LINE_STATE_OFST (22) -#define A60931_USB20_HST_DISCON_OFST (21) -#define A60931_USB20_TX_READY_OFST (20) -#define A60931_USB20_RX_ERROR_OFST (19) -#define A60931_USB20_RX_ACTIVE_OFST (18) -#define A60931_USB20_RX_VALIDH_OFST (17) -#define A60931_USB20_RX_VALID_OFST (16) -#define A60931_USB20_DATA_OUT_OFST (0) - -//U3D_U2PHYDMON2 -#define A60931_RGO_TXVALID_CNT_OFST (24) -#define A60931_RGO_RXACTIVE_CNT_OFST (16) -#define A60931_RGO_USB20_LB_BERCNT_OFST (8) -#define A60931_USB20_PROBE_OUT_OFST (0) - -//U3D_U2PHYDMON3 -#define A60931_RGO_USB20_PRBS7_ERRCNT_OFST (16) -#define A60931_RGO_USB20_PRBS7_DONE_OFST (3) -#define A60931_RGO_USB20_PRBS7_LOCK_OFST (2) -#define A60931_RGO_USB20_PRBS7_PASS_OFST (1) -#define A60931_RGO_USB20_PRBS7_PASSTH_OFST (0) - -//U3D_U2PHYBC12C -#define A60931_RG_SIFSLV_CHGDT_DEGLCH_CNT_OFST (28) -#define A60931_RG_SIFSLV_CHGDT_CTRL_CNT_OFST (24) -#define A60931_RG_SIFSLV_CHGDT_FORCE_MODE_OFST (16) -#define A60931_RG_CHGDT_ISRC_LEV_OFST (14) -#define A60931_RG_CHGDT_VDATSRC_OFST (13) -#define A60931_RG_CHGDT_BGVREF_SEL_OFST (10) -#define A60931_RG_CHGDT_RDVREF_SEL_OFST (8) -#define A60931_RG_CHGDT_ISRC_DP_OFST (7) -#define A60931_RG_SIFSLV_CHGDT_OPOUT_DM_OFST (6) -#define A60931_RG_CHGDT_VDAT_DM_OFST (5) -#define A60931_RG_CHGDT_OPOUT_DP_OFST (4) -#define A60931_RG_SIFSLV_CHGDT_VDAT_DP_OFST (3) -#define A60931_RG_SIFSLV_CHGDT_COMP_EN_OFST (2) -#define A60931_RG_SIFSLV_CHGDT_OPDRV_EN_OFST (1) -#define A60931_RG_CHGDT_EN_OFST (0) - -//U3D_U2PHYBC12C1 -#define A60931_RG_CHGDT_REV_OFST (0) - -//U3D_REGFPPC -#define A60931_USB11_OTG_REG_OFST (4) -#define A60931_USB20_OTG_REG_OFST (3) -#define A60931_CHGDT_REG_OFST (2) -#define A60931_USB11_REG_OFST (1) -#define A60931_USB20_REG_OFST (0) - -//U3D_VERSIONC -#define A60931_VERSION_CODE_REGFILE_OFST (24) -#define A60931_USB11_VERSION_CODE_OFST (16) -#define A60931_VERSION_CODE_ANA_OFST (8) -#define A60931_VERSION_CODE_DIG_OFST (0) - -//U3D_REGFCOM -#define A60931_RG_PAGE_OFST (24) -#define A60931_I2C_MODE_OFST (16) - -struct u3phya_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg2; - __le32 reg3; - /* 0x10 */ - __le32 reg4; - __le32 reg5; - __le32 reg6; - __le32 reg7; - /* 0x20 */ - __le32 reg8; - __le32 reg9; - __le32 rega; - __le32 regb; - /* 0x30 */ - __le32 regc; -}; - -/* A60810 */ - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CHPEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_BG_DIV (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_INTR_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_MPX_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_MPX_SEL (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_REF_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_VRT_VREF_SEL (0xf<<11) /* 14:11 */ -#define A60810_RG_SSUSB_BG_MONEN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_INT_BIAS_SEL (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EXT_BIAS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_CLKDRV_OFFSET (0x3<<2) /* 3:2 */ -#define A60810_RG_PCIE_CLKDRV_SLEW (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP (0x7<<29) /* 31:29 */ -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_XTAL_MON_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_XTAL_HYS (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE (0xffff<<10) /* 25:10 */ -#define A60810_RG_SSUSB_SYSPLL_PREDIV (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_SYSPLL_POSDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_SYSPLL_VOD_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_SYSPLL_RST_DLY (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_SYSPLL_BLP (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_SYSPLL_BP (0x1<<0) /* 0:0 */ - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_BC (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_SYSPLL_BACK_EN (0x1<<24) /* 24:24 */ - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV (0x7fffffff<<1)/* 31:1 */ -#define A60810_RG_SSUSB_SYSPLL_HR_EN (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS (0x3<<29) /* 30:29 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD (0x3<<27) /* 28:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_SYSPLL_RESERVE (0xff<<17)/* 24:17 */ -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE (0xffff<<1)/* 16:1 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_CALIB (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_IDEM_BIAS (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_TX_R50_FON (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_TX_SR (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_RXDET_RSEL (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXDET_UPDN_SEL (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_L (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CKMON_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TX_VLMON_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_TX_VLMON_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CKMON_SEL (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_RXLBTX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXLBRX_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RESERVE (0x3ff<<16)/* 25:16 */ -#define A60810_RG_SSUSB_PLL_POSDIV (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_PLL_VOD_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_PLL_MONREF_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_MONCK_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_PLL_MONVC_EN (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_PLL_RLH_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KS (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KF (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_RST_DLY (0x3<<2) /* 3:2 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_CLK_PH_INV (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_VADJ (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDS_MONEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE (0x7<<20) /* 22:20 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_DDS_C (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2 (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_LFPS_LPF (0x3<<13) /* 14:13 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_CDR_OSCDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_MONMUX (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_CDR_RST_DLY (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CDR_BYPASS (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_CDR_PI_SLEW (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_CDR_EPEN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_MONEN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_CDR_MONEN_DIG (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_REGOD (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KS (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KF (0x3<<9) /* 10:9 */ -#define A60810_RG_SSUSB_RX_DAC_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DAC_PWD (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_CURSEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MUX (0x1f<<1) /* 5:1 */ -#define A60810_RG_SSUSB_RX_R2T_EN (0x1<<0) /* 0:0 */ - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_50_LOWER (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_RX_50_TAR (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_RX_SW_CTRL (0xf<<21) /* 24:21 */ -#define A60810_RG_PCIE_SIGDET_VTH (0x3<<19) /* 20:19 */ -#define A60810_RG_PCIE_SIGDET_LPF (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_LFPS_MON_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RX_PD_RST (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_PD_RST_PASS (0x1<<9) /* 9:9 */ - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_RXAFE_RESERVE (0xff<<16) /* 23:16 */ -#define A60810_RG_PCIE_RX_RESERVE (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_VRT_25M_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_MPX_SEL_L0 (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_SIGDET_HF (0x3<<0) /* 1:0 */ - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN_OFST (31) -#define A60810_RG_SSUSB_CHPEN_OFST (30) -#define A60810_RG_SSUSB_BG_DIV_OFST (28) -#define A60810_RG_SSUSB_INTR_EN_OFST (26) -#define A60810_RG_SSUSB_MPX_EN_OFST (24) -#define A60810_RG_SSUSB_MPX_SEL_OFST (16) -#define A60810_RG_SSUSB_REF_EN_OFST (15) -#define A60810_RG_SSUSB_VRT_VREF_SEL_OFST (11) -#define A60810_RG_SSUSB_BG_MONEN_OFST (8) -#define A60810_RG_SSUSB_INT_BIAS_SEL_OFST (7) -#define A60810_RG_SSUSB_EXT_BIAS_SEL_OFST (6) -#define A60810_RG_PCIE_CLKDRV_OFFSET_OFST (2) -#define A60810_RG_PCIE_CLKDRV_SLEW_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP_OFST (29) -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN_OFST (28) -#define A60810_RG_SSUSB_XTAL_MON_EN_OFST (27) -#define A60810_RG_SSUSB_XTAL_HYS_OFST (26) -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE_OFST (10) -#define A60810_RG_SSUSB_SYSPLL_PREDIV_OFST (8) -#define A60810_RG_SSUSB_SYSPLL_POSDIV_OFST (6) -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL_OFST (5) -#define A60810_RG_SSUSB_SYSPLL_VOD_EN_OFST (4) -#define A60810_RG_SSUSB_SYSPLL_RST_DLY_OFST (2) -#define A60810_RG_SSUSB_SYSPLL_BLP_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_BP_OFST (0) - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_BC_OFST (30) -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN_OFST (28) -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM_OFST (26) -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_BACK_EN_OFST (24) - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_HR_EN_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_RESERVE_OFST (17) -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE_OFST (1) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB_OFST (31) -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN_OFST (30) -#define A60810_RG_SSUSB_IDRV_CALIB_OFST (24) -#define A60810_RG_SSUSB_IDEM_BIAS_OFST (20) -#define A60810_RG_SSUSB_TX_R50_FON_OFST (19) -#define A60810_RG_SSUSB_TX_SR_OFST (16) -#define A60810_RG_SSUSB_RXDET_RSEL_OFST (14) -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE_OFST (13) -#define A60810_RG_SSUSB_RXDET_UPDN_SEL_OFST (12) -#define A60810_RG_SSUSB_RXDET_VTHSEL_L_OFST (10) -#define A60810_RG_SSUSB_RXDET_VTHSEL_H_OFST (8) -#define A60810_RG_SSUSB_CKMON_EN_OFST (7) -#define A60810_RG_SSUSB_TX_VLMON_EN_OFST (6) -#define A60810_RG_SSUSB_TX_VLMON_SEL_OFST (4) -#define A60810_RG_SSUSB_CKMON_SEL_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM_OFST (28) -#define A60810_RG_SSUSB_RXLBTX_EN_OFST (27) -#define A60810_RG_SSUSB_TXLBRX_EN_OFST (26) -#define A60810_RG_SSUSB_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_POSDIV_OFST (14) -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD_OFST (13) -#define A60810_RG_SSUSB_PLL_VOD_EN_OFST (12) -#define A60810_RG_SSUSB_PLL_MONREF_EN_OFST (11) -#define A60810_RG_SSUSB_PLL_MONCK_EN_OFST (10) -#define A60810_RG_SSUSB_PLL_MONVC_EN_OFST (9) -#define A60810_RG_SSUSB_PLL_RLH_EN_OFST (8) -#define A60810_RG_SSUSB_PLL_AUTOK_KS_OFST (6) -#define A60810_RG_SSUSB_PLL_AUTOK_KF_OFST (4) -#define A60810_RG_SSUSB_PLL_RST_DLY_OFST (2) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_PRD_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI_OFST (31) -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN_OFST (30) -#define A60810_RG_SSUSB_PLL_CLK_PH_INV_OFST (29) -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_VADJ_OFST (26) -#define A60810_RG_SSUSB_PLL_DDS_MONEN_OFST (25) -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT_OFST (24) -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN_OFST (23) -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE_OFST (20) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_DDS_C_OFST (16) -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2_OFST (15) -#define A60810_RG_SSUSB_LFPS_LPF_OFST (13) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS_OFST (31) -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL_OFST (30) -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL_OFST (29) -#define A60810_RG_SSUSB_CDR_OSCDET_EN_OFST (28) -#define A60810_RG_SSUSB_CDR_MONMUX_OFST (27) -#define A60810_RG_SSUSB_CDR_RST_DLY_OFST (25) -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL_OFST (24) -#define A60810_RG_SSUSB_CDR_BYPASS_OFST (22) -#define A60810_RG_SSUSB_CDR_PI_SLEW_OFST (20) -#define A60810_RG_SSUSB_CDR_EPEN_OFST (19) -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD_OFST (18) -#define A60810_RG_SSUSB_CDR_MONEN_OFST (16) -#define A60810_RG_SSUSB_CDR_MONEN_DIG_OFST (15) -#define A60810_RG_SSUSB_CDR_REGOD_OFST (13) -#define A60810_RG_SSUSB_CDR_AUTOK_KS_OFST (11) -#define A60810_RG_SSUSB_CDR_AUTOK_KF_OFST (9) -#define A60810_RG_SSUSB_RX_DAC_EN_OFST (8) -#define A60810_RG_SSUSB_RX_DAC_PWD_OFST (7) -#define A60810_RG_SSUSB_EQ_CURSEL_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MUX_OFST (1) -#define A60810_RG_SSUSB_RX_R2T_EN_OFST (0) - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN_OFST (31) -#define A60810_RG_SSUSB_RX_50_LOWER_OFST (28) -#define A60810_RG_SSUSB_RX_50_TAR_OFST (26) -#define A60810_RG_SSUSB_RX_SW_CTRL_OFST (21) -#define A60810_RG_PCIE_SIGDET_VTH_OFST (19) -#define A60810_RG_PCIE_SIGDET_LPF_OFST (17) -#define A60810_RG_SSUSB_LFPS_MON_EN_OFST (16) -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL_OFST (12) -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS_OFST (11) -#define A60810_RG_SSUSB_RX_PD_RST_OFST (10) -#define A60810_RG_SSUSB_RX_PD_RST_PASS_OFST (9) - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE_OFST (24) -#define A60810_RG_SSUSB_RXAFE_RESERVE_OFST (16) -#define A60810_RG_PCIE_RX_RESERVE_OFST (8) -#define A60810_RG_SSUSB_VRT_25M_EN_OFST (7) -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN_OFST (5) -#define A60810_RG_SSUSB_MPX_SEL_L0_OFST (4) -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL_OFST (3) -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL_OFST (2) -#define A60810_RG_PCIE_SIGDET_HF_OFST (0) - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE_OFST (0) - -/* A60931 */ - -//U3D_reg0 -#define A60931_RG_SSUSB_BGR_EN (0x1<<31) //31:31 -#define A60931_RG_SSUSB_CHPEN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_BG_DIV (0x3<<28) //29:28 -#define A60931_RG_SSUSB_INTR_EN (0x1<<26) //26:26 -#define A60931_RG_SSUSB_MPX_EN (0x1<<24) //24:24 -#define A60931_RG_SSUSB_MPX_SEL (0xff<<16) //23:16 -#define A60931_RG_SSUSB_IEXT_INTR_CTRL (0x3f<<10) //15:10 -#define A60931_RG_SSUSB_VRT_VREF_SEL (0xf<<6) //9:6 -#define A60931_RG_SSUSB_REF_EN (0x1<<5) //5:5 -#define A60931_RG_SSUSB_BG_MONEN (0x1<<4) //4:4 -#define A60931_RG_SSUSB_INT_BIAS_SEL (0x1<<3) //3:3 -#define A60931_RG_SSUSB_EXT_BIAS_SEL (0x1<<2) //2:2 - -//U3D_reg1 -#define A60931_RG_PCIE_CLKDET_VTH (0x3<<30) //30:2 -#define A60931_RG_VUSB10_ON (0x1<<29) //29:29 -#define A60931_RG_SSUSB_XTAL_TST_A2DCK_EN (0x1<<28) //28:28 -#define A60931_RG_SSUSB_XTAL_MON_EN (0x1<<27) //27:27 -#define A60931_RG_SSUSB_XTAL_HYS (0x1<<26) //26:26 -#define A60931_RG_SSUSB_XTAL_TOP_RESERVE (0xffff<<10) //25:10 -#define A60931_RG_SSUSB_SYSPLL_PREDIV (0x3<<8) //9:8 -#define A60931_RG_SSUSB_SYSPLL_POSDIV (0x3<<6) //7:6 -#define A60931_RG_SSUSB_SYSPLL_VCO_DIV_SEL (0x1<<5) //5:5 -#define A60931_RG_SSUSB_SYSPLL_VOD_EN (0x1<<4) //4:4 -#define A60931_RG_SSUSB_SYSPLL_RST_DLY (0x3<<2) //3:2 -#define A60931_RG_SSUSB_SYSPLL_BLP (0x1<<1) //1:1 -#define A60931_RG_SSUSB_SYSPLL_BP (0x1<<0) //0:0 - -//U3D_reg2 -#define A60931_RG_SSUSB_SYSPLL_BR (0x1<<31) //31:31 -#define A60931_RG_SSUSB_SYSPLL_BC (0x1<<30) //30:30 -#define A60931_RG_SSUSB_SYSPLL_MONCK_EN (0x1<<29) //29:29 -#define A60931_RG_SSUSB_SYSPLL_MONVC_EN (0x1<<28) //28:28 -#define A60931_RG_SSUSB_SYSPLL_MONREF_EN (0x1<<27) //27:27 -#define A60931_RG_SSUSB_SYSPLL_SDM_IFM (0x1<<26) //26:26 -#define A60931_RG_SSUSB_SYSPLL_SDM_OUT (0x1<<25) //25:25 -#define A60931_RG_SSUSB_SYSPLL_BACK_EN (0x1<<24) //24:24 - -//U3D_reg3 -#define A60931_RG_SSUSB_SYSPLL_FBDIV (0x7fffffff<<1) //31:1 -#define A60931_RG_SSUSB_SYSPLL_HR_EN (0x1<<0) //0:0 - -//U3D_reg4 -#define A60931_RG_SSUSB_SYSPLL_SDM_DI_EN (0x1<<31) //31:31 -#define A60931_RG_SSUSB_SYSPLL_SDM_DI_LS (0x3<<29) //30:29 -#define A60931_RG_SSUSB_SYSPLL_SDM_ORD (0x3<<27) //28:27 -#define A60931_RG_SSUSB_SYSPLL_SDM_MODE (0x3<<25) //26:25 -#define A60931_RG_SSUSB_SYSPLL_RESERVE (0xff<<17) //24:17 -#define A60931_RG_SSUSB_SYSPLL_TOP_RESERVE (0xffff<<1) //16:1 - -//U3D_reg5 -#define A60931_RG_SSUSB_TX250MCK_INVB (0x1<<31) //31:31 -#define A60931_RG_SSUSB_IDRV_ITAILOP_EN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_IDRV_CALIB (0x3f<<24) //29:24 -#define A60931_RG_SSUSB_IDEM_BIAS (0xf<<20) //23:20 -#define A60931_RG_SSUSB_TX_R50_FON (0x1<<19) //19:19 -#define A60931_RG_SSUSB_TX_SR (0x7<<16) //18:16 -#define A60931_RG_SSUSB_RXDET_RSEL (0x3<<14) //15:14 -#define A60931_RG_SSUSB_RXDET_UPDN_FORCE (0x1<<13) //13:13 -#define A60931_RG_SSUSB_RXDET_UPDN_SEL (0x1<<12) //12:12 -#define A60931_RG_SSUSB_RXDET_VTHSEL_L (0x3<<10) //11:10 -#define A60931_RG_SSUSB_RXDET_VTHSEL_H (0x3<<8) //9:8 -#define A60931_RG_SSUSB_CKMON_EN (0x1<<7) //7:7 -#define A60931_RG_SSUSB_TX_VLMON_EN (0x1<<6) //6:6 -#define A60931_RG_SSUSB_TX_VLMON_SEL (0x3<<4) //5:4 -#define A60931_RG_SSUSB_CKMON_SEL (0xf<<0) //3:0 - -//U3D_reg6 -#define A60931_RG_SSUSB_LN0_CDR_RESERVE (0xff<<24) //8:8 -#define A60931_RG_SSUSB_LN0_RXAFE_RESERVE (0xff<<16) //23:16 -#define A60931_RG_PCIE_LN0_RX_RESERVE (0xff<<8) //15:8 -#define A60931_RG_SSUSB_LN0_LNMPX_SEL (0xf<<0) //3:0 - -//U3D_reg7 -#define A60931_RG_SSUSB_PLL_RESERVE (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_PLL_SSC_PRD (0xffff<<0) //15:0 - -//U3D_reg8 -#define A60931_RG_SSUSB_PLL_SSC_PHASE_INI (0x1<<31) //31:31 -#define A60931_RG_SSUSB_PLL_SSC_TRI_EN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_PLL_CLK_PH_INV (0x1<<29) //29:29 -#define A60931_RG_SSUSB_PLL_DDS_LPF_EN (0x1<<28) //28:28 -#define A60931_RG_SSUSB_PLL_DDS_RST_SEL (0x1<<27) //27:27 -#define A60931_RG_SSUSB_PLL_DDS_VADJ (0x1<<26) //26:26 -#define A60931_RG_SSUSB_PLL_DDS_MONEN (0x1<<25) //25:25 -#define A60931_RG_SSUSB_PLL_DDS_SEL_EXT (0x1<<24) //24:24 -#define A60931_RG_SSUSB_PLL_DDS_PI_PL_EN (0x1<<23) //23:23 -#define A60931_RG_SSUSB_PLL_DDS_FRAC_MUTE (0x7<<20) //22:20 -#define A60931_RG_SSUSB_PLL_DDS_HF_EN (0x1<<19) //19:19 -#define A60931_RG_SSUSB_PLL_DDS_C (0x7<<16) //18:16 -#define A60931_RG_SSUSB_PLL_DDS_PREDIV2 (0x1<<15) //15:15 -#define A60931_RG_SSUSB_LFPS_LPF (0x3<<13) //14:13 - -//U3D_reg9 -#define A60931_RG_SSUSB_CDR_PD_DIV_BYPASS (0x1<<31) //31:31 -#define A60931_RG_SSUSB_CDR_PD_DIV_SEL (0x1<<30) //30:30 -#define A60931_RG_SSUSB_CDR_CPBIAS_SEL (0x1<<29) //29:29 -#define A60931_RG_SSUSB_CDR_OSCDET_EN (0x1<<28) //28:28 -#define A60931_RG_SSUSB_CDR_MONMUX (0x1<<27) //27:27 -#define A60931_RG_SSUSB_CDR_RST_DLY (0x3<<25) //26:25 -#define A60931_RG_SSUSB_CDR_RSTB_MANUAL (0x1<<24) //24:24 -#define A60931_RG_SSUSB_CDR_BYPASS (0x3<<22) //23:22 -#define A60931_RG_SSUSB_CDR_PI_SLEW (0x3<<20) //21:20 -#define A60931_RG_SSUSB_CDR_EPEN (0x1<<19) //19:19 -#define A60931_RG_SSUSB_CDR_AUTOK_LOAD (0x1<<18) //18:18 -#define A60931_RG_SSUSB_CDR_MONEN (0x1<<16) //16:16 -#define A60931_RG_SSUSB_CDR_MONEN_DIG (0x1<<15) //15:15 -#define A60931_RG_SSUSB_CDR_REGOD (0x3<<13) //14:13 -#define A60931_RG_SSUSB_CDR_AUTOK_KS (0x3<<11) //12:11 -#define A60931_RG_SSUSB_CDR_AUTOK_KF (0x3<<9) //10:9 -#define A60931_RG_SSUSB_RX_DAC_EN (0x1<<8) //8:8 -#define A60931_RG_SSUSB_RX_DAC_PWD (0x1<<7) //7:7 -#define A60931_RG_SSUSB_EQ_CURSEL (0x1<<6) //6:6 -#define A60931_RG_SSUSB_RX_DAC_MUX (0x1f<<1) //5:1 -#define A60931_RG_SSUSB_RX_R2T_EN (0x1<<0) //0:0 - -//U3D_regA -#define A60931_RG_SSUSB_RX_T2R_EN (0x1<<31) //31:31 -#define A60931_RG_SSUSB_RX_50_LOWER (0x7<<28) //30:28 -#define A60931_RG_SSUSB_RX_50_TAR (0x3<<26) //27:26 -#define A60931_RG_SSUSB_RX_SW_CTRL (0xf<<21) //24:21 -#define A60931_RG_PCIE_SIGDET_VTH (0x3<<19) //20:19 -#define A60931_RG_PCIE_SIGDET_LPF (0x3<<17) //18:17 -#define A60931_RG_SSUSB_LFPS_MON_EN (0x1<<16) //16:16 -#define A60931_RG_SSUSB_RXAFE_DCMON_SEL (0xf<<12) //15:12 -#define A60931_RG_SSUSB_RX_P1_ENTRY_PASS (0x1<<11) //11:11 -#define A60931_RG_SSUSB_RX_PD_RST (0x1<<10) //10:10 -#define A60931_RG_SSUSB_RX_PD_RST_PASS (0x1<<9) //9:9 - -//U3D_regB -#define A60931_RG_SSUSB_CDR_RESERVE (0xff<<24) //31:24 -#define A60931_RG_SSUSB_RXAFE_RESERVE (0xff<<16) //23:16 -#define A60931_RG_PCIE_RX_RESERVE (0xff<<8) //15:8 -#define A60931_RG_SSUSB_VRT_25M_EN (0x1<<7) //7:7 -#define A60931_RG_SSUSB_RX_PD_PICAL_SWAP (0x1<<6) //6:6 -#define A60931_RG_SSUSB_RX_DAC_MEAS_EN (0x1<<5) //5:5 -#define A60931_RG_SSUSB_MPX_SEL_L0 (0x1<<4) //4:4 -#define A60931_RG_SSUSB_LFPS_SLCOUT_SEL (0x1<<3) //3:3 -#define A60931_RG_SSUSB_LFPS_CMPOUT_SEL (0x1<<2) //2:2 -#define A60931_RG_PCIE_SIGDET_HF (0x3<<0) //1:0 - -//U3D_regC -#define A60931_RGS_SSUSB_RX_DEBUG_RESERVE (0xff<<0) //7:0 - -/* OFFSET */ - -//U3D_reg0 -#define A60931_RG_SSUSB_BGR_EN_OFST (31) -#define A60931_RG_SSUSB_CHPEN_OFST (30) -#define A60931_RG_SSUSB_BG_DIV_OFST (28) -#define A60931_RG_SSUSB_INTR_EN_OFST (26) -#define A60931_RG_SSUSB_MPX_EN_OFST (24) -#define A60931_RG_SSUSB_MPX_SEL_OFST (16) -#define A60931_RG_SSUSB_IEXT_INTR_CTRL_OFST (10) -#define A60931_RG_SSUSB_VRT_VREF_SEL_OFST (6) -#define A60931_RG_SSUSB_REF_EN_OFST (5) -#define A60931_RG_SSUSB_BG_MONEN_OFST (4) -#define A60931_RG_SSUSB_INT_BIAS_SEL_OFST (3) -#define A60931_RG_SSUSB_EXT_BIAS_SEL_OFST (2) - -//U3D_reg1 -#define A60931_RG_PCIE_CLKDET_VTH_OFST (30) -#define A60931_RG_VUSB10_ON_OFST (29) -#define A60931_RG_SSUSB_XTAL_TST_A2DCK_EN_OFST (28) -#define A60931_RG_SSUSB_XTAL_MON_EN_OFST (27) -#define A60931_RG_SSUSB_XTAL_HYS_OFST (26) -#define A60931_RG_SSUSB_XTAL_TOP_RESERVE_OFST (10) -#define A60931_RG_SSUSB_SYSPLL_PREDIV_OFST (8) -#define A60931_RG_SSUSB_SYSPLL_POSDIV_OFST (6) -#define A60931_RG_SSUSB_SYSPLL_VCO_DIV_SEL_OFST (5) -#define A60931_RG_SSUSB_SYSPLL_VOD_EN_OFST (4) -#define A60931_RG_SSUSB_SYSPLL_RST_DLY_OFST (2) -#define A60931_RG_SSUSB_SYSPLL_BLP_OFST (1) -#define A60931_RG_SSUSB_SYSPLL_BP_OFST (0) - -//U3D_reg2 -#define A60931_RG_SSUSB_SYSPLL_BR_OFST (31) -#define A60931_RG_SSUSB_SYSPLL_BC_OFST (30) -#define A60931_RG_SSUSB_SYSPLL_MONCK_EN_OFST (29) -#define A60931_RG_SSUSB_SYSPLL_MONVC_EN_OFST (28) -#define A60931_RG_SSUSB_SYSPLL_MONREF_EN_OFST (27) -#define A60931_RG_SSUSB_SYSPLL_SDM_IFM_OFST (26) -#define A60931_RG_SSUSB_SYSPLL_SDM_OUT_OFST (25) -#define A60931_RG_SSUSB_SYSPLL_BACK_EN_OFST (24) - -//U3D_reg3 -#define A60931_RG_SSUSB_SYSPLL_FBDIV_OFST (1) -#define A60931_RG_SSUSB_SYSPLL_HR_EN_OFST (0) - -//U3D_reg4 -#define A60931_RG_SSUSB_SYSPLL_SDM_DI_EN_OFST (31) -#define A60931_RG_SSUSB_SYSPLL_SDM_DI_LS_OFST (29) -#define A60931_RG_SSUSB_SYSPLL_SDM_ORD_OFST (27) -#define A60931_RG_SSUSB_SYSPLL_SDM_MODE_OFST (25) -#define A60931_RG_SSUSB_SYSPLL_RESERVE_OFST (17) -#define A60931_RG_SSUSB_SYSPLL_TOP_RESERVE_OFST (1) - -//U3D_reg5 -#define A60931_RG_SSUSB_TX250MCK_INVB_OFST (31) -#define A60931_RG_SSUSB_IDRV_ITAILOP_EN_OFST (30) -#define A60931_RG_SSUSB_IDRV_CALIB_OFST (24) -#define A60931_RG_SSUSB_IDEM_BIAS_OFST (20) -#define A60931_RG_SSUSB_TX_R50_FON_OFST (19) -#define A60931_RG_SSUSB_TX_SR_OFST (16) -#define A60931_RG_SSUSB_RXDET_RSEL_OFST (14) -#define A60931_RG_SSUSB_RXDET_UPDN_FORCE_OFST (13) -#define A60931_RG_SSUSB_RXDET_UPDN_SEL_OFST (12) -#define A60931_RG_SSUSB_RXDET_VTHSEL_L_OFST (10) -#define A60931_RG_SSUSB_RXDET_VTHSEL_H_OFST (8) -#define A60931_RG_SSUSB_CKMON_EN_OFST (7) -#define A60931_RG_SSUSB_TX_VLMON_EN_OFST (6) -#define A60931_RG_SSUSB_TX_VLMON_SEL_OFST (4) -#define A60931_RG_SSUSB_CKMON_SEL_OFST (0) - -//U3D_reg6 -#define A60931_RG_SSUSB_LN0_CDR_RESERVE_OFST (24) -#define A60931_RG_SSUSB_LN0_RXAFE_RESERVE_OFST (16) -#define A60931_RG_PCIE_LN0_RX_RESERVE_OFST (8) -#define A60931_RG_SSUSB_LN0_LNMPX_SEL_OFST (0) - -//U3D_reg7 -#define A60931_RG_SSUSB_PLL_RESERVE_OFST (16) -#define A60931_RG_SSUSB_PLL_SSC_PRD_OFST (0) - -//U3D_reg8 -#define A60931_RG_SSUSB_PLL_SSC_PHASE_INI_OFST (31) -#define A60931_RG_SSUSB_PLL_SSC_TRI_EN_OFST (30) -#define A60931_RG_SSUSB_PLL_CLK_PH_INV_OFST (29) -#define A60931_RG_SSUSB_PLL_DDS_LPF_EN_OFST (28) -#define A60931_RG_SSUSB_PLL_DDS_RST_SEL_OFST (27) -#define A60931_RG_SSUSB_PLL_DDS_VADJ_OFST (26) -#define A60931_RG_SSUSB_PLL_DDS_MONEN_OFST (25) -#define A60931_RG_SSUSB_PLL_DDS_SEL_EXT_OFST (24) -#define A60931_RG_SSUSB_PLL_DDS_PI_PL_EN_OFST (23) -#define A60931_RG_SSUSB_PLL_DDS_FRAC_MUTE_OFST (20) -#define A60931_RG_SSUSB_PLL_DDS_HF_EN_OFST (19) -#define A60931_RG_SSUSB_PLL_DDS_C_OFST (16) -#define A60931_RG_SSUSB_PLL_DDS_PREDIV2_OFST (15) -#define A60931_RG_SSUSB_LFPS_LPF_OFST (13) - -//U3D_reg9 -#define A60931_RG_SSUSB_CDR_PD_DIV_BYPASS_OFST (31) -#define A60931_RG_SSUSB_CDR_PD_DIV_SEL_OFST (30) -#define A60931_RG_SSUSB_CDR_CPBIAS_SEL_OFST (29) -#define A60931_RG_SSUSB_CDR_OSCDET_EN_OFST (28) -#define A60931_RG_SSUSB_CDR_MONMUX_OFST (27) -#define A60931_RG_SSUSB_CDR_RST_DLY_OFST (25) -#define A60931_RG_SSUSB_CDR_RSTB_MANUAL_OFST (24) -#define A60931_RG_SSUSB_CDR_BYPASS_OFST (22) -#define A60931_RG_SSUSB_CDR_PI_SLEW_OFST (20) -#define A60931_RG_SSUSB_CDR_EPEN_OFST (19) -#define A60931_RG_SSUSB_CDR_AUTOK_LOAD_OFST (18) -#define A60931_RG_SSUSB_CDR_MONEN_OFST (16) -#define A60931_RG_SSUSB_CDR_MONEN_DIG_OFST (15) -#define A60931_RG_SSUSB_CDR_REGOD_OFST (13) -#define A60931_RG_SSUSB_CDR_AUTOK_KS_OFST (11) -#define A60931_RG_SSUSB_CDR_AUTOK_KF_OFST (9) -#define A60931_RG_SSUSB_RX_DAC_EN_OFST (8) -#define A60931_RG_SSUSB_RX_DAC_PWD_OFST (7) -#define A60931_RG_SSUSB_EQ_CURSEL_OFST (6) -#define A60931_RG_SSUSB_RX_DAC_MUX_OFST (1) -#define A60931_RG_SSUSB_RX_R2T_EN_OFST (0) - -//U3D_regA -#define A60931_RG_SSUSB_RX_T2R_EN_OFST (31) -#define A60931_RG_SSUSB_RX_50_LOWER_OFST (28) -#define A60931_RG_SSUSB_RX_50_TAR_OFST (26) -#define A60931_RG_SSUSB_RX_SW_CTRL_OFST (21) -#define A60931_RG_PCIE_SIGDET_VTH_OFST (19) -#define A60931_RG_PCIE_SIGDET_LPF_OFST (17) -#define A60931_RG_SSUSB_LFPS_MON_EN_OFST (16) -#define A60931_RG_SSUSB_RXAFE_DCMON_SEL_OFST (12) -#define A60931_RG_SSUSB_RX_P1_ENTRY_PASS_OFST (11) -#define A60931_RG_SSUSB_RX_PD_RST_OFST (10) -#define A60931_RG_SSUSB_RX_PD_RST_PASS_OFST (9) - -//U3D_regB -#define A60931_RG_SSUSB_CDR_RESERVE_OFST (24) -#define A60931_RG_SSUSB_RXAFE_RESERVE_OFST (16) -#define A60931_RG_PCIE_RX_RESERVE_OFST (8) -#define A60931_RG_SSUSB_VRT_25M_EN_OFST (7) -#define A60931_RG_SSUSB_RX_PD_PICAL_SWAP_OFST (6) -#define A60931_RG_SSUSB_RX_DAC_MEAS_EN_OFST (5) -#define A60931_RG_SSUSB_MPX_SEL_L0_OFST (4) -#define A60931_RG_SSUSB_LFPS_SLCOUT_SEL_OFST (3) -#define A60931_RG_SSUSB_LFPS_CMPOUT_SEL_OFST (2) -#define A60931_RG_PCIE_SIGDET_HF_OFST (0) - -//U3D_regC -#define A60931_RGS_SSUSB_RX_DEBUG_RESERVE_OFST (0) - -struct u3phya_da_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg4; - __le32 reg5; - /* 0x10 */ - __le32 reg6; - __le32 reg7; - __le32 reg8; - __le32 reg9; - /* 0x20 */ - __le32 reg10; - __le32 reg12; - __le32 reg13; - __le32 reg14; - /* 0x30 */ - __le32 reg15; - __le32 reg16; - __le32 reg19; - __le32 reg20; - /* 0x40 */ - __le32 reg21; - __le32 reg23; - __le32 reg25; - __le32 reg26; - /* 0x50 */ - __le32 reg28; - __le32 reg29; - __le32 reg30; - __le32 reg31; - /* 0x60 */ - __le32 reg32; - __le32 reg33; -}; - -/* A60810 */ - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_SPEED_PE2H (0x1<<23) /* 23:23 */ -#define A60810_RG_PCIE_SPEED_PE1D (0x1<<22) /* 22:22 */ -#define A60810_RG_PCIE_SPEED_PE1H (0x1<<21) /* 21:21 */ -#define A60810_RG_PCIE_SPEED_U3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3 (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D (0x1<<30) /* 30:30 */ -#define A60810_RG_USB20_REFCK_SEL_PE2H (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_REFCK_SEL_PE1D (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_REFCK_SEL_PE1H (0x1<<27) /* 27:27 */ -#define A60810_RG_USB20_REFCK_SEL_U3 (0x1<<26) /* 26:26 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1D (0x1<<18) /* 18:18 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1H (0x1<<17) /* 17:17 */ -#define A60810_RG_PCIE_REFCK_DIV4_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_PCIE_MODE_PE2D (0x1<<8) /* 8:8 */ -#define A60810_RG_PCIE_MODE_PE2H (0x1<<3) /* 3:3 */ -#define A60810_RG_PCIE_MODE_PE1D (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_MODE_PE1H (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_MODE_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D (0x7<<22) /* 24:22 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H (0x7<<19) /* 21:19 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H (0x7<<13) /* 15:13 */ -#define A60810_RG_SSUSB_PLL_DIVEN_U3 (0x7<<10) /* 12:10 */ -#define A60810_RG_SSUSB_PLL_BC_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_BC_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_BC_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_BC_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_BC_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_PLL_BR_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_PLL_BR_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_BR_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_BR_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_PLL_IC_PE2D (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IC_PE2H (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_PLL_IC_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IC_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IC_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_IR_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IR_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IR_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IR_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_BP_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_BP_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_BP_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_BP_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H (0x7f<<24)/* 30:24 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D (0x7f<<16)/* 22:16 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_PREDIV_U3 (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3 (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3 (0xffff<<0) /* 15:0 */ - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D (0xffff<<0) /* 15:0 */ - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D (0xffff<<0) /* 15:0 */ - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H (0xffff<<0) /* 15:0 */ - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H (0xffff<<0) /* 15:0 */ - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1D (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_BPA_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BPB_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BR_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BR_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BR_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BR_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_CDR_FBDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3 (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_KVSEL_U3 (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2H (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1D (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_CMPWD_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_U3 (0x3<<0) /* 1:0 */ - -/* OFFSET DEFINITION */ - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D_OFST (24) -#define A60810_RG_PCIE_SPEED_PE2H_OFST (23) -#define A60810_RG_PCIE_SPEED_PE1D_OFST (22) -#define A60810_RG_PCIE_SPEED_PE1H_OFST (21) -#define A60810_RG_PCIE_SPEED_U3_OFST (20) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D_OFST (18) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H_OFST (16) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D_OFST (14) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H_OFST (12) -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3_OFST (10) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D_OFST (8) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H_OFST (6) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D_OFST (4) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D_OFST (30) -#define A60810_RG_USB20_REFCK_SEL_PE2H_OFST (29) -#define A60810_RG_USB20_REFCK_SEL_PE1D_OFST (28) -#define A60810_RG_USB20_REFCK_SEL_PE1H_OFST (27) -#define A60810_RG_USB20_REFCK_SEL_U3_OFST (26) -#define A60810_RG_PCIE_REFCK_DIV4_PE2D_OFST (25) -#define A60810_RG_PCIE_REFCK_DIV4_PE2H_OFST (24) -#define A60810_RG_PCIE_REFCK_DIV4_PE1D_OFST (18) -#define A60810_RG_PCIE_REFCK_DIV4_PE1H_OFST (17) -#define A60810_RG_PCIE_REFCK_DIV4_U3_OFST (16) -#define A60810_RG_PCIE_MODE_PE2D_OFST (8) -#define A60810_RG_PCIE_MODE_PE2H_OFST (3) -#define A60810_RG_PCIE_MODE_PE1D_OFST (2) -#define A60810_RG_PCIE_MODE_PE1H_OFST (1) -#define A60810_RG_PCIE_MODE_U3_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D_OFST (22) -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H_OFST (19) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H_OFST (13) -#define A60810_RG_SSUSB_PLL_DIVEN_U3_OFST (10) -#define A60810_RG_SSUSB_PLL_BC_PE2D_OFST (8) -#define A60810_RG_SSUSB_PLL_BC_PE2H_OFST (6) -#define A60810_RG_SSUSB_PLL_BC_PE1D_OFST (4) -#define A60810_RG_SSUSB_PLL_BC_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_BC_U3_OFST (0) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D_OFST (30) -#define A60810_RG_SSUSB_PLL_BR_PE2H_OFST (28) -#define A60810_RG_SSUSB_PLL_BR_PE1D_OFST (26) -#define A60810_RG_SSUSB_PLL_BR_PE1H_OFST (24) -#define A60810_RG_SSUSB_PLL_BR_U3_OFST (22) -#define A60810_RG_SSUSB_PLL_IC_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_IC_PE2H_OFST (12) -#define A60810_RG_SSUSB_PLL_IC_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IC_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IC_U3_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_IR_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_IR_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IR_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IR_U3_OFST (0) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_BP_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_BP_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_BP_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_BP_U3_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_FBKSEL_U3_OFST (0) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_U3_OFST (0) - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D_OFST (26) -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D_OFST (18) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_PREDIV_U3_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D_OFST (0) - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3_OFST (0) - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H_OFST (0) - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D_OFST (0) - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H_OFST (0) - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D_OFST (0) - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST (0) - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D_OFST (0) - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D_OFST (0) - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H_OFST (0) - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H_OFST (0) - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D_OFST (25) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3_OFST (0) - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPA_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPA_PE1D_OFST (10) -#define A60810_RG_SSUSB_CDR_BPA_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_BPA_U3_OFST (0) - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPB_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPB_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BPB_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BPB_U3_OFST (0) - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BR_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BR_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BR_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BR_U3_OFST (0) - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_FBDIV_U3_OFST (0) - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D_OFST (30) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H_OFST (28) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D_OFST (26) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H_OFST (24) -#define A60810_RG_SSUSB_EQ_RSTEP1_U3_OFST (22) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D_OFST (20) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H_OFST (18) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D_OFST (16) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H_OFST (14) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3_OFST (12) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D_OFST (11) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H_OFST (10) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D_OFST (9) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_KVSEL_U3_OFST (7) -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D_OFST (0) - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D_OFST (26) -#define A60810_RG_SSUSB_RX_CMPWD_PE2H_OFST (25) -#define A60810_RG_SSUSB_RX_CMPWD_PE1D_OFST (24) -#define A60810_RG_SSUSB_RX_CMPWD_PE1H_OFST (23) -#define A60810_RG_SSUSB_RX_CMPWD_U3_OFST (16) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D_OFST (8) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H_OFST (6) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D_OFST (4) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H_OFST (2) -#define A60810_RG_SSUSB_EQ_RSTEP2_U3_OFST (0) - -/* A60931 */ - -//U3D_reg0 -#define A60931_RG_PCIE_SPEED_PE2D (0x1<<24) //24:24 -#define A60931_RG_PCIE_SPEED_PE2H (0x1<<23) //23:23 -#define A60931_RG_PCIE_SPEED_PE1D (0x1<<22) //22:22 -#define A60931_RG_PCIE_SPEED_PE1H (0x1<<21) //21:21 -#define A60931_RG_PCIE_SPEED_U3 (0x1<<20) //20:20 -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE2D (0x3<<18) //19:18 -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE2H (0x3<<16) //17:16 -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE1D (0x3<<14) //15:14 -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE1H (0x3<<12) //13:12 -#define A60931_RG_SSUSB_XTAL_EXT_EN_U3 (0x3<<10) //11:10 -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE2D (0x3<<8) //9:8 -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE2H (0x3<<6) //7:6 -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE1D (0x3<<4) //5:4 -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE1H (0x3<<2) //3:2 -#define A60931_RG_SSUSB_CDR_REFCK_SEL_U3 (0x3<<0) //1:0 - -//U3D_reg1 -#define A60931_RG_USB20_REFCK_SEL_PE2D (0x1<<30) //30:30 -#define A60931_RG_USB20_REFCK_SEL_PE2H (0x1<<29) //29:29 -#define A60931_RG_USB20_REFCK_SEL_PE1D (0x1<<28) //28:28 -#define A60931_RG_USB20_REFCK_SEL_PE1H (0x1<<27) //27:27 -#define A60931_RG_USB20_REFCK_SEL_U3 (0x1<<26) //26:26 -#define A60931_RG_PCIE_REFCK_DIV4_PE2D (0x1<<25) //25:25 -#define A60931_RG_PCIE_REFCK_DIV4_PE2H (0x1<<24) //24:24 -#define A60931_RG_PCIE_REFCK_DIV4_PE1D (0x1<<18) //18:18 -#define A60931_RG_PCIE_REFCK_DIV4_PE1H (0x1<<17) //17:17 -#define A60931_RG_PCIE_REFCK_DIV4_U3 (0x1<<16) //16:16 -#define A60931_RG_PCIE_MODE_PE2D (0x1<<8) //8:8 -#define A60931_RG_PCIE_MODE_PE2H (0x1<<3) //3:3 -#define A60931_RG_PCIE_MODE_PE1D (0x1<<2) //2:2 -#define A60931_RG_PCIE_MODE_PE1H (0x1<<1) //1:1 -#define A60931_RG_PCIE_MODE_U3 (0x1<<0) //0:0 - -//U3D_reg4 -#define A60931_RG_SSUSB_PLL_DIVEN_PE2D (0x7<<22) //24:22 -#define A60931_RG_SSUSB_PLL_DIVEN_PE2H (0x7<<19) //21:19 -#define A60931_RG_SSUSB_PLL_DIVEN_PE1D (0x7<<16) //18:16 -#define A60931_RG_SSUSB_PLL_DIVEN_PE1H (0x7<<13) //15:13 -#define A60931_RG_SSUSB_PLL_DIVEN_U3 (0x7<<10) //12:10 -#define A60931_RG_SSUSB_PLL_BC_PE2D (0x3<<8) //9:8 -#define A60931_RG_SSUSB_PLL_BC_PE2H (0x3<<6) //7:6 -#define A60931_RG_SSUSB_PLL_BC_PE1D (0x3<<4) //5:4 -#define A60931_RG_SSUSB_PLL_BC_PE1H (0x3<<2) //3:2 -#define A60931_RG_SSUSB_PLL_BC_U3 (0x3<<0) //1:0 - -//U3D_reg5 -#define A60931_RG_SSUSB_PLL_BR_PE2D (0x3<<30) //31:30 -#define A60931_RG_SSUSB_PLL_BR_PE2H (0x3<<28) //29:28 -#define A60931_RG_SSUSB_PLL_BR_PE1D (0x3<<26) //27:26 -#define A60931_RG_SSUSB_PLL_BR_PE1H (0x3<<24) //25:24 -#define A60931_RG_SSUSB_PLL_BR_U3 (0x3<<22) //23:22 -#define A60931_RG_SSUSB_PLL_IC_PE2D (0xf<<16) //19:16 -#define A60931_RG_SSUSB_PLL_IC_PE2H (0xf<<12) //15:12 -#define A60931_RG_SSUSB_PLL_IC_PE1D (0xf<<8) //11:8 -#define A60931_RG_SSUSB_PLL_IC_PE1H (0xf<<4) //7:4 -#define A60931_RG_SSUSB_PLL_IC_U3 (0xf<<0) //3:0 - -//U3D_reg6 -#define A60931_RG_SSUSB_PLL_IR_PE2D (0xf<<24) //27:24 -#define A60931_RG_SSUSB_PLL_IR_PE2H (0xf<<16) //19:16 -#define A60931_RG_SSUSB_PLL_IR_PE1D (0xf<<8) //11:8 -#define A60931_RG_SSUSB_PLL_IR_PE1H (0xf<<4) //7:4 -#define A60931_RG_SSUSB_PLL_IR_U3 (0xf<<0) //3:0 - -//U3D_reg7 -#define A60931_RG_SSUSB_PLL_BP_PE2D (0xf<<24) //27:24 -#define A60931_RG_SSUSB_PLL_BP_PE2H (0xf<<16) //19:16 -#define A60931_RG_SSUSB_PLL_BP_PE1D (0xf<<8) //11:8 -#define A60931_RG_SSUSB_PLL_BP_PE1H (0xf<<4) //7:4 -#define A60931_RG_SSUSB_PLL_BP_U3 (0xf<<0) //3:0 - -//U3D_reg8 -#define A60931_RG_SSUSB_PLL_FBKSEL_PE2D (0x3<<24) //25:24 -#define A60931_RG_SSUSB_PLL_FBKSEL_PE2H (0x3<<16) //17:16 -#define A60931_RG_SSUSB_PLL_FBKSEL_PE1D (0x3<<8) //9:8 -#define A60931_RG_SSUSB_PLL_FBKSEL_PE1H (0x3<<2) //3:2 -#define A60931_RG_SSUSB_PLL_FBKSEL_U3 (0x3<<0) //1:0 - -//U3D_reg9 -#define A60931_RG_SSUSB_PLL_FBKDIV_PE2H (0x7f<<24) //30:24 -#define A60931_RG_SSUSB_PLL_FBKDIV_PE1D (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_PLL_FBKDIV_PE1H (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_PLL_FBKDIV_U3 (0x7f<<0) //6:0 - -//U3D_reg10 -#define A60931_RG_SSUSB_PLL_PREDIV_PE2D (0x3<<26) //27:26 -#define A60931_RG_SSUSB_PLL_PREDIV_PE2H (0x3<<24) //25:24 -#define A60931_RG_SSUSB_PLL_PREDIV_PE1D (0x3<<18) //19:18 -#define A60931_RG_SSUSB_PLL_PREDIV_PE1H (0x3<<16) //17:16 -#define A60931_RG_SSUSB_PLL_PREDIV_U3 (0x3<<8) //9:8 -#define A60931_RG_SSUSB_PLL_FBKDIV_PE2D (0x7f<<0) //6:0 - -//U3D_reg12 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_U3 (0x7fffffff<<0) //30:0 - -//U3D_reg13 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE1H (0x7fffffff<<0) //30:0 - -//U3D_reg14 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE1D (0x7fffffff<<0) //30:0 - -//U3D_reg15 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE2H (0x7fffffff<<0) //30:0 - -//U3D_reg16 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE2D (0x7fffffff<<0) //30:0 - -//U3D_reg19 -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE1H (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_U3 (0xffff<<0) //15:0 - -//U3D_reg20 -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE2H (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE1D (0xffff<<0) //15:0 - -//U3D_reg21 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_U3 (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE2D (0xffff<<0) //15:0 - -//U3D_reg23 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE1D (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE1H (0xffff<<0) //15:0 - -//U3D_reg25 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE2D (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE2H (0xffff<<0) //15:0 - -//U3D_reg26 -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE2D (0x1<<25) //25:25 -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE2H (0x1<<24) //24:24 -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE1D (0x1<<16) //16:16 -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE1H (0x1<<8) //8:8 -#define A60931_RG_SSUSB_PLL_REFCKDIV_U3 (0x1<<0) //0:0 - -//U3D_reg28 -#define A60931_RG_SSUSB_CDR_BPA_PE2D (0x3<<24) //25:24 -#define A60931_RG_SSUSB_CDR_BPA_PE2H (0x3<<16) //17:16 -#define A60931_RG_SSUSB_CDR_BPA_PE1D (0x3<<10) //11:10 -#define A60931_RG_SSUSB_CDR_BPA_PE1H (0x3<<8) //9:8 -#define A60931_RG_SSUSB_CDR_BPA_U3 (0x3<<0) //1:0 - -//U3D_reg29 -#define A60931_RG_SSUSB_CDR_BPB_PE2D (0x7<<24) //26:24 -#define A60931_RG_SSUSB_CDR_BPB_PE2H (0x7<<16) //18:16 -#define A60931_RG_SSUSB_CDR_BPB_PE1D (0x7<<6) //8:6 -#define A60931_RG_SSUSB_CDR_BPB_PE1H (0x7<<3) //5:3 -#define A60931_RG_SSUSB_CDR_BPB_U3 (0x7<<0) //2:0 - -//U3D_reg30 -#define A60931_RG_SSUSB_CDR_BR_PE2D (0x7<<24) //26:24 -#define A60931_RG_SSUSB_CDR_BR_PE2H (0x7<<16) //18:16 -#define A60931_RG_SSUSB_CDR_BR_PE1D (0x7<<6) //8:6 -#define A60931_RG_SSUSB_CDR_BR_PE1H (0x7<<3) //5:3 -#define A60931_RG_SSUSB_CDR_BR_U3 (0x7<<0) //2:0 - -//U3D_reg31 -#define A60931_RG_SSUSB_CDR_FBDIV_PE2H (0x7f<<24) //30:24 -#define A60931_RG_SSUSB_CDR_FBDIV_PE1D (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_CDR_FBDIV_PE1H (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_CDR_FBDIV_U3 (0x7f<<0) //6:0 - -//U3D_reg32 -#define A60931_RG_SSUSB_EQ_RSTEP1_PE2D (0x3<<30) //31:30 -#define A60931_RG_SSUSB_EQ_RSTEP1_PE2H (0x3<<28) //29:28 -#define A60931_RG_SSUSB_EQ_RSTEP1_PE1D (0x3<<26) //27:26 -#define A60931_RG_SSUSB_EQ_RSTEP1_PE1H (0x3<<24) //25:24 -#define A60931_RG_SSUSB_EQ_RSTEP1_U3 (0x3<<22) //23:22 -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE2D (0x3<<20) //21:20 -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE2H (0x3<<18) //19:18 -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE1D (0x3<<16) //17:16 -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE1H (0x3<<14) //15:14 -#define A60931_RG_SSUSB_LFPS_DEGLITCH_U3 (0x3<<12) //13:12 -#define A60931_RG_SSUSB_CDR_KVSEL_PE2D (0x1<<11) //11:11 -#define A60931_RG_SSUSB_CDR_KVSEL_PE2H (0x1<<10) //10:10 -#define A60931_RG_SSUSB_CDR_KVSEL_PE1D (0x1<<9) //9:9 -#define A60931_RG_SSUSB_CDR_KVSEL_PE1H (0x1<<8) //8:8 -#define A60931_RG_SSUSB_CDR_KVSEL_U3 (0x1<<7) //7:7 -#define A60931_RG_SSUSB_CDR_FBDIV_PE2D (0x7f<<0) //6:0 - -//U3D_reg33 -#define A60931_RG_SSUSB_RX_CMPWD_PE2D (0x1<<26) //26:26 -#define A60931_RG_SSUSB_RX_CMPWD_PE2H (0x1<<25) //25:25 -#define A60931_RG_SSUSB_RX_CMPWD_PE1D (0x1<<24) //24:24 -#define A60931_RG_SSUSB_RX_CMPWD_PE1H (0x1<<23) //23:23 -#define A60931_RG_SSUSB_RX_CMPWD_U3 (0x1<<16) //16:16 -#define A60931_RG_SSUSB_EQ_RSTEP2_PE2D (0x3<<8) //9:8 -#define A60931_RG_SSUSB_EQ_RSTEP2_PE2H (0x3<<6) //7:6 -#define A60931_RG_SSUSB_EQ_RSTEP2_PE1D (0x3<<4) //5:4 -#define A60931_RG_SSUSB_EQ_RSTEP2_PE1H (0x3<<2) //3:2 -#define A60931_RG_SSUSB_EQ_RSTEP2_U3 (0x3<<0) //1:0 - -/* OFFSET DEFINITION */ - -//U3D_reg0 -#define A60931_RG_PCIE_SPEED_PE2D_OFST (24) -#define A60931_RG_PCIE_SPEED_PE2H_OFST (23) -#define A60931_RG_PCIE_SPEED_PE1D_OFST (22) -#define A60931_RG_PCIE_SPEED_PE1H_OFST (21) -#define A60931_RG_PCIE_SPEED_U3_OFST (20) -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE2D_OFST (18) -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE2H_OFST (16) -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE1D_OFST (14) -#define A60931_RG_SSUSB_XTAL_EXT_EN_PE1H_OFST (12) -#define A60931_RG_SSUSB_XTAL_EXT_EN_U3_OFST (10) -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE2D_OFST (8) -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE2H_OFST (6) -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE1D_OFST (4) -#define A60931_RG_SSUSB_CDR_REFCK_SEL_PE1H_OFST (2) -#define A60931_RG_SSUSB_CDR_REFCK_SEL_U3_OFST (0) - -//U3D_reg1 -#define A60931_RG_USB20_REFCK_SEL_PE2D_OFST (30) -#define A60931_RG_USB20_REFCK_SEL_PE2H_OFST (29) -#define A60931_RG_USB20_REFCK_SEL_PE1D_OFST (28) -#define A60931_RG_USB20_REFCK_SEL_PE1H_OFST (27) -#define A60931_RG_USB20_REFCK_SEL_U3_OFST (26) -#define A60931_RG_PCIE_REFCK_DIV4_PE2D_OFST (25) -#define A60931_RG_PCIE_REFCK_DIV4_PE2H_OFST (24) -#define A60931_RG_PCIE_REFCK_DIV4_PE1D_OFST (18) -#define A60931_RG_PCIE_REFCK_DIV4_PE1H_OFST (17) -#define A60931_RG_PCIE_REFCK_DIV4_U3_OFST (16) -#define A60931_RG_PCIE_MODE_PE2D_OFST (8) -#define A60931_RG_PCIE_MODE_PE2H_OFST (3) -#define A60931_RG_PCIE_MODE_PE1D_OFST (2) -#define A60931_RG_PCIE_MODE_PE1H_OFST (1) -#define A60931_RG_PCIE_MODE_U3_OFST (0) - -//U3D_reg4 -#define A60931_RG_SSUSB_PLL_DIVEN_PE2D_OFST (22) -#define A60931_RG_SSUSB_PLL_DIVEN_PE2H_OFST (19) -#define A60931_RG_SSUSB_PLL_DIVEN_PE1D_OFST (16) -#define A60931_RG_SSUSB_PLL_DIVEN_PE1H_OFST (13) -#define A60931_RG_SSUSB_PLL_DIVEN_U3_OFST (10) -#define A60931_RG_SSUSB_PLL_BC_PE2D_OFST (8) -#define A60931_RG_SSUSB_PLL_BC_PE2H_OFST (6) -#define A60931_RG_SSUSB_PLL_BC_PE1D_OFST (4) -#define A60931_RG_SSUSB_PLL_BC_PE1H_OFST (2) -#define A60931_RG_SSUSB_PLL_BC_U3_OFST (0) - -//U3D_reg5 -#define A60931_RG_SSUSB_PLL_BR_PE2D_OFST (30) -#define A60931_RG_SSUSB_PLL_BR_PE2H_OFST (28) -#define A60931_RG_SSUSB_PLL_BR_PE1D_OFST (26) -#define A60931_RG_SSUSB_PLL_BR_PE1H_OFST (24) -#define A60931_RG_SSUSB_PLL_BR_U3_OFST (22) -#define A60931_RG_SSUSB_PLL_IC_PE2D_OFST (16) -#define A60931_RG_SSUSB_PLL_IC_PE2H_OFST (12) -#define A60931_RG_SSUSB_PLL_IC_PE1D_OFST (8) -#define A60931_RG_SSUSB_PLL_IC_PE1H_OFST (4) -#define A60931_RG_SSUSB_PLL_IC_U3_OFST (0) - -//U3D_reg6 -#define A60931_RG_SSUSB_PLL_IR_PE2D_OFST (24) -#define A60931_RG_SSUSB_PLL_IR_PE2H_OFST (16) -#define A60931_RG_SSUSB_PLL_IR_PE1D_OFST (8) -#define A60931_RG_SSUSB_PLL_IR_PE1H_OFST (4) -#define A60931_RG_SSUSB_PLL_IR_U3_OFST (0) - -//U3D_reg7 -#define A60931_RG_SSUSB_PLL_BP_PE2D_OFST (24) -#define A60931_RG_SSUSB_PLL_BP_PE2H_OFST (16) -#define A60931_RG_SSUSB_PLL_BP_PE1D_OFST (8) -#define A60931_RG_SSUSB_PLL_BP_PE1H_OFST (4) -#define A60931_RG_SSUSB_PLL_BP_U3_OFST (0) - -//U3D_reg8 -#define A60931_RG_SSUSB_PLL_FBKSEL_PE2D_OFST (24) -#define A60931_RG_SSUSB_PLL_FBKSEL_PE2H_OFST (16) -#define A60931_RG_SSUSB_PLL_FBKSEL_PE1D_OFST (8) -#define A60931_RG_SSUSB_PLL_FBKSEL_PE1H_OFST (2) -#define A60931_RG_SSUSB_PLL_FBKSEL_U3_OFST (0) - -//U3D_reg9 -#define A60931_RG_SSUSB_PLL_FBKDIV_PE2H_OFST (24) -#define A60931_RG_SSUSB_PLL_FBKDIV_PE1D_OFST (16) -#define A60931_RG_SSUSB_PLL_FBKDIV_PE1H_OFST (8) -#define A60931_RG_SSUSB_PLL_FBKDIV_U3_OFST (0) - -//U3D_reg10 -#define A60931_RG_SSUSB_PLL_PREDIV_PE2D_OFST (26) -#define A60931_RG_SSUSB_PLL_PREDIV_PE2H_OFST (24) -#define A60931_RG_SSUSB_PLL_PREDIV_PE1D_OFST (18) -#define A60931_RG_SSUSB_PLL_PREDIV_PE1H_OFST (16) -#define A60931_RG_SSUSB_PLL_PREDIV_U3_OFST (8) -#define A60931_RG_SSUSB_PLL_FBKDIV_PE2D_OFST (0) - -//U3D_reg12 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_U3_OFST (0) - -//U3D_reg13 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE1H_OFST (0) - -//U3D_reg14 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE1D_OFST (0) - -//U3D_reg15 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE2H_OFST (0) - -//U3D_reg16 -#define A60931_RG_SSUSB_PLL_PCW_NCPO_PE2D_OFST (0) - -//U3D_reg19 -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST (16) -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST (0) - -//U3D_reg20 -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE2H_OFST (16) -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE1D_OFST (0) - -//U3D_reg21 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_U3_OFST (16) -#define A60931_RG_SSUSB_PLL_SSC_DELTA1_PE2D_OFST (0) - -//U3D_reg23 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE1D_OFST (16) -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE1H_OFST (0) - -//U3D_reg25 -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE2D_OFST (16) -#define A60931_RG_SSUSB_PLL_SSC_DELTA_PE2H_OFST (0) - -//U3D_reg26 -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE2D_OFST (25) -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE2H_OFST (24) -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE1D_OFST (16) -#define A60931_RG_SSUSB_PLL_REFCKDIV_PE1H_OFST (8) -#define A60931_RG_SSUSB_PLL_REFCKDIV_U3_OFST (0) - -//U3D_reg28 -#define A60931_RG_SSUSB_CDR_BPA_PE2D_OFST (24) -#define A60931_RG_SSUSB_CDR_BPA_PE2H_OFST (16) -#define A60931_RG_SSUSB_CDR_BPA_PE1D_OFST (10) -#define A60931_RG_SSUSB_CDR_BPA_PE1H_OFST (8) -#define A60931_RG_SSUSB_CDR_BPA_U3_OFST (0) - -//U3D_reg29 -#define A60931_RG_SSUSB_CDR_BPB_PE2D_OFST (24) -#define A60931_RG_SSUSB_CDR_BPB_PE2H_OFST (16) -#define A60931_RG_SSUSB_CDR_BPB_PE1D_OFST (6) -#define A60931_RG_SSUSB_CDR_BPB_PE1H_OFST (3) -#define A60931_RG_SSUSB_CDR_BPB_U3_OFST (0) - -//U3D_reg30 -#define A60931_RG_SSUSB_CDR_BR_PE2D_OFST (24) -#define A60931_RG_SSUSB_CDR_BR_PE2H_OFST (16) -#define A60931_RG_SSUSB_CDR_BR_PE1D_OFST (6) -#define A60931_RG_SSUSB_CDR_BR_PE1H_OFST (3) -#define A60931_RG_SSUSB_CDR_BR_U3_OFST (0) - -//U3D_reg31 -#define A60931_RG_SSUSB_CDR_FBDIV_PE2H_OFST (24) -#define A60931_RG_SSUSB_CDR_FBDIV_PE1D_OFST (16) -#define A60931_RG_SSUSB_CDR_FBDIV_PE1H_OFST (8) -#define A60931_RG_SSUSB_CDR_FBDIV_U3_OFST (0) - -//U3D_reg32 -#define A60931_RG_SSUSB_EQ_RSTEP1_PE2D_OFST (30) -#define A60931_RG_SSUSB_EQ_RSTEP1_PE2H_OFST (28) -#define A60931_RG_SSUSB_EQ_RSTEP1_PE1D_OFST (26) -#define A60931_RG_SSUSB_EQ_RSTEP1_PE1H_OFST (24) -#define A60931_RG_SSUSB_EQ_RSTEP1_U3_OFST (22) -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE2D_OFST (20) -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE2H_OFST (18) -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE1D_OFST (16) -#define A60931_RG_SSUSB_LFPS_DEGLITCH_PE1H_OFST (14) -#define A60931_RG_SSUSB_LFPS_DEGLITCH_U3_OFST (12) -#define A60931_RG_SSUSB_CDR_KVSEL_PE2D_OFST (11) -#define A60931_RG_SSUSB_CDR_KVSEL_PE2H_OFST (10) -#define A60931_RG_SSUSB_CDR_KVSEL_PE1D_OFST (9) -#define A60931_RG_SSUSB_CDR_KVSEL_PE1H_OFST (8) -#define A60931_RG_SSUSB_CDR_KVSEL_U3_OFST (7) -#define A60931_RG_SSUSB_CDR_FBDIV_PE2D_OFST (0) - -//U3D_reg33 -#define A60931_RG_SSUSB_RX_CMPWD_PE2D_OFST (26) -#define A60931_RG_SSUSB_RX_CMPWD_PE2H_OFST (25) -#define A60931_RG_SSUSB_RX_CMPWD_PE1D_OFST (24) -#define A60931_RG_SSUSB_RX_CMPWD_PE1H_OFST (23) -#define A60931_RG_SSUSB_RX_CMPWD_U3_OFST (16) -#define A60931_RG_SSUSB_EQ_RSTEP2_PE2D_OFST (8) -#define A60931_RG_SSUSB_EQ_RSTEP2_PE2H_OFST (6) -#define A60931_RG_SSUSB_EQ_RSTEP2_PE1D_OFST (4) -#define A60931_RG_SSUSB_EQ_RSTEP2_PE1H_OFST (2) -#define A60931_RG_SSUSB_EQ_RSTEP2_U3_OFST (0) - -struct u3phyd_reg_a { - /* 0x0 */ - __le32 phyd_mix0; - __le32 phyd_mix1; - __le32 phyd_lfps0; - __le32 phyd_lfps1; - /* 0x10 */ - __le32 phyd_impcal0; - __le32 phyd_impcal1; - __le32 phyd_txpll0; - __le32 phyd_txpll1; - /* 0x20 */ - __le32 phyd_txpll2; - __le32 phyd_fl0; - __le32 phyd_mix2; - __le32 phyd_rx0; - /* 0x30 */ - __le32 phyd_t2rlb; - __le32 phyd_cppat; - __le32 phyd_mix3; - __le32 phyd_ebufctl; - /* 0x40 */ - __le32 phyd_pipe0; - __le32 phyd_pipe1; - __le32 phyd_mix4; - __le32 phyd_ckgen0; - /* 0x50 */ - __le32 phyd_mix5; - __le32 phyd_reserved; - __le32 phyd_cdr0; - __le32 phyd_cdr1; - /* 0x60 */ - __le32 phyd_pll_0; - __le32 phyd_pll_1; - __le32 phyd_bcn_det_1; - __le32 phyd_bcn_det_2; - /* 0x70 */ - __le32 eq0; - __le32 eq1; - __le32 eq2; - __le32 eq3; - /* 0x80 */ - __le32 eq_eye0; - __le32 eq_eye1; - __le32 eq_eye2; - __le32 eq_dfe0; - /* 0x90 */ - __le32 eq_dfe1; - __le32 eq_dfe2; - __le32 eq_dfe3; - __le32 reserve0; - /* 0xa0 */ - __le32 phyd_mon0; - __le32 phyd_mon1; - __le32 phyd_mon2; - __le32 phyd_mon3; - /* 0xb0 */ - __le32 phyd_mon4; - __le32 phyd_mon5; - __le32 phyd_mon6; - __le32 phyd_mon7; - /* 0xc0 */ - __le32 phya_rx_mon0; - __le32 phya_rx_mon1; - __le32 phya_rx_mon2; - __le32 phya_rx_mon3; - /* 0xd0 */ - __le32 phya_rx_mon4; - __le32 phya_rx_mon5; - __le32 phyd_cppat2; - __le32 eq_eye3; - /* 0xe0 */ - __le32 kband_out; - __le32 kband_out1; -}; - -/* A60810 */ - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TSEQ_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TSEQ_POLEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TSEQ_POL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_P3_PCLK_NG (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TSEQ_TH (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PRBS_BERTH (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_PRBS_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_BPSLOCK (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RTCOMCNT (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_COMCNT (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PRBSEL_CALIB (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PRBSEL_PCS (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_TXLFPS_PRD (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_P_RX_P0S_CK (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P_TX_P0S_CK (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PDNCTL (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_DRV_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TX_DRV_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TX_DRV_DLY (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_BERT_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_SCP_TH (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_SCP_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXANSIDEC_TEST (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_LFPS_PWD (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXLFPS_OVF (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_P3_ENTRY_SEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P3_ENTRY (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_RXLFPS_CDRSEL (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_RXLFPS_CDRTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LOCK5G_BLOCK (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_LOB (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_TXLFPS_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TXLFPS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RXLFPS_UPB (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_TX_IMP_BIAS (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_FWAKE_TH (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_P1_ENTRY_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_P1_ENTRY (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_UDF (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_TXPLL_ON (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_TXPLLON (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_TXPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_NCPO_CHG (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RSTB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_PWDB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDSEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_AUTOK_VCO (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_PWD (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_AFE_PWD (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_TCADJ (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PLL_PWD (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FLT_1_DISPERR_B (0x1<<2) /* 2:2 */ - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TX_LFPS (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXPLL_STB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXPLL_STB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_RXPLL_STB (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TXPLL_STB (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RXPLL_REFCKSEL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXPLL_STBMODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RXPLL_ON (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_FORCE_RXPLLON (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_AUTOK_VCO (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_PWD (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_CDR_TCADJ (0x3f<<0) /* 5:0 */ - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET (0xffff<<16)/* 31:16 */ -#define A60810_RG_SSUSB_RX_FL_CYCLECNT (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_EQ_RST_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXVAL_RST (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXVAL_CNT (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDROS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_LCKOP (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_RX_FL_LOCKTH (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_RX_FL_OFFSET (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_T2RLB_PAT (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_T2RLB_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_T2RLB_SERIAL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_T2RLB_MODE (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_RX_DFE_OPTION (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DFE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_DFE_EN_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_EQ_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RX_EQ_EN_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_RX_DFE_RST (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RX_DFE_RST_SEL (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PRB_OUT_CPPAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_BPANSIENC (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_VALID_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_EBUF_SRST (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_K_EMP (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_K_FUL (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_T2RLB_BDATRST (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PATMODE (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_T2RLB_TSEQCNT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CPPAT_TOZ (0x3<<21) /* 22:21 */ -#define A60810_RG_SSUSB_CPPAT_PRBS_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_CDROS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_PLL_SSCEN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_PI_PWD (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CDR_PI_MODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXEQTRAINING (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXPOLARITY (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_TXDEEMPH (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_POWERDOWN (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_TXONESZEROS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_TXELECIDLE (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_TXDETECTRX (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_PIPE_SEL (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_TXDATAK (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CDR_STABLE_SEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_STABLE (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CDR_RSTB_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_RSTB (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P_TXBCN_DIS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_ERROR_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_TXMARGIN (0x7<<1) /* 3:1 */ -#define A60810_RG_SSUSB_TXCOMPLIANCE (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_T2RLB_BER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_T2RLB_BER_RATE (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TFIFO_PSEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CKGEN_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_RXCK_INV (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RXPLL_STBCYC (0x7ff<<0) /* 10:0 */ - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_CDR_BC_LTD1 (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1 (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDR_BIR_LTR (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BW_SEL (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_EQ_T_SEL (0x3ff<<15)/* 24:15 */ -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC (0x3ff<<5)/* 14:5 */ -#define A60810_RG_SSUSB_PLLBAND_RECAL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_U_BCN_OBS_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL (0xfff<<16) /* 27:16 */ -#define A60810_RG_SSUSB_BCN_DET_DIS (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_U_BCN_OBS_SEL (0xfff<<0) /* 11:0 */ - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHL_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DE0OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DE1OS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_STOPTIME (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL (0x7<<11) /* 13:11 */ -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_STARTTIME (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL (0x7<<0) /* 2:0 */ - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2 (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_TH (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET (0x7f<<25) /* 31:25 */ -#define A60810_RG_SSUSB_EQ_EYE_MON_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_EQ_EYE0_Y (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_EYE1_Y (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PILPO_ROUT (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_PI_KPGAIN (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN (0x1<<3) /* 3:3 */ - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_EYE_MASK (0x3ff<<7) /* 16:7 */ - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_EQ_SD_CNT1 (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_EQ_SD_CNT0 (0x3f<<16) /* 21:16 */ - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DFEX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_CHK_EYE_H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EQ_PIEYE_INI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_PI90_INI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PI0_INI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR (0x7<<12) /* 14:12 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_DFEX_RST (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_GATED_RXD_B (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_EQ_PI90CK_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_DFEX_DIS (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL (0x1<<0) /* 0:0 */ - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_EQ_DFE_TOG (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO (0x3<<0) /* 1:0 */ - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_LFPS (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_TRAINDEC (0x7<<8) /* 10:8 */ -#define A60810_RGS_SSUSB_SCP_PAT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RETRACK (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_RXPLL_LOCK (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PDNCTL (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_PRBS_ERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_SCP_DETCNT (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_TSEQ_DETCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_BERT_LOCK (0x1<<15) /* 15:15 */ -#define A60810_RGS_SSUSB_SCP_DET (0x1<<14) /* 14:14 */ -#define A60810_RGS_SSUSB_TSEQ_DET (0x1<<13) /* 13:13 */ -#define A60810_RGS_SSUSB_EBUF_UDF (0x1<<12) /* 12:12 */ -#define A60810_RGS_SSUSB_EBUF_OVF (0x1<<11) /* 11:11 */ -#define A60810_RGS_SSUSB_PRBS_PASSTH (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_PRBS_PASS (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PRBS_LOCK (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_T2RLB_ERR (0x1<<6) /* 6:6 */ -#define A60810_RGS_SSUSB_T2RLB_PASSTH (0x1<<5) /* 5:5 */ -#define A60810_RGS_SSUSB_T2RLB_PASS (0x1<<4) /* 4:4 */ -#define A60810_RGS_SSUSB_T2RLB_LOCK (0x1<<3) /* 3:3 */ -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE (0x1<<2) /* 2:2 */ -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE (0x1<<1) /* 1:1 */ -#define A60810_RGS_SSUSB_RXDETECTED (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE (0x1<<30) /* 30:30 */ -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT (0x1<<29) /* 29:29 */ -#define A60810_RGS_SSUSB_SIGCAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RGS_SSUSB_RX_IMP_SEL (0x1f<<16) /* 20:16 */ -#define A60810_RGS_SSUSB_TX_IMP_SEL (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_TFIFO_MSG (0xf<<4) /* 7:4 */ -#define A60810_RGS_SSUSB_RFIFO_MSG (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PRB_OUT (0xff<<0) /* 7:0 */ - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_EQ_DCD0H (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCD0L (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCD1H (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_DCE0 (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCE1 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCHHL (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP (0x1<<31) /* 31:31 */ -#define A60810_RGS_SSUSB_EQ_DCLHL (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_STATUS (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_EQ_DCEYE0 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCEYE1 (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY (0x1<<7) /* 7:7 */ -#define A60810_RGS_SSUSB_EQ_PILPO (0x7f<<0) /* 6:0 */ - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT (0xfffff<<0) /* 19:0 */ - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RGS_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL (0x1<<24) /* 24:24 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG_OFST (31) -#define A60810_RG_SSUSB_TSEQ_EN_OFST (30) -#define A60810_RG_SSUSB_TSEQ_POLEN_OFST (29) -#define A60810_RG_SSUSB_TSEQ_POL_OFST (28) -#define A60810_RG_SSUSB_P_P3_PCLK_NG_OFST (27) -#define A60810_RG_SSUSB_TSEQ_TH_OFST (24) -#define A60810_RG_SSUSB_PRBS_BERTH_OFST (16) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON_OFST (15) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF_OFST (14) -#define A60810_RG_SSUSB_PRBS_EN_OFST (13) -#define A60810_RG_SSUSB_BPSLOCK_OFST (12) -#define A60810_RG_SSUSB_RTCOMCNT_OFST (8) -#define A60810_RG_SSUSB_COMCNT_OFST (4) -#define A60810_RG_SSUSB_PRBSEL_CALIB_OFST (0) - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN_OFST (31) -#define A60810_RG_SSUSB_PRBSEL_PCS_OFST (28) -#define A60810_RG_SSUSB_TXLFPS_PRD_OFST (24) -#define A60810_RG_SSUSB_P_RX_P0S_CK_OFST (23) -#define A60810_RG_SSUSB_P_TX_P0S_CK_OFST (22) -#define A60810_RG_SSUSB_PDNCTL_OFST (16) -#define A60810_RG_SSUSB_TX_DRV_EN_OFST (15) -#define A60810_RG_SSUSB_TX_DRV_SEL_OFST (14) -#define A60810_RG_SSUSB_TX_DRV_DLY_OFST (8) -#define A60810_RG_SSUSB_BERT_EN_OFST (7) -#define A60810_RG_SSUSB_SCP_TH_OFST (4) -#define A60810_RG_SSUSB_SCP_EN_OFST (3) -#define A60810_RG_SSUSB_RXANSIDEC_TEST_OFST (0) - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD_OFST (30) -#define A60810_RG_SSUSB_FORCE_LFPS_PWD_OFST (29) -#define A60810_RG_SSUSB_RXLFPS_OVF_OFST (24) -#define A60810_RG_SSUSB_P3_ENTRY_SEL_OFST (23) -#define A60810_RG_SSUSB_P3_ENTRY_OFST (22) -#define A60810_RG_SSUSB_RXLFPS_CDRSEL_OFST (20) -#define A60810_RG_SSUSB_RXLFPS_CDRTH_OFST (16) -#define A60810_RG_SSUSB_LOCK5G_BLOCK_OFST (15) -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL_OFST (14) -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_LOB_OFST (8) -#define A60810_RG_SSUSB_TXLFPS_EN_OFST (7) -#define A60810_RG_SSUSB_TXLFPS_SEL_OFST (6) -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK_OFST (5) -#define A60810_RG_SSUSB_RXLFPS_UPB_OFST (0) - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS_OFST (28) -#define A60810_RG_SSUSB_TX_IMP_BIAS_OFST (24) -#define A60810_RG_SSUSB_FWAKE_TH_OFST (16) -#define A60810_RG_SSUSB_P1_ENTRY_SEL_OFST (14) -#define A60810_RG_SSUSB_P1_ENTRY_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_UDF_OFST (8) -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH_OFST (0) - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_TX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_TX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_RX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_RX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_TXPLL_ON_OFST (26) -#define A60810_RG_SSUSB_FORCE_TXPLLON_OFST (25) -#define A60810_RG_SSUSB_TXPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC_OFST (10) -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN_OFST (31) -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN_OFST (30) -#define A60810_RG_SSUSB_PLL_NCPO_CHG_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RSTB_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_PWDB_OFST (26) -#define A60810_RG_SSUSB_PLL_DDSEN_OFST (25) -#define A60810_RG_SSUSB_PLL_AUTOK_VCO_OFST (24) -#define A60810_RG_SSUSB_PLL_PWD_OFST (23) -#define A60810_RG_SSUSB_RX_AFE_PWD_OFST (22) -#define A60810_RG_SSUSB_PLL_TCADJ_OFST (16) -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ_OFST (15) -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PWD_OFST (13) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN_OFST (12) -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN_OFST (11) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG_OFST (9) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB_OFST (8) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB_OFST (7) -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN_OFST (6) -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ_OFST (5) -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO_OFST (4) -#define A60810_RG_SSUSB_FORCE_PLL_PWD_OFST (3) -#define A60810_RG_SSUSB_FLT_1_DISPERR_B_OFST (2) - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN_OFST (31) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN_OFST (30) -#define A60810_RG_SSUSB_TX_LFPS_OFST (29) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_OFST (28) -#define A60810_RG_SSUSB_RXPLL_STB_OFST (27) -#define A60810_RG_SSUSB_TXPLL_STB_OFST (26) -#define A60810_RG_SSUSB_FORCE_RXPLL_STB_OFST (25) -#define A60810_RG_SSUSB_FORCE_TXPLL_STB_OFST (24) -#define A60810_RG_SSUSB_RXPLL_REFCKSEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBMODE_OFST (11) -#define A60810_RG_SSUSB_RXPLL_ON_OFST (10) -#define A60810_RG_SSUSB_FORCE_RXPLLON_OFST (9) -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD_OFST (8) -#define A60810_RG_SSUSB_CDR_AUTOK_VCO_OFST (7) -#define A60810_RG_SSUSB_CDR_PWD_OFST (6) -#define A60810_RG_SSUSB_CDR_TCADJ_OFST (0) - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET_OFST (16) -#define A60810_RG_SSUSB_RX_FL_CYCLECNT_OFST (0) - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST_OFST (31) -#define A60810_RG_SSUSB_RX_EQ_RST_SEL_OFST (30) -#define A60810_RG_SSUSB_RXVAL_RST_OFST (29) -#define A60810_RG_SSUSB_RXVAL_CNT_OFST (24) -#define A60810_RG_SSUSB_CDROS_EN_OFST (18) -#define A60810_RG_SSUSB_CDR_LCKOP_OFST (16) -#define A60810_RG_SSUSB_RX_FL_LOCKTH_OFST (8) -#define A60810_RG_SSUSB_RX_FL_OFFSET_OFST (0) - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH_OFST (24) -#define A60810_RG_SSUSB_T2RLB_PAT_OFST (16) -#define A60810_RG_SSUSB_T2RLB_EN_OFST (15) -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB_OFST (14) -#define A60810_RG_SSUSB_T2RLB_SERIAL_OFST (13) -#define A60810_RG_SSUSB_T2RLB_MODE_OFST (11) -#define A60810_RG_SSUSB_RX_SAOSC_EN_OFST (10) -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL_OFST (9) -#define A60810_RG_SSUSB_RX_DFE_OPTION_OFST (8) -#define A60810_RG_SSUSB_RX_DFE_EN_OFST (7) -#define A60810_RG_SSUSB_RX_DFE_EN_SEL_OFST (6) -#define A60810_RG_SSUSB_RX_EQ_EN_OFST (5) -#define A60810_RG_SSUSB_RX_EQ_EN_SEL_OFST (4) -#define A60810_RG_SSUSB_RX_SAOSC_RST_OFST (3) -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL_OFST (2) -#define A60810_RG_SSUSB_RX_DFE_RST_OFST (1) -#define A60810_RG_SSUSB_RX_DFE_RST_SEL_OFST (0) - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE_OFST (28) -#define A60810_RG_SSUSB_PRB_OUT_CPPAT_OFST (27) -#define A60810_RG_SSUSB_BPANSIENC_OFST (26) -#define A60810_RG_SSUSB_VALID_EN_OFST (25) -#define A60810_RG_SSUSB_EBUF_SRST_OFST (24) -#define A60810_RG_SSUSB_K_EMP_OFST (20) -#define A60810_RG_SSUSB_K_FUL_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BDATRST_OFST (12) -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PATMODE_OFST (8) -#define A60810_RG_SSUSB_T2RLB_TSEQCNT_OFST (0) - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN_OFST (24) -#define A60810_RG_SSUSB_CPPAT_TOZ_OFST (21) -#define A60810_RG_SSUSB_CPPAT_PRBS_EN_OFST (20) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0_OFST (0) - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS_OFST (31) -#define A60810_RG_SSUSB_P_CDROS_EN_OFST (30) -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS_OFST (28) -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET_OFST (24) -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN_OFST (20) -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET_OFST (16) -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN_OFST (15) -#define A60810_RG_SSUSB_PLL_SSCEN_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD_OFST (13) -#define A60810_RG_SSUSB_CDR_PI_PWD_OFST (12) -#define A60810_RG_SSUSB_CDR_PI_MODE_OFST (11) -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC_OFST (0) - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL_OFST (0) - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION_OFST (30) -#define A60810_RG_SSUSB_RXEQTRAINING_OFST (29) -#define A60810_RG_SSUSB_RXPOLARITY_OFST (28) -#define A60810_RG_SSUSB_TXDEEMPH_OFST (26) -#define A60810_RG_SSUSB_POWERDOWN_OFST (24) -#define A60810_RG_SSUSB_TXONESZEROS_OFST (23) -#define A60810_RG_SSUSB_TXELECIDLE_OFST (22) -#define A60810_RG_SSUSB_TXDETECTRX_OFST (21) -#define A60810_RG_SSUSB_PIPE_SEL_OFST (20) -#define A60810_RG_SSUSB_TXDATAK_OFST (16) -#define A60810_RG_SSUSB_CDR_STABLE_SEL_OFST (15) -#define A60810_RG_SSUSB_CDR_STABLE_OFST (14) -#define A60810_RG_SSUSB_CDR_RSTB_SEL_OFST (13) -#define A60810_RG_SSUSB_CDR_RSTB_OFST (12) -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN_OFST (11) -#define A60810_RG_SSUSB_P_TXBCN_DIS_OFST (6) -#define A60810_RG_SSUSB_P_ERROR_SEL_OFST (4) -#define A60810_RG_SSUSB_TXMARGIN_OFST (1) -#define A60810_RG_SSUSB_TXCOMPLIANCE_OFST (0) - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA_OFST (0) - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT_OFST (24) -#define A60810_RG_SSUSB_T2RLB_BER_EN_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BER_RATE_OFST (0) - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT_OFST (27) -#define A60810_RG_SSUSB_TFIFO_PSEL_OFST (24) -#define A60810_RG_SSUSB_CKGEN_PSEL_OFST (8) -#define A60810_RG_SSUSB_RXCK_INV_OFST (0) - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBCYC_OFST (0) - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE_OFST (0) - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_CDR_BC_LTD0_OFST (0) - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_CDR_BW_SEL_OFST (6) -#define A60810_RG_SSUSB_CDR_BIC_LTD1_OFST (0) - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G_OFST (28) -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G_OFST (27) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G_OFST (26) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G_OFST (25) -#define A60810_RG_SSUSB_P_EQ_T_SEL_OFST (15) -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC_OFST (5) -#define A60810_RG_SSUSB_PLLBAND_RECAL_OFST (4) -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN_OFST (3) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN_OFST (2) -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON_OFST (0) - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RG_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RG_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RG_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD_OFST (16) -#define A60810_RG_SSUSB_U_BCN_OBS_PRD_OFST (0) - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL_OFST (16) -#define A60810_RG_SSUSB_BCN_DET_DIS_OFST (12) -#define A60810_RG_SSUSB_U_BCN_OBS_SEL_OFST (0) - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHL_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI_OFST (0) - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DE0OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DE1OS_LFI_OFST (0) - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_STOPTIME_OFST (14) -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL_OFST (11) -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL_OFST (8) -#define A60810_RG_SSUSB_EQ_STARTTIME_OFST (6) -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL_OFST (3) -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL_OFST (0) - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2_OFST (28) -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1_OFST (24) -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_TRI_DET_EN_OFST (7) -#define A60810_RG_SSUSB_EQ_TRI_DET_TH_OFST (0) - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET_OFST (25) -#define A60810_RG_SSUSB_EQ_EYE_MON_EN_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE0_Y_OFST (16) -#define A60810_RG_SSUSB_EQ_EYE1_Y_OFST (8) -#define A60810_RG_SSUSB_EQ_PILPO_ROUT_OFST (7) -#define A60810_RG_SSUSB_EQ_PI_KPGAIN_OFST (4) -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN_OFST (3) - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_MASK_OFST (7) - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL_OFST (31) -#define A60810_RG_SSUSB_EQ_SD_CNT1_OFST (24) -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL_OFST (22) -#define A60810_RG_SSUSB_EQ_SD_CNT0_OFST (16) - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX_OFST (28) -#define A60810_RG_SSUSB_EQ_DFEX_EN_OFST (27) -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_CHK_EYE_H_OFST (23) -#define A60810_RG_SSUSB_EQ_PIEYE_INI_OFST (16) -#define A60810_RG_SSUSB_EQ_PI90_INI_OFST (8) -#define A60810_RG_SSUSB_EQ_PI0_INI_OFST (0) - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV_OFST (16) -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR_OFST (12) -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR_OFST (8) -#define A60810_RG_SSUSB_EQ_DFEX_RST_OFST (7) -#define A60810_RG_SSUSB_EQ_GATED_RXD_B_OFST (6) -#define A60810_RG_SSUSB_EQ_PI90CK_SEL_OFST (4) -#define A60810_RG_SSUSB_EQ_DFEX_DIS_OFST (2) -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS_OFST (1) -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL_OFST (0) - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT_OFST (16) -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DFE_TOG_OFST (2) -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO_OFST (0) - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED_OFST (0) - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC_OFST (16) -#define A60810_RGS_SSUSB_LFPS_OFST (12) -#define A60810_RGS_SSUSB_TRAINDEC_OFST (8) -#define A60810_RGS_SSUSB_SCP_PAT_OFST (0) - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT_OFST (0) - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_RETRACK_OFST (12) -#define A60810_RGS_SSUSB_RXPLL_LOCK_OFST (10) -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D_OFST (9) -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D_OFST (8) -#define A60810_RGS_SSUSB_PDNCTL_OFST (0) - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_PRBS_ERRCNT_OFST (0) - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT_OFST (24) -#define A60810_RGS_SSUSB_SCP_DETCNT_OFST (16) -#define A60810_RGS_SSUSB_TSEQ_DETCNT_OFST (0) - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG_OFST (16) -#define A60810_RGS_SSUSB_BERT_LOCK_OFST (15) -#define A60810_RGS_SSUSB_SCP_DET_OFST (14) -#define A60810_RGS_SSUSB_TSEQ_DET_OFST (13) -#define A60810_RGS_SSUSB_EBUF_UDF_OFST (12) -#define A60810_RGS_SSUSB_EBUF_OVF_OFST (11) -#define A60810_RGS_SSUSB_PRBS_PASSTH_OFST (10) -#define A60810_RGS_SSUSB_PRBS_PASS_OFST (9) -#define A60810_RGS_SSUSB_PRBS_LOCK_OFST (8) -#define A60810_RGS_SSUSB_T2RLB_ERR_OFST (6) -#define A60810_RGS_SSUSB_T2RLB_PASSTH_OFST (5) -#define A60810_RGS_SSUSB_T2RLB_PASS_OFST (4) -#define A60810_RGS_SSUSB_T2RLB_LOCK_OFST (3) -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE_OFST (2) -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE_OFST (1) -#define A60810_RGS_SSUSB_RXDETECTED_OFST (0) - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE_OFST (30) -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT_OFST (29) -#define A60810_RGS_SSUSB_SIGCAL_OFFSET_OFST (24) -#define A60810_RGS_SSUSB_RX_IMP_SEL_OFST (16) -#define A60810_RGS_SSUSB_TX_IMP_SEL_OFST (8) -#define A60810_RGS_SSUSB_TFIFO_MSG_OFST (4) -#define A60810_RGS_SSUSB_RFIFO_MSG_OFST (0) - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT_OFST (8) -#define A60810_RGS_SSUSB_PRB_OUT_OFST (0) - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCD0H_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCD0L_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCD1H_OFST (0) - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCE0_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCE1_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCHHL_OFST (0) - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP_OFST (31) -#define A60810_RGS_SSUSB_EQ_DCLHL_OFST (24) -#define A60810_RGS_SSUSB_EQ_STATUS_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCEYE0_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCEYE1_OFST (0) - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0_OFST (0) - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1_OFST (0) - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS_OFST (8) -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY_OFST (7) -#define A60810_RGS_SSUSB_EQ_PILPO_OFST (0) - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0_OFST (0) - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_CNT_OFST (0) - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RGS_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RGS_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RGS_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL_OFST (24) -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE_OFST (16) -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE_OFST (0) - -/* A60931 */ - -//U3D_PHYD_MIX0 -#define A60931_RG_SSUSB_P_P3_TX_NG (0x1<<31) //31:31 -#define A60931_RG_SSUSB_TSEQ_EN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_TSEQ_POLEN (0x1<<29) //29:29 -#define A60931_RG_SSUSB_TSEQ_POL (0x1<<28) //28:28 -#define A60931_RG_SSUSB_P_P3_PCLK_NG (0x1<<27) //27:27 -#define A60931_RG_SSUSB_TSEQ_TH (0x7<<24) //26:24 -#define A60931_RG_SSUSB_PRBS_BERTH (0xff<<16) //23:16 -#define A60931_RG_SSUSB_DISABLE_PHY_U2_ON (0x1<<15) //15:15 -#define A60931_RG_SSUSB_DISABLE_PHY_U2_OFF (0x1<<14) //14:14 -#define A60931_RG_SSUSB_PRBS_EN (0x1<<13) //13:13 -#define A60931_RG_SSUSB_BPSLOCK (0x1<<12) //12:12 -#define A60931_RG_SSUSB_RTCOMCNT (0xf<<8) //11:8 -#define A60931_RG_SSUSB_COMCNT (0xf<<4) //7:4 -#define A60931_RG_SSUSB_PRBSEL_CALIB (0xf<<0) //3:0 - -//U3D_PHYD_MIX1 -#define A60931_RG_SSUSB_SLEEP_EN (0x1<<31) //31:31 -#define A60931_RG_SSUSB_PRBSEL_PCS (0x7<<28) //30:28 -#define A60931_RG_SSUSB_TXLFPS_PRD (0xf<<24) //27:24 -#define A60931_RG_SSUSB_P_RX_P0S_CK (0x1<<23) //23:23 -#define A60931_RG_SSUSB_P_TX_P0S_CK (0x1<<22) //22:22 -#define A60931_RG_SSUSB_PDNCTL (0x3f<<16) //21:16 -#define A60931_RG_SSUSB_TX_DRV_EN (0x1<<15) //15:15 -#define A60931_RG_SSUSB_TX_DRV_SEL (0x1<<14) //14:14 -#define A60931_RG_SSUSB_TX_DRV_DLY (0x3f<<8) //13:8 -#define A60931_RG_SSUSB_BERT_EN (0x1<<7) //7:7 -#define A60931_RG_SSUSB_SCP_TH (0x7<<4) //6:4 -#define A60931_RG_SSUSB_SCP_EN (0x1<<3) //3:3 -#define A60931_RG_SSUSB_RXANSIDEC_TEST (0x7<<0) //2:0 - -//U3D_PHYD_LFPS0 -#define A60931_RG_SSUSB_LFPS_PWD (0x1<<30) //30:30 -#define A60931_RG_SSUSB_FORCE_LFPS_PWD (0x1<<29) //29:29 -#define A60931_RG_SSUSB_RXLFPS_OVF (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_P3_ENTRY_SEL (0x1<<23) //23:23 -#define A60931_RG_SSUSB_P3_ENTRY (0x1<<22) //22:22 -#define A60931_RG_SSUSB_RXLFPS_CDRSEL (0x3<<20) //21:20 -#define A60931_RG_SSUSB_RXLFPS_CDRTH (0xf<<16) //19:16 -#define A60931_RG_SSUSB_LOCK5G_BLOCK (0x1<<15) //15:15 -#define A60931_RG_SSUSB_TFIFO_EXT_D_SEL (0x1<<14) //14:14 -#define A60931_RG_SSUSB_TFIFO_NO_EXTEND (0x1<<13) //13:13 -#define A60931_RG_SSUSB_RXLFPS_LOB (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_TXLFPS_EN (0x1<<7) //7:7 -#define A60931_RG_SSUSB_TXLFPS_SEL (0x1<<6) //6:6 -#define A60931_RG_SSUSB_RXLFPS_CDRLOCK (0x1<<5) //5:5 -#define A60931_RG_SSUSB_RXLFPS_UPB (0x1f<<0) //4:0 - -//U3D_PHYD_LFPS1 -#define A60931_RG_SSUSB_RX_IMP_BIAS (0xf<<28) //31:28 -#define A60931_RG_SSUSB_TX_IMP_BIAS (0xf<<24) //27:24 -#define A60931_RG_SSUSB_FWAKE_TH (0x3f<<16) //21:16 -#define A60931_RG_SSUSB_P1_ENTRY_SEL (0x1<<14) //14:14 -#define A60931_RG_SSUSB_P1_ENTRY (0x1<<13) //13:13 -#define A60931_RG_SSUSB_RXLFPS_UDF (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_RXLFPS_P0IDLETH (0xff<<0) //7:0 - -//U3D_PHYD_IMPCAL0 -#define A60931_RG_SSUSB_FORCE_TX_IMPSEL (0x1<<31) //31:31 -#define A60931_RG_SSUSB_TX_IMPCAL_EN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_FORCE_TX_IMPCAL_EN (0x1<<29) //29:29 -#define A60931_RG_SSUSB_TX_IMPSEL (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_TX_IMPCAL_CALCYC (0x3f<<16) //21:16 -#define A60931_RG_SSUSB_TX_IMPCAL_STBCYC (0x1f<<10) //14:10 -#define A60931_RG_SSUSB_TX_IMPCAL_CYCCNT (0x3ff<<0) //9:0 - -//U3D_PHYD_IMPCAL1 -#define A60931_RG_SSUSB_FORCE_RX_IMPSEL (0x1<<31) //31:31 -#define A60931_RG_SSUSB_RX_IMPCAL_EN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_FORCE_RX_IMPCAL_EN (0x1<<29) //29:29 -#define A60931_RG_SSUSB_RX_IMPSEL (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_RX_IMPCAL_CALCYC (0x3f<<16) //21:16 -#define A60931_RG_SSUSB_RX_IMPCAL_STBCYC (0x1f<<10) //14:10 -#define A60931_RG_SSUSB_RX_IMPCAL_CYCCNT (0x3ff<<0) //9:0 - -//U3D_PHYD_TXPLL0 -#define A60931_RG_SSUSB_TXPLL_DDSEN_CYC (0x1f<<27) //31:27 -#define A60931_RG_SSUSB_TXPLL_ON (0x1<<26) //26:26 -#define A60931_RG_SSUSB_FORCE_TXPLLON (0x1<<25) //25:25 -#define A60931_RG_SSUSB_TXPLL_STBCYC (0x1ff<<16) //24:16 -#define A60931_RG_SSUSB_TXPLL_NCPOCHG_CYC (0xf<<12) //15:12 -#define A60931_RG_SSUSB_TXPLL_NCPOEN_CYC (0x3<<10) //11:10 -#define A60931_RG_SSUSB_TXPLL_DDSRSTB_CYC (0x7<<0) //2:0 - -//U3D_PHYD_TXPLL1 -#define A60931_RG_SSUSB_PLL_NCPO_EN (0x1<<31) //31:31 -#define A60931_RG_SSUSB_PLL_FIFO_START_MAN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_PLL_NCPO_CHG (0x1<<28) //28:28 -#define A60931_RG_SSUSB_PLL_DDS_RSTB (0x1<<27) //27:27 -#define A60931_RG_SSUSB_PLL_DDS_PWDB (0x1<<26) //26:26 -#define A60931_RG_SSUSB_PLL_DDSEN (0x1<<25) //25:25 -#define A60931_RG_SSUSB_PLL_AUTOK_VCO (0x1<<24) //24:24 -#define A60931_RG_SSUSB_PLL_PWD (0x1<<23) //23:23 -#define A60931_RG_SSUSB_RX_AFE_PWD (0x1<<22) //22:22 -#define A60931_RG_SSUSB_PLL_TCADJ (0x3f<<16) //21:16 -#define A60931_RG_SSUSB_FORCE_CDR_TCADJ (0x1<<15) //15:15 -#define A60931_RG_SSUSB_FORCE_CDR_AUTOK_VCO (0x1<<14) //14:14 -#define A60931_RG_SSUSB_FORCE_CDR_PWD (0x1<<13) //13:13 -#define A60931_RG_SSUSB_FORCE_PLL_NCPO_EN (0x1<<12) //12:12 -#define A60931_RG_SSUSB_FORCE_PLL_FIFO_START_MAN (0x1<<11) //11:11 -#define A60931_RG_SSUSB_FORCE_PLL_NCPO_CHG (0x1<<9) //9:9 -#define A60931_RG_SSUSB_FORCE_PLL_DDS_RSTB (0x1<<8) //8:8 -#define A60931_RG_SSUSB_FORCE_PLL_DDS_PWDB (0x1<<7) //7:7 -#define A60931_RG_SSUSB_FORCE_PLL_DDSEN (0x1<<6) //6:6 -#define A60931_RG_SSUSB_FORCE_PLL_TCADJ (0x1<<5) //5:5 -#define A60931_RG_SSUSB_FORCE_PLL_AUTOK_VCO (0x1<<4) //4:4 -#define A60931_RG_SSUSB_FORCE_PLL_PWD (0x1<<3) //3:3 -#define A60931_RG_SSUSB_FLT_1_DISPERR_B (0x1<<2) //2:2 - -//U3D_PHYD_TXPLL2 -#define A60931_RG_SSUSB_TX_LFPS_EN (0x1<<31) //31:31 -#define A60931_RG_SSUSB_FORCE_TX_LFPS_EN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_TX_LFPS (0x1<<29) //29:29 -#define A60931_RG_SSUSB_FORCE_TX_LFPS (0x1<<28) //28:28 -#define A60931_RG_SSUSB_RXPLL_STB (0x1<<27) //27:27 -#define A60931_RG_SSUSB_TXPLL_STB (0x1<<26) //26:26 -#define A60931_RG_SSUSB_FORCE_RXPLL_STB (0x1<<25) //25:25 -#define A60931_RG_SSUSB_FORCE_TXPLL_STB (0x1<<24) //24:24 -#define A60931_RG_SSUSB_RXPLL_REFCKSEL (0x1<<16) //16:16 -#define A60931_RG_SSUSB_RXPLL_STBMODE (0x1<<11) //11:11 -#define A60931_RG_SSUSB_RXPLL_ON (0x1<<10) //10:10 -#define A60931_RG_SSUSB_FORCE_RXPLLON (0x1<<9) //9:9 -#define A60931_RG_SSUSB_FORCE_RX_AFE_PWD (0x1<<8) //8:8 -#define A60931_RG_SSUSB_CDR_AUTOK_VCO (0x1<<7) //7:7 -#define A60931_RG_SSUSB_CDR_PWD (0x1<<6) //6:6 -#define A60931_RG_SSUSB_CDR_TCADJ (0x3f<<0) //5:0 - -//U3D_PHYD_FL0 -#define A60931_RG_SSUSB_RX_FL_TARGET (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RX_FL_CYCLECNT (0xffff<<0) //15:0 - -//U3D_PHYD_MIX2 -#define A60931_RG_SSUSB_RX_EQ_RST (0x1<<31) //31:31 -#define A60931_RG_SSUSB_RX_EQ_RST_SEL (0x1<<30) //30:30 -#define A60931_RG_SSUSB_RXVAL_RST (0x1<<29) //29:29 -#define A60931_RG_SSUSB_RXVAL_CNT (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_CDROS_EN (0x1<<18) //18:18 -#define A60931_RG_SSUSB_CDR_LCKOP (0x3<<16) //17:16 -#define A60931_RG_SSUSB_RX_FL_LOCKTH (0xf<<8) //11:8 -#define A60931_RG_SSUSB_RX_FL_OFFSET (0xff<<0) //7:0 - -//U3D_PHYD_RX0 -#define A60931_RG_SSUSB_T2RLB_BERTH (0xff<<24) //31:24 -#define A60931_RG_SSUSB_T2RLB_PAT (0xff<<16) //23:16 -#define A60931_RG_SSUSB_T2RLB_EN (0x1<<15) //15:15 -#define A60931_RG_SSUSB_T2RLB_BPSCRAMB (0x1<<14) //14:14 -#define A60931_RG_SSUSB_T2RLB_SERIAL (0x1<<13) //13:13 -#define A60931_RG_SSUSB_T2RLB_MODE (0x3<<11) //12:11 -#define A60931_RG_SSUSB_RX_SAOSC_EN (0x1<<10) //10:10 -#define A60931_RG_SSUSB_RX_SAOSC_EN_SEL (0x1<<9) //9:9 -#define A60931_RG_SSUSB_RX_DFE_OPTION (0x1<<8) //8:8 -#define A60931_RG_SSUSB_RX_DFE_EN (0x1<<7) //7:7 -#define A60931_RG_SSUSB_RX_DFE_EN_SEL (0x1<<6) //6:6 -#define A60931_RG_SSUSB_RX_EQ_EN (0x1<<5) //5:5 -#define A60931_RG_SSUSB_RX_EQ_EN_SEL (0x1<<4) //4:4 -#define A60931_RG_SSUSB_RX_SAOSC_RST (0x1<<3) //3:3 -#define A60931_RG_SSUSB_RX_SAOSC_RST_SEL (0x1<<2) //2:2 -#define A60931_RG_SSUSB_RX_DFE_RST (0x1<<1) //1:1 -#define A60931_RG_SSUSB_RX_DFE_RST_SEL (0x1<<0) //0:0 - -//U3D_PHYD_T2RLB -#define A60931_RG_SSUSB_EQTRAIN_CH_MODE (0x1<<28) //28:28 -#define A60931_RG_SSUSB_PRB_OUT_CPPAT (0x1<<27) //27:27 -#define A60931_RG_SSUSB_BPANSIENC (0x1<<26) //26:26 -#define A60931_RG_SSUSB_VALID_EN (0x1<<25) //25:25 -#define A60931_RG_SSUSB_EBUF_SRST (0x1<<24) //24:24 -#define A60931_RG_SSUSB_K_EMP (0xf<<20) //23:20 -#define A60931_RG_SSUSB_K_FUL (0xf<<16) //19:16 -#define A60931_RG_SSUSB_T2RLB_BDATRST (0xf<<12) //15:12 -#define A60931_RG_SSUSB_P_T2RLB_SKP_EN (0x1<<10) //10:10 -#define A60931_RG_SSUSB_T2RLB_PATMODE (0x3<<8) //9:8 -#define A60931_RG_SSUSB_T2RLB_TSEQCNT (0xff<<0) //7:0 - -//U3D_PHYD_CPPAT -#define A60931_RG_SSUSB_CPPAT_PROGRAM_EN (0x1<<24) //24:24 -#define A60931_RG_SSUSB_CPPAT_TOZ (0x3<<21) //22:21 -#define A60931_RG_SSUSB_CPPAT_PRBS_EN (0x1<<20) //20:20 -#define A60931_RG_SSUSB_CPPAT_OUT_TMP2 (0xf<<16) //19:16 -#define A60931_RG_SSUSB_CPPAT_OUT_TMP1 (0xff<<8) //15:8 -#define A60931_RG_SSUSB_CPPAT_OUT_TMP0 (0xff<<0) //7:0 - -//U3D_PHYD_MIX3 -#define A60931_RG_SSUSB_CDR_TCADJ_MINUS (0x1<<31) //31:31 -#define A60931_RG_SSUSB_P_CDROS_EN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_P_P2_TX_DRV_DIS (0x1<<28) //28:28 -#define A60931_RG_SSUSB_CDR_TCADJ_OFFSET (0x7<<24) //26:24 -#define A60931_RG_SSUSB_PLL_TCADJ_MINUS (0x1<<23) //23:23 -#define A60931_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN (0x1<<20) //20:20 -#define A60931_RG_SSUSB_PLL_BIAS_LPF_EN (0x1<<19) //19:19 -#define A60931_RG_SSUSB_PLL_TCADJ_OFFSET (0x7<<16) //18:16 -#define A60931_RG_SSUSB_FORCE_PLL_SSCEN (0x1<<15) //15:15 -#define A60931_RG_SSUSB_PLL_SSCEN (0x1<<14) //14:14 -#define A60931_RG_SSUSB_FORCE_CDR_PI_PWD (0x1<<13) //13:13 -#define A60931_RG_SSUSB_CDR_PI_PWD (0x1<<12) //12:12 -#define A60931_RG_SSUSB_CDR_PI_MODE (0x1<<11) //11:11 -#define A60931_RG_SSUSB_TXPLL_SSCEN_CYC (0x3ff<<0) //9:0 - -//U3D_PHYD_EBUFCTL -#define A60931_RG_SSUSB_EBUFCTL (0xffffffff<<0) //31:0 - -//U3D_PHYD_PIPE0 -#define A60931_RG_SSUSB_RXTERMINATION (0x1<<30) //30:30 -#define A60931_RG_SSUSB_RXEQTRAINING (0x1<<29) //29:29 -#define A60931_RG_SSUSB_RXPOLARITY (0x1<<28) //28:28 -#define A60931_RG_SSUSB_TXDEEMPH (0x3<<26) //27:26 -#define A60931_RG_SSUSB_POWERDOWN (0x3<<24) //25:24 -#define A60931_RG_SSUSB_TXONESZEROS (0x1<<23) //23:23 -#define A60931_RG_SSUSB_TXELECIDLE (0x1<<22) //22:22 -#define A60931_RG_SSUSB_TXDETECTRX (0x1<<21) //21:21 -#define A60931_RG_SSUSB_PIPE_SEL (0x1<<20) //20:20 -#define A60931_RG_SSUSB_TXDATAK (0xf<<16) //19:16 -#define A60931_RG_SSUSB_CDR_STABLE_SEL (0x1<<15) //15:15 -#define A60931_RG_SSUSB_CDR_STABLE (0x1<<14) //14:14 -#define A60931_RG_SSUSB_CDR_RSTB_SEL (0x1<<13) //13:13 -#define A60931_RG_SSUSB_CDR_RSTB (0x1<<12) //12:12 -#define A60931_RG_SSUSB_FRC_PIPE_POWERDOWN (0x1<<11) //11:11 -#define A60931_RG_SSUSB_P_TXBCN_DIS (0x1<<6) //6:6 -#define A60931_RG_SSUSB_P_ERROR_SEL (0x3<<4) //5:4 -#define A60931_RG_SSUSB_TXMARGIN (0x7<<1) //3:1 -#define A60931_RG_SSUSB_TXCOMPLIANCE (0x1<<0) //0:0 - -//U3D_PHYD_PIPE1 -#define A60931_RG_SSUSB_TXDATA (0xffffffff<<0) //31:0 - -//U3D_PHYD_MIX4 -#define A60931_RG_SSUSB_CDROS_CNT (0x3f<<24) //29:24 -#define A60931_RG_SSUSB_T2RLB_BER_EN (0x1<<16) //16:16 -#define A60931_RG_SSUSB_T2RLB_BER_RATE (0xffff<<0) //15:0 - -//U3D_PHYD_CKGEN0 -#define A60931_RG_SSUSB_RFIFO_IMPLAT (0x1<<27) //27:27 -#define A60931_RG_SSUSB_TFIFO_PSEL (0x7<<24) //26:24 -#define A60931_RG_SSUSB_CKGEN_PSEL (0x3<<8) //9:8 -#define A60931_RG_SSUSB_RXCK_INV (0x1<<0) //0:0 - -//U3D_PHYD_MIX5 -#define A60931_RG_SSUSB_PRB_SEL (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RXPLL_STBCYC (0x7ff<<0) //10:0 - -//U3D_PHYD_RESERVED -#define A60931_RG_SSUSB_PHYD_RESERVE (0xffffffff<<0) //31:0 - -//U3D_PHYD_CDR0 -#define A60931_RG_SSUSB_CDR_BIC_LTR (0xf<<28) //31:28 -#define A60931_RG_SSUSB_CDR_BIC_LTD0 (0xf<<24) //27:24 -#define A60931_RG_SSUSB_CDR_BC_LTD1 (0x1f<<16) //20:16 -#define A60931_RG_SSUSB_CDR_BC_LTR (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_CDR_BC_LTD0 (0x1f<<0) //4:0 - -//U3D_PHYD_CDR1 -#define A60931_RG_SSUSB_CDR_BIR_LTD1 (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_CDR_BIR_LTR (0x1f<<16) //20:16 -#define A60931_RG_SSUSB_CDR_BIR_LTD0 (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_CDR_BW_SEL (0x3<<6) //7:6 -#define A60931_RG_SSUSB_CDR_BIC_LTD1 (0xf<<0) //3:0 - -//U3D_PHYD_PLL_0 -#define A60931_RG_SSUSB_FORCE_CDR_BAND_5G (0x1<<28) //28:28 -#define A60931_RG_SSUSB_FORCE_CDR_BAND_2P5G (0x1<<27) //27:27 -#define A60931_RG_SSUSB_FORCE_PLL_BAND_5G (0x1<<26) //26:26 -#define A60931_RG_SSUSB_FORCE_PLL_BAND_2P5G (0x1<<25) //25:25 -#define A60931_RG_SSUSB_P_EQ_T_SEL (0x3ff<<15) //24:15 -#define A60931_RG_SSUSB_PLL_ISO_EN_CYC (0x3ff<<5) //14:5 -#define A60931_RG_SSUSB_PLLBAND_RECAL (0x1<<4) //4:4 -#define A60931_RG_SSUSB_PLL_DDS_ISO_EN (0x1<<3) //3:3 -#define A60931_RG_SSUSB_FORCE_PLL_DDS_ISO_EN (0x1<<2) //2:2 -#define A60931_RG_SSUSB_PLL_DDS_PWR_ON (0x1<<1) //1:1 -#define A60931_RG_SSUSB_FORCE_PLL_DDS_PWR_ON (0x1<<0) //0:0 - -//U3D_PHYD_PLL_1 -#define A60931_RG_SSUSB_CDR_BAND_5G (0xff<<24) //31:24 -#define A60931_RG_SSUSB_CDR_BAND_2P5G (0xff<<16) //23:16 -#define A60931_RG_SSUSB_PLL_BAND_5G (0xff<<8) //15:8 -#define A60931_RG_SSUSB_PLL_BAND_2P5G (0xff<<0) //7:0 - -//U3D_PHYD_BCN_DET_1 -#define A60931_RG_SSUSB_P_BCN_OBS_PRD (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_U_BCN_OBS_PRD (0xffff<<0) //15:0 - -//U3D_PHYD_BCN_DET_2 -#define A60931_RG_SSUSB_P_BCN_OBS_SEL (0xfff<<16) //27:16 -#define A60931_RG_SSUSB_BCN_DET_DIS (0x1<<12) //12:12 -#define A60931_RG_SSUSB_U_BCN_OBS_SEL (0xfff<<0) //11:0 - -//U3D_EQ0 -#define A60931_RG_SSUSB_EQ_DLHL_LFI (0x7f<<24) //30:24 -#define A60931_RG_SSUSB_EQ_DHHL_LFI (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_EQ_DD0HOS_LFI (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_EQ_DD0LOS_LFI (0x7f<<0) //6:0 - -//U3D_EQ1 -#define A60931_RG_SSUSB_EQ_DD1HOS_LFI (0x7f<<24) //30:24 -#define A60931_RG_SSUSB_EQ_DD1LOS_LFI (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_EQ_DE0OS_LFI (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_EQ_DE1OS_LFI (0x7f<<0) //6:0 - -//U3D_EQ2 -#define A60931_RG_SSUSB_EQ_DLHLOS_LFI (0x7f<<24) //30:24 -#define A60931_RG_SSUSB_EQ_DHHLOS_LFI (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_EQ_STOPTIME (0x1<<14) //14:14 -#define A60931_RG_SSUSB_EQ_DHHL_LF_SEL (0x7<<11) //13:11 -#define A60931_RG_SSUSB_EQ_DSAOS_LF_SEL (0x7<<8) //10:8 -#define A60931_RG_SSUSB_EQ_STARTTIME (0x3<<6) //7:6 -#define A60931_RG_SSUSB_EQ_DLEQ_LF_SEL (0x7<<3) //5:3 -#define A60931_RG_SSUSB_EQ_DLHL_LF_SEL (0x7<<0) //2:0 - -//U3D_EQ3 -#define A60931_RG_SSUSB_EQ_DLEQ_LFI_GEN2 (0xf<<28) //31:28 -#define A60931_RG_SSUSB_EQ_DLEQ_LFI_GEN1 (0xf<<24) //27:24 -#define A60931_RG_SSUSB_EQ_DEYE0OS_LFI (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_EQ_DEYE1OS_LFI (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_EQ_TRI_DET_EN (0x1<<7) //7:7 -#define A60931_RG_SSUSB_EQ_TRI_DET_TH (0x7f<<0) //6:0 - -//U3D_EQ_EYE0 -#define A60931_RG_SSUSB_EQ_EYE_XOFFSET (0x7f<<25) //31:25 -#define A60931_RG_SSUSB_EQ_EYE_MON_EN (0x1<<24) //24:24 -#define A60931_RG_SSUSB_EQ_EYE0_Y (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_EQ_EYE1_Y (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_EQ_PILPO_ROUT (0x1<<7) //7:7 -#define A60931_RG_SSUSB_EQ_PI_KPGAIN (0x7<<4) //6:4 -#define A60931_RG_SSUSB_EQ_EYE_CNT_EN (0x1<<3) //3:3 - -//U3D_EQ_EYE1 -#define A60931_RG_SSUSB_EQ_SIGDET (0x7f<<24) //30:24 -#define A60931_RG_SSUSB_EQ_EYE_MASK (0x3ff<<7) //16:7 - -//U3D_EQ_EYE2 -#define A60931_RG_SSUSB_EQ_RX500M_CK_SEL (0x1<<31) //31:31 -#define A60931_RG_SSUSB_EQ_SD_CNT1 (0x3f<<24) //29:24 -#define A60931_RG_SSUSB_EQ_ISIFLAG_SEL (0x3<<22) //23:22 -#define A60931_RG_SSUSB_EQ_SD_CNT0 (0x3f<<16) //21:16 - -//U3D_EQ_DFE0 -#define A60931_RG_SSUSB_EQ_LEQMAX (0xf<<28) //31:28 -#define A60931_RG_SSUSB_EQ_DFEX_EN (0x1<<27) //27:27 -#define A60931_RG_SSUSB_EQ_DFEX_LF_SEL (0x7<<24) //26:24 -#define A60931_RG_SSUSB_EQ_CHK_EYE_H (0x1<<23) //23:23 -#define A60931_RG_SSUSB_EQ_PIEYE_INI (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_EQ_PI90_INI (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_EQ_PI0_INI (0x7f<<0) //6:0 - -//U3D_EQ_DFE1 -#define A60931_RG_SSUSB_EQ_REV (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_EQ_DFEYEN_DUR (0x7<<12) //14:12 -#define A60931_RG_SSUSB_EQ_DFEXEN_DUR (0x7<<8) //10:8 -#define A60931_RG_SSUSB_EQ_DFEX_RST (0x1<<7) //7:7 -#define A60931_RG_SSUSB_EQ_GATED_RXD_B (0x1<<6) //6:6 -#define A60931_RG_SSUSB_EQ_PI90CK_SEL (0x3<<4) //5:4 -#define A60931_RG_SSUSB_EQ_DFEX_DIS (0x1<<2) //2:2 -#define A60931_RG_SSUSB_EQ_DFEYEN_STOP_DIS (0x1<<1) //1:1 -#define A60931_RG_SSUSB_EQ_DFEXEN_SEL (0x1<<0) //0:0 - -//U3D_EQ_DFE2 -#define A60931_RG_SSUSB_EQ_MON_SEL (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_EQ_LEQOSC_DLYCNT (0x7<<16) //18:16 -#define A60931_RG_SSUSB_EQ_DLEQOS_LFI (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_EQ_DFE_TOG (0x1<<2) //2:2 -#define A60931_RG_SSUSB_EQ_LEQ_STOP_TO (0x3<<0) //1:0 - -//U3D_EQ_DFE3 -#define A60931_RG_SSUSB_EQ_RESERVED (0xffffffff<<0) //31:0 - -//U3D_PHYD_MON0 -#define A60931_RGS_SSUSB_BERT_BERC (0xffff<<16) //31:16 -#define A60931_RGS_SSUSB_LFPS (0xf<<12) //15:12 -#define A60931_RGS_SSUSB_TRAINDEC (0x7<<8) //10:8 -#define A60931_RGS_SSUSB_SCP_PAT (0xff<<0) //7:0 - -//U3D_PHYD_MON1 -#define A60931_RGS_SSUSB_RX_FL_OUT (0xffff<<0) //15:0 - -//U3D_PHYD_MON2 -#define A60931_RGS_SSUSB_T2RLB_ERRCNT (0xffff<<16) //31:16 -#define A60931_RGS_SSUSB_RETRACK (0xf<<12) //15:12 -#define A60931_RGS_SSUSB_RXPLL_LOCK (0x1<<10) //10:10 -#define A60931_RGS_SSUSB_CDR_VCOCAL_CPLT_D (0x1<<9) //9:9 -#define A60931_RGS_SSUSB_PLL_VCOCAL_CPLT_D (0x1<<8) //8:8 -#define A60931_RGS_SSUSB_PDNCTL (0xff<<0) //7:0 - -//U3D_PHYD_MON3 -#define A60931_RGS_SSUSB_TSEQ_ERRCNT (0xffff<<16) //31:16 -#define A60931_RGS_SSUSB_PRBS_ERRCNT (0xffff<<0) //15:0 - -//U3D_PHYD_MON4 -#define A60931_RGS_SSUSB_RX_LSLOCK_CNT (0xf<<24) //27:24 -#define A60931_RGS_SSUSB_SCP_DETCNT (0xff<<16) //23:16 -#define A60931_RGS_SSUSB_TSEQ_DETCNT (0xffff<<0) //15:0 - -//U3D_PHYD_MON5 -#define A60931_RGS_SSUSB_EBUFMSG (0xffff<<16) //31:16 -#define A60931_RGS_SSUSB_BERT_LOCK (0x1<<15) //15:15 -#define A60931_RGS_SSUSB_SCP_DET (0x1<<14) //14:14 -#define A60931_RGS_SSUSB_TSEQ_DET (0x1<<13) //13:13 -#define A60931_RGS_SSUSB_EBUF_UDF (0x1<<12) //12:12 -#define A60931_RGS_SSUSB_EBUF_OVF (0x1<<11) //11:11 -#define A60931_RGS_SSUSB_PRBS_PASSTH (0x1<<10) //10:10 -#define A60931_RGS_SSUSB_PRBS_PASS (0x1<<9) //9:9 -#define A60931_RGS_SSUSB_PRBS_LOCK (0x1<<8) //8:8 -#define A60931_RGS_SSUSB_T2RLB_ERR (0x1<<6) //6:6 -#define A60931_RGS_SSUSB_T2RLB_PASSTH (0x1<<5) //5:5 -#define A60931_RGS_SSUSB_T2RLB_PASS (0x1<<4) //4:4 -#define A60931_RGS_SSUSB_T2RLB_LOCK (0x1<<3) //3:3 -#define A60931_RGS_SSUSB_RX_IMPCAL_DONE (0x1<<2) //2:2 -#define A60931_RGS_SSUSB_TX_IMPCAL_DONE (0x1<<1) //1:1 -#define A60931_RGS_SSUSB_RXDETECTED (0x1<<0) //0:0 - -//U3D_PHYD_MON6 -#define A60931_RGS_SSUSB_SIGCAL_DONE (0x1<<30) //30:30 -#define A60931_RGS_SSUSB_SIGCAL_CAL_OUT (0x1<<29) //29:29 -#define A60931_RGS_SSUSB_SIGCAL_OFFSET (0x1f<<24) //28:24 -#define A60931_RGS_SSUSB_RX_IMP_SEL (0x1f<<16) //20:16 -#define A60931_RGS_SSUSB_TX_IMP_SEL (0x1f<<8) //12:8 -#define A60931_RGS_SSUSB_TFIFO_MSG (0xf<<4) //7:4 -#define A60931_RGS_SSUSB_RFIFO_MSG (0xf<<0) //3:0 - -//U3D_PHYD_MON7 -#define A60931_RGS_SSUSB_FT_OUT (0xff<<8) //15:8 -#define A60931_RGS_SSUSB_PRB_OUT (0xff<<0) //7:0 - -//U3D_PHYA_RX_MON0 -#define A60931_RGS_SSUSB_EQ_DCLEQ (0xf<<24) //27:24 -#define A60931_RGS_SSUSB_EQ_DCD0H (0x7f<<16) //22:16 -#define A60931_RGS_SSUSB_EQ_DCD0L (0x7f<<8) //14:8 -#define A60931_RGS_SSUSB_EQ_DCD1H (0x7f<<0) //6:0 - -//U3D_PHYA_RX_MON1 -#define A60931_RGS_SSUSB_EQ_DCD1L (0x7f<<24) //30:24 -#define A60931_RGS_SSUSB_EQ_DCE0 (0x7f<<16) //22:16 -#define A60931_RGS_SSUSB_EQ_DCE1 (0x7f<<8) //14:8 -#define A60931_RGS_SSUSB_EQ_DCHHL (0x7f<<0) //6:0 - -//U3D_PHYA_RX_MON2 -#define A60931_RGS_SSUSB_EQ_LEQ_STOP (0x1<<31) //31:31 -#define A60931_RGS_SSUSB_EQ_DCLHL (0x7f<<24) //30:24 -#define A60931_RGS_SSUSB_EQ_STATUS (0xff<<16) //23:16 -#define A60931_RGS_SSUSB_EQ_DCEYE0 (0x7f<<8) //14:8 -#define A60931_RGS_SSUSB_EQ_DCEYE1 (0x7f<<0) //6:0 - -//U3D_PHYA_RX_MON3 -#define A60931_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0 (0xfffff<<0) //19:0 - -//U3D_PHYA_RX_MON4 -#define A60931_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1 (0xfffff<<0) //19:0 - -//U3D_PHYA_RX_MON5 -#define A60931_RGS_SSUSB_EQ_DCLEQOS (0x1f<<8) //12:8 -#define A60931_RGS_SSUSB_EQ_EYE_CNT_RDY (0x1<<7) //7:7 -#define A60931_RGS_SSUSB_EQ_PILPO (0x7f<<0) //6:0 - -//U3D_PHYD_CPPAT2 -#define A60931_RG_SSUSB_CPPAT_OUT_H_TMP2 (0xf<<16) //19:16 -#define A60931_RG_SSUSB_CPPAT_OUT_H_TMP1 (0xff<<8) //15:8 -#define A60931_RG_SSUSB_CPPAT_OUT_H_TMP0 (0xff<<0) //7:0 - -//U3D_EQ_EYE3 -#define A60931_RG_SSUSB_EQ_LEQ_SHIFT (0x7<<24) //26:24 -#define A60931_RG_SSUSB_EQ_EYE_CNT (0xfffff<<0) //19:0 - -//U3D_KBAND_OUT -#define A60931_RGS_SSUSB_CDR_BAND_5G (0xff<<24) //31:24 -#define A60931_RGS_SSUSB_CDR_BAND_2P5G (0xff<<16) //23:16 -#define A60931_RGS_SSUSB_PLL_BAND_5G (0xff<<8) //15:8 -#define A60931_RGS_SSUSB_PLL_BAND_2P5G (0xff<<0) //7:0 - -//U3D_KBAND_OUT1 -#define A60931_RGS_SSUSB_CDR_VCOCAL_FAIL (0x1<<24) //24:24 -#define A60931_RGS_SSUSB_CDR_VCOCAL_STATE (0xff<<16) //23:16 -#define A60931_RGS_SSUSB_PLL_VCOCAL_FAIL (0x1<<8) //8:8 -#define A60931_RGS_SSUSB_PLL_VCOCAL_STATE (0xff<<0) //7:0 - -/* OFFSET */ - -//U3D_PHYD_MIX0 -#define A60931_RG_SSUSB_P_P3_TX_NG_OFST (31) -#define A60931_RG_SSUSB_TSEQ_EN_OFST (30) -#define A60931_RG_SSUSB_TSEQ_POLEN_OFST (29) -#define A60931_RG_SSUSB_TSEQ_POL_OFST (28) -#define A60931_RG_SSUSB_P_P3_PCLK_NG_OFST (27) -#define A60931_RG_SSUSB_TSEQ_TH_OFST (24) -#define A60931_RG_SSUSB_PRBS_BERTH_OFST (16) -#define A60931_RG_SSUSB_DISABLE_PHY_U2_ON_OFST (15) -#define A60931_RG_SSUSB_DISABLE_PHY_U2_OFF_OFST (14) -#define A60931_RG_SSUSB_PRBS_EN_OFST (13) -#define A60931_RG_SSUSB_BPSLOCK_OFST (12) -#define A60931_RG_SSUSB_RTCOMCNT_OFST (8) -#define A60931_RG_SSUSB_COMCNT_OFST (4) -#define A60931_RG_SSUSB_PRBSEL_CALIB_OFST (0) - -//U3D_PHYD_MIX1 -#define A60931_RG_SSUSB_SLEEP_EN_OFST (31) -#define A60931_RG_SSUSB_PRBSEL_PCS_OFST (28) -#define A60931_RG_SSUSB_TXLFPS_PRD_OFST (24) -#define A60931_RG_SSUSB_P_RX_P0S_CK_OFST (23) -#define A60931_RG_SSUSB_P_TX_P0S_CK_OFST (22) -#define A60931_RG_SSUSB_PDNCTL_OFST (16) -#define A60931_RG_SSUSB_TX_DRV_EN_OFST (15) -#define A60931_RG_SSUSB_TX_DRV_SEL_OFST (14) -#define A60931_RG_SSUSB_TX_DRV_DLY_OFST (8) -#define A60931_RG_SSUSB_BERT_EN_OFST (7) -#define A60931_RG_SSUSB_SCP_TH_OFST (4) -#define A60931_RG_SSUSB_SCP_EN_OFST (3) -#define A60931_RG_SSUSB_RXANSIDEC_TEST_OFST (0) - -//U3D_PHYD_LFPS0 -#define A60931_RG_SSUSB_LFPS_PWD_OFST (30) -#define A60931_RG_SSUSB_FORCE_LFPS_PWD_OFST (29) -#define A60931_RG_SSUSB_RXLFPS_OVF_OFST (24) -#define A60931_RG_SSUSB_P3_ENTRY_SEL_OFST (23) -#define A60931_RG_SSUSB_P3_ENTRY_OFST (22) -#define A60931_RG_SSUSB_RXLFPS_CDRSEL_OFST (20) -#define A60931_RG_SSUSB_RXLFPS_CDRTH_OFST (16) -#define A60931_RG_SSUSB_LOCK5G_BLOCK_OFST (15) -#define A60931_RG_SSUSB_TFIFO_EXT_D_SEL_OFST (14) -#define A60931_RG_SSUSB_TFIFO_NO_EXTEND_OFST (13) -#define A60931_RG_SSUSB_RXLFPS_LOB_OFST (8) -#define A60931_RG_SSUSB_TXLFPS_EN_OFST (7) -#define A60931_RG_SSUSB_TXLFPS_SEL_OFST (6) -#define A60931_RG_SSUSB_RXLFPS_CDRLOCK_OFST (5) -#define A60931_RG_SSUSB_RXLFPS_UPB_OFST (0) - -//U3D_PHYD_LFPS1 -#define A60931_RG_SSUSB_RX_IMP_BIAS_OFST (28) -#define A60931_RG_SSUSB_TX_IMP_BIAS_OFST (24) -#define A60931_RG_SSUSB_FWAKE_TH_OFST (16) -#define A60931_RG_SSUSB_P1_ENTRY_SEL_OFST (14) -#define A60931_RG_SSUSB_P1_ENTRY_OFST (13) -#define A60931_RG_SSUSB_RXLFPS_UDF_OFST (8) -#define A60931_RG_SSUSB_RXLFPS_P0IDLETH_OFST (0) - -//U3D_PHYD_IMPCAL0 -#define A60931_RG_SSUSB_FORCE_TX_IMPSEL_OFST (31) -#define A60931_RG_SSUSB_TX_IMPCAL_EN_OFST (30) -#define A60931_RG_SSUSB_FORCE_TX_IMPCAL_EN_OFST (29) -#define A60931_RG_SSUSB_TX_IMPSEL_OFST (24) -#define A60931_RG_SSUSB_TX_IMPCAL_CALCYC_OFST (16) -#define A60931_RG_SSUSB_TX_IMPCAL_STBCYC_OFST (10) -#define A60931_RG_SSUSB_TX_IMPCAL_CYCCNT_OFST (0) - -//U3D_PHYD_IMPCAL1 -#define A60931_RG_SSUSB_FORCE_RX_IMPSEL_OFST (31) -#define A60931_RG_SSUSB_RX_IMPCAL_EN_OFST (30) -#define A60931_RG_SSUSB_FORCE_RX_IMPCAL_EN_OFST (29) -#define A60931_RG_SSUSB_RX_IMPSEL_OFST (24) -#define A60931_RG_SSUSB_RX_IMPCAL_CALCYC_OFST (16) -#define A60931_RG_SSUSB_RX_IMPCAL_STBCYC_OFST (10) -#define A60931_RG_SSUSB_RX_IMPCAL_CYCCNT_OFST (0) - -//U3D_PHYD_TXPLL0 -#define A60931_RG_SSUSB_TXPLL_DDSEN_CYC_OFST (27) -#define A60931_RG_SSUSB_TXPLL_ON_OFST (26) -#define A60931_RG_SSUSB_FORCE_TXPLLON_OFST (25) -#define A60931_RG_SSUSB_TXPLL_STBCYC_OFST (16) -#define A60931_RG_SSUSB_TXPLL_NCPOCHG_CYC_OFST (12) -#define A60931_RG_SSUSB_TXPLL_NCPOEN_CYC_OFST (10) -#define A60931_RG_SSUSB_TXPLL_DDSRSTB_CYC_OFST (0) - -//U3D_PHYD_TXPLL1 -#define A60931_RG_SSUSB_PLL_NCPO_EN_OFST (31) -#define A60931_RG_SSUSB_PLL_FIFO_START_MAN_OFST (30) -#define A60931_RG_SSUSB_PLL_NCPO_CHG_OFST (28) -#define A60931_RG_SSUSB_PLL_DDS_RSTB_OFST (27) -#define A60931_RG_SSUSB_PLL_DDS_PWDB_OFST (26) -#define A60931_RG_SSUSB_PLL_DDSEN_OFST (25) -#define A60931_RG_SSUSB_PLL_AUTOK_VCO_OFST (24) -#define A60931_RG_SSUSB_PLL_PWD_OFST (23) -#define A60931_RG_SSUSB_RX_AFE_PWD_OFST (22) -#define A60931_RG_SSUSB_PLL_TCADJ_OFST (16) -#define A60931_RG_SSUSB_FORCE_CDR_TCADJ_OFST (15) -#define A60931_RG_SSUSB_FORCE_CDR_AUTOK_VCO_OFST (14) -#define A60931_RG_SSUSB_FORCE_CDR_PWD_OFST (13) -#define A60931_RG_SSUSB_FORCE_PLL_NCPO_EN_OFST (12) -#define A60931_RG_SSUSB_FORCE_PLL_FIFO_START_MAN_OFST (11) -#define A60931_RG_SSUSB_FORCE_PLL_NCPO_CHG_OFST (9) -#define A60931_RG_SSUSB_FORCE_PLL_DDS_RSTB_OFST (8) -#define A60931_RG_SSUSB_FORCE_PLL_DDS_PWDB_OFST (7) -#define A60931_RG_SSUSB_FORCE_PLL_DDSEN_OFST (6) -#define A60931_RG_SSUSB_FORCE_PLL_TCADJ_OFST (5) -#define A60931_RG_SSUSB_FORCE_PLL_AUTOK_VCO_OFST (4) -#define A60931_RG_SSUSB_FORCE_PLL_PWD_OFST (3) -#define A60931_RG_SSUSB_FLT_1_DISPERR_B_OFST (2) - -//U3D_PHYD_TXPLL2 -#define A60931_RG_SSUSB_TX_LFPS_EN_OFST (31) -#define A60931_RG_SSUSB_FORCE_TX_LFPS_EN_OFST (30) -#define A60931_RG_SSUSB_TX_LFPS_OFST (29) -#define A60931_RG_SSUSB_FORCE_TX_LFPS_OFST (28) -#define A60931_RG_SSUSB_RXPLL_STB_OFST (27) -#define A60931_RG_SSUSB_TXPLL_STB_OFST (26) -#define A60931_RG_SSUSB_FORCE_RXPLL_STB_OFST (25) -#define A60931_RG_SSUSB_FORCE_TXPLL_STB_OFST (24) -#define A60931_RG_SSUSB_RXPLL_REFCKSEL_OFST (16) -#define A60931_RG_SSUSB_RXPLL_STBMODE_OFST (11) -#define A60931_RG_SSUSB_RXPLL_ON_OFST (10) -#define A60931_RG_SSUSB_FORCE_RXPLLON_OFST (9) -#define A60931_RG_SSUSB_FORCE_RX_AFE_PWD_OFST (8) -#define A60931_RG_SSUSB_CDR_AUTOK_VCO_OFST (7) -#define A60931_RG_SSUSB_CDR_PWD_OFST (6) -#define A60931_RG_SSUSB_CDR_TCADJ_OFST (0) - -//U3D_PHYD_FL0 -#define A60931_RG_SSUSB_RX_FL_TARGET_OFST (16) -#define A60931_RG_SSUSB_RX_FL_CYCLECNT_OFST (0) - -//U3D_PHYD_MIX2 -#define A60931_RG_SSUSB_RX_EQ_RST_OFST (31) -#define A60931_RG_SSUSB_RX_EQ_RST_SEL_OFST (30) -#define A60931_RG_SSUSB_RXVAL_RST_OFST (29) -#define A60931_RG_SSUSB_RXVAL_CNT_OFST (24) -#define A60931_RG_SSUSB_CDROS_EN_OFST (18) -#define A60931_RG_SSUSB_CDR_LCKOP_OFST (16) -#define A60931_RG_SSUSB_RX_FL_LOCKTH_OFST (8) -#define A60931_RG_SSUSB_RX_FL_OFFSET_OFST (0) - -//U3D_PHYD_RX0 -#define A60931_RG_SSUSB_T2RLB_BERTH_OFST (24) -#define A60931_RG_SSUSB_T2RLB_PAT_OFST (16) -#define A60931_RG_SSUSB_T2RLB_EN_OFST (15) -#define A60931_RG_SSUSB_T2RLB_BPSCRAMB_OFST (14) -#define A60931_RG_SSUSB_T2RLB_SERIAL_OFST (13) -#define A60931_RG_SSUSB_T2RLB_MODE_OFST (11) -#define A60931_RG_SSUSB_RX_SAOSC_EN_OFST (10) -#define A60931_RG_SSUSB_RX_SAOSC_EN_SEL_OFST (9) -#define A60931_RG_SSUSB_RX_DFE_OPTION_OFST (8) -#define A60931_RG_SSUSB_RX_DFE_EN_OFST (7) -#define A60931_RG_SSUSB_RX_DFE_EN_SEL_OFST (6) -#define A60931_RG_SSUSB_RX_EQ_EN_OFST (5) -#define A60931_RG_SSUSB_RX_EQ_EN_SEL_OFST (4) -#define A60931_RG_SSUSB_RX_SAOSC_RST_OFST (3) -#define A60931_RG_SSUSB_RX_SAOSC_RST_SEL_OFST (2) -#define A60931_RG_SSUSB_RX_DFE_RST_OFST (1) -#define A60931_RG_SSUSB_RX_DFE_RST_SEL_OFST (0) - -//U3D_PHYD_T2RLB -#define A60931_RG_SSUSB_EQTRAIN_CH_MODE_OFST (28) -#define A60931_RG_SSUSB_PRB_OUT_CPPAT_OFST (27) -#define A60931_RG_SSUSB_BPANSIENC_OFST (26) -#define A60931_RG_SSUSB_VALID_EN_OFST (25) -#define A60931_RG_SSUSB_EBUF_SRST_OFST (24) -#define A60931_RG_SSUSB_K_EMP_OFST (20) -#define A60931_RG_SSUSB_K_FUL_OFST (16) -#define A60931_RG_SSUSB_T2RLB_BDATRST_OFST (12) -#define A60931_RG_SSUSB_P_T2RLB_SKP_EN_OFST (10) -#define A60931_RG_SSUSB_T2RLB_PATMODE_OFST (8) -#define A60931_RG_SSUSB_T2RLB_TSEQCNT_OFST (0) - -//U3D_PHYD_CPPAT -#define A60931_RG_SSUSB_CPPAT_PROGRAM_EN_OFST (24) -#define A60931_RG_SSUSB_CPPAT_TOZ_OFST (21) -#define A60931_RG_SSUSB_CPPAT_PRBS_EN_OFST (20) -#define A60931_RG_SSUSB_CPPAT_OUT_TMP2_OFST (16) -#define A60931_RG_SSUSB_CPPAT_OUT_TMP1_OFST (8) -#define A60931_RG_SSUSB_CPPAT_OUT_TMP0_OFST (0) - -//U3D_PHYD_MIX3 -#define A60931_RG_SSUSB_CDR_TCADJ_MINUS_OFST (31) -#define A60931_RG_SSUSB_P_CDROS_EN_OFST (30) -#define A60931_RG_SSUSB_P_P2_TX_DRV_DIS_OFST (28) -#define A60931_RG_SSUSB_CDR_TCADJ_OFFSET_OFST (24) -#define A60931_RG_SSUSB_PLL_TCADJ_MINUS_OFST (23) -#define A60931_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN_OFST (20) -#define A60931_RG_SSUSB_PLL_BIAS_LPF_EN_OFST (19) -#define A60931_RG_SSUSB_PLL_TCADJ_OFFSET_OFST (16) -#define A60931_RG_SSUSB_FORCE_PLL_SSCEN_OFST (15) -#define A60931_RG_SSUSB_PLL_SSCEN_OFST (14) -#define A60931_RG_SSUSB_FORCE_CDR_PI_PWD_OFST (13) -#define A60931_RG_SSUSB_CDR_PI_PWD_OFST (12) -#define A60931_RG_SSUSB_CDR_PI_MODE_OFST (11) -#define A60931_RG_SSUSB_TXPLL_SSCEN_CYC_OFST (0) - -//U3D_PHYD_EBUFCTL -#define A60931_RG_SSUSB_EBUFCTL_OFST (0) - -//U3D_PHYD_PIPE0 -#define A60931_RG_SSUSB_RXTERMINATION_OFST (30) -#define A60931_RG_SSUSB_RXEQTRAINING_OFST (29) -#define A60931_RG_SSUSB_RXPOLARITY_OFST (28) -#define A60931_RG_SSUSB_TXDEEMPH_OFST (26) -#define A60931_RG_SSUSB_POWERDOWN_OFST (24) -#define A60931_RG_SSUSB_TXONESZEROS_OFST (23) -#define A60931_RG_SSUSB_TXELECIDLE_OFST (22) -#define A60931_RG_SSUSB_TXDETECTRX_OFST (21) -#define A60931_RG_SSUSB_PIPE_SEL_OFST (20) -#define A60931_RG_SSUSB_TXDATAK_OFST (16) -#define A60931_RG_SSUSB_CDR_STABLE_SEL_OFST (15) -#define A60931_RG_SSUSB_CDR_STABLE_OFST (14) -#define A60931_RG_SSUSB_CDR_RSTB_SEL_OFST (13) -#define A60931_RG_SSUSB_CDR_RSTB_OFST (12) -#define A60931_RG_SSUSB_FRC_PIPE_POWERDOWN_OFST (11) -#define A60931_RG_SSUSB_P_TXBCN_DIS_OFST (6) -#define A60931_RG_SSUSB_P_ERROR_SEL_OFST (4) -#define A60931_RG_SSUSB_TXMARGIN_OFST (1) -#define A60931_RG_SSUSB_TXCOMPLIANCE_OFST (0) - -//U3D_PHYD_PIPE1 -#define A60931_RG_SSUSB_TXDATA_OFST (0) - -//U3D_PHYD_MIX4 -#define A60931_RG_SSUSB_CDROS_CNT_OFST (24) -#define A60931_RG_SSUSB_T2RLB_BER_EN_OFST (16) -#define A60931_RG_SSUSB_T2RLB_BER_RATE_OFST (0) - -//U3D_PHYD_CKGEN0 -#define A60931_RG_SSUSB_RFIFO_IMPLAT_OFST (27) -#define A60931_RG_SSUSB_TFIFO_PSEL_OFST (24) -#define A60931_RG_SSUSB_CKGEN_PSEL_OFST (8) -#define A60931_RG_SSUSB_RXCK_INV_OFST (0) - -//U3D_PHYD_MIX5 -#define A60931_RG_SSUSB_PRB_SEL_OFST (16) -#define A60931_RG_SSUSB_RXPLL_STBCYC_OFST (0) - -//U3D_PHYD_RESERVED -#define A60931_RG_SSUSB_PHYD_RESERVE_OFST (0) - -//U3D_PHYD_CDR0 -#define A60931_RG_SSUSB_CDR_BIC_LTR_OFST (28) -#define A60931_RG_SSUSB_CDR_BIC_LTD0_OFST (24) -#define A60931_RG_SSUSB_CDR_BC_LTD1_OFST (16) -#define A60931_RG_SSUSB_CDR_BC_LTR_OFST (8) -#define A60931_RG_SSUSB_CDR_BC_LTD0_OFST (0) - -//U3D_PHYD_CDR1 -#define A60931_RG_SSUSB_CDR_BIR_LTD1_OFST (24) -#define A60931_RG_SSUSB_CDR_BIR_LTR_OFST (16) -#define A60931_RG_SSUSB_CDR_BIR_LTD0_OFST (8) -#define A60931_RG_SSUSB_CDR_BW_SEL_OFST (6) -#define A60931_RG_SSUSB_CDR_BIC_LTD1_OFST (0) - -//U3D_PHYD_PLL_0 -#define A60931_RG_SSUSB_FORCE_CDR_BAND_5G_OFST (28) -#define A60931_RG_SSUSB_FORCE_CDR_BAND_2P5G_OFST (27) -#define A60931_RG_SSUSB_FORCE_PLL_BAND_5G_OFST (26) -#define A60931_RG_SSUSB_FORCE_PLL_BAND_2P5G_OFST (25) -#define A60931_RG_SSUSB_P_EQ_T_SEL_OFST (15) -#define A60931_RG_SSUSB_PLL_ISO_EN_CYC_OFST (5) -#define A60931_RG_SSUSB_PLLBAND_RECAL_OFST (4) -#define A60931_RG_SSUSB_PLL_DDS_ISO_EN_OFST (3) -#define A60931_RG_SSUSB_FORCE_PLL_DDS_ISO_EN_OFST (2) -#define A60931_RG_SSUSB_PLL_DDS_PWR_ON_OFST (1) -#define A60931_RG_SSUSB_FORCE_PLL_DDS_PWR_ON_OFST (0) - -//U3D_PHYD_PLL_1 -#define A60931_RG_SSUSB_CDR_BAND_5G_OFST (24) -#define A60931_RG_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60931_RG_SSUSB_PLL_BAND_5G_OFST (8) -#define A60931_RG_SSUSB_PLL_BAND_2P5G_OFST (0) - -//U3D_PHYD_BCN_DET_1 -#define A60931_RG_SSUSB_P_BCN_OBS_PRD_OFST (16) -#define A60931_RG_SSUSB_U_BCN_OBS_PRD_OFST (0) - -//U3D_PHYD_BCN_DET_2 -#define A60931_RG_SSUSB_P_BCN_OBS_SEL_OFST (16) -#define A60931_RG_SSUSB_BCN_DET_DIS_OFST (12) -#define A60931_RG_SSUSB_U_BCN_OBS_SEL_OFST (0) - -//U3D_EQ0 -#define A60931_RG_SSUSB_EQ_DLHL_LFI_OFST (24) -#define A60931_RG_SSUSB_EQ_DHHL_LFI_OFST (16) -#define A60931_RG_SSUSB_EQ_DD0HOS_LFI_OFST (8) -#define A60931_RG_SSUSB_EQ_DD0LOS_LFI_OFST (0) - -//U3D_EQ1 -#define A60931_RG_SSUSB_EQ_DD1HOS_LFI_OFST (24) -#define A60931_RG_SSUSB_EQ_DD1LOS_LFI_OFST (16) -#define A60931_RG_SSUSB_EQ_DE0OS_LFI_OFST (8) -#define A60931_RG_SSUSB_EQ_DE1OS_LFI_OFST (0) - -//U3D_EQ2 -#define A60931_RG_SSUSB_EQ_DLHLOS_LFI_OFST (24) -#define A60931_RG_SSUSB_EQ_DHHLOS_LFI_OFST (16) -#define A60931_RG_SSUSB_EQ_STOPTIME_OFST (14) -#define A60931_RG_SSUSB_EQ_DHHL_LF_SEL_OFST (11) -#define A60931_RG_SSUSB_EQ_DSAOS_LF_SEL_OFST (8) -#define A60931_RG_SSUSB_EQ_STARTTIME_OFST (6) -#define A60931_RG_SSUSB_EQ_DLEQ_LF_SEL_OFST (3) -#define A60931_RG_SSUSB_EQ_DLHL_LF_SEL_OFST (0) - -//U3D_EQ3 -#define A60931_RG_SSUSB_EQ_DLEQ_LFI_GEN2_OFST (28) -#define A60931_RG_SSUSB_EQ_DLEQ_LFI_GEN1_OFST (24) -#define A60931_RG_SSUSB_EQ_DEYE0OS_LFI_OFST (16) -#define A60931_RG_SSUSB_EQ_DEYE1OS_LFI_OFST (8) -#define A60931_RG_SSUSB_EQ_TRI_DET_EN_OFST (7) -#define A60931_RG_SSUSB_EQ_TRI_DET_TH_OFST (0) - -//U3D_EQ_EYE0 -#define A60931_RG_SSUSB_EQ_EYE_XOFFSET_OFST (25) -#define A60931_RG_SSUSB_EQ_EYE_MON_EN_OFST (24) -#define A60931_RG_SSUSB_EQ_EYE0_Y_OFST (16) -#define A60931_RG_SSUSB_EQ_EYE1_Y_OFST (8) -#define A60931_RG_SSUSB_EQ_PILPO_ROUT_OFST (7) -#define A60931_RG_SSUSB_EQ_PI_KPGAIN_OFST (4) -#define A60931_RG_SSUSB_EQ_EYE_CNT_EN_OFST (3) - -//U3D_EQ_EYE1 -#define A60931_RG_SSUSB_EQ_SIGDET_OFST (24) -#define A60931_RG_SSUSB_EQ_EYE_MASK_OFST (7) - -//U3D_EQ_EYE2 -#define A60931_RG_SSUSB_EQ_RX500M_CK_SEL_OFST (31) -#define A60931_RG_SSUSB_EQ_SD_CNT1_OFST (24) -#define A60931_RG_SSUSB_EQ_ISIFLAG_SEL_OFST (22) -#define A60931_RG_SSUSB_EQ_SD_CNT0_OFST (16) - -//U3D_EQ_DFE0 -#define A60931_RG_SSUSB_EQ_LEQMAX_OFST (28) -#define A60931_RG_SSUSB_EQ_DFEX_EN_OFST (27) -#define A60931_RG_SSUSB_EQ_DFEX_LF_SEL_OFST (24) -#define A60931_RG_SSUSB_EQ_CHK_EYE_H_OFST (23) -#define A60931_RG_SSUSB_EQ_PIEYE_INI_OFST (16) -#define A60931_RG_SSUSB_EQ_PI90_INI_OFST (8) -#define A60931_RG_SSUSB_EQ_PI0_INI_OFST (0) - -//U3D_EQ_DFE1 -#define A60931_RG_SSUSB_EQ_REV_OFST (16) -#define A60931_RG_SSUSB_EQ_DFEYEN_DUR_OFST (12) -#define A60931_RG_SSUSB_EQ_DFEXEN_DUR_OFST (8) -#define A60931_RG_SSUSB_EQ_DFEX_RST_OFST (7) -#define A60931_RG_SSUSB_EQ_GATED_RXD_B_OFST (6) -#define A60931_RG_SSUSB_EQ_PI90CK_SEL_OFST (4) -#define A60931_RG_SSUSB_EQ_DFEX_DIS_OFST (2) -#define A60931_RG_SSUSB_EQ_DFEYEN_STOP_DIS_OFST (1) -#define A60931_RG_SSUSB_EQ_DFEXEN_SEL_OFST (0) - -//U3D_EQ_DFE2 -#define A60931_RG_SSUSB_EQ_MON_SEL_OFST (24) -#define A60931_RG_SSUSB_EQ_LEQOSC_DLYCNT_OFST (16) -#define A60931_RG_SSUSB_EQ_DLEQOS_LFI_OFST (8) -#define A60931_RG_SSUSB_EQ_DFE_TOG_OFST (2) -#define A60931_RG_SSUSB_EQ_LEQ_STOP_TO_OFST (0) - -//U3D_EQ_DFE3 -#define A60931_RG_SSUSB_EQ_RESERVED_OFST (0) - -//U3D_PHYD_MON0 -#define A60931_RGS_SSUSB_BERT_BERC_OFST (16) -#define A60931_RGS_SSUSB_LFPS_OFST (12) -#define A60931_RGS_SSUSB_TRAINDEC_OFST (8) -#define A60931_RGS_SSUSB_SCP_PAT_OFST (0) - -//U3D_PHYD_MON1 -#define A60931_RGS_SSUSB_RX_FL_OUT_OFST (0) - -//U3D_PHYD_MON2 -#define A60931_RGS_SSUSB_T2RLB_ERRCNT_OFST (16) -#define A60931_RGS_SSUSB_RETRACK_OFST (12) -#define A60931_RGS_SSUSB_RXPLL_LOCK_OFST (10) -#define A60931_RGS_SSUSB_CDR_VCOCAL_CPLT_D_OFST (9) -#define A60931_RGS_SSUSB_PLL_VCOCAL_CPLT_D_OFST (8) -#define A60931_RGS_SSUSB_PDNCTL_OFST (0) - -//U3D_PHYD_MON3 -#define A60931_RGS_SSUSB_TSEQ_ERRCNT_OFST (16) -#define A60931_RGS_SSUSB_PRBS_ERRCNT_OFST (0) - -//U3D_PHYD_MON4 -#define A60931_RGS_SSUSB_RX_LSLOCK_CNT_OFST (24) -#define A60931_RGS_SSUSB_SCP_DETCNT_OFST (16) -#define A60931_RGS_SSUSB_TSEQ_DETCNT_OFST (0) - -//U3D_PHYD_MON5 -#define A60931_RGS_SSUSB_EBUFMSG_OFST (16) -#define A60931_RGS_SSUSB_BERT_LOCK_OFST (15) -#define A60931_RGS_SSUSB_SCP_DET_OFST (14) -#define A60931_RGS_SSUSB_TSEQ_DET_OFST (13) -#define A60931_RGS_SSUSB_EBUF_UDF_OFST (12) -#define A60931_RGS_SSUSB_EBUF_OVF_OFST (11) -#define A60931_RGS_SSUSB_PRBS_PASSTH_OFST (10) -#define A60931_RGS_SSUSB_PRBS_PASS_OFST (9) -#define A60931_RGS_SSUSB_PRBS_LOCK_OFST (8) -#define A60931_RGS_SSUSB_T2RLB_ERR_OFST (6) -#define A60931_RGS_SSUSB_T2RLB_PASSTH_OFST (5) -#define A60931_RGS_SSUSB_T2RLB_PASS_OFST (4) -#define A60931_RGS_SSUSB_T2RLB_LOCK_OFST (3) -#define A60931_RGS_SSUSB_RX_IMPCAL_DONE_OFST (2) -#define A60931_RGS_SSUSB_TX_IMPCAL_DONE_OFST (1) -#define A60931_RGS_SSUSB_RXDETECTED_OFST (0) - -//U3D_PHYD_MON6 -#define A60931_RGS_SSUSB_SIGCAL_DONE_OFST (30) -#define A60931_RGS_SSUSB_SIGCAL_CAL_OUT_OFST (29) -#define A60931_RGS_SSUSB_SIGCAL_OFFSET_OFST (24) -#define A60931_RGS_SSUSB_RX_IMP_SEL_OFST (16) -#define A60931_RGS_SSUSB_TX_IMP_SEL_OFST (8) -#define A60931_RGS_SSUSB_TFIFO_MSG_OFST (4) -#define A60931_RGS_SSUSB_RFIFO_MSG_OFST (0) - -//U3D_PHYD_MON7 -#define A60931_RGS_SSUSB_FT_OUT_OFST (8) -#define A60931_RGS_SSUSB_PRB_OUT_OFST (0) - -//U3D_PHYA_RX_MON0 -#define A60931_RGS_SSUSB_EQ_DCLEQ_OFST (24) -#define A60931_RGS_SSUSB_EQ_DCD0H_OFST (16) -#define A60931_RGS_SSUSB_EQ_DCD0L_OFST (8) -#define A60931_RGS_SSUSB_EQ_DCD1H_OFST (0) - -//U3D_PHYA_RX_MON1 -#define A60931_RGS_SSUSB_EQ_DCD1L_OFST (24) -#define A60931_RGS_SSUSB_EQ_DCE0_OFST (16) -#define A60931_RGS_SSUSB_EQ_DCE1_OFST (8) -#define A60931_RGS_SSUSB_EQ_DCHHL_OFST (0) - -//U3D_PHYA_RX_MON2 -#define A60931_RGS_SSUSB_EQ_LEQ_STOP_OFST (31) -#define A60931_RGS_SSUSB_EQ_DCLHL_OFST (24) -#define A60931_RGS_SSUSB_EQ_STATUS_OFST (16) -#define A60931_RGS_SSUSB_EQ_DCEYE0_OFST (8) -#define A60931_RGS_SSUSB_EQ_DCEYE1_OFST (0) - -//U3D_PHYA_RX_MON3 -#define A60931_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0_OFST (0) - -//U3D_PHYA_RX_MON4 -#define A60931_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1_OFST (0) - -//U3D_PHYA_RX_MON5 -#define A60931_RGS_SSUSB_EQ_DCLEQOS_OFST (8) -#define A60931_RGS_SSUSB_EQ_EYE_CNT_RDY_OFST (7) -#define A60931_RGS_SSUSB_EQ_PILPO_OFST (0) - -//U3D_PHYD_CPPAT2 -#define A60931_RG_SSUSB_CPPAT_OUT_H_TMP2_OFST (16) -#define A60931_RG_SSUSB_CPPAT_OUT_H_TMP1_OFST (8) -#define A60931_RG_SSUSB_CPPAT_OUT_H_TMP0_OFST (0) - -//U3D_EQ_EYE3 -#define A60931_RG_SSUSB_EQ_LEQ_SHIFT_OFST (24) -#define A60931_RG_SSUSB_EQ_EYE_CNT_OFST (0) - -//U3D_KBAND_OUT -#define A60931_RGS_SSUSB_CDR_BAND_5G_OFST (24) -#define A60931_RGS_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60931_RGS_SSUSB_PLL_BAND_5G_OFST (8) -#define A60931_RGS_SSUSB_PLL_BAND_2P5G_OFST (0) - -//U3D_KBAND_OUT1 -#define A60931_RGS_SSUSB_CDR_VCOCAL_FAIL_OFST (24) -#define A60931_RGS_SSUSB_CDR_VCOCAL_STATE_OFST (16) -#define A60931_RGS_SSUSB_PLL_VCOCAL_FAIL_OFST (8) -#define A60931_RGS_SSUSB_PLL_VCOCAL_STATE_OFST (0) - -struct u3phyd_bank2_reg_a { - /* 0x0 */ - __le32 b2_phyd_top1; - __le32 b2_phyd_top2; - __le32 b2_phyd_top3; - __le32 b2_phyd_top4; - /* 0x10 */ - __le32 b2_phyd_top5; - __le32 b2_phyd_top6; - __le32 b2_phyd_top7; - __le32 b2_phyd_p_sigdet1; - /* 0x20 */ - __le32 b2_phyd_p_sigdet2; - __le32 b2_phyd_p_sigdet_cal1; - __le32 b2_phyd_rxdet1; - __le32 b2_phyd_rxdet2; - /* 0x30 */ - __le32 b2_phyd_misc0; - __le32 b2_phyd_misc2; - __le32 b2_phyd_misc3; - __le32 b2_phyd_l1ss; - /* 0x40 */ - __le32 b2_rosc_0; - __le32 b2_rosc_1; - __le32 b2_rosc_2; - __le32 b2_rosc_3; - /* 0x50 */ - __le32 b2_rosc_4; - __le32 b2_rosc_5; - __le32 b2_rosc_6; - __le32 b2_rosc_7; - /* 0x60 */ - __le32 b2_rosc_8; - __le32 b2_rosc_9; - __le32 b2_rosc_a; - __le32 reserve1; - /* 0x70~0xd0 */ - __le32 reserve2[28]; - /* 0xe0 */ - __le32 phyd_version; - __le32 phyd_model; -}; - -/* A60810 */ - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_PCIE2_K_FUL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_SIGDET_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CLKRX_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_CLKRX_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CLKTX_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_CLKTX_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CLK_REQ_N_I (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RATE (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_RATE (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_PCIE_MODE_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_PHY_MODE (0x3<<1) /* 2:1 */ -#define A60810_RG_SSUSB_FORCE_PHY_MODE (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_6DB (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_IDEM_3P5DB (0x3f<<16) /* 21:16 */ -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_IDRV_3P5DB (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_FORCE_IDRV_0DB (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_IDRV_0DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI (0x7<<25) /* 27:25 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TX_BIASI_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_IDEM_6DB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_IDEM_6DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL (0x7f<<0) /* 6:0 */ - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL (0x3<<0) /* 1:0 */ - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_P_SIGDET_REK (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_CMDET (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXDET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_RXDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXDET_K_TWICE (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET (0x1ff<<18) /* 26:18 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB1_SET (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_PDN_T_SEL (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3 (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3 (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC (0x3f<<26) /* 31:26 */ -#define A60810_RG_SSUSB_TX_SER_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TX_SER_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TXPLL_REFCKSEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LFPS_PSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P3_CLS_CK_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PPCTL_PSEL (0x7<<5) /* 7:5 */ -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_BERTLB_PSEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_RETRACK_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_PPERRCNT_CLR (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2 (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ (0xf<<27) /* 30:27 */ -#define A60810_RG_SSUSB_P_SIGDET_125FILTER (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EIDLE_BF_RXDET (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC (0x1ff<<13) /* 21:13 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY (0x3f<<7) /* 12:7 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY (0x3f<<1) /* 6:1 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE (0x7<<16) /* 18:16 */ -#define A60810_RGS_SSUSB_PPERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1 (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_L1SS_REV0 (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_PLL_REK_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_TXDRV_MASKDLY (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RXSTS_VAL (0x1<<7) /* 7:7 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT (0x1<<4) /* 4:4 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXPLL_STB_PX0 (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_L1SS_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_FORCE_L1SS_EN (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND (0x1ff<<23) /* 31:23 */ -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_RING_OSC_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_BYPASS_DET (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RING_OSC_P3 (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_RING_OSC_RECAL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RING_OSC_SEL (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_ROSC_PROB_SEL (0xf<<2) /* 5:2 */ -#define A60810_RG_SSUSB_RING_FREQMETER_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RING_OSC_STATE (0x3<<10) /* 11:10 */ -#define A60810_RGS_SSUSB_RING_OSC_STABLE (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL (0xff<<0) /* 7:0 */ - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT (0xff<<0)/* 7:0 */ - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL (0xffffffff<<0)/* 31:0 */ - -/* OFFSET */ - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP_OFST (28) -#define A60810_RG_SSUSB_PCIE2_K_FUL_OFST (24) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_OFST (17) -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN_OFST (16) -#define A60810_RG_SSUSB_SIGDET_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_CLKRX_EN_OFST (13) -#define A60810_RG_SSUSB_FORCE_CLKRX_EN_OFST (12) -#define A60810_RG_SSUSB_CLKTX_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_CLKTX_EN_OFST (10) -#define A60810_RG_SSUSB_CLK_REQ_N_I_OFST (9) -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I_OFST (8) -#define A60810_RG_SSUSB_RATE_OFST (6) -#define A60810_RG_SSUSB_FORCE_RATE_OFST (5) -#define A60810_RG_SSUSB_PCIE_MODE_SEL_OFST (4) -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL_OFST (3) -#define A60810_RG_SSUSB_PHY_MODE_OFST (1) -#define A60810_RG_SSUSB_FORCE_PHY_MODE_OFST (0) - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB_OFST (30) -#define A60810_RG_SSUSB_IDRV_6DB_OFST (24) -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB_OFST (22) -#define A60810_RG_SSUSB_IDEM_3P5DB_OFST (16) -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB_OFST (14) -#define A60810_RG_SSUSB_IDRV_3P5DB_OFST (8) -#define A60810_RG_SSUSB_FORCE_IDRV_0DB_OFST (6) -#define A60810_RG_SSUSB_IDRV_0DB_OFST (0) - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN_OFST (24) -#define A60810_RG_SSUSB_TX_BIASI_EN_OFST (16) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_OFST (13) -#define A60810_RG_SSUSB_FORCE_IDEM_6DB_OFST (8) -#define A60810_RG_SSUSB_IDEM_6DB_OFST (0) - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G1_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G2_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS_OFST (31) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL_OFST (28) -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL_OFST (10) -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS_OFST (6) -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD_OFST (5) -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ_OFST (4) -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET_OFST (24) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN_OFST (8) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN_OFST (3) -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD_OFST (1) -#define A60810_RG_SSUSB_P_SIGDET_REK_OFST (0) - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL_OFST (31) -#define A60810_RG_SSUSB_FORCE_CMDET_OFST (30) -#define A60810_RG_SSUSB_RXDET_EN_OFST (29) -#define A60810_RG_SSUSB_FORCE_RXDET_EN_OFST (28) -#define A60810_RG_SSUSB_RXDET_K_TWICE_OFST (27) -#define A60810_RG_SSUSB_RXDET_STB3_SET_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB2_SET_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB1_SET_OFST (0) - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN_OFST (31) -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN_OFST (30) -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN_OFST (29) -#define A60810_RG_SSUSB_LCK2REF_EXT_EN_OFST (28) -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL_OFST (24) -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL_OFST (20) -#define A60810_RG_SSUSB_PDN_T_SEL_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3_OFST (0) - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC_OFST (26) -#define A60810_RG_SSUSB_TX_SER_EN_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_SER_EN_OFST (24) -#define A60810_RG_SSUSB_TXPLL_REFCKSEL_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN_OFST (22) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN_OFST (21) -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV_OFST (20) -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH_OFST (16) -#define A60810_RG_SSUSB_LFPS_PSEL_OFST (15) -#define A60810_RG_SSUSB_RX_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL_OFST (13) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_OFST (12) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL_OFST (11) -#define A60810_RG_SSUSB_P3_CLS_CK_SEL_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PSEL_OFST (8) -#define A60810_RG_SSUSB_PPCTL_PSEL_OFST (5) -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV_OFST (4) -#define A60810_RG_SSUSB_BERTLB_PSEL_OFST (2) -#define A60810_RG_SSUSB_RETRACK_DIS_OFST (1) -#define A60810_RG_SSUSB_PPERRCNT_CLR_OFST (0) - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2_OFST (31) -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_125FILTER_OFST (26) -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW_OFST (23) -#define A60810_RG_SSUSB_EIDLE_BF_RXDET_OFST (22) -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC_OFST (13) -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY_OFST (7) -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY_OFST (1) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV_OFST (0) - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE_OFST (16) -#define A60810_RGS_SSUSB_PPERRCNT_OFST (0) - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1_OFST (24) -#define A60810_RG_SSUSB_L1SS_REV0_OFST (16) -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS_OFST (11) -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS_OFST (10) -#define A60810_RG_SSUSB_P_PLL_REK_SEL_OFST (9) -#define A60810_RG_SSUSB_TXDRV_MASKDLY_OFST (8) -#define A60810_RG_SSUSB_RXSTS_VAL_OFST (7) -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN_OFST (6) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN_OFST (5) -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT_OFST (4) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT_OFST (3) -#define A60810_RG_SSUSB_RXPLL_STB_PX0_OFST (2) -#define A60810_RG_PCIE_L1SS_EN_OFST (1) -#define A60810_RG_PCIE_FORCE_L1SS_EN_OFST (0) - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND_OFST (23) -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_EN_OFST (3) -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN_OFST (2) -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET_OFST (1) -#define A60810_RG_SSUSB_RING_BYPASS_DET_OFST (0) - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3_OFST (20) -#define A60810_RG_SSUSB_RING_OSC_P3_OFST (19) -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL_OFST (17) -#define A60810_RG_SSUSB_RING_OSC_RECAL_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_SEL_OFST (8) -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL_OFST (0) - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC1_OFST (0) - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC3_OFST (0) - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_DETWIN2_OFST (0) - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND1_OFST (0) - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND2_OFST (0) - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND3_OFST (0) - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE_OFST (16) -#define A60810_RG_SSUSB_ROSC_PROB_SEL_OFST (2) -#define A60810_RG_SSUSB_RING_FREQMETER_EN_OFST (1) -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND_OFST (0) - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT_OFST (16) -#define A60810_RGS_SSUSB_RING_OSC_STATE_OFST (10) -#define A60810_RGS_SSUSB_RING_OSC_STABLE_OFST (9) -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_RING_OSC_CAL_OFST (0) - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT_OFST (0) - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION_OFST (0) - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL_OFST (0) - -/* A60931 */ - -//U3D_B2_PHYD_TOP1 -#define A60931_RG_SSUSB_PCIE2_K_EMP (0xf<<28) //31:28 -#define A60931_RG_SSUSB_PCIE2_K_FUL (0xf<<24) //27:24 -#define A60931_RG_SSUSB_TX_EIDLE_LP_EN (0x1<<17) //17:17 -#define A60931_RG_SSUSB_FORCE_TX_EIDLE_LP_EN (0x1<<16) //16:16 -#define A60931_RG_SSUSB_SIGDET_EN (0x1<<15) //15:15 -#define A60931_RG_SSUSB_FORCE_SIGDET_EN (0x1<<14) //14:14 -#define A60931_RG_SSUSB_CLKRX_EN (0x1<<13) //13:13 -#define A60931_RG_SSUSB_FORCE_CLKRX_EN (0x1<<12) //12:12 -#define A60931_RG_SSUSB_CLKTX_EN (0x1<<11) //11:11 -#define A60931_RG_SSUSB_FORCE_CLKTX_EN (0x1<<10) //10:10 -#define A60931_RG_SSUSB_CLK_REQ_N_I (0x1<<9) //9:9 -#define A60931_RG_SSUSB_FORCE_CLK_REQ_N_I (0x1<<8) //8:8 -#define A60931_RG_SSUSB_RATE (0x1<<6) //6:6 -#define A60931_RG_SSUSB_FORCE_RATE (0x1<<5) //5:5 -#define A60931_RG_SSUSB_PCIE_MODE_SEL (0x1<<4) //4:4 -#define A60931_RG_SSUSB_FORCE_PCIE_MODE_SEL (0x1<<3) //3:3 -#define A60931_RG_SSUSB_PHY_MODE (0x3<<1) //2:1 -#define A60931_RG_SSUSB_FORCE_PHY_MODE (0x1<<0) //0:0 - -//U3D_B2_PHYD_TOP2 -#define A60931_RG_SSUSB_FORCE_IDRV_6DB (0x1<<30) //30:30 -#define A60931_RG_SSUSB_IDRV_6DB (0x3f<<24) //29:24 -#define A60931_RG_SSUSB_FORCE_IDEM_3P5DB (0x1<<22) //22:22 -#define A60931_RG_SSUSB_IDEM_3P5DB (0x3f<<16) //21:16 -#define A60931_RG_SSUSB_FORCE_IDRV_3P5DB (0x1<<14) //14:14 -#define A60931_RG_SSUSB_IDRV_3P5DB (0x3f<<8) //13:8 -#define A60931_RG_SSUSB_FORCE_IDRV_0DB (0x1<<6) //6:6 -#define A60931_RG_SSUSB_IDRV_0DB (0x3f<<0) //5:0 - -//U3D_B2_PHYD_TOP3 -#define A60931_RG_SSUSB_TX_BIASI (0x7<<25) //27:25 -#define A60931_RG_SSUSB_FORCE_TX_BIASI_EN (0x1<<24) //24:24 -#define A60931_RG_SSUSB_TX_BIASI_EN (0x1<<16) //16:16 -#define A60931_RG_SSUSB_FORCE_TX_BIASI (0x1<<13) //13:13 -#define A60931_RG_SSUSB_FORCE_IDEM_6DB (0x1<<8) //8:8 -#define A60931_RG_SSUSB_IDEM_6DB (0x3f<<0) //5:0 - -//U3D_B2_PHYD_TOP4 -#define A60931_RG_SSUSB_G1_CDR_BIC_LTR (0xf<<28) //31:28 -#define A60931_RG_SSUSB_G1_CDR_BIC_LTD0 (0xf<<24) //27:24 -#define A60931_RG_SSUSB_G1_CDR_BC_LTD1 (0x1f<<16) //20:16 -#define A60931_RG_SSUSB_G1_L1SS_CDR_BW_SEL (0x3<<13) //14:13 -#define A60931_RG_SSUSB_G1_CDR_BC_LTR (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_G1_CDR_BW_SEL (0x3<<5) //6:5 -#define A60931_RG_SSUSB_G1_CDR_BC_LTD0 (0x1f<<0) //4:0 - -//U3D_B2_PHYD_TOP5 -#define A60931_RG_SSUSB_G1_CDR_BIR_LTD1 (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_G1_CDR_BIR_LTR (0x1f<<16) //20:16 -#define A60931_RG_SSUSB_G1_CDR_BIR_LTD0 (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_G1_CDR_BIC_LTD1 (0xf<<0) //3:0 - -//U3D_B2_PHYD_TOP6 -#define A60931_RG_SSUSB_G2_CDR_BIC_LTR (0xf<<28) //31:28 -#define A60931_RG_SSUSB_G2_CDR_BIC_LTD0 (0xf<<24) //27:24 -#define A60931_RG_SSUSB_G2_CDR_BC_LTD1 (0x1f<<16) //20:16 -#define A60931_RG_SSUSB_G2_L1SS_CDR_BW_SEL (0x3<<13) //14:13 -#define A60931_RG_SSUSB_G2_CDR_BC_LTR (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_G2_CDR_BW_SEL (0x3<<5) //6:5 -#define A60931_RG_SSUSB_G2_CDR_BC_LTD0 (0x1f<<0) //4:0 - -//U3D_B2_PHYD_TOP7 -#define A60931_RG_SSUSB_G2_CDR_BIR_LTD1 (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_G2_CDR_BIR_LTR (0x1f<<16) //20:16 -#define A60931_RG_SSUSB_G2_CDR_BIR_LTD0 (0x1f<<8) //12:8 -#define A60931_RG_SSUSB_G2_CDR_BIC_LTD1 (0xf<<0) //3:0 - -//U3D_B2_PHYD_P_SIGDET1 -#define A60931_RG_SSUSB_P_SIGDET_FLT_DIS (0x1<<31) //31:31 -#define A60931_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL (0x7f<<24) //30:24 -#define A60931_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL (0x7f<<8) //14:8 -#define A60931_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL (0x7f<<0) //6:0 - -//U3D_B2_PHYD_P_SIGDET2 -#define A60931_RG_SSUSB_P_SIGDET_RX_VAL_S (0x1<<29) //29:29 -#define A60931_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL (0x1<<28) //28:28 -#define A60931_RG_SSUSB_P_SIGDET_L0_EXIT_S (0x1<<27) //27:27 -#define A60931_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S (0x3<<25) //26:25 -#define A60931_RG_SSUSB_P_SIGDET_L0S_EXIT_S (0x1<<24) //24:24 -#define A60931_RG_SSUSB_P_SIGDET_L0S_ENTRY_S (0x1<<16) //16:16 -#define A60931_RG_SSUSB_P_SIGDET_PRB_SEL (0x1<<10) //10:10 -#define A60931_RG_SSUSB_P_SIGDET_BK_SIG_T (0x3<<8) //9:8 -#define A60931_RG_SSUSB_P_SIGDET_P2_RXLFPS (0x1<<6) //6:6 -#define A60931_RG_SSUSB_P_SIGDET_NON_BK_AD (0x1<<5) //5:5 -#define A60931_RG_SSUSB_P_SIGDET_BK_B_RXEQ (0x1<<4) //4:4 -#define A60931_RG_SSUSB_P_SIGDET_G2_KO_SEL (0x3<<2) //3:2 -#define A60931_RG_SSUSB_P_SIGDET_G1_KO_SEL (0x3<<0) //1:0 - -//U3D_B2_PHYD_P_SIGDET_CAL1 -#define A60931_RG_SSUSB_G2_2EIOS_DET_EN (0x1<<29) //29:29 -#define A60931_RG_SSUSB_P_SIGDET_CAL_OFFSET (0x1f<<24) //28:24 -#define A60931_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET (0x1<<16) //16:16 -#define A60931_RG_SSUSB_P_SIGDET_CAL_EN (0x1<<8) //8:8 -#define A60931_RG_SSUSB_P_FORCE_SIGDET_CAL_EN (0x1<<3) //3:3 -#define A60931_RG_SSUSB_P_SIGDET_FLT_EN (0x1<<2) //2:2 -#define A60931_RG_SSUSB_P_SIGDET_SAMPLE_PRD (0x1<<1) //1:1 -#define A60931_RG_SSUSB_P_SIGDET_REK (0x1<<0) //0:0 - -//U3D_B2_PHYD_RXDET1 -#define A60931_RG_SSUSB_RXDET_PRB_SEL (0x1<<31) //31:31 -#define A60931_RG_SSUSB_FORCE_CMDET (0x1<<30) //30:30 -#define A60931_RG_SSUSB_RXDET_EN (0x1<<29) //29:29 -#define A60931_RG_SSUSB_FORCE_RXDET_EN (0x1<<28) //28:28 -#define A60931_RG_SSUSB_RXDET_K_TWICE (0x1<<27) //27:27 -#define A60931_RG_SSUSB_RXDET_STB3_SET (0x1ff<<18) //26:18 -#define A60931_RG_SSUSB_RXDET_STB2_SET (0x1ff<<9) //17:9 -#define A60931_RG_SSUSB_RXDET_STB1_SET (0x1ff<<0) //8:0 - -//U3D_B2_PHYD_RXDET2 -#define A60931_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN (0x1<<31) //31:31 -#define A60931_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN (0x1<<30) //30:30 -#define A60931_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN (0x1<<29) //29:29 -#define A60931_RG_SSUSB_LCK2REF_EXT_EN (0x1<<28) //28:28 -#define A60931_RG_SSUSB_G2_LCK2REF_EXT_SEL (0xf<<24) //27:24 -#define A60931_RG_SSUSB_LCK2REF_EXT_SEL (0xf<<20) //23:20 -#define A60931_RG_SSUSB_PDN_T_SEL (0x3<<18) //19:18 -#define A60931_RG_SSUSB_RXDET_STB3_SET_P3 (0x1ff<<9) //17:9 -#define A60931_RG_SSUSB_RXDET_STB2_SET_P3 (0x1ff<<0) //8:0 - -//U3D_B2_PHYD_MISC0 -#define A60931_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC (0x3f<<26) //31:26 -#define A60931_RG_SSUSB_TX_SER_EN (0x1<<25) //25:25 -#define A60931_RG_SSUSB_FORCE_TX_SER_EN (0x1<<24) //24:24 -#define A60931_RG_SSUSB_TXPLL_REFCKSEL (0x1<<23) //23:23 -#define A60931_RG_SSUSB_FORCE_PLL_DDS_HF_EN (0x1<<22) //22:22 -#define A60931_RG_SSUSB_PLL_DDS_HF_EN_MAN (0x1<<21) //21:21 -#define A60931_RG_SSUSB_RXLFPS_ENTXDRV (0x1<<20) //20:20 -#define A60931_RG_SSUSB_RX_FL_UNLOCKTH (0xf<<16) //19:16 -#define A60931_RG_SSUSB_LFPS_PSEL (0x1<<15) //15:15 -#define A60931_RG_SSUSB_RX_SIGDET_EN (0x1<<14) //14:14 -#define A60931_RG_SSUSB_RX_SIGDET_EN_SEL (0x1<<13) //13:13 -#define A60931_RG_SSUSB_RX_PI_CAL_EN (0x1<<12) //12:12 -#define A60931_RG_SSUSB_RX_PI_CAL_EN_SEL (0x1<<11) //11:11 -#define A60931_RG_SSUSB_P3_CLS_CK_SEL (0x1<<10) //10:10 -#define A60931_RG_SSUSB_T2RLB_PSEL (0x3<<8) //9:8 -#define A60931_RG_SSUSB_PPCTL_PSEL (0x7<<5) //7:5 -#define A60931_RG_SSUSB_PHYD_TX_DATA_INV (0x1<<4) //4:4 -#define A60931_RG_SSUSB_BERTLB_PSEL (0x3<<2) //3:2 -#define A60931_RG_SSUSB_RETRACK_DIS (0x1<<1) //1:1 -#define A60931_RG_SSUSB_PPERRCNT_CLR (0x1<<0) //0:0 - -//U3D_B2_PHYD_MISC2 -#define A60931_RG_SSUSB_FRC_PLL_DDS_PREDIV2 (0x1<<31) //31:31 -#define A60931_RG_SSUSB_FRC_PLL_DDS_IADJ (0xf<<27) //30:27 -#define A60931_RG_SSUSB_P_SIGDET_125FILTER (0x1<<26) //26:26 -#define A60931_RG_SSUSB_P_SIGDET_RST_FILTER (0x1<<25) //25:25 -#define A60931_RG_SSUSB_P_SIGDET_EID_USE_RAW (0x1<<24) //24:24 -#define A60931_RG_SSUSB_P_SIGDET_LTD_USE_RAW (0x1<<23) //23:23 -#define A60931_RG_SSUSB_EIDLE_BF_RXDET (0x1<<22) //22:22 -#define A60931_RG_SSUSB_EIDLE_LP_STBCYC (0x1ff<<13) //21:13 -#define A60931_RG_SSUSB_TX_EIDLE_LP_POSTDLY (0x3f<<7) //12:7 -#define A60931_RG_SSUSB_TX_EIDLE_LP_PREDLY (0x3f<<1) //6:1 -#define A60931_RG_SSUSB_TX_EIDLE_LP_EN_ADV (0x1<<0) //0:0 - -//U3D_B2_PHYD_MISC3 -#define A60931_RGS_SSUSB_DDS_CALIB_C_STATE (0x7<<16) //18:16 -#define A60931_RGS_SSUSB_PPERRCNT (0xffff<<0) //15:0 - -//U3D_B2_PHYD_L1SS -#define A60931_RG_SSUSB_L1SS_REV1 (0xff<<24) //31:24 -#define A60931_RG_SSUSB_L1SS_REV0 (0xff<<16) //23:16 -#define A60931_RG_SSUSB_P_LTD1_SLOCK_DIS (0x1<<11) //11:11 -#define A60931_RG_SSUSB_PLL_CNT_CLEAN_DIS (0x1<<10) //10:10 -#define A60931_RG_SSUSB_P_PLL_REK_SEL (0x1<<9) //9:9 -#define A60931_RG_SSUSB_TXDRV_MASKDLY (0x1<<8) //8:8 -#define A60931_RG_SSUSB_RXSTS_VAL (0x1<<7) //7:7 -#define A60931_RG_PCIE_PHY_CLKREQ_N_EN (0x1<<6) //6:6 -#define A60931_RG_PCIE_FORCE_PHY_CLKREQ_N_EN (0x1<<5) //5:5 -#define A60931_RG_PCIE_PHY_CLKREQ_N_OUT (0x1<<4) //4:4 -#define A60931_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT (0x1<<3) //3:3 -#define A60931_RG_SSUSB_RXPLL_STB_PX0 (0x1<<2) //2:2 -#define A60931_RG_PCIE_L1SS_EN (0x1<<1) //1:1 -#define A60931_RG_PCIE_FORCE_L1SS_EN (0x1<<0) //0:0 - -//U3D_B2_ROSC_0 -#define A60931_RG_SSUSB_RING_OSC_CNTEND (0x1ff<<23) //31:23 -#define A60931_RG_SSUSB_XTAL_OSC_CNTEND (0x7f<<16) //22:16 -#define A60931_RG_SSUSB_RING_OSC_EN (0x1<<3) //3:3 -#define A60931_RG_SSUSB_RING_OSC_FORCE_EN (0x1<<2) //2:2 -#define A60931_RG_SSUSB_FRC_RING_BYPASS_DET (0x1<<1) //1:1 -#define A60931_RG_SSUSB_RING_BYPASS_DET (0x1<<0) //0:0 - -//U3D_B2_ROSC_1 -#define A60931_RG_SSUSB_RING_OSC_FRC_P3 (0x1<<20) //20:20 -#define A60931_RG_SSUSB_RING_OSC_P3 (0x1<<19) //19:19 -#define A60931_RG_SSUSB_RING_OSC_FRC_RECAL (0x3<<17) //18:17 -#define A60931_RG_SSUSB_RING_OSC_RECAL (0x1<<16) //16:16 -#define A60931_RG_SSUSB_RING_OSC_SEL (0xff<<8) //15:8 -#define A60931_RG_SSUSB_RING_OSC_FRC_SEL (0x1<<0) //0:0 - -//U3D_B2_ROSC_2 -#define A60931_RG_SSUSB_RING_DET_STRCYC2 (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RING_DET_STRCYC1 (0xffff<<0) //15:0 - -//U3D_B2_ROSC_3 -#define A60931_RG_SSUSB_RING_DET_DETWIN1 (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RING_DET_STRCYC3 (0xffff<<0) //15:0 - -//U3D_B2_ROSC_4 -#define A60931_RG_SSUSB_RING_DET_DETWIN3 (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RING_DET_DETWIN2 (0xffff<<0) //15:0 - -//U3D_B2_ROSC_5 -#define A60931_RG_SSUSB_RING_DET_LBOND1 (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RING_DET_UBOND1 (0xffff<<0) //15:0 - -//U3D_B2_ROSC_6 -#define A60931_RG_SSUSB_RING_DET_LBOND2 (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RING_DET_UBOND2 (0xffff<<0) //15:0 - -//U3D_B2_ROSC_7 -#define A60931_RG_SSUSB_RING_DET_LBOND3 (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_RING_DET_UBOND3 (0xffff<<0) //15:0 - -//U3D_B2_ROSC_8 -#define A60931_RG_SSUSB_RING_RESERVE (0xffff<<16) //31:16 -#define A60931_RG_SSUSB_ROSC_PROB_SEL (0xf<<2) //5:2 -#define A60931_RG_SSUSB_RING_FREQMETER_EN (0x1<<1) //1:1 -#define A60931_RG_SSUSB_RING_DET_BPS_UBOND (0x1<<0) //0:0 - -//U3D_B2_ROSC_9 -#define A60931_RGS_FM_RING_CNT (0xffff<<16) //31:16 -#define A60931_RGS_SSUSB_RING_OSC_STATE (0x3<<10) //11:10 -#define A60931_RGS_SSUSB_RING_OSC_STABLE (0x1<<9) //9:9 -#define A60931_RGS_SSUSB_RING_OSC_CAL_FAIL (0x1<<8) //8:8 -#define A60931_RGS_SSUSB_RING_OSC_CAL (0xff<<0) //7:0 - -//U3D_B2_ROSC_A -#define A60931_RGS_SSUSB_ROSC_PROB_OUT (0xff<<0) //7:0 - -//U3D_PHYD_VERSION -#define A60931_RGS_SSUSB_PHYD_VERSION (0xffffffff<<0) //31:0 - -//U3D_PHYD_MODEL -#define A60931_RGS_SSUSB_PHYD_MODEL (0xffffffff<<0) //31:0 - -/* OFFSET */ - -//U3D_B2_PHYD_TOP1 -#define A60931_RG_SSUSB_PCIE2_K_EMP_OFST (28) -#define A60931_RG_SSUSB_PCIE2_K_FUL_OFST (24) -#define A60931_RG_SSUSB_TX_EIDLE_LP_EN_OFST (17) -#define A60931_RG_SSUSB_FORCE_TX_EIDLE_LP_EN_OFST (16) -#define A60931_RG_SSUSB_SIGDET_EN_OFST (15) -#define A60931_RG_SSUSB_FORCE_SIGDET_EN_OFST (14) -#define A60931_RG_SSUSB_CLKRX_EN_OFST (13) -#define A60931_RG_SSUSB_FORCE_CLKRX_EN_OFST (12) -#define A60931_RG_SSUSB_CLKTX_EN_OFST (11) -#define A60931_RG_SSUSB_FORCE_CLKTX_EN_OFST (10) -#define A60931_RG_SSUSB_CLK_REQ_N_I_OFST (9) -#define A60931_RG_SSUSB_FORCE_CLK_REQ_N_I_OFST (8) -#define A60931_RG_SSUSB_RATE_OFST (6) -#define A60931_RG_SSUSB_FORCE_RATE_OFST (5) -#define A60931_RG_SSUSB_PCIE_MODE_SEL_OFST (4) -#define A60931_RG_SSUSB_FORCE_PCIE_MODE_SEL_OFST (3) -#define A60931_RG_SSUSB_PHY_MODE_OFST (1) -#define A60931_RG_SSUSB_FORCE_PHY_MODE_OFST (0) - -//U3D_B2_PHYD_TOP2 -#define A60931_RG_SSUSB_FORCE_IDRV_6DB_OFST (30) -#define A60931_RG_SSUSB_IDRV_6DB_OFST (24) -#define A60931_RG_SSUSB_FORCE_IDEM_3P5DB_OFST (22) -#define A60931_RG_SSUSB_IDEM_3P5DB_OFST (16) -#define A60931_RG_SSUSB_FORCE_IDRV_3P5DB_OFST (14) -#define A60931_RG_SSUSB_IDRV_3P5DB_OFST (8) -#define A60931_RG_SSUSB_FORCE_IDRV_0DB_OFST (6) -#define A60931_RG_SSUSB_IDRV_0DB_OFST (0) - -//U3D_B2_PHYD_TOP3 -#define A60931_RG_SSUSB_TX_BIASI_OFST (25) -#define A60931_RG_SSUSB_FORCE_TX_BIASI_EN_OFST (24) -#define A60931_RG_SSUSB_TX_BIASI_EN_OFST (16) -#define A60931_RG_SSUSB_FORCE_TX_BIASI_OFST (13) -#define A60931_RG_SSUSB_FORCE_IDEM_6DB_OFST (8) -#define A60931_RG_SSUSB_IDEM_6DB_OFST (0) - -//U3D_B2_PHYD_TOP4 -#define A60931_RG_SSUSB_G1_CDR_BIC_LTR_OFST (28) -#define A60931_RG_SSUSB_G1_CDR_BIC_LTD0_OFST (24) -#define A60931_RG_SSUSB_G1_CDR_BC_LTD1_OFST (16) -#define A60931_RG_SSUSB_G1_L1SS_CDR_BW_SEL_OFST (13) -#define A60931_RG_SSUSB_G1_CDR_BC_LTR_OFST (8) -#define A60931_RG_SSUSB_G1_CDR_BW_SEL_OFST (5) -#define A60931_RG_SSUSB_G1_CDR_BC_LTD0_OFST (0) - -//U3D_B2_PHYD_TOP5 -#define A60931_RG_SSUSB_G1_CDR_BIR_LTD1_OFST (24) -#define A60931_RG_SSUSB_G1_CDR_BIR_LTR_OFST (16) -#define A60931_RG_SSUSB_G1_CDR_BIR_LTD0_OFST (8) -#define A60931_RG_SSUSB_G1_CDR_BIC_LTD1_OFST (0) - -//U3D_B2_PHYD_TOP6 -#define A60931_RG_SSUSB_G2_CDR_BIC_LTR_OFST (28) -#define A60931_RG_SSUSB_G2_CDR_BIC_LTD0_OFST (24) -#define A60931_RG_SSUSB_G2_CDR_BC_LTD1_OFST (16) -#define A60931_RG_SSUSB_G2_L1SS_CDR_BW_SEL_OFST (13) -#define A60931_RG_SSUSB_G2_CDR_BC_LTR_OFST (8) -#define A60931_RG_SSUSB_G2_CDR_BW_SEL_OFST (5) -#define A60931_RG_SSUSB_G2_CDR_BC_LTD0_OFST (0) - -//U3D_B2_PHYD_TOP7 -#define A60931_RG_SSUSB_G2_CDR_BIR_LTD1_OFST (24) -#define A60931_RG_SSUSB_G2_CDR_BIR_LTR_OFST (16) -#define A60931_RG_SSUSB_G2_CDR_BIR_LTD0_OFST (8) -#define A60931_RG_SSUSB_G2_CDR_BIC_LTD1_OFST (0) - -//U3D_B2_PHYD_P_SIGDET1 -#define A60931_RG_SSUSB_P_SIGDET_FLT_DIS_OFST (31) -#define A60931_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL_OFST (24) -#define A60931_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL_OFST (16) -#define A60931_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL_OFST (8) -#define A60931_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL_OFST (0) - -//U3D_B2_PHYD_P_SIGDET2 -#define A60931_RG_SSUSB_P_SIGDET_RX_VAL_S_OFST (29) -#define A60931_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL_OFST (28) -#define A60931_RG_SSUSB_P_SIGDET_L0_EXIT_S_OFST (27) -#define A60931_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S_OFST (25) -#define A60931_RG_SSUSB_P_SIGDET_L0S_EXIT_S_OFST (24) -#define A60931_RG_SSUSB_P_SIGDET_L0S_ENTRY_S_OFST (16) -#define A60931_RG_SSUSB_P_SIGDET_PRB_SEL_OFST (10) -#define A60931_RG_SSUSB_P_SIGDET_BK_SIG_T_OFST (8) -#define A60931_RG_SSUSB_P_SIGDET_P2_RXLFPS_OFST (6) -#define A60931_RG_SSUSB_P_SIGDET_NON_BK_AD_OFST (5) -#define A60931_RG_SSUSB_P_SIGDET_BK_B_RXEQ_OFST (4) -#define A60931_RG_SSUSB_P_SIGDET_G2_KO_SEL_OFST (2) -#define A60931_RG_SSUSB_P_SIGDET_G1_KO_SEL_OFST (0) - -//U3D_B2_PHYD_P_SIGDET_CAL1 -#define A60931_RG_SSUSB_G2_2EIOS_DET_EN_OFST (29) -#define A60931_RG_SSUSB_P_SIGDET_CAL_OFFSET_OFST (24) -#define A60931_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET_OFST (16) -#define A60931_RG_SSUSB_P_SIGDET_CAL_EN_OFST (8) -#define A60931_RG_SSUSB_P_FORCE_SIGDET_CAL_EN_OFST (3) -#define A60931_RG_SSUSB_P_SIGDET_FLT_EN_OFST (2) -#define A60931_RG_SSUSB_P_SIGDET_SAMPLE_PRD_OFST (1) -#define A60931_RG_SSUSB_P_SIGDET_REK_OFST (0) - -//U3D_B2_PHYD_RXDET1 -#define A60931_RG_SSUSB_RXDET_PRB_SEL_OFST (31) -#define A60931_RG_SSUSB_FORCE_CMDET_OFST (30) -#define A60931_RG_SSUSB_RXDET_EN_OFST (29) -#define A60931_RG_SSUSB_FORCE_RXDET_EN_OFST (28) -#define A60931_RG_SSUSB_RXDET_K_TWICE_OFST (27) -#define A60931_RG_SSUSB_RXDET_STB3_SET_OFST (18) -#define A60931_RG_SSUSB_RXDET_STB2_SET_OFST (9) -#define A60931_RG_SSUSB_RXDET_STB1_SET_OFST (0) - -//U3D_B2_PHYD_RXDET2 -#define A60931_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN_OFST (31) -#define A60931_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN_OFST (30) -#define A60931_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN_OFST (29) -#define A60931_RG_SSUSB_LCK2REF_EXT_EN_OFST (28) -#define A60931_RG_SSUSB_G2_LCK2REF_EXT_SEL_OFST (24) -#define A60931_RG_SSUSB_LCK2REF_EXT_SEL_OFST (20) -#define A60931_RG_SSUSB_PDN_T_SEL_OFST (18) -#define A60931_RG_SSUSB_RXDET_STB3_SET_P3_OFST (9) -#define A60931_RG_SSUSB_RXDET_STB2_SET_P3_OFST (0) - -//U3D_B2_PHYD_MISC0 -#define A60931_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC_OFST (26) -#define A60931_RG_SSUSB_TX_SER_EN_OFST (25) -#define A60931_RG_SSUSB_FORCE_TX_SER_EN_OFST (24) -#define A60931_RG_SSUSB_TXPLL_REFCKSEL_OFST (23) -#define A60931_RG_SSUSB_FORCE_PLL_DDS_HF_EN_OFST (22) -#define A60931_RG_SSUSB_PLL_DDS_HF_EN_MAN_OFST (21) -#define A60931_RG_SSUSB_RXLFPS_ENTXDRV_OFST (20) -#define A60931_RG_SSUSB_RX_FL_UNLOCKTH_OFST (16) -#define A60931_RG_SSUSB_LFPS_PSEL_OFST (15) -#define A60931_RG_SSUSB_RX_SIGDET_EN_OFST (14) -#define A60931_RG_SSUSB_RX_SIGDET_EN_SEL_OFST (13) -#define A60931_RG_SSUSB_RX_PI_CAL_EN_OFST (12) -#define A60931_RG_SSUSB_RX_PI_CAL_EN_SEL_OFST (11) -#define A60931_RG_SSUSB_P3_CLS_CK_SEL_OFST (10) -#define A60931_RG_SSUSB_T2RLB_PSEL_OFST (8) -#define A60931_RG_SSUSB_PPCTL_PSEL_OFST (5) -#define A60931_RG_SSUSB_PHYD_TX_DATA_INV_OFST (4) -#define A60931_RG_SSUSB_BERTLB_PSEL_OFST (2) -#define A60931_RG_SSUSB_RETRACK_DIS_OFST (1) -#define A60931_RG_SSUSB_PPERRCNT_CLR_OFST (0) - -//U3D_B2_PHYD_MISC2 -#define A60931_RG_SSUSB_FRC_PLL_DDS_PREDIV2_OFST (31) -#define A60931_RG_SSUSB_FRC_PLL_DDS_IADJ_OFST (27) -#define A60931_RG_SSUSB_P_SIGDET_125FILTER_OFST (26) -#define A60931_RG_SSUSB_P_SIGDET_RST_FILTER_OFST (25) -#define A60931_RG_SSUSB_P_SIGDET_EID_USE_RAW_OFST (24) -#define A60931_RG_SSUSB_P_SIGDET_LTD_USE_RAW_OFST (23) -#define A60931_RG_SSUSB_EIDLE_BF_RXDET_OFST (22) -#define A60931_RG_SSUSB_EIDLE_LP_STBCYC_OFST (13) -#define A60931_RG_SSUSB_TX_EIDLE_LP_POSTDLY_OFST (7) -#define A60931_RG_SSUSB_TX_EIDLE_LP_PREDLY_OFST (1) -#define A60931_RG_SSUSB_TX_EIDLE_LP_EN_ADV_OFST (0) - -//U3D_B2_PHYD_MISC3 -#define A60931_RGS_SSUSB_DDS_CALIB_C_STATE_OFST (16) -#define A60931_RGS_SSUSB_PPERRCNT_OFST (0) - -//U3D_B2_PHYD_L1SS -#define A60931_RG_SSUSB_L1SS_REV1_OFST (24) -#define A60931_RG_SSUSB_L1SS_REV0_OFST (16) -#define A60931_RG_SSUSB_P_LTD1_SLOCK_DIS_OFST (11) -#define A60931_RG_SSUSB_PLL_CNT_CLEAN_DIS_OFST (10) -#define A60931_RG_SSUSB_P_PLL_REK_SEL_OFST (9) -#define A60931_RG_SSUSB_TXDRV_MASKDLY_OFST (8) -#define A60931_RG_SSUSB_RXSTS_VAL_OFST (7) -#define A60931_RG_PCIE_PHY_CLKREQ_N_EN_OFST (6) -#define A60931_RG_PCIE_FORCE_PHY_CLKREQ_N_EN_OFST (5) -#define A60931_RG_PCIE_PHY_CLKREQ_N_OUT_OFST (4) -#define A60931_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT_OFST (3) -#define A60931_RG_SSUSB_RXPLL_STB_PX0_OFST (2) -#define A60931_RG_PCIE_L1SS_EN_OFST (1) -#define A60931_RG_PCIE_FORCE_L1SS_EN_OFST (0) - -//U3D_B2_ROSC_0 -#define A60931_RG_SSUSB_RING_OSC_CNTEND_OFST (23) -#define A60931_RG_SSUSB_XTAL_OSC_CNTEND_OFST (16) -#define A60931_RG_SSUSB_RING_OSC_EN_OFST (3) -#define A60931_RG_SSUSB_RING_OSC_FORCE_EN_OFST (2) -#define A60931_RG_SSUSB_FRC_RING_BYPASS_DET_OFST (1) -#define A60931_RG_SSUSB_RING_BYPASS_DET_OFST (0) - -//U3D_B2_ROSC_1 -#define A60931_RG_SSUSB_RING_OSC_FRC_P3_OFST (20) -#define A60931_RG_SSUSB_RING_OSC_P3_OFST (19) -#define A60931_RG_SSUSB_RING_OSC_FRC_RECAL_OFST (17) -#define A60931_RG_SSUSB_RING_OSC_RECAL_OFST (16) -#define A60931_RG_SSUSB_RING_OSC_SEL_OFST (8) -#define A60931_RG_SSUSB_RING_OSC_FRC_SEL_OFST (0) - -//U3D_B2_ROSC_2 -#define A60931_RG_SSUSB_RING_DET_STRCYC2_OFST (16) -#define A60931_RG_SSUSB_RING_DET_STRCYC1_OFST (0) - -//U3D_B2_ROSC_3 -#define A60931_RG_SSUSB_RING_DET_DETWIN1_OFST (16) -#define A60931_RG_SSUSB_RING_DET_STRCYC3_OFST (0) - -//U3D_B2_ROSC_4 -#define A60931_RG_SSUSB_RING_DET_DETWIN3_OFST (16) -#define A60931_RG_SSUSB_RING_DET_DETWIN2_OFST (0) - -//U3D_B2_ROSC_5 -#define A60931_RG_SSUSB_RING_DET_LBOND1_OFST (16) -#define A60931_RG_SSUSB_RING_DET_UBOND1_OFST (0) - -//U3D_B2_ROSC_6 -#define A60931_RG_SSUSB_RING_DET_LBOND2_OFST (16) -#define A60931_RG_SSUSB_RING_DET_UBOND2_OFST (0) - -//U3D_B2_ROSC_7 -#define A60931_RG_SSUSB_RING_DET_LBOND3_OFST (16) -#define A60931_RG_SSUSB_RING_DET_UBOND3_OFST (0) - -//U3D_B2_ROSC_8 -#define A60931_RG_SSUSB_RING_RESERVE_OFST (16) -#define A60931_RG_SSUSB_ROSC_PROB_SEL_OFST (2) -#define A60931_RG_SSUSB_RING_FREQMETER_EN_OFST (1) -#define A60931_RG_SSUSB_RING_DET_BPS_UBOND_OFST (0) - -//U3D_B2_ROSC_9 -#define A60931_RGS_FM_RING_CNT_OFST (16) -#define A60931_RGS_SSUSB_RING_OSC_STATE_OFST (10) -#define A60931_RGS_SSUSB_RING_OSC_STABLE_OFST (9) -#define A60931_RGS_SSUSB_RING_OSC_CAL_FAIL_OFST (8) -#define A60931_RGS_SSUSB_RING_OSC_CAL_OFST (0) - -//U3D_B2_ROSC_A -#define A60931_RGS_SSUSB_ROSC_PROB_OUT_OFST (0) - -//U3D_PHYD_VERSION -#define A60931_RGS_SSUSB_PHYD_VERSION_OFST (0) - -//U3D_PHYD_MODEL -#define A60931_RGS_SSUSB_PHYD_MODEL_OFST (0) - -struct sifslv_chip_reg_a { - /* 0x0 */ - __le32 gpio_ctla; - __le32 gpio_ctlb; - __le32 gpio_ctlc; -}; - -struct sifslv_fm_reg_a { - //0x0 - u32 fmcr0; - u32 fmcr1; - u32 fmcr2; - u32 fmmonr0; - //0X10 - u32 fmmonr1; - /* For A60931 but not used */ - //u32 reserve0; - //u32 reserve1; - //u32 reserve2; - //0x20~0x70 - //u32 reserve3[24]; - //0X80 - //u32 reserve4; - //u32 reserve5; - //u32 reserve6; - //u32 reserve7; - //0X90 - //u32 reserve8; - //u32 reserve9; - //u32 reserve10; - //u32 reserve11; -}; - -/* A60810 */ - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH (0xf<<28)/* 31:28 */ -#define A60810_RG_MONCLK_SEL (0x3<<26)/* 27:26 */ -#define A60810_RG_FM_MODE (0x1<<25)/* 25:25 */ -#define A60810_RG_FREQDET_EN (0x1<<24)/* 24:24 */ -#define A60810_RG_CYCLECNT (0xffffff<<0)/* 23:0 */ - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2 (0x1<<9)/* 9:9 */ -#define A60810_RG_FRCK_EN (0x1<<8)/* 8:8 */ -#define A60810_USBPLL_LOCK (0x1<<1)/* 1:1 */ -#define A60810_USB_FM_VLD (0x1<<0)/* 0:0 */ - -/* OFFSET */ - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH_OFST (28) -#define A60810_RG_MONCLK_SEL_OFST (26) -#define A60810_RG_FM_MODE_OFST (25) -#define A60810_RG_FREQDET_EN_OFST (24) -#define A60810_RG_CYCLECNT_OFST (0) - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET_OFST (0) - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET_OFST (0) - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT_OFST (0) - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2_OFST (9) -#define A60810_RG_FRCK_EN_OFST (8) -#define A60810_USBPLL_LOCK_OFST (1) -#define A60810_USB_FM_VLD_OFST (0) - -/* A60931 */ - -//U3D_FMCR0 -#define A60931_RG_LOCKTH (0xf<<28) //31:28 -#define A60931_RG_MONCLK_SEL (0x3<<26) //27:26 -#define A60931_RG_FM_MODE (0x1<<25) //25:25 -#define A60931_RG_FREQDET_EN (0x1<<24) //24:24 -#define A60931_RG_CYCLECNT (0xffffff<<0) //23:0 - -//U3D_FMCR1 -#define A60931_RG_TARGET (0xffffffff<<0) //31:0 - -//U3D_FMCR2 -#define A60931_RG_OFFSET (0xffffffff<<0) //31:0 - -//U3D_FMMONR0 -#define A60931_USB_FM_OUT (0xffffffff<<0) //31:0 - -//U3D_FMMONR1 -#define A60931_RG_MONCLK_SEL_2 (0x1<<9) //9:9 -#define A60931_RG_FRCK_EN (0x1<<8) //8:8 -#define A60931_USBPLL_LOCK (0x1<<1) //1:1 -#define A60931_USB_FM_VLD (0x1<<0) //0:0 - -/* OFFSET */ - -//U3D_FMCR0 -#define A60931_RG_LOCKTH_OFST (28) -#define A60931_RG_MONCLK_SEL_OFST (26) -#define A60931_RG_FM_MODE_OFST (25) -#define A60931_RG_FREQDET_EN_OFST (24) -#define A60931_RG_CYCLECNT_OFST (0) - -//U3D_FMCR1 -#define A60931_RG_TARGET_OFST (0) - -//U3D_FMCR2 -#define A60931_RG_OFFSET_OFST (0) - -//U3D_FMMONR0 -#define A60931_USB_FM_OUT_OFST (0) - -//U3D_FMMONR1 -#define A60931_RG_MONCLK_SEL_2_OFST (9) -#define A60931_RG_FRCK_EN_OFST (8) -#define A60931_USBPLL_LOCK_OFST (1) -#define A60931_USB_FM_VLD_OFST (0) - -struct spllc_reg_a { - /* 0x0 */ - __le32 u3d_syspll_0; - __le32 u3d_syspll_1; - __le32 u3d_syspll_2; - __le32 u3d_syspll_sdm; - /* 0x10 */ - __le32 u3d_xtalctl_1; - __le32 u3d_xtalctl_2; - __le32 u3d_xtalctl3; -}; - -/* A60810 */ - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC (0x3<<25)/* 26:25 */ -#define A60810_RG_SSUSB_SPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_SYSPLL_ON (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SYSPLLON (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC (0x7<<0)/* 2:0 */ - -/* U3D_SYSPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_SYSPLL_STB (0x1<<23)/* 23:23 */ -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB (0x1<<22)/* 22:22 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN (0x1<<21)/* 21:21 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_PLL_BIAS_PWD (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN (0x1<<14)/* 14:14 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FORCE_SPLL_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_SPLL_NCPO_EN (0x1<<7)/* 7:7 */ -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN (0x1<<6)/* 6:6 */ -#define A60810_RG_SSUSB_SPLL_NCPO_CHG (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_SPLL_DDS_RSTB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWDB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_SPLL_DDSEN (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC (0x3ff<<14)/* 23:14 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN (0x1<<13)/* 13:13 */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC (0x3ff<<2)/* 11:2 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC (0x3fff<<17)/* 30:17 */ -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_XTAL_STBCYC (0x7fff<<0)/* 14:0 */ - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL (0x1<<29)/* 29:29 */ -#define A60810_RG_SSUSB_BG_LPF_DLY (0x3<<27)/* 28:27 */ -#define A60810_RG_SSUSB_BG_LPF_EN (0x1<<26)/* 26:26 */ -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN (0x1<<25)/* 25:25 */ -#define A60810_RG_SSUSB_P3_BIAS_PWD (0x1<<24)/* 24:24 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_EN (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_USB20_BIAS_EN (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_USB20_SLEEP (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_OSC_ONLY (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_OSC_EN (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_XTALBIAS_STB (0x1<<5)/* 5:5 */ -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_BIAS_PWD (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_PWD (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_FORCE_BIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_FORCE_XTAL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_BIASIMR_EN (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_XTAL_RX_PWD (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_CKBG_PROB_SEL (0x3<<6)/* 7:6 */ -#define A60810_RG_SSUSB_XTAL_PROB_SEL (0x3<<4)/* 5:4 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD (0x1<<0)/* 0:0 */ - - -/* SSUSB_SIFSLV_SPLLC FIELD OFFSET DEFINITION */ - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC_OFST (25) -#define A60810_RG_SSUSB_SPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_SYSPLL_ON_OFST (11) -#define A60810_RG_SSUSB_FORCE_SYSPLLON_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_SYA60810_SPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC_OFST (24) -#define A60810_RG_SSUSB_SYSPLL_STB_OFST (23) -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB_OFST (22) -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN_OFST (21) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN_OFST (20) -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON_OFST (19) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON_OFST (18) -#define A60810_RG_SSUSB_PLL_BIAS_PWD_OFST (17) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD_OFST (16) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN_OFST (14) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG_OFST (12) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB_OFST (11) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB_OFST (10) -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN_OFST (9) -#define A60810_RG_SSUSB_FORCE_SPLL_PWD_OFST (8) -#define A60810_RG_SSUSB_SPLL_NCPO_EN_OFST (7) -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN_OFST (6) -#define A60810_RG_SSUSB_SPLL_NCPO_CHG_OFST (4) -#define A60810_RG_SSUSB_SPLL_DDS_RSTB_OFST (3) -#define A60810_RG_SSUSB_SPLL_DDS_PWDB_OFST (2) -#define A60810_RG_SSUSB_SPLL_DDSEN_OFST (1) -#define A60810_RG_SSUSB_SPLL_PWD_OFST (0) - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL_OFST (11) -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC_OFST (0) - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC_OFST (14) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN_OFST (13) -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_OFST (12) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC_OFST (2) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_OFST (0) - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC_OFST (17) -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N_OFST (16) -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N_OFST (15) -#define A60810_RG_SSUSB_XTAL_STBCYC_OFST (0) - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL_OFST (29) -#define A60810_RG_SSUSB_BG_LPF_DLY_OFST (27) -#define A60810_RG_SSUSB_BG_LPF_EN_OFST (26) -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN_OFST (25) -#define A60810_RG_SSUSB_P3_BIAS_PWD_OFST (24) -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT_OFST (20) -#define A60810_RG_SSUSB_PCIE_CLKDET_EN_OFST (19) -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN_OFST (18) -#define A60810_RG_SSUSB_USB20_BIAS_EN_OFST (17) -#define A60810_RG_SSUSB_USB20_SLEEP_OFST (16) -#define A60810_RG_SSUSB_OSC_ONLY_OFST (9) -#define A60810_RG_SSUSB_OSC_EN_OFST (8) -#define A60810_RG_SSUSB_XTALBIAS_STB_OFST (5) -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB_OFST (4) -#define A60810_RG_SSUSB_BIAS_PWD_OFST (3) -#define A60810_RG_SSUSB_XTAL_PWD_OFST (2) -#define A60810_RG_SSUSB_FORCE_BIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_FORCE_XTAL_PWD_OFST (0) - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV_OFST (12) -#define A60810_RG_SSUSB_BIASIMR_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN_OFST (10) -#define A60810_RG_SSUSB_XTAL_RX_PWD_OFST (9) -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD_OFST (8) -#define A60810_RG_SSUSB_CKBG_PROB_SEL_OFST (6) -#define A60810_RG_SSUSB_XTAL_PROB_SEL_OFST (4) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB_OFST (3) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB_OFST (2) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD_OFST (0) - -/* A60931 */ - -//U3D_SYSPLL_0 -#define A60931_RG_SSUSB_SPLL_DDSEN_CYC (0x1f<<27) //31:27 -#define A60931_RG_SSUSB_SPLL_NCPOEN_CYC (0x3<<25) //26:25 -#define A60931_RG_SSUSB_SPLL_STBCYC (0x1ff<<16) //24:16 -#define A60931_RG_SSUSB_SPLL_NCPOCHG_CYC (0xf<<12) //15:12 -#define A60931_RG_SSUSB_SYSPLL_ON (0x1<<11) //11:11 -#define A60931_RG_SSUSB_FORCE_SYSPLLON (0x1<<10) //10:10 -#define A60931_RG_SSUSB_SPLL_DDSRSTB_CYC (0x7<<0) //2:0 - -//U3D_SYSPLL_1 -#define A60931_RG_SSUSB_PLL_BIAS_CYC (0xff<<24) //31:24 -#define A60931_RG_SSUSB_SYSPLL_STB (0x1<<23) //23:23 -#define A60931_RG_SSUSB_FORCE_SYSPLL_STB (0x1<<22) //22:22 -#define A60931_RG_SSUSB_SPLL_DDS_ISO_EN (0x1<<21) //21:21 -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN (0x1<<20) //20:20 -#define A60931_RG_SSUSB_SPLL_DDS_PWR_ON (0x1<<19) //19:19 -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON (0x1<<18) //18:18 -#define A60931_RG_SSUSB_PLL_BIAS_PWD (0x1<<17) //17:17 -#define A60931_RG_SSUSB_FORCE_PLL_BIAS_PWD (0x1<<16) //16:16 -#define A60931_RG_SSUSB_FORCE_SPLL_NCPO_EN (0x1<<15) //15:15 -#define A60931_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN (0x1<<14) //14:14 -#define A60931_RG_SSUSB_FORCE_SPLL_NCPO_CHG (0x1<<12) //12:12 -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_RSTB (0x1<<11) //11:11 -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_PWDB (0x1<<10) //10:10 -#define A60931_RG_SSUSB_FORCE_SPLL_DDSEN (0x1<<9) //9:9 -#define A60931_RG_SSUSB_FORCE_SPLL_PWD (0x1<<8) //8:8 -#define A60931_RG_SSUSB_SPLL_NCPO_EN (0x1<<7) //7:7 -#define A60931_RG_SSUSB_SPLL_FIFO_START_MAN (0x1<<6) //6:6 -#define A60931_RG_SSUSB_SPLL_NCPO_CHG (0x1<<4) //4:4 -#define A60931_RG_SSUSB_SPLL_DDS_RSTB (0x1<<3) //3:3 -#define A60931_RG_SSUSB_SPLL_DDS_PWDB (0x1<<2) //2:2 -#define A60931_RG_SSUSB_SPLL_DDSEN (0x1<<1) //1:1 -#define A60931_RG_SSUSB_SPLL_PWD (0x1<<0) //0:0 - -//U3D_SYSPLL_2 -#define A60931_RG_SSUSB_SPLL_P_ON_SEL (0x1<<11) //11:11 -#define A60931_RG_SSUSB_SPLL_FBDIV_CHG (0x1<<10) //10:10 -#define A60931_RG_SSUSB_SPLL_DDS_ISOEN_CYC (0x3ff<<0) //9:0 - -//U3D_SYSPLL_SDM -#define A60931_RG_SSUSB_SPLL_SDM_ISO_EN_CYC (0x3ff<<14) //23:14 -#define A60931_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN (0x1<<13) //13:13 -#define A60931_RG_SSUSB_SPLL_SDM_ISO_EN (0x1<<12) //12:12 -#define A60931_RG_SSUSB_SPLL_SDM_PWR_ON_CYC (0x3ff<<2) //11:2 -#define A60931_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON (0x1<<1) //1:1 -#define A60931_RG_SSUSB_SPLL_SDM_PWR_ON (0x1<<0) //0:0 - -//U3D_XTALCTL_1 -#define A60931_RG_SSUSB_BIAS_STBCYC (0x3fff<<17) //30:17 -#define A60931_RG_SSUSB_XTAL_CLK_REQ_N (0x1<<16) //16:16 -#define A60931_RG_SSUSB_XTAL_FORCE_CLK_REQ_N (0x1<<15) //15:15 -#define A60931_RG_SSUSB_XTAL_STBCYC (0x7fff<<0) //14:0 - -//U3D_XTALCTL_2 -#define A60931_RG_SSUSB_INT_XTAL_SEL (0x1<<29) //29:29 -#define A60931_RG_SSUSB_BG_LPF_DLY (0x3<<27) //28:27 -#define A60931_RG_SSUSB_BG_LPF_EN (0x1<<26) //26:26 -#define A60931_RG_SSUSB_FORCE_BG_LPF_EN (0x1<<25) //25:25 -#define A60931_RG_SSUSB_P3_BIAS_PWD (0x1<<24) //24:24 -#define A60931_RG_SSUSB_PCIE_CLKDET_HIT (0x1<<20) //20:20 -#define A60931_RG_SSUSB_PCIE_CLKDET_EN (0x1<<19) //19:19 -#define A60931_RG_SSUSB_FRC_PCIE_CLKDET_EN (0x1<<18) //18:18 -#define A60931_RG_SSUSB_USB20_BIAS_EN (0x1<<17) //17:17 -#define A60931_RG_SSUSB_USB20_SLEEP (0x1<<16) //16:16 -#define A60931_RG_SSUSB_OSC_ONLY (0x1<<9) //9:9 -#define A60931_RG_SSUSB_OSC_EN (0x1<<8) //8:8 -#define A60931_RG_SSUSB_XTALBIAS_STB (0x1<<5) //5:5 -#define A60931_RG_SSUSB_FORCE_XTALBIAS_STB (0x1<<4) //4:4 -#define A60931_RG_SSUSB_BIAS_PWD (0x1<<3) //3:3 -#define A60931_RG_SSUSB_XTAL_PWD (0x1<<2) //2:2 -#define A60931_RG_SSUSB_FORCE_BIAS_PWD (0x1<<1) //1:1 -#define A60931_RG_SSUSB_FORCE_XTAL_PWD (0x1<<0) //0:0 - -//U3D_XTALCTL3 -#define A60931_RG_SSUSB_XTALCTL_REV (0xf<<12) //15:12 -#define A60931_RG_SSUSB_BIASIMR_EN (0x1<<11) //11:11 -#define A60931_RG_SSUSB_FORCE_BIASIMR_EN (0x1<<10) //10:10 -#define A60931_RG_SSUSB_XTAL_RX_PWD (0x1<<9) //9:9 -#define A60931_RG_SSUSB_FRC_XTAL_RX_PWD (0x1<<8) //8:8 -#define A60931_RG_SSUSB_CKBG_PROB_SEL (0x3<<6) //7:6 -#define A60931_RG_SSUSB_XTAL_PROB_SEL (0x3<<4) //5:4 -#define A60931_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB (0x1<<3) //3:3 -#define A60931_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB (0x1<<2) //2:2 -#define A60931_RG_SSUSB_XTAL_VREGBIAS_PWD (0x1<<1) //1:1 -#define A60931_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD (0x1<<0) //0:0 - - -/* SSUSB_SIFSLV_SPLLC FIELD OFFSET DEFINITION */ - -//U3D_SYSPLL_0 -#define A60931_RG_SSUSB_SPLL_DDSEN_CYC_OFST (27) -#define A60931_RG_SSUSB_SPLL_NCPOEN_CYC_OFST (25) -#define A60931_RG_SSUSB_SPLL_STBCYC_OFST (16) -#define A60931_RG_SSUSB_SPLL_NCPOCHG_CYC_OFST (12) -#define A60931_RG_SSUSB_SYSPLL_ON_OFST (11) -#define A60931_RG_SSUSB_FORCE_SYSPLLON_OFST (10) -#define A60931_RG_SSUSB_SPLL_DDSRSTB_CYC_OFST (0) - -//U3D_SYA60931_SPLL_1 -#define A60931_RG_SSUSB_PLL_BIAS_CYC_OFST (24) -#define A60931_RG_SSUSB_SYSPLL_STB_OFST (23) -#define A60931_RG_SSUSB_FORCE_SYSPLL_STB_OFST (22) -#define A60931_RG_SSUSB_SPLL_DDS_ISO_EN_OFST (21) -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN_OFST (20) -#define A60931_RG_SSUSB_SPLL_DDS_PWR_ON_OFST (19) -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON_OFST (18) -#define A60931_RG_SSUSB_PLL_BIAS_PWD_OFST (17) -#define A60931_RG_SSUSB_FORCE_PLL_BIAS_PWD_OFST (16) -#define A60931_RG_SSUSB_FORCE_SPLL_NCPO_EN_OFST (15) -#define A60931_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN_OFST (14) -#define A60931_RG_SSUSB_FORCE_SPLL_NCPO_CHG_OFST (12) -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_RSTB_OFST (11) -#define A60931_RG_SSUSB_FORCE_SPLL_DDS_PWDB_OFST (10) -#define A60931_RG_SSUSB_FORCE_SPLL_DDSEN_OFST (9) -#define A60931_RG_SSUSB_FORCE_SPLL_PWD_OFST (8) -#define A60931_RG_SSUSB_SPLL_NCPO_EN_OFST (7) -#define A60931_RG_SSUSB_SPLL_FIFO_START_MAN_OFST (6) -#define A60931_RG_SSUSB_SPLL_NCPO_CHG_OFST (4) -#define A60931_RG_SSUSB_SPLL_DDS_RSTB_OFST (3) -#define A60931_RG_SSUSB_SPLL_DDS_PWDB_OFST (2) -#define A60931_RG_SSUSB_SPLL_DDSEN_OFST (1) -#define A60931_RG_SSUSB_SPLL_PWD_OFST (0) - -//U3D_SYSPLL_2 -#define A60931_RG_SSUSB_SPLL_P_ON_SEL_OFST (11) -#define A60931_RG_SSUSB_SPLL_FBDIV_CHG_OFST (10) -#define A60931_RG_SSUSB_SPLL_DDS_ISOEN_CYC_OFST (0) - -//U3D_SYSPLL_SDM -#define A60931_RG_SSUSB_SPLL_SDM_ISO_EN_CYC_OFST (14) -#define A60931_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN_OFST (13) -#define A60931_RG_SSUSB_SPLL_SDM_ISO_EN_OFST (12) -#define A60931_RG_SSUSB_SPLL_SDM_PWR_ON_CYC_OFST (2) -#define A60931_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON_OFST (1) -#define A60931_RG_SSUSB_SPLL_SDM_PWR_ON_OFST (0) - -//U3D_XTALCTL_1 -#define A60931_RG_SSUSB_BIAS_STBCYC_OFST (17) -#define A60931_RG_SSUSB_XTAL_CLK_REQ_N_OFST (16) -#define A60931_RG_SSUSB_XTAL_FORCE_CLK_REQ_N_OFST (15) -#define A60931_RG_SSUSB_XTAL_STBCYC_OFST (0) - -//U3D_XTALCTL_2 -#define A60931_RG_SSUSB_INT_XTAL_SEL_OFST (29) -#define A60931_RG_SSUSB_BG_LPF_DLY_OFST (27) -#define A60931_RG_SSUSB_BG_LPF_EN_OFST (26) -#define A60931_RG_SSUSB_FORCE_BG_LPF_EN_OFST (25) -#define A60931_RG_SSUSB_P3_BIAS_PWD_OFST (24) -#define A60931_RG_SSUSB_PCIE_CLKDET_HIT_OFST (20) -#define A60931_RG_SSUSB_PCIE_CLKDET_EN_OFST (19) -#define A60931_RG_SSUSB_FRC_PCIE_CLKDET_EN_OFST (18) -#define A60931_RG_SSUSB_USB20_BIAS_EN_OFST (17) -#define A60931_RG_SSUSB_USB20_SLEEP_OFST (16) -#define A60931_RG_SSUSB_OSC_ONLY_OFST (9) -#define A60931_RG_SSUSB_OSC_EN_OFST (8) -#define A60931_RG_SSUSB_XTALBIAS_STB_OFST (5) -#define A60931_RG_SSUSB_FORCE_XTALBIAS_STB_OFST (4) -#define A60931_RG_SSUSB_BIAS_PWD_OFST (3) -#define A60931_RG_SSUSB_XTAL_PWD_OFST (2) -#define A60931_RG_SSUSB_FORCE_BIAS_PWD_OFST (1) -#define A60931_RG_SSUSB_FORCE_XTAL_PWD_OFST (0) - -//U3D_XTALCTL3 -#define A60931_RG_SSUSB_XTALCTL_REV_OFST (12) -#define A60931_RG_SSUSB_BIASIMR_EN_OFST (11) -#define A60931_RG_SSUSB_FORCE_BIASIMR_EN_OFST (10) -#define A60931_RG_SSUSB_XTAL_RX_PWD_OFST (9) -#define A60931_RG_SSUSB_FRC_XTAL_RX_PWD_OFST (8) -#define A60931_RG_SSUSB_CKBG_PROB_SEL_OFST (6) -#define A60931_RG_SSUSB_XTAL_PROB_SEL_OFST (4) -#define A60931_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB_OFST (3) -#define A60931_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB_OFST (2) -#define A60931_RG_SSUSB_XTAL_VREGBIAS_PWD_OFST (1) -#define A60931_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD_OFST (0) - -struct u3phy_info { - struct u2phy_reg_a *u2phy_regs_a; - struct u3phya_reg_a *u3phya_regs_a; - struct u3phya_da_reg_a *u3phya_da_regs_a; - struct u3phyd_reg_a *u3phyd_regs_a; - struct u3phyd_bank2_reg_a *u3phyd_bank2_regs_a; - struct sifslv_chip_reg_a *sifslv_chip_regs_a; - struct spllc_reg_a *spllc_regs_a; - struct sifslv_fm_reg_a *sifslv_fm_regs_a; -}; - -int phy_init_a60810(struct u3phy_info *info); -int phy_init_a60931(struct u3phy_info *info); - -#endif diff --git a/drivers/misc/mediatek/usb20/mt6781/usb20.c b/drivers/misc/mediatek/usb20/mt6781/usb20.c deleted file mode 100644 index 7ef3a8020d2a..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/usb20.c +++ /dev/null @@ -1,2278 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -#include -MODULE_LICENSE("GPL v2"); - -struct musb *mtk_musb; -EXPORT_SYMBOL(mtk_musb); - -bool mtk_usb_power; -EXPORT_SYMBOL(mtk_usb_power); - -int musb_force_on; -EXPORT_SYMBOL(musb_force_on); - -static void (*usb_hal_dpidle_request_fptr)(int); -void usb_hal_dpidle_request(int mode) -{ - if (usb_hal_dpidle_request_fptr) - usb_hal_dpidle_request_fptr(mode); -} -EXPORT_SYMBOL(usb_hal_dpidle_request); - -void register_usb_hal_dpidle_request(void (*function)(int)) -{ - usb_hal_dpidle_request_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_dpidle_request); - -void (*usb_hal_disconnect_check_fptr)(void); -void usb_hal_disconnect_check(void) -{ - if (usb_hal_disconnect_check_fptr) - usb_hal_disconnect_check_fptr(); -} -EXPORT_SYMBOL(usb_hal_disconnect_check); - -void register_usb_hal_disconnect_check(void (*function)(void)) -{ - usb_hal_disconnect_check_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_disconnect_check); - -#ifdef FPGA_PLATFORM -#include -#include "phy-mtk-fpga.h" -#endif - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT -#include "musb_qmu.h" -#endif - -#ifdef CONFIG_MTK_USB2JTAG_SUPPORT -#include -#endif - -#if defined(CONFIG_MTK_BASE_POWER) -#include -#include -static void usb_dpidle_request(int mode) -{ - struct arm_smccc_res res; - int op; - - switch (mode) { - case USB_DPIDLE_SUSPEND: - op = MTK_USB_SMC_INFRA_REQUEST; - break; - case USB_DPIDLE_RESUME: - op = MTK_USB_SMC_INFRA_RELEASE; - break; - default: - return; - } - - DBG(0, "operatio = %d\n", op); - arm_smccc_smc(MTK_SIP_KERNEL_USB_CONTROL, op, 0, 0, 0, 0, 0, 0, &res); -} -#endif - -/* default value 0 */ -static int usb_rdy; -bool is_usb_rdy(void) -{ - if (mtk_musb->is_ready) { - usb_rdy = 1; - DBG(0, "set usb_rdy, wake up bat\n"); - } - - if (usb_rdy) - return true; - else - return false; -} -EXPORT_SYMBOL(is_usb_rdy); - - -/* BC1.2 */ -/* Duplicate define in phy-mtk-tphy */ -#define PHY_MODE_BC11_SW_SET 1 -#define PHY_MODE_BC11_SW_CLR 2 - -void Charger_Detect_Init(void) -{ - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_SET); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Init); - -void Charger_Detect_Release(void) -{ - usb_prepare_enable_clock(true); - - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_CLR); - - udelay(1); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Release); - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool in_uart_mode; -bool usb_phy_check_in_uart_mode(void) -{ - int mode; - - usb_enable_clock(true); - udelay(50); - - /* get phy mode */ - mode = phy_get_mode_ext(glue->phy); - - /* usb_port_mode = USBPHY_READ32(0x68); */ - usb_enable_clock(false); - - if (mode == PHY_MODE_UART) { - DBG(0, "%s:%d - IN UART MODE : 0x%x\n", - __func__, __LINE__, mode); - mode = true; - } else { - DBG(0, "%s:%d - NOT IN UART MODE : 0x%x\n", - __func__, __LINE__, mode); - mode = false; - } - return mode; -} - -void usb_phy_switch_to_uart(void) -{ - unsigned int val = 0; - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - DBG(0, "Already in UART mode.\n"); - return; - } - - udelay(50); - - /* set PHY UART mode */ - phy_set_mode(glue->phy, PHY_MODE_UART); - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - val = readl(ap_gpio_base); - writel(val | (GPIO_SEL_UART0), ap_gpio_base); - - in_uart_mode = true; -} - -void usb_phy_switch_to_usb(void) -{ - unsigned int val = 0; - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - /* set UART mode to USB */ - phy_set_mode(glue->phy, PHY_MODE_USB_OTG); - - in_uart_mode = false; - - phy_power_on(glue->phy); -} - -void usb_phy_context_save(void) -{ - in_uart_mode = usb_phy_check_in_uart_mode(); -} -EXPORT_SYMBOL(usb_phy_context_save); - -void usb_phy_context_restore(void) -{ - if (in_uart_mode) - usb_phy_switch_to_uart(); -} -EXPORT_SYMBOL(usb_phy_context_restore); -#endif - -#ifdef CONFIG_USB_MTK_OTG -static struct regmap *pericfg; - -static void mt_usb_wakeup(struct musb *musb, bool enable) -{ - u32 tmp; - bool is_con = musb->port1_status & USB_PORT_STAT_CONNECTION; - - if (IS_ERR_OR_NULL(pericfg)) { - DBG(0, "init fail"); - return; - } - - DBG(0, "connection=%d\n", is_con); - -#ifdef CONFIG_MTK_MUSB_PHY - USBPHY_SET32(0x68, (0x1 << 18)); - USBPHY_CLR32(0x68, (0x1 << 3)); - USBPHY_SET32(0x68, (0x1 << 3)); - udelay(30); - USBPHY_CLR32(0x68, (0x1 << 18)); - USBPHY_CLR32(0x68, (0x1 << 3)); -#endif - - if (enable) { - regmap_read(pericfg, USB_WAKEUP_DEC_CON1, &tmp); - tmp |= USB1_CDDEBOUNCE(0x8) | USB1_CDEN; - regmap_write(pericfg, USB_WAKEUP_DEC_CON1, tmp); - - tmp = musb_readw(musb->mregs, RESREG); - if (is_con) - tmp &= ~HSTPWRDWN_OPT; - else - tmp |= HSTPWRDWN_OPT; - musb_writew(musb->mregs, RESREG, tmp); - } else { - regmap_read(pericfg, USB_WAKEUP_DEC_CON1, &tmp); - tmp &= ~(USB1_CDEN | USB1_CDDEBOUNCE(0xf)); - regmap_write(pericfg, USB_WAKEUP_DEC_CON1, tmp); - - tmp = musb_readw(musb->mregs, RESREG); - tmp &= ~HSTPWRDWN_OPT; - musb_writew(musb->mregs, RESREG, tmp); - } -} - -static int mt_usb_wakeup_init(struct musb *musb) -{ - struct device_node *node; - - node = of_find_compatible_node(NULL, NULL, - "mediatek,mt6781-usb20"); - if (!node) { - DBG(0, "map node failed\n"); - return -ENODEV; - } - - pericfg = syscon_regmap_lookup_by_phandle(node, - "pericfg"); - if (IS_ERR(pericfg)) { - DBG(0, "fail to get pericfg regs\n"); - return PTR_ERR(pericfg); - } - - return 0; -} -#endif - - -static u32 cable_mode = CABLE_MODE_NORMAL; -#ifndef FPGA_PLATFORM -struct clk *musb_clk; -struct clk *musb_clk_top_sel; -struct clk *musb_clk_univpll5_d2; -static struct regulator *reg_vusb; -static struct regulator *reg_vio18; -static struct regulator *reg_va12; -#endif - -void __iomem *usb_phy_base; - -#ifdef CONFIG_MTK_UART_USB_SWITCH -static u32 port_mode = PORT_MODE_USB; -#define AP_GPIO_COMPATIBLE_NAME "mediatek,gpio" -void __iomem *ap_gpio_base; -#endif - -/* EP Fifo Config */ -static struct musb_fifo_cfg fifo_cfg[] __initdata = { - {.hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, - {.hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, -}; - - -/*=======================================================================*/ -/* USB GADGET */ -/*=======================================================================*/ -static const struct of_device_id apusb_of_ids[] = { - {.compatible = "mediatek,mt6781-usb20",}, - {}, -}; - -MODULE_DEVICE_TABLE(of, apusb_of_ids); - -#ifdef FPGA_PLATFORM -bool usb_enable_clock(bool enable) -{ - return true; -} -EXPORT_SYMBOL(usb_enable_clock); - -bool usb_prepare_clock(bool enable) -{ - return true; -} -EXPORT_SYMBOL(usb_prepare_clock); - -void usb_prepare_enable_clock(bool enable) -{ -} -EXPORT_SYMBOL(usb_prepare_enable_clock); -#else -void usb_prepare_enable_clock(bool enable) -{ - if (enable) { - usb_prepare_clock(true); - usb_enable_clock(true); - } else { - usb_enable_clock(false); - usb_prepare_clock(false); - } -} -EXPORT_SYMBOL(usb_prepare_enable_clock); - -DEFINE_MUTEX(prepare_lock); -static atomic_t clk_prepare_cnt = ATOMIC_INIT(0); - -bool usb_prepare_clock(bool enable) -{ - int before_cnt = atomic_read(&clk_prepare_cnt); - - mutex_lock(&prepare_lock); - - if (IS_ERR_OR_NULL(glue->musb_clk) || - IS_ERR_OR_NULL(glue->musb_clk_top_sel) || - IS_ERR_OR_NULL(glue->musb_clk_univpll5_d2)) { - DBG(0, "clk not ready\n"); - mutex_unlock(&prepare_lock); - return 0; - } - - if (enable) { - if (clk_prepare(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel prepare fail\n"); - } else { - if (clk_set_parent(glue->musb_clk_top_sel, - glue->musb_clk_univpll5_d2)) - DBG(0, "musb_clk_top_sel set_parent fail\n"); - } - if (clk_prepare(glue->musb_clk)) - DBG(0, "musb_clk prepare fail\n"); - - atomic_inc(&clk_prepare_cnt); - } else { - clk_unprepare(glue->musb_clk_top_sel); - clk_unprepare(glue->musb_clk); - - atomic_dec(&clk_prepare_cnt); - } - - mutex_unlock(&prepare_lock); - - DBG(1, "enable(%d), usb prepare_cnt, before(%d), after(%d)\n", - enable, before_cnt, atomic_read(&clk_prepare_cnt)); - -#ifdef CONFIG_MTK_AEE_FEATURE - if (atomic_read(&clk_prepare_cnt) < 0) - aee_kernel_warning("usb20", "usb clock prepare_cnt error\n"); -#endif - - return 1; -} -EXPORT_SYMBOL(usb_prepare_clock); - -static DEFINE_SPINLOCK(musb_reg_clock_lock); - -bool usb_enable_clock(bool enable) -{ - static int count; - static int real_enable = 0, real_disable; - static int virt_enable = 0, virt_disable; - unsigned long flags; - - DBG(1, "enable(%d),count(%d),<%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - - spin_lock_irqsave(&musb_reg_clock_lock, flags); - - if (unlikely(atomic_read(&clk_prepare_cnt) <= 0)) { - DBG_LIMIT(1, "clock not prepare"); - goto exit; - } - - if (enable && count == 0) { - if (clk_enable(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel enable fail\n"); - goto exit; - } - - if (clk_enable(glue->musb_clk)) { - DBG(0, "musb_clk enable fail\n"); - clk_disable(glue->musb_clk_top_sel); - goto exit; - } - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); - real_enable++; - - } else if (!enable && count == 1) { - clk_disable(glue->musb_clk); - clk_disable(glue->musb_clk_top_sel); - - usb_hal_dpidle_request(USB_DPIDLE_ALLOWED); - real_disable++; - } - - if (enable) - count++; - else - count = (count == 0) ? 0 : (count - 1); - -exit: - if (enable) - virt_enable++; - else - virt_disable++; - - spin_unlock_irqrestore(&musb_reg_clock_lock, flags); - - DBG(1, "enable(%d),count(%d), <%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - return 1; -} -EXPORT_SYMBOL(usb_enable_clock); -#endif - -static struct delayed_work idle_work; - -void do_idle_work(struct work_struct *data) -{ - struct musb *musb = mtk_musb; - unsigned long flags; - u8 devctl; - enum usb_otg_state old_state; - - usb_prepare_clock(true); - - spin_lock_irqsave(&musb->lock, flags); - old_state = musb->xceiv->otg->state; - if (musb->is_active) { - DBG(0, - "%s active, igonre do_idle\n", - otg_state_string(musb->xceiv->otg->state)); - goto exit; - } - - switch (musb->xceiv->otg->state) { - case OTG_STATE_B_PERIPHERAL: - case OTG_STATE_A_WAIT_BCON: - devctl = musb_readb(musb->mregs, MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) { - musb->xceiv->otg->state = OTG_STATE_B_IDLE; - MUSB_DEV_MODE(musb); - } else { - musb->xceiv->otg->state = OTG_STATE_A_IDLE; - MUSB_HST_MODE(musb); - } - break; - case OTG_STATE_A_HOST: - devctl = musb_readb(musb->mregs, MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) - musb->xceiv->otg->state = OTG_STATE_B_IDLE; - else - musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON; - break; - default: - break; - } - DBG(0, "otg_state %s to %s, is_active<%d>\n", - otg_state_string(old_state), - otg_state_string(musb->xceiv->otg->state), - musb->is_active); -exit: - spin_unlock_irqrestore(&musb->lock, flags); - - usb_prepare_clock(false); -} - -#if defined(CONFIG_MTK_BASE_POWER) -static void musb_do_idle(struct timer_list *t) -{ - struct musb *musb = from_timer(musb, t, idle_timer); - - queue_delayed_work(musb->st_wq, &idle_work, 0); -} - -static void mt_usb_try_idle(struct musb *musb, unsigned long timeout) -{ - unsigned long default_timeout = jiffies + msecs_to_jiffies(3); - static unsigned long last_timer; - - DBG(0, "skip %s\n", __func__); - return; - - if (timeout == 0) - timeout = default_timeout; - - /* Never idle if active, or when VBUS timeout is not set as host */ - if (musb->is_active || ((musb->a_wait_bcon == 0) - && (musb->xceiv->otg->state - == OTG_STATE_A_WAIT_BCON))) { - DBG(0, "%s active, deleting timer\n", - otg_state_string(musb->xceiv->otg->state)); - del_timer(&musb->idle_timer); - last_timer = jiffies; - return; - } - - if (time_after(last_timer, timeout)) { - if (!timer_pending(&musb->idle_timer)) - last_timer = timeout; - else { - DBG(0, "Longer idle timer already pending, ignoring\n"); - return; - } - } - last_timer = timeout; - - DBG(0, "%s inactive, for idle timer for %lu ms\n", - otg_state_string(musb->xceiv->otg->state), - (unsigned long)jiffies_to_msecs(timeout - jiffies)); - mod_timer(&musb->idle_timer, timeout); -} -#endif - -static int real_enable = 0, real_disable; -static int virt_enable = 0, virt_disable; -static void mt_usb_enable(struct musb *musb) -{ - unsigned long flags; - #ifdef CONFIG_MTK_UART_USB_SWITCH - static int is_check; - #endif - - virt_enable++; - DBG(0, "begin <%d,%d>,<%d,%d,%d,%d>\n", - mtk_usb_power, musb->power, - virt_enable, virt_disable, - real_enable, real_disable); - if (musb->power == true) - return; - - /* clock alredy prepare before enter here */ - usb_enable_clock(true); - - mdelay(10); - #ifdef CONFIG_MTK_UART_USB_SWITCH - if (!is_check) { - in_uart_mode = usb_phy_check_in_uart_mode(); - is_check = 1; - } - #endif - - flags = musb_readl(musb->mregs, USB_L1INTM); - - /* update musb->power & mtk_usb_power in the same time */ - musb->power = true; - mtk_usb_power = true; - real_enable++; - if (in_interrupt()) { - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - } - DBG(0, "end, <%d,%d,%d,%d>\n", - virt_enable, virt_disable, - real_enable, real_disable); - musb_writel(mtk_musb->mregs, USB_L1INTM, flags); -} - -static void mt_usb_disable(struct musb *musb) -{ - virt_disable++; - - DBG(0, "begin, <%d,%d>,<%d,%d,%d,%d>\n", - mtk_usb_power, musb->power, - virt_enable, virt_disable, - real_enable, real_disable); - if (musb->power == false) - return; - - usb_enable_clock(false); - /* clock will unprepare when leave here */ - - real_disable++; - DBG(0, "end, <%d,%d,%d,%d>\n", - virt_enable, virt_disable, - real_enable, real_disable); - - /* update musb->power & mtk_usb_power in the same time */ - musb->power = 0; - mtk_usb_power = false; -} - -/* ================================ */ -/* connect and disconnect functions */ -/* ================================ */ -bool mt_usb_is_device(void) -{ - DBG(4, "called\n"); - - if (!mtk_musb) { - DBG(0, "mtk_musb is NULL\n"); - /* don't do charger detection when usb is not ready */ - return false; - } - DBG(4, "is_host=%d\n", mtk_musb->is_host); - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "in UART Mode\n"); - return false; - } -#endif -#ifdef CONFIG_USB_MTK_OTG - return !mtk_musb->is_host; -#else - return true; -#endif -} - -static struct delayed_work disconnect_check_work; -static bool musb_hal_is_vbus_exist(void); -void do_disconnect_check_work(struct work_struct *data) -{ - bool vbus_exist = false; - unsigned long flags = 0; - struct musb *musb = mtk_musb; - - msleep(200); - - vbus_exist = musb_hal_is_vbus_exist(); - DBG(1, "vbus_exist:<%d>\n", vbus_exist); - if (vbus_exist) - return; - - spin_lock_irqsave(&mtk_musb->lock, flags); - DBG(1, "speed <%d>\n", musb->g.speed); - /* notify gadget driver, g.speed judge is very important */ - if (!musb->is_host && musb->g.speed != USB_SPEED_UNKNOWN) { - DBG(0, "musb->gadget_driver:%p\n", musb->gadget_driver); - if (musb->gadget_driver && musb->gadget_driver->disconnect) { - DBG(0, "musb->gadget_driver->disconnect:%p\n", - musb->gadget_driver->disconnect); - /* align musb_g_disconnect */ - spin_unlock(&musb->lock); - musb->gadget_driver->disconnect(&musb->g); - spin_lock(&musb->lock); - - } - musb->g.speed = USB_SPEED_UNKNOWN; - } - DBG(1, "speed <%d>\n", musb->g.speed); - spin_unlock_irqrestore(&mtk_musb->lock, flags); -} -void trigger_disconnect_check_work(void) -{ - static int inited; - - if (!inited) { - INIT_DELAYED_WORK(&disconnect_check_work, - do_disconnect_check_work); - inited = 1; - } - queue_delayed_work(mtk_musb->st_wq, &disconnect_check_work, 0); -} - -static bool musb_hal_is_vbus_exist(void) -{ - bool vbus_exist = true; - - return vbus_exist; -} - -/* be aware this could not be used in non-sleep context */ -bool usb_cable_connected(struct musb *musb) -{ - if (musb->usb_connected) - return true; - else - return false; -} - -static bool cmode_effect_on(void) -{ - bool effect = false; - - - /* CMODE CHECK */ - if (cable_mode == CABLE_MODE_CHRG_ONLY /*|| - (cable_mode == CABLE_MODE_HOST_ONLY && - chg_type != CHARGING_HOST)*/) - effect = true; - - DBG(0, "cable_mode=%d, effect=%d\n", cable_mode, effect); - return effect; -} - -void do_connection_work(struct work_struct *data) -{ - unsigned long flags = 0; - int usb_clk_state = NO_CHANGE; - bool usb_on, usb_connected; - struct mt_usb_work *work = - container_of(data, struct mt_usb_work, dwork.work); - - DBG(0, "is_host<%d>, power<%d>, ops<%d>\n", - mtk_musb->is_host, mtk_musb->power, work->ops); - - /* always prepare clock and check if need to unprepater later */ - /* clk_prepare_cnt +1 here*/ - usb_prepare_clock(true); - - /* be aware this could not be used in non-sleep context */ - usb_connected = mtk_musb->usb_connected; - - /* additional check operation here */ - if (musb_force_on) - usb_on = true; - else if (work->ops == CONNECTION_OPS_CHECK) - usb_on = usb_connected; - else - usb_on = (work->ops == - CONNECTION_OPS_CONN ? true : false); - - if (cmode_effect_on()) - usb_on = false; - /* additional check operation done */ - - spin_lock_irqsave(&mtk_musb->lock, flags); - - if (mtk_musb->is_host) { - DBG(0, "is host, return\n"); - goto exit; - } - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "in uart mode, return\n"); - goto exit; - } -#endif - - if (!mtk_musb->power && (usb_on == true)) { - /* enable usb */ - if (!mtk_musb->usb_lock->active) { - __pm_stay_awake(mtk_musb->usb_lock); - DBG(0, "lock\n"); - } else { - DBG(0, "already lock\n"); - } - - /* note this already put SOFTCON */ - musb_start(mtk_musb); - usb_clk_state = OFF_TO_ON; - - } else if (mtk_musb->power && (usb_on == false)) { - /* disable usb */ - musb_stop(mtk_musb); - if (mtk_musb->usb_lock->active) { - DBG(0, "unlock\n"); - __pm_relax(mtk_musb->usb_lock); - } else { - DBG(0, "lock not active\n"); - } - usb_clk_state = ON_TO_OFF; - mtk_musb->xceiv->otg->state = OTG_STATE_B_IDLE; - } else - DBG(0, "do nothing, usb_on:%d, power:%d\n", - usb_on, mtk_musb->power); -exit: - spin_unlock_irqrestore(&mtk_musb->lock, flags); - - if (usb_clk_state == ON_TO_OFF) { - /* clock on -> of: clk_prepare_cnt -2 */ - usb_prepare_clock(false); - usb_prepare_clock(false); - } else if (usb_clk_state == NO_CHANGE) { - /* clock no change : clk_prepare_cnt -1 */ - usb_prepare_clock(false); - } - - /* free mt_usb_work */ - kfree(work); -} - -static void issue_connection_work(int ops) -{ - struct mt_usb_work *work; - - if (!mtk_musb) { - DBG(0, "mtk_musb = NULL\n"); - return; - } - /* create and prepare worker */ - work = kzalloc(sizeof(struct mt_usb_work), GFP_ATOMIC); - if (!work) { - DBG(0, "wrap is NULL, directly return\n"); - return; - } - work->ops = ops; - INIT_DELAYED_WORK(&work->dwork, do_connection_work); - /* issue connection work */ - DBG(0, "issue work, ops<%d>\n", ops); - queue_delayed_work(mtk_musb->st_wq, &work->dwork, 0); -} - -void mt_usb_connect(void) -{ - DBG(0, "[MUSB] USB connect\n"); - issue_connection_work(CONNECTION_OPS_CONN); -} -EXPORT_SYMBOL(mt_usb_connect); - -void mt_usb_disconnect(void) -{ - DBG(0, "[MUSB] USB disconnect\n"); - issue_connection_work(CONNECTION_OPS_DISC); -} - -void mt_usb_reconnect(void) -{ - DBG(0, "[MUSB] USB reconnect\n"); - issue_connection_work(CONNECTION_OPS_CHECK); -} -EXPORT_SYMBOL(mt_usb_reconnect); - -/* build time force on */ -#if defined(CONFIG_FPGA_EARLY_PORTING) ||\ - defined(U3_COMPLIANCE) || defined(FOR_BRING_UP) -#define BYPASS_PMIC_LINKAGE -#endif - -void musb_platform_reset(struct musb *musb) -{ - u16 swrst = 0; - void __iomem *mbase = musb->mregs; - u8 bit; - - /* clear all DMA enable bit */ - for (bit = 0; bit < MUSB_HSDMA_CHANNELS; bit++) - musb_writew(mbase, - MUSB_HSDMA_CHANNEL_OFFSET(bit, MUSB_HSDMA_CONTROL), 0); - - /* set DMA channel 0 burst mode to boost QMU speed */ - musb_writel(musb->mregs, 0x204, - musb_readl(musb->mregs, 0x204) | 0x600); -#ifdef CONFIG_MTK_MUSB_DRV_36BIT - /* eanble DMA channel 0 36-BIT support */ - musb_writel(musb->mregs, 0x204, - musb_readl(musb->mregs, 0x204) | 0x4000); -#endif - - swrst = musb_readw(mbase, MUSB_SWRST); - swrst |= (MUSB_SWRST_DISUSBRESET | MUSB_SWRST_SWRST); - musb_writew(mbase, MUSB_SWRST, swrst); -} -EXPORT_SYMBOL(musb_platform_reset); - -bool is_switch_charger(void) -{ -#ifdef SWITCH_CHARGER - return true; -#else - return false; -#endif -} - -void pmic_chrdet_int_en(int is_on) -{ -#ifndef FPGA_PLATFORM -#ifdef CONFIG_MTK_PMIC - DBG(0, "is_on<%d>\n", is_on); - upmu_interrupt_chrdet_int_en(is_on); -#else - DBG(0, "FIXME, no upmu_interrupt_chrdet_int_en ???\n"); -#endif -#endif -} - -void musb_sync_with_bat(struct musb *musb, int usb_state) -{ -#ifndef FPGA_PLATFORM - DBG(1, "BATTERY_SetUSBState, state=%d\n", usb_state); -#ifdef CONFIG_MTK_CHARGER - BATTERY_SetUSBState(usb_state); -#endif -#endif -} -EXPORT_SYMBOL(musb_sync_with_bat); - -/*-------------------------------------------------------------------------*/ -static irqreturn_t generic_interrupt(int irq, void *__hci) -{ - irqreturn_t retval = IRQ_NONE; - struct musb *musb = __hci; - - /* musb_read_clear_generic_interrupt */ - musb->int_usb = - musb_readb(musb->mregs, MUSB_INTRUSB) & - musb_readb(musb->mregs, MUSB_INTRUSBE); - musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX) & - musb_readw(musb->mregs, MUSB_INTRTXE); - musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX) & - musb_readw(musb->mregs, MUSB_INTRRXE); -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - musb->int_queue = musb_readl(musb->mregs, MUSB_QISAR); -#endif - /* hw status up to date before W1C */ - mb(); - musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx); - musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx); - musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb); -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - if (musb->int_queue) { - musb_writel(musb->mregs, MUSB_QISAR, musb->int_queue); - musb->int_queue &= ~(musb_readl(musb->mregs, MUSB_QIMR)); - } -#endif - /* musb_read_clear_generic_interrupt */ - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - if (musb->int_usb || musb->int_tx || musb->int_rx || musb->int_queue) - retval = musb_interrupt(musb); -#else - if (musb->int_usb || musb->int_tx || musb->int_rx) - retval = musb_interrupt(musb); -#endif - - - return retval; -} - -static irqreturn_t mt_usb_interrupt(int irq, void *dev_id) -{ - irqreturn_t tmp_status; - irqreturn_t status = IRQ_NONE; - struct musb *musb = (struct musb *)dev_id; - u32 usb_l1_ints; - unsigned long flags; - - spin_lock_irqsave(&musb->lock, flags); - usb_l1_ints = musb_readl(musb->mregs, USB_L1INTS) & - musb_readl(mtk_musb->mregs, USB_L1INTM); - DBG(1, "usb interrupt assert %x %x %x %x %x %x %x\n", usb_l1_ints, - musb_readl(mtk_musb->mregs, USB_L1INTM), - musb_readb(musb->mregs, MUSB_INTRUSBE), - musb_readw(musb->mregs, MUSB_INTRTX), - musb_readw(musb->mregs, MUSB_INTRTXE), - musb_readw(musb->mregs, MUSB_INTRRX), - musb_readw(musb->mregs, MUSB_INTRRXE)); - - if ((usb_l1_ints & TX_INT_STATUS) || (usb_l1_ints & RX_INT_STATUS) - || (usb_l1_ints & USBCOM_INT_STATUS) -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - || (usb_l1_ints & QINT_STATUS) -#endif - ) { - tmp_status = generic_interrupt(irq, musb); - if (tmp_status != IRQ_NONE) - status = tmp_status; - } - spin_unlock_irqrestore(&musb->lock, flags); - - /* FIXME, workaround for device_qmu + host_dma */ -#if 1 -/* #ifndef CONFIG_MTK_MUSB_QMU_SUPPORT */ - if (usb_l1_ints & DMA_INT_STATUS) { - tmp_status = dma_controller_irq(irq, musb->dma_controller); - if (tmp_status != IRQ_NONE) - status = tmp_status; - } -#endif - - return status; - -} - -static bool saving_mode; - -static ssize_t saving_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - return scnprintf(buf, PAGE_SIZE, "%d\n", saving_mode); -} - -static ssize_t saving_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - int saving; - long tmp_val; - - if (!dev) { - DBG(0, "dev is null!!\n"); - return count; - /* } else if (1 == sscanf(buf, "%d", &saving)) { */ - } else if (kstrtol(buf, 10, (long *)&tmp_val) == 0) { - saving = tmp_val; - DBG(0, "old=%d new=%d\n", saving, saving_mode); - if (saving_mode == (!saving)) - saving_mode = !saving_mode; - } - return count; -} - -bool is_saving_mode(void) -{ - DBG(0, "%d\n", saving_mode); - return saving_mode; -} -EXPORT_SYMBOL(is_saving_mode); - -void usb_dump_debug_register(void) -{ - struct musb *musb = mtk_musb; - - usb_enable_clock(true); - - /* 1:Read 0x11200620; */ - pr_notice("[IPI USB dump]addr: 0x620, value: %x\n", - musb_readl(musb->mregs, 0x620)); - - /* 2: set 0x11200600[5:0] = 0x23; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x23); - pr_notice("[IPI USB dump]addr: 0x634, 0x23 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 3: set 0x11200600[5:0] = 0x24; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x24); - pr_notice("[IPI USB dump]addr: 0x634, 0x24 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 4:set 0x11200600[5:0] = 0x25; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x25); - pr_notice("[IPI USB dump]addr: 0x634, 0x25 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 5:set 0x11200600[5:0] = 0x26; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x26); - pr_notice("[IPI USB dump]addr: 0x634, 0x26 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - usb_enable_clock(false); -} - -DEVICE_ATTR_RW(saving); - -#ifdef CONFIG_MTK_UART_USB_SWITCH -static void uart_usb_switch_dump_register(void) -{ - usb_enable_clock(true); - -#ifdef CONFIG_MTK_MUSB_PHY - /* Todo: should phase out: not supported by tphy */ - DBG(0, "[MUSB]addr: 0x68, value: %x\n" - "[MUSB]addr: 0x6C, value: %x\n" - "[MUSB]addr: 0x20, value: %x\n" - "[MUSB]addr: 0x18, value: %x\n", - USBPHY_READ32(0x68), - USBPHY_READ32(0x6C), - USBPHY_READ32(0x20), - USBPHY_READ32(0x18)); -#endif - - usb_enable_clock(false); - DBG(0, "[MUSB]GPIO_SEL=%x\n", GET_GPIO_SEL_VAL(readl(ap_gpio_base))); -} - -static ssize_t mt_usb_show_portmode(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - usb_prepare_enable_clock(true); - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) - port_mode = PORT_MODE_UART; - else - port_mode = PORT_MODE_USB; - - if (port_mode == PORT_MODE_USB) - DBG(0, "\nUSB Port mode -> USB\n"); - else if (port_mode == PORT_MODE_UART) - DBG(0, "\nUSB Port mode -> UART\n"); - - uart_usb_switch_dump_register(); - - usb_prepare_enable_clock(false); - - return scnprintf(buf, PAGE_SIZE, "%d\n", port_mode); -} - -static ssize_t portmode_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - unsigned int portmode; - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) - port_mode = PORT_MODE_UART; - if (!dev) { - DBG(0, "dev is null!!\n"); - return count; - } else if (kstrtouint(buf, 10, &portmode) == 0) { - usb_prepare_enable_clock(true); - DBG(0, - "\nUSB Port mode: current => %d (port_mode), change to => %d (portmode)\n", - port_mode, portmode); - if (portmode >= PORT_MODE_MAX) - portmode = PORT_MODE_USB; - - if (port_mode != portmode) { - /* Changing to USB Mode */ - if (portmode == PORT_MODE_USB) { - DBG(0, "USB Port mode -> USB\n"); - usb_phy_switch_to_usb(); - /* Changing to UART Mode */ - } else if (portmode == PORT_MODE_UART) { - DBG(0, "USB Port mode -> UART\n"); - usb_phy_switch_to_uart(); - } - uart_usb_switch_dump_register(); - port_mode = portmode; - } - usb_prepare_enable_clock(false); - } - return count; -} - -DEVICE_ATTR_RW(portmode); - -static ssize_t mt_usb_show_uart_path(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - u32 var; - - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - - var = GET_GPIO_SEL_VAL(readl(ap_gpio_base)); - DBG(0, "[MUSB]GPIO SELECT=%x\n", var); - - return scnprintf(buf, PAGE_SIZE, "%x\n", var); -} - -DEVICE_ATTR(uartpath, 0444, mt_usb_show_uart_path, NULL); -#endif - -#ifndef FPGA_PLATFORM -static struct device_attribute *mt_usb_attributes[] = { - &dev_attr_saving, -#ifdef CONFIG_MTK_UART_USB_SWITCH - &dev_attr_portmode, - &dev_attr_uartpath, -#endif - NULL -}; - -static int init_sysfs(struct device *dev) -{ - struct device_attribute **attr; - int rc; - - for (attr = mt_usb_attributes; *attr; attr++) { - rc = device_create_file(dev, *attr); - if (rc) - goto out_unreg; - } - return 0; - -out_unreg: - for (; attr >= mt_usb_attributes; attr--) - device_remove_file(dev, *attr); - return rc; -} -#endif - -#ifdef FPGA_PLATFORM -static struct i2c_client *usb_i2c_client; -static const struct i2c_device_id usb_i2c_id[] = { {"mtk-usb", 0}, {} }; - -void USB_PHY_Write_Register8(u8 var, u8 addr) -{ - char buffer[2]; - - buffer[0] = addr; - buffer[1] = var; - i2c_master_send(usb_i2c_client, buffer, 2); -} - -u8 USB_PHY_Read_Register8(u8 addr) -{ - u8 var; - - i2c_master_send(usb_i2c_client, &addr, 1); - i2c_master_recv(usb_i2c_client, &var, 1); - return var; -} - -#define U3_PHY_PAGE 0xff - -void _u3_write_bank(u32 value) -{ - USB_PHY_Write_Register8((u8)value, (u8)U3_PHY_PAGE); -} - -u32 _u3_read_reg(u32 address) -{ - u8 databuffer = 0; - - databuffer = USB_PHY_Read_Register8((u8)address); - return databuffer; -} - -void _u3_write_reg(u32 address, u32 value) -{ - USB_PHY_Write_Register8((u8)value, (u8)address); -} - -u32 u3_phy_read_reg32(u32 addr) -{ - u32 bank; - u32 addr8; - u32 data; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - - _u3_write_bank(bank); - data = _u3_read_reg(addr8); - data |= (_u3_read_reg(addr8 + 1) << 8); - data |= (_u3_read_reg(addr8 + 2) << 16); - data |= (_u3_read_reg(addr8 + 3) << 24); - return data; -} - -u32 u3_phy_write_reg32(u32 addr, u32 data) -{ - u32 bank; - u32 addr8; - u32 data_0, data_1, data_2, data_3; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - data_0 = data & 0xff; - data_1 = (data >> 8) & 0xff; - data_2 = (data >> 16) & 0xff; - data_3 = (data >> 24) & 0xff; - - _u3_write_bank(bank); - _u3_write_reg(addr8, data_0); - _u3_write_reg(addr8 + 1, data_1); - _u3_write_reg(addr8 + 2, data_2); - _u3_write_reg(addr8 + 3, data_3); - - return 0; -} - -void u3_phy_write_field32(int addr, int offset, int mask, int value) -{ - u32 cur_value; - u32 new_value; - - cur_value = u3_phy_read_reg32(addr); - new_value = (cur_value & (~mask)) | ((value << offset) & mask); - - u3_phy_write_reg32(addr, new_value); -} - -u32 u3_phy_write_reg8(u32 addr, u8 data) -{ - u32 bank; - u32 addr8; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - _u3_write_bank(bank); - _u3_write_reg(addr8, data); - - return 0; -} - -int phy_init_a60931(struct u3phy_info *info) -{ - /* 0xFC[31:24], Change bank address to 0 */ - //phy_writeb(i2c, 0x60, 0xff, 0x0); - /* 0x14[14:12], RG_USB20_HSTX_SRCTRL, set U2 slew rate as 4 */ - u3_phy_write_field32(((u32)&info->u2phy_regs_a->usbphyacr5), - A60931_RG_USB20_HSTX_SRCTRL_OFST, A60931_RG_USB20_HSTX_SRCTRL, 0x4); - - /* 0x18[23:23], RG_USB20_BC11_SW_EN, Disable BC 1.1 */ - //phy_writelmsk(i2c, 0x60, 0x18, 23, BIT(23), 0x0); - u3_phy_write_field32(((u32)&info->u2phy_regs_a->usbphyacr6), - A60931_RG_USB20_BC11_SW_EN_OFST, A60931_RG_USB20_BC11_SW_EN, 0x0); - - /* 0x68[18:18], force_suspendm = 0 */ - //phy_writelmsk(i2c, 0x60, 0x68, 18, BIT(18), 0x0); - u3_phy_write_field32(((u32)&info->u2phy_regs_a->u2phydtm0), - A60931_FORCE_SUSPENDM_OFST, A60931_FORCE_SUSPENDM, 0x0); - - /* 0xFC[31:24], Change bank address to 0x30 */ - //phy_writeb(i2c, 0x60, 0xff, 0x30); - /* 0x04[29:29], RG_VUSB10_ON, SSUSB 1.0V power ON */ - //phy_writelmsk(i2c, 0x60, 0x04, 29, BIT(29), 0x1); - u3_phy_write_field32(((u32)&info->u3phya_regs_a->reg1), - A60931_RG_VUSB10_ON_OFST, A60931_RG_VUSB10_ON, 0x1); - - /* 0x04[25:21], RG_SSUSB_XTAL_TOP_RESERVE */ - //phy_writelmsk(i2c, 0x60, 0x04, 21, GENMASK(25, 21), 0x11); - u3_phy_write_field32(((u32)&info->u3phya_regs_a->reg1), - A60931_RG_SSUSB_XTAL_TOP_RESERVE_OFST, - A60931_RG_SSUSB_XTAL_TOP_RESERVE, 0x11); - - /* 0xFC[31:24], Change bank address to 0x40 */ - //phy_writeb(i2c, 0x60, 0xff, 0x40); - - /* 0x38[15:0], DA_SSUSB_PLL_SSC_DELTA1 */ - /* fine tune SSC delta1 to let SSC min average ~0ppm */ - //phy_writelmsk(i2c, 0x60, 0x38, 0, GENMASK(15, 0)<<0, 0x47); - u3_phy_write_field32(((u32)&info->u3phya_da_regs_a->reg19), - A60931_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST, - A60931_RG_SSUSB_PLL_SSC_DELTA1_U3, 0x47); - - /* 0x40[31:16], DA_SSUSB_PLL_SSC_DELTA */ - /* fine tune SSC delta to let SSC min average ~0ppm */ - //phy_writelmsk(i2c, 0x60, 0x40, 16, GENMASK(31, 16), 0x44); - u3_phy_write_field32(((u32)&info->u3phya_da_regs_a->reg21), - A60931_RG_SSUSB_PLL_SSC_DELTA_U3_OFST, - A60931_RG_SSUSB_PLL_SSC_DELTA_U3, 0x44); - - /* 0xFC[31:24], Change bank address to 0x30 */ - //phy_writeb(i2c, 0x60, 0xff, 0x30); - /* 0x14[15:0], RG_SSUSB_PLL_SSC_PRD */ - /* fine tune SSC PRD to let SSC freq average 31.5KHz */ - //phy_writelmsk(i2c, 0x60, 0x14, 0, GENMASK(15, 0), 0x190); - u3_phy_write_field32(((u32)&info->u3phya_regs_a->reg7), - A60931_RG_SSUSB_PLL_SSC_PRD_OFST, A60931_RG_SSUSB_PLL_SSC_PRD, 0x190); - - /* ToDo: PCIE CODA A60931A_PCIE_GLB_CSR_Description */ -#ifdef CONFIG_A60931_PCIE - /* 0xFC[31:24], Change bank address to 0x70 */ - //phy_writeb(i2c, 0x70, 0xff, 0x70); - /* 0x88[3:2], Pipe reset, clk driving current */ - phy_writelmsk(i2c, 0x70, 0x88, 2, GENMASK(3, 2), 0x1); - /* 0x88[5:4], Data lane 0 driving current */ - phy_writelmsk(i2c, 0x70, 0x88, 4, GENMASK(5, 4), 0x1); - /* 0x88[7:6], Data lane 1 driving current */ - phy_writelmsk(i2c, 0x70, 0x88, 6, GENMASK(7, 6), 0x1); - /* 0x88[9:8], Data lane 2 driving current */ - phy_writelmsk(i2c, 0x70, 0x88, 8, GENMASK(9, 8), 0x1); - /* 0x88[11:10], Data lane 3 driving current */ - phy_writelmsk(i2c, 0x70, 0x88, 10, GENMASK(11, 10), 0x1); - /* 0x9C[4:0], rg_ssusb_ckphase, PCLK phase 0x00~0x1F */ - phy_writelmsk(i2c, 0x70, 0x9c, 0, GENMASK(4, 0), 0x19); -#endif - /* Set INTR & TX/RX Impedance */ - - /* 0xFC[31:24], Change bank address to 0x30 */ - //phy_writeb(i2c, 0x60, 0xff, 0x30); - - /* 0x00[26:26], RG_SSUSB_INTR_EN */ - //phy_writelmsk(i2c, 0x60, 0x00, 26, BIT(26), 0x1); - u3_phy_write_field32(((u32)&info->u3phya_regs_a->reg0), - A60931_RG_SSUSB_INTR_EN_OFST, A60931_RG_SSUSB_INTR_EN, 0x1); - - /* 0x00[15:10], RG_SSUSB_IEXT_INTR_CTRL, Set Iext R selection */ - //phy_writelmsk(i2c, 0x60, 0x00, 10, GENMASK(15, 10), 0x26); - u3_phy_write_field32(((u32)&info->u3phya_regs_a->reg0), - A60931_RG_SSUSB_IEXT_INTR_CTRL_OFST, A60931_RG_SSUSB_IEXT_INTR_CTRL, 0x26); - - /* 0xFC[31:24], Change bank address to 0x10 */ - //phy_writeb(i2c, 0x60, 0xff, 0x10); - - /* 0x10[31:31], rg_ssusb_force_tx_impsel, enable */ - //phy_writelmsk(i2c, 0x60, 0x10, 31, BIT(31), 0x1); - u3_phy_write_field32(((u32)&info->u3phyd_regs_a->phyd_impcal0), - A60931_RG_SSUSB_FORCE_TX_IMPSEL_OFST, A60931_RG_SSUSB_FORCE_TX_IMPSEL, 0x1); - - /* 0x10[28:24], rg_ssusb_tx_impsel, Set TX Impedance */ - //phy_writelmsk(i2c, 0x60, 0x10, 24, GENMASK(28, 24), 0x10); - u3_phy_write_field32(((u32)&info->u3phyd_regs_a->phyd_impcal0), - A60931_RG_SSUSB_TX_IMPSEL_OFST, A60931_RG_SSUSB_RX_IMPSEL, 0x10); - - /* 0x14[31:31], rg_ssusb_force_rx_impsel, enable */ - //phy_writelmsk(i2c, 0x60, 0x14, 31, BIT(31), 0x1); - u3_phy_write_field32(((u32)&info->u3phyd_regs_a->phyd_impcal1), - A60931_RG_SSUSB_FORCE_RX_IMPSEL_OFST, A60931_RG_SSUSB_FORCE_RX_IMPSEL, 0x1); - - /* 0x14[28:24], rg_ssusb_rx_impsel, Set RX Impedance */ - //phy_writelmsk(i2c, 0x60, 0x14, 24, GENMASK(28, 24), 0x10); - u3_phy_write_field32(((u32)&info->u3phyd_regs_a->phyd_impcal1), - A60931_RG_SSUSB_RX_IMPSEL_OFST, A60931_RG_SSUSB_RX_IMPSEL, 0x10); - - /* 0xFC[31:24], Change bank address to 0x00 */ - //phy_writeb(i2c, 0x60, 0xff, 0x00); - /* 0x00[05:05], RG_USB20_INTR_EN, U2 INTR_EN */ - //phy_writelmsk(i2c, 0x60, 0x00, 5, BIT(5), 0x1); - u3_phy_write_field32(((u32)&info->u2phy_regs_a->usbphyacr0), - A60931_RG_USB20_INTR_EN_OFST, A60931_RG_USB20_INTR_EN, 0x1); - - /* 0x04[23:19], RG_USB20_INTR_CAL, Set Iext R selection */ - //phy_writelmsk(i2c, 0x60, 0x04, 19, GENMASK(23, 19), 0x14); - u3_phy_write_field32(((u32)&info->u2phy_regs_a->usbphyacr1), - A60931_RG_USB20_INTR_CAL_OFST, A60931_RG_USB20_INTR_CAL, 0x14); - - return 0; -} - -int phy_init_a60810(struct u3phy_info *info) -{ - /* BANK 0x00 */ - /* for U2 hS eye diagram */ - u3_phy_write_field32(((u32) - &info->u2phy_regs_a->usbphyacr1) - , A60810_RG_USB20_TERM_VREF_SEL_OFST - , A60810_RG_USB20_TERM_VREF_SEL - , 0x05); - /* for U2 hS eye diagram */ - u3_phy_write_field32(((u32) - &info->u2phy_regs_a->usbphyacr1) - , A60810_RG_USB20_VRT_VREF_SEL_OFST - , A60810_RG_USB20_VRT_VREF_SEL - , 0x05); - /* for U2 sensititvity */ - u3_phy_write_field32(((u32) - &info->u2phy_regs_a->usbphyacr6) - , A60810_RG_USB20_SQTH_OFST - , A60810_RG_USB20_SQTH - , 0x04); - - /* BANK 0x10 */ - /* disable ssusb_p3_entry to work around resume from P3 bug */ - u3_phy_write_field32(((u32) - &info->u3phyd_regs_a->phyd_lfps0) - , A60810_RG_SSUSB_P3_ENTRY_OFST - , A60810_RG_SSUSB_P3_ENTRY - , 0x00); - /* force disable ssusb_p3_entry to - * work around resume from P3 bug - */ - u3_phy_write_field32(((u32) - &info->u3phyd_regs_a->phyd_lfps0) - , A60810_RG_SSUSB_P3_ENTRY_SEL_OFST - , A60810_RG_SSUSB_P3_ENTRY_SEL - , 0x01); - - /* BANK 0x40 */ - /* fine tune SSC delta1 to let SSC min average ~0ppm */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg19) - , A60810_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST - , A60810_RG_SSUSB_PLL_SSC_DELTA1_U3 - , 0x46); - /* U3PhyWriteField32(((u32)&info.u3phya_da_regs_a->reg19) */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg21) - , A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST - , A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H - , 0x40); - - /* fine tune SSC delta to let SSC min average ~0ppm */ - - /* Fine tune SYSPLL to improve phase noise */ - /* I2C 60 0x08[01:00] 0x03 - * RW RG_SSUSB_PLL_BC_U3 - */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg4) - , A60810_RG_SSUSB_PLL_BC_U3_OFST - , A60810_RG_SSUSB_PLL_BC_U3 - , 0x3); - /* I2C 60 0x08[12:10] 0x03 - * RW RG_SSUSB_PLL_DIVEN_U3 - */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg4) - , A60810_RG_SSUSB_PLL_DIVEN_U3_OFST - , A60810_RG_SSUSB_PLL_DIVEN_U3 - , 0x3); - /* I2C 60 0x0C[03:00] 0x01 RW RG_SSUSB_PLL_IC_U3 */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg5) - , A60810_RG_SSUSB_PLL_IC_U3_OFST - , A60810_RG_SSUSB_PLL_IC_U3 - , 0x1); - /* I2C 60 0x0C[23:22] 0x01 RW RG_SSUSB_PLL_BR_U3 */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg5) - , A60810_RG_SSUSB_PLL_BR_U3_OFST - , A60810_RG_SSUSB_PLL_BR_U3 - , 0x1); - /* I2C 60 0x10[03:00] 0x01 - * RW RG_SSUSB_PLL_IR_U3 - */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg6) - , A60810_RG_SSUSB_PLL_IR_U3_OFST - , A60810_RG_SSUSB_PLL_IR_U3 - , 0x1); - /* I2C 60 0x14[03:00] 0x0F RW RG_SSUSB_PLL_BP_U3 */ - u3_phy_write_field32(((u32) - &info->u3phya_da_regs_a->reg7) - , A60810_RG_SSUSB_PLL_BP_U3_OFST - , A60810_RG_SSUSB_PLL_BP_U3 - , 0x0f); - - /* BANK 0x60 */ - /* force xtal pwd mode enable */ - u3_phy_write_field32(((u32) - &info->spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_FORCE_XTAL_PWD_OFST - , A60810_RG_SSUSB_FORCE_XTAL_PWD - , 0x1); - /* force bias pwd mode enable */ - u3_phy_write_field32(((u32) - &info->spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_FORCE_BIAS_PWD_OFST - , A60810_RG_SSUSB_FORCE_BIAS_PWD - , 0x1); - /* force xtal pwd mode off to work around xtal drv de */ - u3_phy_write_field32(((u32) - &info->spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_XTAL_PWD_OFST - , A60810_RG_SSUSB_XTAL_PWD - , 0x0); - /* force bias pwd mode off to work around xtal drv de */ - u3_phy_write_field32(((u32) - &info->spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_BIAS_PWD_OFST - , A60810_RG_SSUSB_BIAS_PWD - , 0x0); - - /********* test chip settings ***********/ - /* BANK 0x00 */ - /* slew rate setting */ - u3_phy_write_field32(((u32) - &info->u2phy_regs_a->usbphyacr5) - , A60810_RG_USB20_HSTX_SRCTRL_OFST - , A60810_RG_USB20_HSTX_SRCTRL - , 0x4); - - /* BANK 0x50 */ - - /* PIPE setting BANK5 */ - /* PIPE drv = 2 */ - u3_phy_write_reg8(((u32) - &info->sifslv_chip_regs_a->gpio_ctla) + 2, 0x10); - /* PIPE phase */ - /* U3PhyWriteReg8(((u32)&info.sifslv_chip_regs_a->gpio_ctla)+3, */ - /* 0xdc); */ - u3_phy_write_reg8(((u32) - &info->sifslv_chip_regs_a->gpio_ctla) + 3, 0x24); - - return 0; -} - -static int usb_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - void __iomem *base; - u32 val = 0; - /* if i2c probe before musb prob, this would cause KE */ - /* base = (unsigned long)((unsigned long)mtk_musb->xceiv->io_priv); */ - base = usb_phy_base + USB_PHY_OFFSET; - DBG(0, "[MUSB]%s, start, base:%p\n", __func__, base); - - usb_i2c_client = client; - - /* disable usb mac suspend */ - val = musb_readl(base, 0x68); - /* DBG(0, "[MUSB]0x68=0x%x\n", val); */ - - musb_writel(base, 0x68, (val & ~(0x4 << 16))); - - /* DBG(0, "[MUSB]0x68=0x%x\n" */ - /* "[MUSB]addr: 0xFF, value: %x\n", */ - /* musb_readl(base, 0x68), */ - /* USB_PHY_Read_Register8(0xFF)); */ - - USB_PHY_Write_Register8(0x20, 0xFF); - - DBG(0, "[MUSB]version=[%02x %02x %02x %02x]\n", - USB_PHY_Read_Register8(0xE4), - USB_PHY_Read_Register8(0xE5), - USB_PHY_Read_Register8(0xE6), - USB_PHY_Read_Register8(0xE7)); - - if (USB_PHY_Read_Register8(0xE7) == 0xa) { - static struct u3phy_info info; - - DBG(0, "[MUSB] Phy version is %x\n", - u3_phy_read_reg32(0x2000e4)); - - info.u2phy_regs_a = (struct u2phy_reg_a *)0x0; - info.u3phyd_regs_a = (struct u3phyd_reg_a *)0x100000; - info.u3phyd_bank2_regs_a = - (struct u3phyd_bank2_reg_a *)0x200000; - info.u3phya_regs_a = (struct u3phya_reg_a *)0x300000; - info.u3phya_da_regs_a = (struct u3phya_da_reg_a *)0x400000; - info.sifslv_chip_regs_a = (struct sifslv_chip_reg_a *)0x500000; - info.spllc_regs_a = (struct spllc_reg_a *)0x600000; - info.sifslv_fm_regs_a = (struct sifslv_fm_reg_a *)0xf00000; - - if (u3_phy_read_reg32(0x2000e4) == 0xa60810a) { - /* DBG(0, "[MUSB] PHY A60810 init\n"); */ - phy_init_a60810(&info); - } else if (u3_phy_read_reg32(0x2000e4) == 0xa60931a) { - /* DBG(0, "[MUSB] PHY A60931 init\n"); */ - phy_init_a60931(&info); - } - - } else { - USB_PHY_Write_Register8(0x00, 0xFF); - - DBG(0, "[MUSB]addr: 0xFF, value: %x\n", - USB_PHY_Read_Register8(0xFF)); - - /* usb phy initial sequence */ - USB_PHY_Write_Register8(0x00, 0xFF); - USB_PHY_Write_Register8(0x04, 0x61); - USB_PHY_Write_Register8(0x00, 0x68); - USB_PHY_Write_Register8(0x00, 0x6a); - USB_PHY_Write_Register8(0x6e, 0x00); - USB_PHY_Write_Register8(0x0c, 0x1b); - USB_PHY_Write_Register8(0x44, 0x08); - USB_PHY_Write_Register8(0x55, 0x11); - USB_PHY_Write_Register8(0x68, 0x1a); - - - DBG(0, "[MUSB]addr: 0xFF, value: %x\n" - "[MUSB]addr: 0x61, value: %x\n" - "[MUSB]addr: 0x68, value: %x\n" - "[MUSB]addr: 0x6a, value: %x\n" - "[MUSB]addr: 0x00, value: %x\n" - "[MUSB]addr: 0x1b, value: %x\n" - "[MUSB]addr: 0x08, value: %x\n" - "[MUSB]addr: 0x11, value: %x\n" - "[MUSB]addr: 0x1a, value: %x\n", - USB_PHY_Read_Register8(0xFF), - USB_PHY_Read_Register8(0x61), - USB_PHY_Read_Register8(0x68), - USB_PHY_Read_Register8(0x6a), - USB_PHY_Read_Register8(0x00), - USB_PHY_Read_Register8(0x1b), - USB_PHY_Read_Register8(0x08), - USB_PHY_Read_Register8(0x11), - USB_PHY_Read_Register8(0x1a)); - } - - DBG(0, "[MUSB]%s, end\n", __func__); - return 0; - -} - -static int usb_i2c_remove(struct i2c_client *client) -{ - return 0; -} - -static const struct of_device_id usb_of_match[] = { - {.compatible = "mediatek,mtk-usb"}, - {}, -}; - -struct i2c_driver usb_i2c_driver = { - .probe = usb_i2c_probe, - .remove = usb_i2c_remove, - .driver = { - .name = "mtk-usb", - .of_match_table = usb_of_match, - }, - .id_table = usb_i2c_id, -}; - -static int add_usb_i2c_driver(void) -{ - DBG(0, "%s\n", __func__); - - if (i2c_add_driver(&usb_i2c_driver) != 0) { - DBG(0, "[MUSB]usb_i2c_driver initialization failed!!\n"); - return -1; - } - DBG(0, "[MUSB]usb_i2c_driver initialization succeed!!\n"); - return 0; -} -#endif /* End of FPGA_PLATFORM */ - -static int __init mt_usb_init(struct musb *musb) -{ - int ret; - - DBG(1, "%s\n", __func__); - - musb->phy = glue->phy; - musb->xceiv = glue->xceiv; - - musb->dma_irq = (int)SHARE_IRQ; - musb->fifo_cfg = fifo_cfg; - musb->fifo_cfg_size = ARRAY_SIZE(fifo_cfg); - musb->dyn_fifo = true; - musb->power = false; - musb->is_host = false; - musb->fifo_size = 8 * 1024; - musb->usb_lock = wakeup_source_register(NULL, "USB suspend lock"); - - ret = phy_init(glue->phy); - if (ret) - goto err_phy_init; - -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - glue->phy_mode = PHY_MODE_UART; - DBG(0, "At UART mode. Switch to USB is not support\n"); - } -#endif - phy_set_mode(glue->phy, glue->phy_mode); - - if (glue->phy_mode != PHY_MODE_UART) - ret = phy_power_on(glue->phy); - - if (ret) - goto err_phy_power_on; - -#ifndef FPGA_PLATFORM - reg_vusb = regulator_get(musb->controller, "vusb"); - if (!IS_ERR(reg_vusb)) { -#ifdef NEVER -#define VUSB33_VOL_MIN 3070000 -#define VUSB33_VOL_MAX 3070000 - ret = regulator_set_voltage(reg_vusb, - VUSB33_VOL_MIN, VUSB33_VOL_MAX); - if (ret < 0) - pr_err("regulator set vol failed: %d\n", ret); - else - DBG(0, "regulator set vol ok, <%d,%d>\n", - VUSB33_VOL_MIN, VUSB33_VOL_MAX); -#endif /* NEVER */ - ret = regulator_enable(reg_vusb); - if (ret < 0) { - pr_err("regulator_enable vusb failed: %d\n", ret); - regulator_put(reg_vusb); - } - } else - pr_err("regulator_get vusb failed\n"); - - reg_vio18 = regulator_get(musb->controller, "vio18"); - if (!IS_ERR(reg_vio18)) { - ret = regulator_enable(reg_vio18); - if (ret < 0) { - pr_err("regulator_enable vio18 failed: %d\n", ret); - regulator_put(reg_vio18); - } - } else - pr_err("regulator_get vio18 failed\n"); - - reg_va12 = regulator_get(musb->controller, "va12"); - if (!IS_ERR(reg_va12)) { - ret = regulator_enable(reg_va12); - if (ret < 0) { - pr_err("regulator_enable va12 failed: %d\n", ret); - regulator_put(reg_va12); - } - } else - pr_err("regulator_get va12 failed\n"); - -#endif - - /*ret = device_create_file(musb->controller, &dev_attr_cmode);*/ - - /* mt_usb_enable(musb); */ - - musb->isr = mt_usb_interrupt; - musb_writel(musb->mregs, - MUSB_HSDMA_INTR, 0xff | - (0xff << DMA_INTR_UNMASK_SET_OFFSET)); - DBG(1, "musb platform init %x\n", - musb_readl(musb->mregs, MUSB_HSDMA_INTR)); - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - /* FIXME, workaround for device_qmu + host_dma */ - musb_writel(musb->mregs, - USB_L1INTM, - TX_INT_STATUS | - RX_INT_STATUS | - USBCOM_INT_STATUS | - DMA_INT_STATUS | - QINT_STATUS); -#else - musb_writel(musb->mregs, - USB_L1INTM, - TX_INT_STATUS | - RX_INT_STATUS | - USBCOM_INT_STATUS | - DMA_INT_STATUS); -#endif - -#if defined(CONFIG_MTK_BASE_POWER) - timer_setup(&musb->idle_timer, musb_do_idle, 0); -#endif - -#ifdef CONFIG_USB_MTK_OTG - mt_usb_otg_init(musb); - /* enable host suspend mode */ - mt_usb_wakeup_init(musb); - musb->host_suspend = true; -#endif - return 0; -err_phy_power_on: - phy_exit(glue->phy); -err_phy_init: - - return ret; -} - -static int mt_usb_exit(struct musb *musb) -{ - del_timer_sync(&musb->idle_timer); -#ifndef FPGA_PLATFORM - if (reg_vusb) { - regulator_disable(reg_vusb); - regulator_put(reg_vusb); - reg_vusb = NULL; - } - if (reg_va12) { - regulator_disable(reg_va12); - regulator_put(reg_va12); - reg_va12 = NULL; - } - if (reg_vio18) { - regulator_disable(reg_vio18); - regulator_put(reg_vio18); - reg_vio18 = NULL; - } -#endif -#ifdef CONFIG_USB_MTK_OTG - mt_usb_otg_exit(musb); -#endif - phy_power_off(glue->phy); - phy_exit(glue->phy); - return 0; -} - -static void mt_usb_enable_clk(struct musb *musb) -{ - usb_enable_clock(true); -} - -static void mt_usb_disable_clk(struct musb *musb) -{ - usb_enable_clock(false); -} - -static void mt_usb_prepare_clk(struct musb *musb) -{ - usb_prepare_clock(true); -} - -static void mt_usb_unprepare_clk(struct musb *musb) -{ - usb_prepare_clock(false); -} - -static const struct musb_platform_ops mt_usb_ops = { - .init = mt_usb_init, - .exit = mt_usb_exit, - /*.set_mode = mt_usb_set_mode, */ -#if defined(CONFIG_MTK_BASE_POWER) - .try_idle = mt_usb_try_idle, -#endif - .enable = mt_usb_enable, - .disable = mt_usb_disable, - /* .set_vbus = mt_usb_set_vbus, */ - .vbus_status = mt_usb_get_vbus_status, - .enable_clk = mt_usb_enable_clk, - .disable_clk = mt_usb_disable_clk, - .prepare_clk = mt_usb_prepare_clk, - .unprepare_clk = mt_usb_unprepare_clk, -#ifdef CONFIG_USB_MTK_OTG - .enable_wakeup = mt_usb_wakeup, -#endif -}; - -#ifdef CONFIG_MTK_MUSB_DRV_36BIT -static u64 mt_usb_dmamask = DMA_BIT_MASK(36); -#else -static u64 mt_usb_dmamask = DMA_BIT_MASK(32); -#endif - -struct mt_usb_glue *glue; -EXPORT_SYMBOL(glue); - -static int mt_usb_probe(struct platform_device *pdev) -{ - struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data; - struct platform_device *musb_pdev; - struct musb_hdrc_config *config; - struct device_node *np = pdev->dev.of_node; -#ifdef CONFIG_MTK_UART_USB_SWITCH - struct device_node *ap_gpio_node = NULL; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk *otg_sx; -#endif - int ret = -ENOMEM; - - glue = kzalloc(sizeof(*glue), GFP_KERNEL); - if (!glue) - goto err0; - - /* Device name is required */ - musb_pdev = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_NONE); - if (!musb_pdev) { - dev_notice(&pdev->dev, "failed to allocate musb pdev\n"); - goto err1; - } - - glue->phy = devm_of_phy_get_by_index(&pdev->dev, np, 0); - if (IS_ERR(glue->phy)) { - dev_err(&pdev->dev, "fail to getting phy %ld\n", - PTR_ERR(glue->phy)); - return PTR_ERR(glue->phy); - } - - glue->usb_phy = usb_phy_generic_register(); - if (IS_ERR(glue->usb_phy)) { - dev_err(&pdev->dev, "fail to registering usb-phy %ld\n", - PTR_ERR(glue->usb_phy)); - return PTR_ERR(glue->usb_phy); - } - glue->xceiv = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2); - if (IS_ERR(glue->xceiv)) { - dev_err(&pdev->dev, "fail to getting usb-phy %d\n", ret); - ret = PTR_ERR(glue->xceiv); - goto err_unregister_usb_phy; - } - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) { - dev_notice(&pdev->dev, "failed to allocate musb platform data\n"); - goto err2; - } - - config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); - if (!config) { - /* dev_notice(&pdev->dev, - * "failed to allocate musb hdrc config\n"); - */ - goto err2; - } - -#ifdef CONFIG_MTK_UART_USB_SWITCH - ap_gpio_node = - of_find_compatible_node(NULL, NULL, AP_GPIO_COMPATIBLE_NAME); - - if (ap_gpio_node == NULL) { - dev_notice(&pdev->dev, "USB get ap_gpio_node failed\n"); - if (ap_gpio_base) - iounmap(ap_gpio_base); - ap_gpio_base = 0; - } else { - ap_gpio_base = of_iomap(ap_gpio_node, 0); - ap_gpio_base += RG_GPIO_SELECT; - } -#endif - - of_property_read_u32(np, "num_eps", (u32 *) &config->num_eps); - config->multipoint = of_property_read_bool(np, "multipoint"); - - pdata->config = config; - - musb_pdev->dev.parent = &pdev->dev; - musb_pdev->dev.dma_mask = &mt_usb_dmamask; - musb_pdev->dev.coherent_dma_mask = mt_usb_dmamask; - - pdev->dev.dma_mask = &mt_usb_dmamask; - pdev->dev.coherent_dma_mask = mt_usb_dmamask; - arch_setup_dma_ops(&musb_pdev->dev, 0, mt_usb_dmamask, NULL, 0); - - glue->dev = &pdev->dev; - glue->musb_pdev = musb_pdev; - - pdata->platform_ops = &mt_usb_ops; - - /* - * Don't use the name from dtsi, like "11200000.usb0". - * So modify the device name. And rc can use the same path for - * all platform, like "/sys/devices/platform/mt_usb/". - */ - ret = device_rename(&pdev->dev, "mt_usb"); - if (ret) - dev_notice(&pdev->dev, "failed to rename\n"); - - /* - * fix uaf(use afer free) issue:backup pdev->name, - * device_rename will free pdev->name - */ - pdev->name = pdev->dev.kobj.name; - - platform_set_drvdata(pdev, glue); - - ret = platform_device_add_resources(musb_pdev, - pdev->resource, pdev->num_resources); - if (ret) { - dev_notice(&pdev->dev, "failed to add resources\n"); - goto err2; - } - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - isoc_ep_end_idx = 1; - isoc_ep_gpd_count = 248; /* 30 ms for HS, at most (30*8 + 1) */ - - mtk_host_qmu_force_isoc_restart = 0; -#endif -#ifndef FPGA_PLATFORM -#if defined(CONFIG_MTK_BASE_POWER) - register_usb_hal_dpidle_request(usb_dpidle_request); -#endif -#endif - register_usb_hal_disconnect_check(trigger_disconnect_check_work); - - INIT_DELAYED_WORK(&idle_work, do_idle_work); - - DBG(0, "keep musb->power & mtk_usb_power in the samae value\n"); - mtk_usb_power = false; - -#ifndef FPGA_PLATFORM - glue->musb_clk = devm_clk_get(&pdev->dev, "usb0"); - if (IS_ERR(glue->musb_clk)) { - DBG(0, "cannot get musb_clk clock\n"); - goto err2; - } - - - glue->musb_clk_top_sel = devm_clk_get(&pdev->dev, "usb0_clk_top_sel"); - if (IS_ERR(glue->musb_clk_top_sel)) { - DBG(0, "cannot get musb_clk_top_sel clock\n"); - goto err2; - } - - glue->musb_clk_univpll5_d2 = devm_clk_get(&pdev->dev, "usb0_clk_univpll5_d2"); - if (IS_ERR(glue->musb_clk_univpll5_d2)) { - DBG(0, "cannot get musb_clk_univpll5_d2 clock\n"); - goto err2; - } - - if (init_sysfs(&pdev->dev)) { - DBG(0, "failed to init_sysfs\n"); - goto err2; - } -#ifdef CONFIG_USB_MTK_OTG - pdata->dr_mode = usb_get_dr_mode(&pdev->dev); -#else - of_property_read_u32(np, "dr_mode", (u32 *) &pdata->dr_mode); -#endif - - switch (pdata->dr_mode) { - case USB_DR_MODE_HOST: - glue->phy_mode = PHY_MODE_USB_HOST; - break; - case USB_DR_MODE_PERIPHERAL: - glue->phy_mode = PHY_MODE_USB_DEVICE; - break; - case USB_DR_MODE_OTG: - glue->phy_mode = PHY_MODE_USB_OTG; - break; - default: - dev_err(&pdev->dev, "Error 'dr_mode' property\n"); - return -EINVAL; - } - - DBG(0, "get dr_mode: %d\n", pdata->dr_mode); - - /* assign usb-role-sw */ - otg_sx = &glue->otg_sx; - -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - otg_sx->manual_drd_enabled = - of_property_read_bool(np, "enable-manual-drd"); - otg_sx->role_sw_used = of_property_read_bool(np, "usb-role-switch"); - - if (!otg_sx->role_sw_used && of_property_read_bool(np, "extcon")) { - otg_sx->edev = extcon_get_edev_by_phandle(&musb_pdev->dev, 0); - if (IS_ERR(otg_sx->edev)) { - dev_err(&musb_pdev->dev, "couldn't get extcon device\n"); - return PTR_ERR(otg_sx->edev); - } - } -#endif - - ret = platform_device_add_data(musb_pdev, pdata, sizeof(*pdata)); - if (ret) { - dev_notice(&pdev->dev, "failed to add platform_data\n"); - goto err2; - } - ret = platform_device_add(musb_pdev); - - if (ret) { - dev_notice(&pdev->dev, "failed to register musb device\n"); - goto err2; - } -#endif /* FPGA_PLATFORM */ - DBG(0, "USB probe done!\n"); - -#if defined(FPGA_PLATFORM) || defined(FOR_BRING_UP) - musb_force_on = 1; -#endif - - return 0; - -err2: - platform_device_put(musb_pdev); - platform_device_unregister(glue->musb_pdev); -err_unregister_usb_phy: - usb_phy_generic_unregister(glue->usb_phy); -err1: - kfree(glue); -err0: - return ret; -} - -static int mt_usb_remove(struct platform_device *pdev) -{ - struct mt_usb_glue *glue = platform_get_drvdata(pdev); - struct platform_device *usb_phy = glue->usb_phy; - - platform_device_unregister(glue->musb_pdev); - usb_phy_generic_unregister(usb_phy); - kfree(glue); - - return 0; -} - -static struct platform_driver mt_usb_driver = { - .remove = mt_usb_remove, - .probe = mt_usb_probe, - .driver = { - .name = "mt_usb", - .of_match_table = apusb_of_ids, - }, -}; -module_platform_driver(mt_usb_driver); - -static int __init usb20_init(void) -{ - int ret; - - DBG(0, "usb20 init\n"); - -#ifdef CONFIG_MTK_USB2JTAG_SUPPORT - if (usb2jtag_mode()) { - pr_notice("[USB2JTAG] in usb2jtag mode, not to initialize usb driver\n"); - return 0; - } -#endif - - /* Fix musb_plat build-in */ - /* ret = platform_driver_register(&mt_usb_driver); */ - ret = 0; - -#ifdef FPGA_PLATFORM - add_usb_i2c_driver(); -#endif - - DBG(0, "usb20 init ret:%d\n", ret); - return ret; -} -fs_initcall(usb20_init); - -static void __exit usb20_exit(void) -{ - /* Fix musb_plat build-in */ - /* platform_driver_unregister(&mt_usb_driver); */ -} -module_exit(usb20_exit); diff --git a/drivers/misc/mediatek/usb20/mt6781/usb20.h b/drivers/misc/mediatek/usb20/mt6781/usb20.h deleted file mode 100644 index ed8b7ae5762b..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/usb20.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - - -#ifndef __USB20_H__ -#define __USB20_H__ - -#ifdef CONFIG_FPGA_EARLY_PORTING -#define FPGA_PLATFORM -#endif - -#include -#include - -struct mt_usb_work { - struct delayed_work dwork; - int ops; -}; - -/* ToDo: should be moved to glue */ -extern struct musb *mtk_musb; -extern struct musb *musb; - -struct mt_usb_glue { - struct device *dev; - struct platform_device *musb_pdev; - struct musb *mtk_musb; - /* common power & clock */ - struct clk *musb_clk; - struct clk *musb_clk_top_sel; - struct clk *musb_clk_univpll5_d2; -#ifdef CONFIG_PHY_MTK_TPHY - struct platform_device *usb_phy; - struct phy *phy; - struct usb_phy *xceiv; - enum phy_mode phy_mode; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk otg_sx; -#endif -}; - -extern struct mt_usb_glue *glue; - -#define glue_to_musb(g) platform_get_drvdata(g->musb) - -extern int kernel_init_done; - -extern unsigned int upmu_get_rgs_chrdet(void); -extern bool upmu_is_chr_det(void); - -extern enum charger_type mt_charger_type_detection(void); -extern void BATTERY_SetUSBState(int usb_state); -extern void upmu_interrupt_chrdet_int_en(unsigned int val); - -/* specific USB fuctnion */ -enum CABLE_MODE { - CABLE_MODE_CHRG_ONLY = 0, - CABLE_MODE_NORMAL, - CABLE_MODE_HOST_ONLY, - CABLE_MODE_MAX -}; - -enum USB_CLK_STATE { - NO_CHANGE = 0, - ON_TO_OFF, - OFF_TO_ON, -}; - -/* specific USB operation */ -enum CONNECTION_OPS { - CONNECTION_OPS_DISC = 0, - CONNECTION_OPS_CHECK, - CONNECTION_OPS_CONN -}; - -enum VBUS_OPS { - VBUS_OPS_OFF = 0, - VBUS_OPS_ON -}; - -enum MTK_USB_SMC_CALL { - MTK_USB_SMC_INFRA_REQUEST = 0, - MTK_USB_SMC_INFRA_RELEASE, - MTK_USB_SMC_NUM -}; - -#ifdef CONFIG_MTK_UART_USB_SWITCH -enum PORT_MODE { - PORT_MODE_USB = 0, - PORT_MODE_UART, - PORT_MODE_MAX -}; - -extern bool usb_phy_check_in_uart_mode(void); -extern void usb_phy_switch_to_usb(void); -extern void usb_phy_switch_to_uart(void); -#endif - -#ifdef FPGA_PLATFORM -extern void USB_PHY_Write_Register8(u8 var, u8 addr); -extern u8 USB_PHY_Read_Register8(u8 addr); -#endif - -#ifdef CONFIG_MTK_UART_USB_SWITCH - -#define RG_GPIO_SELECT (0x600) -#define GPIO_SEL_OFFSET (4) -#define GPIO_SEL_MASK (0x7 << GPIO_SEL_OFFSET) -#define GPIO_SEL_UART0 (0x1 << GPIO_SEL_OFFSET) -#define GPIO_SEL_UART1 (0x2 << GPIO_SEL_OFFSET) -#define GET_GPIO_SEL_VAL(x) ((x & GPIO_SEL_MASK) >> GPIO_SEL_OFFSET) - -extern void __iomem *ap_gpio_base; -extern bool in_uart_mode; -#endif -extern int usb20_phy_init_debugfs(void); -extern enum charger_type mt_get_charger_type(void); -#ifndef CONFIG_FPGA_EARLY_PORTING -#include -#endif -#define PHY_IDLE_MODE 0 -#define PHY_DEV_ACTIVE 1 -#define PHY_HOST_ACTIVE 2 -void set_usb_phy_mode(int mode); -#ifdef CONFIG_USB_MTK_OTG -extern void mt_usb_otg_init(struct musb *musb); -extern void mt_usb_otg_exit(struct musb *musb); -extern int mt_usb_get_vbus_status(struct musb *musb); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); -#endif -extern void musb_platform_reset(struct musb *musb); -extern bool usb_enable_clock(bool enable); -extern bool usb_prepare_clock(bool enable); -extern void usb_prepare_enable_clock(bool enable); - -/* usb host mode wakeup */ -#define USB_WAKEUP_DEC_CON1 0x404 -#define USB1_CDEN BIT(0) -#define USB1_CDDEBOUNCE(x) (((x) & 0xf) << 1) -#endif diff --git a/drivers/misc/mediatek/usb20/mt6781/usb20_host.c b/drivers/misc/mediatek/usb20/mt6781/usb20_host.c deleted file mode 100644 index 6afa168679ef..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/usb20_host.c +++ /dev/null @@ -1,777 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - -#include -#include -#include -#include -#ifdef CONFIG_USB_MTK_OTG -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_MTK_USB_TYPEC -#ifdef CONFIG_TCPC_CLASS -#include -#endif -#endif -#include -#include -#include - -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -MODULE_LICENSE("GPL v2"); - -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 -#include -static struct charger_device *primary_charger; -#endif -#endif -#include - -struct device_node *usb_node; -static int iddig_eint_num; -static ktime_t ktime_start, ktime_end; - -static struct musb_fifo_cfg fifo_cfg_host[] = { -{ .hw_ep_num = 1, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 1, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_RX, - .maxpacket = 64, .mode = BUF_SINGLE}, -}; - -u32 delay_time = 15; -module_param(delay_time, int, 0644); -u32 delay_time1 = 55; -module_param(delay_time1, int, 0644); -u32 iddig_cnt; -module_param(iddig_cnt, int, 0644); - -static bool vbus_on; -module_param(vbus_on, bool, 0644); -static int vbus_control; -module_param(vbus_control, int, 0644); - -#ifdef CONFIG_MTK_MUSB_PHY -void set_usb_phy_mode(int mode) -{ - switch (mode) { - case PHY_MODE_USB_DEVICE: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ - USBPHY_CLR32(0x6C, (0x10<<0)); - USBPHY_SET32(0x6C, (0x2F<<0)); - USBPHY_SET32(0x6C, (0x3F<<8)); - break; - case PHY_MODE_USB_HOST: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ - USBPHY_CLR32(0x6c, (0x12<<0)); - USBPHY_SET32(0x6c, (0x2d<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - case PHY_MODE_INVALID: - /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ - USBPHY_SET32(0x6c, (0x11<<0)); - USBPHY_CLR32(0x6c, (0x2e<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - default: - DBG(0, "mode error %d\n", mode); - } - DBG(0, "force PHY to mode %d, 0x6c=%x\n", mode, USBPHY_READ32(0x6c)); -} -#endif - -static void _set_vbus(int is_on) -{ -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 - if (!primary_charger) { - DBG(0, "vbus_init<%d>\n", vbus_on); - - primary_charger = get_charger_by_name("primary_chg"); - if (!primary_charger) { - DBG(0, "get primary charger device failed\n"); - return; - } - } -#endif -#endif - - DBG(0, "op<%d>, status<%d>\n", is_on, vbus_on); - if (is_on && !vbus_on) { - /* update flag 1st then enable VBUS to make - * host mode correct used by PMIC - */ - vbus_on = true; -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 - charger_dev_enable_otg(primary_charger, true); - charger_dev_set_boost_current_limit(primary_charger, 1500000); -#else - set_chr_enable_otg(0x1); - set_chr_boost_current_limit(1500); -#endif -#endif - } else if (!is_on && vbus_on) { - /* disable VBUS 1st then update flag - * to make host mode correct used by PMIC - */ - vbus_on = false; - -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 - charger_dev_enable_otg(primary_charger, false); -#else - set_chr_enable_otg(0x0); -#endif -#endif - } -} - -int mt_usb_get_vbus_status(struct musb *musb) -{ -#if 1 - return true; -#else - int ret = 0; - - if ((musb_readb(musb->mregs, MUSB_DEVCTL) & - MUSB_DEVCTL_VBUS) != MUSB_DEVCTL_VBUS) - ret = 1; - else - DBG(0, "VBUS error, devctl=%x, power=%d\n", - musb_readb(musb->mregs, MUSB_DEVCTL), - musb->power); - pr_debug("vbus ready = %d\n", ret); - return ret; -#endif -} - -#if defined(CONFIG_USBIF_COMPLIANCE) -u32 sw_deboun_time = 1; -#else -u32 sw_deboun_time = 400; -#endif -module_param(sw_deboun_time, int, 0644); - -u32 typec_control; -module_param(typec_control, int, 0644); -static bool typec_req_host; -static bool iddig_req_host; - -static void do_host_work(struct work_struct *data); -static void issue_host_work(int ops, int delay, bool on_st) -{ - struct mt_usb_work *work; - - if (!mtk_musb) { - DBG(0, "mtk_musb = NULL\n"); - return; - } - - /* create and prepare worker */ - work = kzalloc(sizeof(struct mt_usb_work), GFP_ATOMIC); - if (!work) { - DBG(0, "work is NULL, directly return\n"); - return; - } - work->ops = ops; - INIT_DELAYED_WORK(&work->dwork, do_host_work); - - /* issue connection work */ - DBG(0, "issue work, ops<%d>, delay<%d>, on_st<%d>\n", - ops, delay, on_st); - - if (on_st) - queue_delayed_work(mtk_musb->st_wq, - &work->dwork, msecs_to_jiffies(delay)); - else - schedule_delayed_work(&work->dwork, - msecs_to_jiffies(delay)); -} -void mt_usb_host_connect(int delay) -{ - typec_req_host = true; - DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); - issue_host_work(CONNECTION_OPS_CONN, delay, true); -} -void mt_usb_host_disconnect(int delay) -{ - typec_req_host = false; - DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); - issue_host_work(CONNECTION_OPS_DISC, delay, true); -} -EXPORT_SYMBOL(mt_usb_host_disconnect); - -static bool musb_is_host(void) -{ - bool host_mode = 0; - - if (typec_control) - host_mode = typec_req_host; - else - host_mode = iddig_req_host; - - return host_mode; -} - -void musb_session_restart(struct musb *musb) -{ - void __iomem *mbase = musb->mregs; - - musb_writeb(mbase, MUSB_DEVCTL, - (musb_readb(mbase, - MUSB_DEVCTL) & (~MUSB_DEVCTL_SESSION))); -#ifdef CONFIG_MTK_MUSB_PHY - DBG(0, "[MUSB] stopped session for VBUSERROR interrupt\n"); - USBPHY_SET32(0x6c, (0x3c<<8)); - USBPHY_SET32(0x6c, (0x10<<0)); - USBPHY_CLR32(0x6c, (0x2c<<0)); - DBG(0, "[MUSB] force PHY to idle, 0x6c=%x\n", USBPHY_READ32(0x6c)); - mdelay(5); - USBPHY_CLR32(0x6c, (0x3c<<8)); - USBPHY_CLR32(0x6c, (0x3c<<0)); - DBG(0, "[MUSB] let PHY resample VBUS, 0x6c=%x\n" - , USBPHY_READ32(0x6c)); -#endif - musb_writeb(mbase, MUSB_DEVCTL, - (musb_readb(mbase, - MUSB_DEVCTL) | MUSB_DEVCTL_SESSION)); - DBG(0, "[MUSB] restart session\n"); -} -EXPORT_SYMBOL(musb_session_restart); - -static struct delayed_work host_plug_test_work; -int host_plug_test_enable; /* default disable */ -module_param(host_plug_test_enable, int, 0644); -int host_plug_in_test_period_ms = 5000; -module_param(host_plug_in_test_period_ms, int, 0644); -int host_plug_out_test_period_ms = 5000; -module_param(host_plug_out_test_period_ms, int, 0644); -int host_test_vbus_off_time_us = 3000; -module_param(host_test_vbus_off_time_us, int, 0644); -int host_test_vbus_only = 1; -module_param(host_test_vbus_only, int, 0644); -static int host_plug_test_triggered; -void switch_int_to_device(struct musb *musb) -{ - irq_set_irq_type(iddig_eint_num, IRQF_TRIGGER_HIGH); - enable_irq(iddig_eint_num); - DBG(0, "%s is done\n", __func__); -} - -void switch_int_to_host(struct musb *musb) -{ - irq_set_irq_type(iddig_eint_num, IRQF_TRIGGER_LOW); - enable_irq(iddig_eint_num); - DBG(0, "%s is done\n", __func__); -} - -static void do_host_plug_test_work(struct work_struct *data) -{ - static ktime_t ktime_begin, ktime_end; - static s64 diff_time; - static int host_on; - static struct wakeup_source *host_test_wakelock; - static int wake_lock_inited; - - if (!wake_lock_inited) { - DBG(0, "wake_lock_init\n"); - host_test_wakelock = wakeup_source_register(NULL, - "host.test.lock"); - wake_lock_inited = 1; - } - - host_plug_test_triggered = 1; - /* sync global status */ - mb(); - __pm_stay_awake(host_test_wakelock); - DBG(0, "BEGIN"); - ktime_begin = ktime_get(); - - host_on = 1; - while (1) { - if (!musb_is_host() && host_on) { - DBG(0, "about to exit"); - break; - } - msleep(50); - - ktime_end = ktime_get(); - diff_time = ktime_to_ms(ktime_sub(ktime_end, ktime_begin)); - if (host_on && diff_time >= host_plug_in_test_period_ms) { - host_on = 0; - DBG(0, "OFF\n"); - - ktime_begin = ktime_get(); - - /* simulate plug out */ - _set_vbus(0); - udelay(host_test_vbus_off_time_us); - - if (!host_test_vbus_only) - issue_host_work(CONNECTION_OPS_DISC, 0, false); - } else if (!host_on && diff_time >= - host_plug_out_test_period_ms) { - host_on = 1; - DBG(0, "ON\n"); - - ktime_begin = ktime_get(); - if (!host_test_vbus_only) - issue_host_work(CONNECTION_OPS_CONN, 0, false); - - _set_vbus(1); - msleep(100); - - } - } - - /* wait host_work done */ - msleep(1000); - host_plug_test_triggered = 0; - __pm_relax(host_test_wakelock); - DBG(0, "END\n"); -} - -#define ID_PIN_WORK_RECHECK_TIME 30 /* 30 ms */ -#define ID_PIN_WORK_BLOCK_TIMEOUT 30000 /* 30000 ms */ -static void do_host_work(struct work_struct *data) -{ - u8 devctl = 0; - unsigned long flags; - static int inited, timeout; /* default to 0 */ - static s64 diff_time; - bool host_on; - int usb_clk_state = NO_CHANGE; - struct mt_usb_work *work = - container_of(data, struct mt_usb_work, dwork.work); - struct mt_usb_glue *glue = mtk_musb->glue; - - /* - * kernel_init_done should be set in - * early-init stage through init.$platform.usb.rc - */ - while (!inited && !kernel_init_done && - !mtk_musb->is_ready && !timeout) { - ktime_end = ktime_get(); - diff_time = ktime_to_ms(ktime_sub(ktime_end, ktime_start)); - - DBG_LIMIT(3, - "init_done:%d, is_ready:%d, inited:%d, TO:%d, diff:%lld", - kernel_init_done, - mtk_musb->is_ready, - inited, - timeout, - diff_time); - - if (diff_time > ID_PIN_WORK_BLOCK_TIMEOUT) { - DBG(0, "diff_time:%lld\n", diff_time); - timeout = 1; - } - msleep(ID_PIN_WORK_RECHECK_TIME); - } - - if (!inited) { - DBG(0, "PASS,init_done:%d,is_ready:%d,inited:%d, TO:%d\n", - kernel_init_done, mtk_musb->is_ready, - inited, timeout); - inited = 1; - } - - /* always prepare clock and check if need to unprepater later */ - /* clk_prepare_cnt +1 here */ - usb_prepare_clock(true); - - down(&mtk_musb->musb_lock); - - host_on = (work->ops == - CONNECTION_OPS_CONN ? true : false); - - DBG(0, "work start, is_host=%d, host_on=%d\n", - mtk_musb->is_host, host_on); - - if (host_on && !mtk_musb->is_host) { - /* switch to HOST state before turn on VBUS */ - MUSB_HST_MODE(mtk_musb); - - /* to make sure all event clear */ - msleep(32); -#ifdef CONFIG_MTK_UAC_POWER_SAVING - if (!usb_on_sram) { - int ret; - - ret = gpd_switch_to_sram(mtk_musb->controller); - DBG(0, "gpd_switch_to_sram, ret<%d>\n", ret); - if (ret == 0) - usb_on_sram = 1; - } -#endif - /* setup fifo for host mode */ - ep_config_from_table_for_host(mtk_musb); - - if (!mtk_musb->host_suspend) - __pm_stay_awake(mtk_musb->usb_lock); - - - /* this make PHY operation workable */ - musb_platform_enable(mtk_musb); - - /* for no VBUS sensing IP*/ - /* wait VBUS ready */ - msleep(100); - /* clear session*/ - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, (devctl&(~MUSB_DEVCTL_SESSION))); - phy_set_mode(glue->phy, PHY_MODE_INVALID); - /* wait */ - mdelay(5); - /* restart session */ - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, (devctl | MUSB_DEVCTL_SESSION)); - phy_set_mode(glue->phy, PHY_MODE_USB_HOST); - - musb_start(mtk_musb); - if (!typec_control && !host_plug_test_triggered) - switch_int_to_device(mtk_musb); - - if (host_plug_test_enable && !host_plug_test_triggered) - queue_delayed_work(mtk_musb->st_wq, - &host_plug_test_work, 0); - usb_clk_state = OFF_TO_ON; - } else if (!host_on && mtk_musb->is_host) { - /* switch from host -> device */ - /* for device no disconnect interrupt */ - spin_lock_irqsave(&mtk_musb->lock, flags); - if (mtk_musb->is_active) { - DBG(0, "for not receiving disconnect interrupt\n"); - usb_hcd_resume_root_hub(musb_to_hcd(mtk_musb)); - musb_root_disconnect(mtk_musb); - } - spin_unlock_irqrestore(&mtk_musb->lock, flags); - - DBG(1, "devctl is %x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - if (mtk_musb->usb_lock->active) - __pm_relax(mtk_musb->usb_lock); - - /* for no VBUS sensing IP */ - phy_set_mode(glue->phy, PHY_MODE_INVALID); - - musb_stop(mtk_musb); - - if (!typec_control && !host_plug_test_triggered) - switch_int_to_host(mtk_musb); - -#ifdef CONFIG_MTK_UAC_POWER_SAVING - if (usb_on_sram) { - gpd_switch_to_dram(mtk_musb->controller); - usb_on_sram = 0; - } -#endif - /* to make sure all event clear */ - msleep(32); - - mtk_musb->xceiv->otg->state = OTG_STATE_B_IDLE; - /* switch to DEV state after turn off VBUS */ - MUSB_DEV_MODE(mtk_musb); - - usb_clk_state = ON_TO_OFF; - } - DBG(0, "work end, is_host=%d\n", mtk_musb->is_host); - up(&mtk_musb->musb_lock); - - if (usb_clk_state == ON_TO_OFF) { - /* clock on -> of: clk_prepare_cnt -2 */ - usb_prepare_clock(false); - usb_prepare_clock(false); - } else if (usb_clk_state == NO_CHANGE) { - /* clock no change : clk_prepare_cnt -1 */ - usb_prepare_clock(false); - } - /* free mt_usb_work */ - kfree(work); -} - -static irqreturn_t mt_usb_ext_iddig_int(int irq, void *dev_id) -{ - iddig_cnt++; - - iddig_req_host = !iddig_req_host; - DBG(0, "id pin assert, %s\n", iddig_req_host ? - "connect" : "disconnect"); - - if (iddig_req_host) - mt_usb_host_connect(0); - else - mt_usb_host_disconnect(0); - disable_irq_nosync(iddig_eint_num); - return IRQ_HANDLED; -} - -static const struct of_device_id otg_iddig_of_match[] = { - {.compatible = "mediatek,usb_iddig_bi_eint"}, - {}, -}; - -static int otg_iddig_probe(struct platform_device *pdev) -{ - int ret; - struct device *dev = &pdev->dev; - struct device_node *node = dev->of_node; - - iddig_eint_num = irq_of_parse_and_map(node, 0); - DBG(0, "iddig_eint_num<%d>\n", iddig_eint_num); - if (iddig_eint_num < 0) - return -ENODEV; - - ret = request_irq(iddig_eint_num, mt_usb_ext_iddig_int, - IRQF_TRIGGER_LOW, "USB_IDDIG", NULL); - if (ret) { - DBG(0, - "request EINT <%d> fail, ret<%d>\n", - iddig_eint_num, ret); - return ret; - } - - return 0; -} - -static struct platform_driver otg_iddig_driver = { - .probe = otg_iddig_probe, - /* .remove = otg_iddig_remove, */ - /* .shutdown = otg_iddig_shutdown, */ - .driver = { - .name = "otg_iddig", - .owner = THIS_MODULE, - .of_match_table = of_match_ptr(otg_iddig_of_match), - }, -}; - - -static int iddig_int_init(void) -{ - int ret = 0; - - ret = platform_driver_register(&otg_iddig_driver); - if (ret) - DBG(0, "ret:%d\n", ret); - - return 0; -} - -void mt_usb_otg_init(struct musb *musb) -{ - - /* test */ - INIT_DELAYED_WORK(&host_plug_test_work, do_host_plug_test_work); - ktime_start = ktime_get(); - - /* CONNECTION MANAGEMENT*/ -#ifdef CONFIG_MTK_USB_TYPEC - DBG(0, "host controlled by TYPEC\n"); - typec_control = 1; -#ifdef CONFIG_TCPC_CLASS - DBG(0, "host controlled by IDDIG\n"); - iddig_int_init(); - vbus_control = 1; -#endif /* CONFIG_TCPC_CLASS */ -#endif /* CONFIG_MTK_USB_TYPEC */ - - /* EP table */ - musb->fifo_cfg_host = fifo_cfg_host; - musb->fifo_cfg_host_size = ARRAY_SIZE(fifo_cfg_host); - -} -EXPORT_SYMBOL(mt_usb_otg_init); -void mt_usb_otg_exit(struct musb *musb) -{ - DBG(0, "OTG disable vbus\n"); -} -EXPORT_SYMBOL(mt_usb_otg_exit); - -enum { - DO_IT = 0, - REVERT, -}; - -#ifdef CONFIG_MTK_MUSB_PHY -static void bypass_disc_circuit(int act) -{ - u32 val; - - usb_prepare_enable_clock(true); - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - /* 0x18, 13-12 RG_USB20_HSRX_MMODE_SELE, dft:00 */ - if (act == DO_IT) { - USBPHY_CLR32(0x18, (0x10<<8)); - USBPHY_SET32(0x18, (0x20<<8)); - } else { - USBPHY_CLR32(0x18, (0x10<<8)); - USBPHY_CLR32(0x18, (0x20<<8)); - } - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - usb_prepare_enable_clock(false); -} - -static void disc_threshold_to_max(int act) -{ - u32 val; - - usb_prepare_enable_clock(true); - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - /* 0x18, 7-4 RG_USB20_DISCTH, dft:1000 */ - if (act == DO_IT) { - USBPHY_SET32(0x18, (0xf0<<0)); - } else { - USBPHY_CLR32(0x18, (0x70<<0)); - USBPHY_SET32(0x18, (0x80<<0)); - } - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - usb_prepare_enable_clock(false); -} -#endif - -static int option; -static int set_option(const char *val, const struct kernel_param *kp) -{ - int local_option; - int rv; - - /* update module parameter */ - rv = param_set_int(val, kp); - if (rv) - return rv; - - /* update local_option */ - rv = kstrtoint(val, 10, &local_option); - if (rv != 0) - return rv; - - DBG(0, "option:%d, local_option:%d\n", option, local_option); - - switch (local_option) { - case 0: - DBG(0, "case %d\n", local_option); - iddig_int_init(); - break; - case 1: - DBG(0, "case %d\n", local_option); - mt_usb_host_connect(0); - break; - case 2: - DBG(0, "case %d\n", local_option); - mt_usb_host_disconnect(0); - break; - case 3: - DBG(0, "case %d\n", local_option); - mt_usb_host_connect(3000); - break; - case 4: - DBG(0, "case %d\n", local_option); - mt_usb_host_disconnect(3000); - break; -#ifdef CONFIG_MTK_MUSB_PHY - case 5: - DBG(0, "case %d\n", local_option); - disc_threshold_to_max(DO_IT); - break; - case 6: - DBG(0, "case %d\n", local_option); - disc_threshold_to_max(REVERT); - break; - case 7: - DBG(0, "case %d\n", local_option); - bypass_disc_circuit(DO_IT); - break; - case 8: - DBG(0, "case %d\n", local_option); - bypass_disc_circuit(REVERT); - break; -#endif - case 9: - DBG(0, "case %d\n", local_option); - _set_vbus(1); - break; - case 10: - DBG(0, "case %d\n", local_option); - _set_vbus(0); - break; - default: - break; - } - return 0; -} -static struct kernel_param_ops option_param_ops = { - .set = set_option, - .get = param_get_int, -}; -module_param_cb(option, &option_param_ops, &option, 0644); -#else -#include "musb_core.h" -/* for not define CONFIG_USB_MTK_OTG */ -void mt_usb_otg_init(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_init); -void mt_usb_otg_exit(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_exit); -void mt_usb_set_vbus(struct musb *musb, int is_on) {} -int mt_usb_get_vbus_status(struct musb *musb) {return 1; } -void switch_int_to_device(struct musb *musb) {} -void switch_int_to_host(struct musb *musb) {} -void musb_session_restart(struct musb *musb) {} -EXPORT_SYMBOL(musb_session_restart); -#endif diff --git a/drivers/misc/mediatek/usb20/mt6781/usb20_otg_if.c b/drivers/misc/mediatek/usb20/mt6781/usb20_otg_if.c deleted file mode 100644 index 83931de26f4f..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/usb20_otg_if.c +++ /dev/null @@ -1,1498 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "musb_core.h" -#ifdef CONFIG_OF -#include -#endif -#define DRIVER_AUTHOR "Mediatek" -#define DRIVER_DESC "driver for OTG USB-IF test" -#define MUSB_OTG_CSR0 0x102 -#define MUSB_OTG_COUNT0 0x108 - -#define TEST_DRIVER_NAME "mt_otg_test" - -#define DX_DBG - -#define TEST_IS_STOP 0xfff1 -#define DEV_NOT_CONNECT 0xfff2 -#define DEV_HNP_TIMEOUT 0xfff3 -#define DEV_NOT_RESET 0xfff4 - -MODULE_AUTHOR(DRIVER_AUTHOR); -MODULE_LICENSE("GPL"); - - -/*for USB-IF OTG test*/ -/* - * when this func is called in EM, it will reset the USB hw. - * and tester should not connet the uut to PC or connect a A-cable to it - * macro for USB-IF for OTG driver - */ -#define OTG_CMD_E_ENABLE_VBUS 0x00 -#define OTG_CMD_E_ENABLE_SRP 0x01 -#define OTG_CMD_E_START_DET_SRP 0x02 -#define OTG_CMD_E_START_DET_VBUS 0x03 -#define OTG_CMD_P_A_UUT 0x04 -#define OTG_CMD_P_B_UUT 0x05 -#define HOST_CMD_TEST_SE0_NAK 0x6 -#define HOST_CMD_TEST_J 0x7 -#define HOST_CMD_TEST_K 0x8 -#define HOST_CMD_TEST_PACKET 0x9 -#define HOST_CMD_SUSPEND_RESUME 0xa -#define HOST_CMD_GET_DESCRIPTOR 0xb -#define HOST_CMD_SET_FEATURE 0xc -#define OTG_CMD_P_B_UUT_TD59 0xd -#define HOST_CMD_ENV_INIT 0xe -#define HOST_CMD_ENV_EXIT 0xf - -#define OTG_MSG_DEV_NOT_SUPPORT 0x01 -#define OTG_MSG_DEV_NOT_RESPONSE 0x02 -#define OTG_MSG_HUB_NOT_SUPPORT 0x03 - -#define OTG_STOP_CMD 0x10 -#define OTG_INIT_MSG 0x20 - -struct otg_message { - spinlock_t lock; - unsigned int msg; -}; - -static struct otg_message g_otg_message; -static atomic_t g_exec; - -unsigned long usb_l1intm_store; -unsigned short usb_intrrxe_store; -unsigned short usb_intrtxe_store; -unsigned char usb_intrusbe_store; -unsigned long pericfg_base; -bool device_enumed; -bool set_hnp; -bool high_speed; -bool is_td_59; - -struct completion stop_event; - -void musb_otg_reset_usb(void) -{ - /* reset all of the USB IP, including PHY and MAC */ - unsigned int usb_reset; - - usb_reset = __raw_readl((void __iomem *)pericfg_base); - usb_reset |= 1 << 29; - __raw_writel(usb_reset, (void __iomem *)pericfg_base); - mdelay(10); - usb_reset &= ~(1 << 29); - __raw_writel(usb_reset, (void __iomem *)pericfg_base); - /* power on the USB */ - usb_phy_poweron(); - /* enable interrupt */ - musb_writel(mtk_musb->mregs, USB_L1INTM, 0x105); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 1); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0xf7); -} - -int musb_otg_env_init(void) -{ - u8 power; - /* u8 intrusb; */ - /* step1: mask the PMU/PMIC EINT */ - mtk_musb->usb_if = true; - /* workaround for PMIC charger detection */ - mtk_musb->is_host = true; - /* mt65xx_eint_mask(EINT_CHR_DET_NUM); */ - - pmic_chrdet_int_en(0); - - mt_usb_init_drvvbus(); - - /* step5: make sure to power on the USB module */ - if (mtk_musb->power) - mtk_musb->power = FALSE; - - musb_platform_enable(mtk_musb); - /* step6: clear session bit */ - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - /* step7: disable and enable usb interrupt */ - usb_l1intm_store = musb_readl(mtk_musb->mregs, USB_L1INTM); - usb_intrrxe_store = musb_readw(mtk_musb->mregs, MUSB_INTRRXE); - usb_intrtxe_store = musb_readw(mtk_musb->mregs, MUSB_INTRTXE); - usb_intrusbe_store = musb_readb(mtk_musb->mregs, MUSB_INTRUSBE); - - musb_writel(mtk_musb->mregs, USB_L1INTM, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 0); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - free_irq(mtk_musb->nIrq, mtk_musb); - musb_writel(mtk_musb->mregs, USB_L1INTM, 0x105); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 1); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0xf7); - /* setp8: set the index to 0 for ep0, maybe no need. - * Designers said it is better not to use the index register. - */ - musb_writeb(mtk_musb->mregs, MUSB_INDEX, 0); - /* setp9: init message */ - g_otg_message.msg = 0; - spin_lock_init(&g_otg_message.lock); - - init_completion(&stop_event); -#ifdef DX_DBG - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - DBG(0, "start the USB-IF test in EM,power=0x%x!\n", power); -#endif - - return 0; -} - -int musb_otg_env_exit(void) -{ - DBG(0, "stop the USB-IF test in EM!\n"); - musb_writel(mtk_musb->mregs, USB_L1INTM, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 0); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - musb_writel(mtk_musb->mregs, USB_L1INTM, usb_l1intm_store); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, usb_intrrxe_store); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, usb_intrtxe_store); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, usb_intrusbe_store); - mtk_musb->usb_if = false; - mtk_musb->is_host = false; - pmic_chrdet_int_en(1); - return 0; -} - -void musb_otg_write_fifo(u16 len, u8 *buf) -{ - int i; - - DBG(0, "%s,len=%d\n", __func__, len); - for (i = 0; i < len; i++) - musb_writeb(mtk_musb->mregs, 0x20, *(buf + i)); -} - -void musb_otg_read_fifo(u16 len, u8 *buf) -{ - int i; - - DBG(0, "%s,len=%d\n", __func__, len); - for (i = 0; i < len; i++) - *(buf + i) = musb_readb(mtk_musb->mregs, 0x20); -} - -unsigned int musb_polling_ep0_interrupt(void) -{ - unsigned short intrtx; - - DBG(0, "polling ep0 interrupt\n"); - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - if (intrtx & 0x1) { /* ep0 interrupt happen */ - DBG(0, "get ep0 interrupt,csr0=0x%x\n", - musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0)); - break; - } - DBG(0, "polling ep0 interrupt,csr0=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_OTG_CSR0)); - wait_for_completion_timeout(&stop_event, 1); - if (atomic_read(&g_exec) == 0) - return TEST_IS_STOP; - } while (atomic_read(&g_exec) == 1); - return 0; -} - -void musb_h_setup(struct usb_ctrlrequest *setup) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - musb_otg_write_fifo(sizeof(struct usb_ctrlrequest), (u8 *) setup); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "%s,csr0=0x%x\n", __func__, csr0); - csr0 |= MUSB_CSR0_H_SETUPPKT | MUSB_CSR0_TXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - /* polling the Tx interrupt */ - if (musb_polling_ep0_interrupt()) - return; - DBG(0, "%s--\n", __func__); -} - -void musb_h_in_data(unsigned char *buf, u16 len) -{ - /* will receive all of the data in this transfer. */ - unsigned short csr0; - u16 received = 0; - bool bshort = false; - - DBG(0, "%s++\n", __func__); - while ((received < len) && (!bshort)) { - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_REQPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); - if (csr0 & MUSB_CSR0_RXPKTRDY) { - /* get the data from ep fifo */ - u8 count = musb_readb(mtk_musb->mregs, MUSB_OTG_COUNT0); - - if (count < 64) - bshort = true; - - if (received + count > len) { - DBG(0, "Data is too large\n"); - - /* read FIFO until data end (maximum size of len) */ - musb_otg_read_fifo(len - received, buf); - } else { - musb_otg_read_fifo(count, buf + received); - } - - received += count; - csr0 &= ~MUSB_CSR0_RXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - } else - DBG(0, "error, not receive the rxpktrdy interrupt!\n"); - DBG(0, "%s--\n", __func__); - } -} - -void musb_h_in_status(void) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_REQPKT | MUSB_CSR0_H_STATUSPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); - - if (csr0 & MUSB_CSR0_RXPKTRDY) { - csr0 &= ~MUSB_CSR0_RXPKTRDY; - /* whether this bit will be cleared auto, - * need to clear by sw?? - */ - if (csr0 & MUSB_CSR0_H_STATUSPKT) - csr0 &= ~MUSB_CSR0_H_STATUSPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - } else if (csr0 & MUSB_CSR0_H_RXSTALL) { - DBG(0, "stall!\n"); - if (set_hnp) { - DBG(0, "will pop up:DEV_NOT_RESPONSE!\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - set_hnp = false; - msleep(1000); - } - } - DBG(0, "%s--\n", __func__); -} - -void musb_h_out_status(void) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_STATUSPKT | MUSB_CSR0_TXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; -#ifdef DX_DBG - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); -#endif - DBG(0, "%s--\n", __func__); -} - -void musb_d_reset(void) -{ - unsigned short swrst; - - swrst = musb_readw(mtk_musb->mregs, 0x74); - swrst |= 0x2; - musb_writew(mtk_musb->mregs, 0x74, swrst); -} - -void musb_d_setup(struct usb_ctrlrequest *setup_packet, u16 len) -{ - musb_otg_read_fifo(len, (u8 *) setup_packet); - DBG(0, - "receive setup packet:0x%x 0x%x 0x%x 0x%x 0x%x\n", - setup_packet->bRequest, - setup_packet->bRequestType, - setup_packet->wIndex, - setup_packet->wValue, - setup_packet->wLength); -} - -void musb_d_out_data(struct usb_ctrlrequest *setup_packet) -{ - unsigned short csr0; - - static struct usb_device_descriptor device_descriptor = { - 0x12, - 0x01, - 0x0200, - 0x00, - 0x00, - 0x00, - 0x40, - 0x0951, - 0x1603, - 0x0200, - 0x01, - 0x02, - 0x03, - 0x01 - }; - static struct usb_config_descriptor configuration_descriptor = { - 0x09, - 0x02, - 0x0023, - 0x01, - 0x01, - 0x00, - 0x80, - 0x32 - }; - static struct usb_interface_descriptor interface_descriptor = { - 0x09, - 0x04, - 0x00, - 0x00, - 0x02, - 0x08, - 0x06, - 0x50, - 0x00 - }; - static struct usb_endpoint_descriptor endpoint_descriptor_in = { - 0x07, - 0x05, - 0x81, - 0x02, - 0x0200, - 0x00 - }; - static struct usb_endpoint_descriptor endpoint_descriptor_out = { - 0x07, - 0x05, - 0x02, - 0x02, - 0x0200, - 0x00 - }; - static struct usb_otg_descriptor usb_otg_descriptor = { - 0x03, - 0x09, - 0x03 - }; - - if (setup_packet->wValue == 0x0100) { - musb_otg_write_fifo(sizeof(struct usb_device_descriptor), - (u8 *) &device_descriptor); - } else if (setup_packet->wValue == 0x0200) { - if (setup_packet->wLength == 9) { - musb_otg_write_fifo( - sizeof(struct usb_config_descriptor), - (u8 *) &configuration_descriptor); - } else { - musb_otg_write_fifo( - sizeof(struct usb_config_descriptor), - (u8 *) &configuration_descriptor); - musb_otg_write_fifo( - sizeof(struct usb_interface_descriptor), - (u8 *) &interface_descriptor); - musb_otg_write_fifo(7, (u8 *) &endpoint_descriptor_in); - musb_otg_write_fifo(7, (u8 *) &endpoint_descriptor_out); - musb_otg_write_fifo(sizeof(struct usb_otg_descriptor), - (u8 *) &usb_otg_descriptor); - } - } - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_TXPKTRDY | MUSB_CSR0_P_DATAEND; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; -} - -unsigned int musb_polling_bus_interrupt(unsigned int intr) -{ - unsigned char intrusb; - unsigned long timeout; - - if (intr == MUSB_INTR_CONNECT) - timeout = jiffies + 15 * HZ; - if (intr == (MUSB_INTR_CONNECT | MUSB_INTR_RESUME)) - timeout = jiffies + 1; - if (intr == MUSB_INTR_RESET) - timeout = jiffies + 2 * HZ; - - do { - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrusb & intr) { - DBG(0, - "interrupt happen, intrusb=0x%x, intr=0x%x\n", - intrusb, intr); - break; - } - - /* check the timeout */ - if ((intr == MUSB_INTR_CONNECT) && - time_after(jiffies, timeout)) { - DBG(0, "time out for MUSB_INTR_CONNECT\n"); - return DEV_NOT_CONNECT; - } - if ((intr == (MUSB_INTR_CONNECT | MUSB_INTR_RESUME)) - && time_after(jiffies, timeout)) { - DBG(0, - "time out for MUSB_INTR_CONNECT|MUSB_INTR_RESUME\n"); - return DEV_HNP_TIMEOUT; - } - if ((intr == MUSB_INTR_RESET) && time_after(jiffies, timeout)) { - DBG(0, "time out for MUSB_INTR_RESET\n"); - return DEV_NOT_RESET; - } - /* delay for the interrupt */ - if (intr != MUSB_INTR_RESET) { - wait_for_completion_timeout(&stop_event, 1); - if (atomic_read(&g_exec) == 0) - break; - } - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) { - DBG(0, "TEST_IS_STOP\n"); - return TEST_IS_STOP; - } - if (intrusb & MUSB_INTR_RESUME) { /* for TD.4.8, remote wakeup */ - DBG(0, "MUSB_INTR_RESUME\n"); - return MUSB_INTR_RESUME; - } else { - return intrusb; - } -} - -void musb_h_suspend(void) -{ - unsigned char power; - /* before suspend, should to send SOF for a while (USB-IF plan need) */ - /* mdelay(100); */ - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - DBG(0, "before suspend,power=0x%x\n", power); - if (high_speed) - power = 0x63; - else - power = 0x43; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -void musb_h_remote_wakeup(void) -{ - unsigned char power; - - msleep(25); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power &= ~MUSB_POWER_RESUME; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -bool musb_h_reset(void) -{ - unsigned char power; - - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_RESET | MUSB_POWER_HSENAB; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - msleep(60); - power &= ~MUSB_POWER_RESET; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (power & MUSB_POWER_HSMODE) { - DBG(0, "the device is a hs device!\n"); - high_speed = true; - return true; - } - DBG(0, "the device is a fs device!\n"); - high_speed = false; - return false; -} - -void musb_d_soft_connect(bool connect) -{ - unsigned char power; - - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (connect) - power |= MUSB_POWER_SOFTCONN; - else - power &= ~MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -void musb_otg_set_session(bool set) -{ - unsigned char devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - if (set) - devctl |= MUSB_DEVCTL_SESSION; - else - devctl &= ~MUSB_DEVCTL_SESSION; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); -} - -void musb_h_enumerate(void) -{ - struct usb_ctrlrequest setup_packet; - struct usb_device_descriptor device_descriptor; - struct usb_config_descriptor configuration_descriptor; - struct usb_otg_descriptor *otg_descriptor; - unsigned char descriptor[65535]; - - /* set address */ - musb_writew(mtk_musb->mregs, MUSB_TXFUNCADDR, 0); - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_ADDRESS; - setup_packet.wIndex = 0; - setup_packet.wValue = 1; - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - musb_writew(mtk_musb->mregs, MUSB_TXFUNCADDR, 1); - DBG(0, "set address OK!\n"); - /* get device descriptor */ - setup_packet.bRequestType = USB_DIR_IN | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0100; - setup_packet.wLength = 0x40; - musb_h_setup(&setup_packet); - musb_h_in_data((char *)&device_descriptor, - sizeof(struct usb_device_descriptor)); - musb_h_out_status(); - - if (device_descriptor.idProduct == 0x1234) { - pr_debug("device pid not match!\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_SUPPORT; - /* msleep(1000); */ - } - - DBG(0, - "get device descriptor OK!device class=0x%x PID=0x%x VID=0x%x\n", - device_descriptor.bDeviceClass, device_descriptor.idProduct, - device_descriptor.idVendor); - DBG(0, - "get device descriptor OK!DescriptorType=0x%x DeviceSubClass=0x%x\n", - device_descriptor.bDescriptorType, - device_descriptor.bDeviceSubClass); - /* get configuration descriptor */ - setup_packet.bRequestType = USB_DIR_IN - | USB_TYPE_STANDARD - | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0200; - setup_packet.wLength = 0x9; - musb_h_setup(&setup_packet); - musb_h_in_data((char *)&configuration_descriptor, - sizeof(struct usb_config_descriptor)); - musb_h_out_status(); - DBG(0, "get configuration descriptor OK!\n"); - /* get all configuration descriptor */ - setup_packet.bRequestType = USB_DIR_IN - | USB_TYPE_STANDARD - | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0200; - setup_packet.wLength = configuration_descriptor.wTotalLength; - musb_h_setup(&setup_packet); - - /* - * According to USB specification, - * the maximum length of wTotalLength is 65535 bytes - */ - if (configuration_descriptor.wTotalLength <= sizeof(descriptor)) - musb_h_in_data(descriptor, - configuration_descriptor.wTotalLength); - musb_h_out_status(); - DBG(0, "get all configuration descriptor OK!\n"); - /* get otg descriptor */ - otg_descriptor = - (struct usb_otg_descriptor *) - (descriptor + configuration_descriptor.wTotalLength - 3); - DBG(0, "otg descriptor::bLegth=%d,bDescriptorTye=%d,bmAttr=%d\n", - otg_descriptor->bLength, - otg_descriptor->bDescriptorType, otg_descriptor->bmAttributes); - if (otg_descriptor->bLength == 3 && - otg_descriptor->bDescriptorType == 9) { - - DBG(0, "get an otg descriptor!\n"); - } else { - DBG(0, "not an otg device, will pop Unsupported Device\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_SUPPORT; - msleep(1000); - } - /* set hnp, need before set_configuration */ - set_hnp = true; - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_FEATURE; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x3; /* b_hnp_enable */ - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - DBG(0, "set hnp OK!\n"); - /* set configuration */ - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_CONFIGURATION; - setup_packet.wIndex = 0; - setup_packet.wValue = configuration_descriptor.iConfiguration; - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - DBG(0, "set configuration OK!\n"); -} - -void musb_d_enumerated(void) -{ - unsigned char devctl; - unsigned short csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - - DBG(0, "csr0=0x%x\n", csr0); - if (csr0 & MUSB_CSR0_P_SETUPEND) { - DBG(0, "SETUPEND\n"); - csr0 |= MUSB_CSR0_P_SVDSETUPEND; - musb_writeb(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - csr0 &= ~MUSB_CSR0_P_SVDSETUPEND; - } - if (csr0 & MUSB_CSR0_RXPKTRDY) { - u8 count0; - - count0 = musb_readb(mtk_musb->mregs, MUSB_OTG_COUNT0); - if (count0 == 8) { - struct usb_ctrlrequest setup_packet; - /* get the setup packet */ - musb_d_setup(&setup_packet, count0); - - if (setup_packet.bRequest == - USB_REQ_SET_ADDRESS) { - device_enumed = false; - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) { - DBG(0, - "B-UUT:when set address, do not detect ep0 interrupt\n"); - return; - } - musb_writeb(mtk_musb->mregs, - MUSB_FADDR, - (u8) setup_packet.wValue); - } else if (setup_packet.bRequest == - USB_REQ_GET_DESCRIPTOR) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - /* device --> host */ - musb_d_out_data(&setup_packet); - } else if (setup_packet.bRequest == - USB_REQ_SET_CONFIGURATION) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - device_enumed = true; - /* will set host_req for B-device */ - devctl = musb_readb(mtk_musb->mregs, - MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) { - devctl |= MUSB_DEVCTL_HR; - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, devctl); - } - } else if (setup_packet.bRequest == - USB_REQ_SET_FEATURE) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - } - } - } -} - -void musb_otg_test_return(void) -{ -} - -static int musb_host_test_mode(unsigned char cmd); - -void otg_cmd_a_uut(void) -{ - unsigned long timeout; - unsigned char devctl; - bool timeout_flag = false; - unsigned int ret; - unsigned char power; - unsigned short csr0; - unsigned char intrusb; - unsigned short intrtx; - - /* polling the session req from B-OPT and start a new session */ - device_enumed = false; -TD_4_6: - musb_otg_reset_usb(); - DBG(0, "A-UUT reset success\n"); - timeout = jiffies + 5 * HZ; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - while ((atomic_read(&g_exec) == 1) && (devctl & 0x18)) { - DBG(0, "musb::not below session end!\n"); - msleep(100); - if (time_after(jiffies, timeout)) { - timeout_flag = true; - return TEST_IS_STOP; - } - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - if (timeout_flag) { - timeout_flag = false; - musb_otg_reset_usb(); - BG(0, - "timeout for below session end, after reset usb, devctl=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - } - BG(0, "polling session request,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_SESSREQ); - pBG(0, "polling session request,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - /* session is set and VBUS will be out. */ - musb_otg_set_session(true); -#if 1 - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power &= ~MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -#endif - /* polling the connect interrupt from B-OPT */ - DBG(0, "polling connect interrupt,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT); - DBG(0, "polling connect interrupt,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == DEV_NOT_CONNECT) { - DBG(0, "device is not connected in 15s\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - return TEST_IS_STOP; - } - DBG(0, "musb::connect interrupt is detected!\n"); - /* the test is fail because the reset starts less than100 ms - * from the B-OPT connect. the IF test needs - */ - msleep(100); - /* reset the bus,check whether it is a hs device */ - musb_h_reset(); /* should last for more than 50ms, TD.4.2 */ - musb_h_enumerate(); - /* suspend the bus */ - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "after enum B-OPT,csr0=0x%x\n", csr0); - musb_h_suspend(); - - /* polling the disconnect interrupt from B-OPT, - * and remote wakeup(TD.4.8) - */ - DBG(0, "polling disconnect or remote wakeup,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_DISCONNECT - | MUSB_INTR_RESUME); - DBG(0, "polling disconnect or remote wakeup,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == MUSB_INTR_RESUME) { - /* for TD4.8 */ - musb_h_remote_wakeup(); - /* maybe need to access the B-OPT, get device descriptor */ - if (atomic_read(&g_exec) == 1) - wait_for_completion(&stop_event); - return TEST_IS_STOP; - } - /* polling the reset interrupt from B-OPT */ - if (!(ret & MUSB_INTR_RESET)) { - DBG(0, "polling reset for B-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - DBG(0, "polling reset for B-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == DEV_NOT_RESET) { - if (atomic_read(&g_exec) == 1) - wait_for_completion(&stop_event); - return TEST_IS_STOP; - } - } - - DBG(0, "after receive reset,devctl=0x%x,csr0=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL), - musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0)); - - /* enumerate and polling the suspend interrupt form B-OPT */ - - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrtx || (intrusb & MUSB_INTR_SUSPEND)) { - if (intrtx) { - if (intrtx & 0x1) - musb_d_enumerated(); - } - if (intrusb) { - /* maybe receive disconnect interrupt when the session is end */ - if (intrusb & MUSB_INTR_SUSPEND) { - if (device_enumed) { - /* return form the while loop */ - break; - } - /* TD.4.6 */ - musb_d_soft_connect(false); - goto TD_4_6; - } - } - } else - wait_for_completion_timeout(&stop_event, 1); - /* the enum will be repeated for 5 times */ - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) { - /* return form the switch-case */ - return TEST_IS_STOP; - } - DBG(0, "polling connect form B-OPT,begin\n"); - /* B-OPT will connect again 100ms after A disconnect */ - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT); - DBG(0, "polling connect form B-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - musb_h_reset(); /* should reset bus again, TD.4.7 */ - wait_for_completion(&stop_event); -} - -void otg_cmd_b_uut(void) -{ - unsigned long timeout; - unsigned char devctl; - bool timeout_flag = false; - unsigned int ret; - unsigned char power; - unsigned char intrusb; - unsigned short intrtx; - - musb_otg_reset_usb(); - /* The B-UUT issues an SRP to start a session with the A-OPT */ - musb_otg_set_session(true); - /* 100ms after VBUS begins to decay the A-OPT powers VBUS */ - timeout = jiffies + 5 * HZ; - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - while (((devctl & MUSB_DEVCTL_VBUS) >> MUSB_DEVCTL_VBUS_SHIFT) < 0x3) { - if (time_after(jiffies, timeout)) { - timeout_flag = true; - break; - } - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - if (timeout_flag) { - DBG(0, "B-UUT set vbus timeout\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - timeout_flag = false; - return TEST_IS_STOP; - } - - /* After detecting the VBUS, B-UUT should connect to the A_OPT */ - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_HSENAB; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -/* TD5_5: */ - musb_d_soft_connect(true); - - device_enumed = false; - /* polling the reset single form the A-OPT */ - DBG(0, "polling reset form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - DBG(0, "polling reset form A-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (power & MUSB_POWER_HSMODE) - high_speed = true; - else - high_speed = false; - /* The A-OPT enumerates the B-UUT */ -TD6_13: - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrtx || (intrusb & 0xf7)) { - if (intrtx) { - /* DBG(0,"B-enum,intrtx=0x%x\n",intrtx); */ - if (intrtx & 0x1) - DBG(0, "ep0 interrupt\n"); - musb_d_enumerated(); - } - if (intrusb) { - if (intrusb & 0xf7) - DBG(0, - "B-enum,intrusb=0x%x,power=0x%x\n", - intrusb, - musb_readb(mtk_musb->mregs, - MUSB_POWER)); - if ((device_enumed) && - (intrusb & MUSB_INTR_SUSPEND)) { - DBG(0, - "suspend interrupt is received,power=0x%x,devctl=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_POWER), - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - break; - } - } - } else { - DBG(0, - "power=0x%x,devctl=0x%x,intrtx=0x%x,intrusb=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_POWER), - musb_readb(mtk_musb->mregs, - MUSB_DEVCTL), - musb_readw(mtk_musb->mregs, - MUSB_INTRTX), - musb_readb(mtk_musb->mregs, - MUSB_INTRUSB)); - wait_for_completion_timeout(&stop_event, 1); - } - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) - return TEST_IS_STOP; - DBG(0, "hnp start\n"); - if (intrusb & MUSB_INTR_RESUME) - goto TD6_13; - if (!(intrusb & MUSB_INTR_CONNECT)) { - /* polling the connect from A-OPT, the UUT acts as host */ - DBG(0, "polling connect or resume form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT - | MUSB_INTR_RESUME); - DBG(0, "polling connect or resume form A-OPT,done,ret=0x%x\n", - ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == MUSB_INTR_RESUME) - goto TD6_13; - if (ret == DEV_HNP_TIMEOUT) { - DBG(0, "B-UUT HNP timeout\n"); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - devctl &= ~MUSB_DEVCTL_HR; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); - if (is_td_59) - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - return TEST_IS_STOP; - } - } - /* reset the bus and check whether it is a hs device */ - musb_h_reset(); - musb_h_enumerate(); - /* suspend the bus */ - musb_h_suspend(); - /* polling the disconnect interrupt from A-OPT */ - DBG(0, "polling disconnect form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_DISCONNECT); - DBG(0, "polling disconnect form A-OPT,done,ret=0x%x\n", ret); - - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - DBG(0, "A-OPT is disconnected, UUT will be back to device\n"); - if (!(ret & MUSB_INTR_RESET)) { - musb_d_soft_connect(true); - /* polling the reset single form the A-OPT */ - DBG(0, "polling reset form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - /* musb_d_reset (); */ - DBG(0, "polling reset form A-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - } - device_enumed = false; - if (atomic_read(&g_exec) == 1) - goto TD6_13; /* TD5_5 */ - wait_for_completion(&stop_event); -} - -int musb_otg_exec_cmd(unsigned int cmd) -{ - - unsigned char devctl; - unsigned char intrusb; - unsigned char power; - unsigned short csr0; - unsigned int usb_l1intp; - unsigned int usb_l1ints; - - if (!mtk_musb) { - DBG(0, "mtk_musb is NULL,error!\n"); - return false; - } - - switch (cmd) { - case HOST_CMD_ENV_INIT: - musb_otg_env_init(); - return 0; - case HOST_CMD_ENV_EXIT: - musb_otg_env_exit(); - return 0; - } - - /* init */ - musb_writeb(mtk_musb->mregs, MUSB_POWER, 0x21); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - msleep(300); - -#ifdef DX_DBG - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - DBG(0, "1:cmd=%d,devctl=0x%x,power=0x%x,intrusb=0x%x\n", - cmd, devctl, power, intrusb); -#endif - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - mdelay(10); -#ifdef DX_DBG - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - DBG(0, "2:cmd=%d,devctl=0x%x,power=0x%x,intrusb=0x%x\n", - cmd, devctl, power, intrusb); -#endif - high_speed = false; - atomic_set(&g_exec, 1); - - DBG(0, "before exec:cmd=%d\n", cmd); - - switch (cmd) { - /* electrical */ - case OTG_CMD_E_ENABLE_VBUS: - DBG(0, "musb::enable VBUS!\n"); - musb_otg_set_session(true); - musb_platform_set_vbus(mtk_musb, 1); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_otg_set_session(false); - musb_platform_set_vbus(mtk_musb, 0); - break; - case OTG_CMD_E_ENABLE_SRP: /* need to clear session? */ - DBG(0, "musb::enable srp!\n"); - musb_otg_reset_usb(); - { - u32 val = 0; - - val = USBPHY_READ32(0x6c); - val = (val & ~(0xff<<0)) | (0x1<<0); - USBPHY_WRITE32(0x6c, val); - - val = USBPHY_READ32(0x6c); - val = (val & ~(0xff<<8)) | (0x1<<8); - USBPHY_WRITE32(0x6c, val); - } - musb_writeb(mtk_musb->mregs, 0x7B, 1); - musb_otg_set_session(true); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_otg_set_session(false); - break; - case OTG_CMD_E_START_DET_SRP: - /* need as a A-device */ - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - while ((atomic_read(&g_exec) == 1) && (devctl & 0x18)) { - DBG(0, "musb::not below session end!\n"); - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - while ((atomic_read(&g_exec) == 1) && (!(devctl & 0x10))) { - DBG(0, "musb::not above session end!\n"); - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - devctl |= MUSB_DEVCTL_SESSION; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - break; - case OTG_CMD_E_START_DET_VBUS: - usb_l1intp = musb_readl(mtk_musb->mregs, USB_L1INTP); - usb_l1intp &= ~(1 << 10); - musb_writel(mtk_musb->mregs, USB_L1INTP, usb_l1intp); - usb_l1ints = musb_readl(mtk_musb->mregs, USB_L1INTS); - while ((usb_l1ints & (1 << 8)) == 0) { - DBG(0, "musb::vbus is 0!\n"); - msleep(100); - usb_l1ints = musb_readl(mtk_musb->mregs, USB_L1INTS); - } - DBG(0, "musb::vbus is detected!\n"); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_writeb(mtk_musb->mregs, MUSB_POWER, 0x21); - break; - - case OTG_CMD_P_B_UUT_TD59: - is_td_59 = true; - if (is_td_59) - DBG(0, "TD5.9 will be tested!\n"); - break; - - /* protocal */ - case OTG_CMD_P_A_UUT: - DBG(0, "A-UUT starts...\n"); - otg_cmd_a_uut(); - DBG(0, "the test as A-UUT is done\n"); - break; - - case OTG_CMD_P_B_UUT: - DBG(0, "B-UUT starts...\n"); - otg_cmd_b_uut(); - DBG(0, "the test as B_UUT is done\n"); - break; - - case HOST_CMD_TEST_SE0_NAK: - case HOST_CMD_TEST_J: - case HOST_CMD_TEST_K: - case HOST_CMD_TEST_PACKET: - case HOST_CMD_SUSPEND_RESUME: - case HOST_CMD_GET_DESCRIPTOR: - case HOST_CMD_SET_FEATURE: - musb_host_test_mode(cmd); - while (atomic_read(&g_exec) == 1) - msleep(100); - break; - } - DBG(0, "%s--\n", __func__); - return 0; - -} - -void musb_otg_stop_cmd(void) -{ - DBG(0, "%s++\n", __func__); - atomic_set(&g_exec, 0); - is_td_59 = false; - complete(&stop_event); -} - -unsigned int musb_otg_message(void) -{ - /* for EM to pop the message */ - unsigned int msg; - - msg = g_otg_message.msg; - g_otg_message.msg = 0; - return msg; -} - -void musb_otg_message_cb(void) -{ - /* when the OK button is clicked on EM, this func is called. */ - spin_lock(&g_otg_message.lock); - g_otg_message.msg = 0; - spin_unlock(&g_otg_message.lock); -} - -static int musb_otg_test_open(struct inode *inode, struct file *file) -{ - DBG(0, "%s++\n", __func__); - return 0; -} - -static int musb_otg_test_release(struct inode *inode, struct file *file) -{ - return 0; -} - -ssize_t musb_otg_test_read(struct file *filp, - char __user *buf, size_t count, loff_t *ppos) -{ - int ret = 0; - unsigned int message = musb_otg_message(); - - if (message) - DBG(0, "%s:message=0x%x\n", __func__, message); - if (put_user((unsigned int)message, (unsigned int *)buf)) - ret = -EFAULT; - return ret; -} - -ssize_t musb_otg_test_write(struct file *filp, - const char __user *buf, size_t count, - loff_t *ppos) -{ - int ret = 0; - unsigned char value; - - if (get_user(value, (unsigned char *)buf)) - ret = -EFAULT; - else { - if (value == OTG_STOP_CMD) { - DBG(0, "%s::OTG_STOP_CMD\n", __func__); - musb_otg_stop_cmd(); - } else if (value == OTG_INIT_MSG) { - DBG(0, "%s::OTG_INIT_MSG\n", __func__); - musb_otg_message_cb(); - } else { - DBG(0, "musb_otg_test_write::the - value is invalid,0x%x\n", - value); - ret = -EFAULT; - } - } - return ret; -} - -static long musb_otg_test_ioctl - (struct file *file, unsigned int cmd, unsigned long arg) -{ - int ret = 0; - - DBG(0, "%s :cmd=0x%x\n", __func__, cmd); - ret = musb_otg_exec_cmd(cmd); - return (long)ret; -} - - -static const struct file_operations musb_otg_test_fops = { - .owner = THIS_MODULE, - .open = musb_otg_test_open, - .release = musb_otg_test_release, - .read = musb_otg_test_read, - .write = musb_otg_test_write, - .unlocked_ioctl = musb_otg_test_ioctl, -}; - -static struct miscdevice musb_otg_test_dev = { - .minor = MISC_DYNAMIC_MINOR, - /* .minor = 254, */ - .name = TEST_DRIVER_NAME, - .fops = &musb_otg_test_fops, - .mode = 0666, -}; - - -static const u8 musb_host_test_packet[53] = { - /* implicit SYNC then DATA0 to start */ - - /* JKJKJKJK x9 */ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - /* JJKKJJKK x8 */ - 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, - /* JJJJKKKK x8 */ - 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, - /* JJJJJJJKKKKKKK x8 */ - 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - /* JJJJJJJK x8 */ - 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, - /* JKKKKKKK x10, JK */ - 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e - /* implicit CRC16 then EOP to end */ -}; - -void musb_host_load_testpacket(struct musb *musb) -{ - unsigned short csr0 = musb_readw(musb->mregs, 0x102); - - DBG(0, "csr0=0x%x\n", csr0); - musb->ignore_disconnect = 1; - musb_otg_write_fifo(53, (u8 *) musb_host_test_packet); -} - - -void host_test_mode(struct musb *musb, unsigned int wIndex) -{ - unsigned char temp; - unsigned char power; - struct usb_ctrlrequest setup_packet; - struct usb_device_descriptor device_descriptor; - - setup_packet.bRequestType = USB_DIR_IN | - USB_TYPE_STANDARD | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0100; - setup_packet.wLength = 0x40; - musb_otg_set_session(true); - msleep(200); - pr_debug("devctl = 0x%x\n", musb_readb(musb->mregs, MUSB_DEVCTL)); - switch (wIndex) { - case HOST_CMD_TEST_SE0_NAK: - DBG(0, "TEST_SE0_NAK\n"); - temp = MUSB_TEST_SE0_NAK; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_J: - DBG(0, "TEST_J\n"); - temp = MUSB_TEST_J; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_K: - DBG(0, "TEST_K\n"); - temp = MUSB_TEST_K; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_PACKET: - DBG(0, "TEST_PACKET\n"); - temp = MUSB_TEST_PACKET; - musb_host_load_testpacket(musb); - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - musb_writew(musb->mregs, 0x102, MUSB_CSR0_TXPKTRDY); - break; - - case HOST_CMD_SUSPEND_RESUME: - /* HS_HOST_PORT_SUSPEND_RESUME */ - DBG(0, "HS_HOST_PORT_SUSPEND_RESUME\n"); - msleep(5000); - /* the host must continue sending SOFs for 15s */ - DBG(0, "please begin to trigger suspend!\n"); - msleep(10000); - power = musb_readb(musb->mregs, MUSB_POWER); - power |= MUSB_POWER_SUSPENDM | MUSB_POWER_ENSUSPEND; - musb_writeb(musb->mregs, MUSB_POWER, power); - msleep(5000); - DBG(0, "please begin to trigger resume!\n"); - msleep(10000); - power &= ~MUSB_POWER_SUSPENDM; - power |= MUSB_POWER_RESUME; - musb_writeb(musb->mregs, MUSB_POWER, power); - mdelay(25); - power &= ~MUSB_POWER_RESUME; - musb_writeb(musb->mregs, MUSB_POWER, power); - /* SOF continue */ - musb_h_setup(&setup_packet); - break; - case HOST_CMD_GET_DESCRIPTOR: - /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR setup */ - DBG(0, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR\n"); - /* the host issues SOFs for 15s allowing the test engineer - * to raise the scope trigger just above the SOF voltage level. - */ - msleep(15000); - musb_h_setup(&setup_packet); - break; - case HOST_CMD_SET_FEATURE: - /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR execute */ - DBG(0, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR\n"); - /* get device descriptor */ - musb_h_setup(&setup_packet); - msleep(15000); - musb_h_in_data((char *)&device_descriptor, - sizeof(struct usb_device_descriptor)); - musb_h_out_status(); - break; - default: - break; - - } - /* while(1); */ -} - -static int musb_host_test_mode(unsigned char cmd) -{ - musb_platform_set_vbus(mtk_musb, 1); - musb_otg_reset_usb(); - host_test_mode(mtk_musb, cmd); - return 0; -} - -static int __init musb_otg_test_init(void) -{ -#ifdef CONFIG_OF - struct device_node *np; - - np = of_find_compatible_node(NULL, NULL, "mediatek,PERICFG"); - if (!np) - pr_debug("get PERICFG node fail"); - pericfg_base = (unsigned long)of_iomap(np, 0); -#else - pericfg_base = PERICFG_BASE; -#endif - misc_register(&musb_otg_test_dev); - return 0; -} - -static void __exit musb_otg_test_exit(void) -{ - misc_deregister(&musb_otg_test_dev); -} - - -module_init(musb_otg_test_init); -module_exit(musb_otg_test_exit); diff --git a/drivers/misc/mediatek/usb20/mt6781/usb20_phy.c b/drivers/misc/mediatek/usb20/mt6781/usb20_phy.c deleted file mode 100644 index 155e35ebab23..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/usb20_phy.c +++ /dev/null @@ -1,824 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - - -#ifdef CONFIG_MTK_CLKMGR -#include -#else -#include -#endif -#include -#include -#include -#include -#include -#include -#include "usb20.h" -#include "mtk_devinfo.h" -#include - -#ifdef CONFIG_OF -#include -#endif -#ifdef CONFIG_MTK_AEE_FEATURE -#include -#endif - -#include - -#define FRA (48) -#define PARA (28) - -#ifdef FPGA_PLATFORM -bool usb_enable_clock(bool enable) -{ - return true; -} - -bool usb_prepare_clock(bool enable) -{ - return true; -} - -void usb_prepare_enable_clock(bool enable) -{ -} - -void usb_phy_poweron(void) -{ -} - -void usb_phy_savecurrent(void) -{ -} - -void usb_phy_recover(void) -{ -} - -/* BC1.2 */ -void Charger_Detect_Init(void) -{ -} - -void Charger_Detect_Release(void) -{ -} - -void usb_phy_context_save(void) -{ -} - -void usb_phy_context_restore(void) -{ -} - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool usb_phy_check_in_uart_mode(void) -{ - return false; -} - -void usb_phy_switch_to_uart(void) -{ -} - -void usb_phy_switch_to_usb(void) -{ -} -#endif - -#else -#include -#include -#define VAL_MAX_WIDTH_2 0x3 -#define VAL_MAX_WIDTH_3 0x7 -#define OFFSET_RG_USB20_VRT_VREF_SEL 0x4 -#define SHFT_RG_USB20_VRT_VREF_SEL 12 -#define OFFSET_RG_USB20_TERM_VREF_SEL 0x4 -#define SHFT_RG_USB20_TERM_VREF_SEL 8 -#define OFFSET_RG_USB20_PHY_REV6 0x18 -#define SHFT_RG_USB20_PHY_REV6 30 -void usb_phy_tuning(void) -{ - static bool inited; - static s32 u2_vrt_ref, u2_term_ref, u2_enhance; - struct device_node *of_node; - - if (!inited) { - /* apply default value */ - u2_vrt_ref = -1; - u2_term_ref = -1; - u2_enhance = -1; - - of_node = of_find_compatible_node(NULL, - NULL, "mediatek,phy_tuning"); - if (of_node) { - /* value won't be updated if property not being found */ - of_property_read_u32(of_node, - "u2_vrt_ref", (u32 *) &u2_vrt_ref); - of_property_read_u32(of_node, - "u2_term_ref", (u32 *) &u2_term_ref); - of_property_read_u32(of_node, - "u2_enhance", (u32 *) &u2_enhance); - } - inited = true; - } - - if (u2_vrt_ref != -1) { - if (u2_vrt_ref <= VAL_MAX_WIDTH_3) { - USBPHY_CLR32(OFFSET_RG_USB20_VRT_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_VRT_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_VRT_VREF_SEL, - u2_vrt_ref << SHFT_RG_USB20_VRT_VREF_SEL); - } - } - if (u2_term_ref != -1) { - if (u2_term_ref <= VAL_MAX_WIDTH_3) { - USBPHY_CLR32(OFFSET_RG_USB20_TERM_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_TERM_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_TERM_VREF_SEL, - u2_term_ref << SHFT_RG_USB20_TERM_VREF_SEL); - } - } - if (u2_enhance != -1) { - if (u2_enhance <= VAL_MAX_WIDTH_2) { - USBPHY_CLR32(OFFSET_RG_USB20_PHY_REV6, - VAL_MAX_WIDTH_2 << SHFT_RG_USB20_PHY_REV6); - USBPHY_SET32(OFFSET_RG_USB20_PHY_REV6, - u2_enhance<\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - - spin_lock_irqsave(&musb_reg_clock_lock, flags); - - if (unlikely(atomic_read(&clk_prepare_cnt) <= 0)) { - DBG_LIMIT(1, "clock not prepare"); - goto exit; - } - - if (enable && count == 0) { - if (clk_enable(musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel enable fail\n"); - goto exit; - } - - if (clk_enable(musb_clk)) { - DBG(0, "musb_clk enable fail\n"); - clk_disable(musb_clk_top_sel); - goto exit; - } - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); - real_enable++; - - } else if (!enable && count == 1) { - clk_disable(musb_clk); - clk_disable(musb_clk_top_sel); - - usb_hal_dpidle_request(USB_DPIDLE_ALLOWED); - real_disable++; - } - - if (enable) - count++; - else - count = (count == 0) ? 0 : (count - 1); - -exit: - if (enable) - virt_enable++; - else - virt_disable++; - - spin_unlock_irqrestore(&musb_reg_clock_lock, flags); - - DBG(1, "enable(%d),count(%d), <%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - return 1; -} - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool usb_phy_check_in_uart_mode(void) -{ - u32 usb_port_mode; - - usb_enable_clock(true); - udelay(50); - usb_port_mode = USBPHY_READ32(0x68); - usb_enable_clock(false); - - if (((usb_port_mode >> 30) & 0x3) == 1) { - DBG(0, "%s:%d - IN UART MODE : 0x%x\n", - __func__, __LINE__, usb_port_mode); - in_uart_mode = true; - } else { - DBG(0, "%s:%d - NOT IN UART MODE : 0x%x\n", - __func__, __LINE__, usb_port_mode); - in_uart_mode = false; - } - return in_uart_mode; -} - -void usb_phy_switch_to_uart(void) -{ - unsigned int val = 0; - - if (usb_phy_check_in_uart_mode()) { - DBG(0, "Already in UART mode.\n"); - return; - } - - udelay(50); - - /* RG_USB20_BC11_SW_EN 0x11F4_0818[23] = 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - /* Set RG_SUSPENDM 0x11F4_0868[3] to 1 */ - USBPHY_SET32(0x68, (0x1 << 3)); - - /* force suspendm 0x11F4_0868[18] = 1 */ - USBPHY_SET32(0x68, (0x1 << 18)); - - /* Set rg_uart_mode 0x11F4_0868[31:30] to 2'b01 */ - USBPHY_CLR32(0x68, (0x3 << 30)); - USBPHY_SET32(0x68, (0x1 << 30)); - - /* force_uart_i 0x11F4_0868[29] = 0*/ - USBPHY_CLR32(0x68, (0x1 << 29)); - - /* force_uart_bias_en 0x11F4_0868[28] = 1 */ - USBPHY_SET32(0x68, (0x1 << 28)); - - /* force_uart_tx_oe 0x11F4_0868[27] = 1 */ - USBPHY_SET32(0x68, (0x1 << 27)); - - /* force_uart_en 0x11F4_0868[26] = 1 */ - USBPHY_SET32(0x68, (0x1 << 26)); - - /* RG_UART_BIAS_EN 0x11F4_086c[18] = 1 */ - USBPHY_SET32(0x6C, (0x1 << 18)); - - /* RG_UART_TX_OE 0x11F4_086c[17] = 1 */ - USBPHY_SET32(0x6C, (0x1 << 17)); - - /* Set RG_UART_EN to 1 */ - USBPHY_SET32(0x6C, (0x1 << 16)); - - /* Set RG_USB20_DM_100K_EN to 1 */ - USBPHY_SET32(0x20, (0x1 << 17)); - - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - val = readl(ap_gpio_base); - writel(val | (GPIO_SEL_UART0), ap_gpio_base); - - in_uart_mode = true; -} - -void usb_phy_switch_to_usb(void) -{ - unsigned int val = 0; - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - /* clear force_uart_en */ - USBPHY_CLR32(0x68, (0x1 << 26)); - - /* Set rg_uart_mode 0x11F4_0868[31:30] to 2'b00 */ - USBPHY_CLR32(0x68, (0x3 << 30)); - - in_uart_mode = false; - - usb_phy_poweron(); -} -#endif - -void set_usb_phy_mode(int mode) -{ - switch (mode) { - case PHY_MODE_USB_DEVICE: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ - USBPHY_CLR32(0x6C, (0x10<<0)); - USBPHY_SET32(0x6C, (0x2F<<0)); - USBPHY_SET32(0x6C, (0x3F<<8)); - break; - case PHY_MODE_USB_HOST: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ - USBPHY_CLR32(0x6c, (0x12<<0)); - USBPHY_SET32(0x6c, (0x2d<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - case PHY_MODE_INVALID: - /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ - USBPHY_SET32(0x6c, (0x11<<0)); - USBPHY_CLR32(0x6c, (0x2e<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - default: - DBG(0, "mode error %d\n", mode); - } - DBG(0, "force PHY to mode %d, 0x6c=%x\n", mode, USBPHY_READ32(0x6c)); -} - -void usb_rev6_setting(int value) -{ - static int direct_return; - - if (direct_return) - return; - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - USBPHY_CLR32(0x18, (0xFF << 24)); - - if (value) - USBPHY_SET32(0x18, (value << 24)); - else - direct_return = 1; -} - -/* M17_USB_PWR Sequence 20160603.xls */ -void usb_phy_poweron(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* wait 50 usec for PHY3.3v/1.8v stable. */ - udelay(50); - - USBPHY_SET32(0x68, (0x1 << 18)); - USBPHY_CLR32(0x68, (0x1 << 3)); - USBPHY_SET32(0x68, (0x1 << 3)); - udelay(30); - USBPHY_CLR32(0x68, (0x1 << 18)); - USBPHY_CLR32(0x68, (0x1 << 3)); - - /* - * force_uart_en 1'b0 0x68 26 - * RG_UART_EN 1'b0 0x6c 16 - * rg_usb20_gpio_ctl 1'b0 0x20 09 - * usb20_gpio_mode 1'b0 0x20 08 - * RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * rg_usb20_dp_100k_mode 1'b1 0x20 18 - * USB20_DP_100K_EN 1'b0 0x20 16 - * RG_USB20_DM_100K_EN 1'b0 0x20 17 - * RG_USB20_OTG_VBUSCMP_EN 1'b1 0x18 20 - * force_suspendm 1'b0 0x68 18 - */ - - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6c, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, ((0x1 << 9) | (0x1 << 8))); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - /* rg_usb20_dp_100k_mode, 1'b1 */ - USBPHY_SET32(0x20, (0x1 << 18)); - /* USB20_DP_100K_EN 1'b0, RG_USB20_DM_100K_EN, 1'b0 */ - USBPHY_CLR32(0x20, ((0x1 << 16) | (0x1 << 17))); - - /* RG_USB20_OTG_VBUSCMP_EN, 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 20)); - - /* force_suspendm, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 18)); - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - USBPHY_CLR32(0x18, (0xFF << 24)); - USBPHY_SET32(0x18, (0x40 << 24)); - - /* wait for 800 usec. */ - udelay(800); - - DBG(0, "usb power on success\n"); -} - -/* M17_USB_PWR Sequence 20160603.xls */ -static void usb_phy_savecurrent_internal(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* - * force_uart_en 1'b0 0x68 26 - * RG_UART_EN 1'b0 0x6c 16 - * rg_usb20_gpio_ctl 1'b0 0x20 09 - * usb20_gpio_mode 1'b0 0x20 08 - - * RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * RG_USB20_OTG_VBUSCMP_EN 1'b0 0x18 20 - * RG_SUSPENDM 1'b1 0x68 03 - * force_suspendm 1'b1 0x68 18 - - * RG_DPPULLDOWN 1'b1 0x68 06 - * RG_DMPULLDOWN 1'b1 0x68 07 - * RG_XCVRSEL[1:0] 2'b01 0x68 [04-05] - * RG_TERMSEL 1'b1 0x68 02 - * RG_DATAIN[3:0] 4'b0000 0x68 [10-13] - * force_dp_pulldown 1'b1 0x68 20 - * force_dm_pulldown 1'b1 0x68 21 - * force_xcversel 1'b1 0x68 19 - * force_termsel 1'b1 0x68 17 - * force_datain 1'b1 0x68 23 - - * RG_SUSPENDM 1'b0 0x68 03 - */ - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6c, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, (0x1 << 9)); - USBPHY_CLR32(0x20, (0x1 << 8)); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - /* RG_USB20_OTG_VBUSCMP_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 20)); - - /* RG_SUSPENDM, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 3)); - /* force_suspendm, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 18)); - - /* RG_DPPULLDOWN, 1'b1, RG_DMPULLDOWN, 1'b1 */ - USBPHY_SET32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* RG_XCVRSEL[1:0], 2'b01. */ - USBPHY_CLR32(0x68, (0x3 << 4)); - USBPHY_SET32(0x68, (0x1 << 4)); - /* RG_TERMSEL, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 2)); - /* RG_DATAIN[3:0], 4'b0000 */ - USBPHY_CLR32(0x68, (0xF << 10)); - - /* force_dp_pulldown, 1'b1, force_dm_pulldown, 1'b1, - * force_xcversel, 1'b1, force_termsel, 1'b1, force_datain, 1'b1 - */ - USBPHY_SET32(0x68, ((0x1 << 20) | (0x1 << 21) | - (0x1 << 19) | (0x1 << 17) | (0x1 << 23))); - - udelay(800); - - /* RG_SUSPENDM, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 3)); - - udelay(1); - - set_usb_phy_mode(PHY_MODE_INVALID); -} - -void usb_phy_savecurrent(void) -{ - usb_phy_savecurrent_internal(); - DBG(0, "usb save current success\n"); -} - -/* M17_USB_PWR Sequence 20160603.xls */ -void usb_phy_recover(void) -{ - unsigned int efuse_val = 0; - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* wait 50 usec. */ - udelay(50); - - USBPHY_SET32(0x68, (0x1 << 18)); - USBPHY_CLR32(0x68, (0x1 << 3)); - USBPHY_SET32(0x68, (0x1 << 3)); - udelay(30); - USBPHY_CLR32(0x68, (0x1 << 18)); - USBPHY_CLR32(0x68, (0x1 << 3)); - - /* - * 04.force_uart_en 1'b0 0x68 26 - * 04.RG_UART_EN 1'b0 0x6C 16 - * 04.rg_usb20_gpio_ctl 1'b0 0x20 09 - * 04.usb20_gpio_mode 1'b0 0x20 08 - - * 05.force_suspendm 1'b0 0x68 18 - - * 06.RG_DPPULLDOWN 1'b0 0x68 06 - * 07.RG_DMPULLDOWN 1'b0 0x68 07 - * 08.RG_XCVRSEL[1:0] 2'b00 0x68 [04:05] - * 09.RG_TERMSEL 1'b0 0x68 02 - * 10.RG_DATAIN[3:0] 4'b0000 0x68 [10:13] - * 11.force_dp_pulldown 1'b0 0x68 20 - * 12.force_dm_pulldown 1'b0 0x68 21 - * 13.force_xcversel 1'b0 0x68 19 - * 14.force_termsel 1'b0 0x68 17 - * 15.force_datain 1'b0 0x68 23 - * 16.RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * 17.RG_USB20_OTG_VBUSCMP_EN 1'b1 0x18 20 - */ - - /* clean PUPD_BIST_EN */ - /* PUPD_BIST_EN = 1'b0 */ - /* PMIC will use it to detect charger type */ - /* NEED?? USBPHY_CLR8(0x1d, 0x10);*/ - USBPHY_CLR32(0x1c, (0x1 << 12)); - - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6C, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, (0x1 << 9)); - USBPHY_CLR32(0x20, (0x1 << 8)); - - /* force_suspendm, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 18)); - - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* RG_XCVRSEL[1:0], 2'b00. */ - USBPHY_CLR32(0x68, (0x3 << 4)); - - /* RG_TERMSEL, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 2)); - /* RG_DATAIN[3:0], 4'b0000 */ - USBPHY_CLR32(0x68, (0xF << 10)); - - /* force_dp_pulldown, 1'b0, force_dm_pulldown, 1'b0, - * force_xcversel, 1'b0, force_termsel, 1'b0, force_datain, 1'b0 - */ - USBPHY_CLR32(0x68, ((0x1 << 20) | (0x1 << 21) | - (0x1 << 19) | (0x1 << 17) | (0x1 << 23))); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - /* RG_USB20_OTG_VBUSCMP_EN, 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 20)); - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - usb_rev6_setting(0x40); - - /* wait 800 usec. */ - udelay(800); - - /* force enter device mode */ - set_usb_phy_mode(PHY_DEV_ACTIVE); - - /* M_ANALOG8[4:0] => RG_USB20_INTR_CAL[4:0] */ - efuse_val = (get_devinfo_with_index(108) & (0x1f<<0)) >> 0; - if (efuse_val) { - DBG(0, "apply efuse setting, RG_USB20_INTR_CAL=0x%x\n", - efuse_val); - USBPHY_CLR32(0x04, (0x1F<<19)); - USBPHY_SET32(0x04, (efuse_val<<19)); - } - - /* RG_USB20_DISCTH[7:4], 4'b0111 for 700 mV */ - USBPHY_CLR32(0x18, (0xf0<<0)); - USBPHY_SET32(0x18, (0x70<<0)); - - /* HQA Request comes from SA */ - USBPHY_CLR32(0x18, (0x1<<28)); - USBPHY_CLR32(0x18, (0xf<<0)); - USBPHY_SET32(0x18, (0x2<<0)); - - USBPHY_SET32(0x8, (0x1<<3)); - - - usb_phy_tuning(); - - DBG(0, "usb recovery success\n"); -} - -/* BC1.2 */ -void Charger_Detect_Init(void) -{ - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } - - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - - /* RG_USB20_BC11_SW_EN = 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 23)); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Init); - -void Charger_Detect_Release(void) -{ - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } - - usb_prepare_enable_clock(true); - - /* RG_USB20_BC11_SW_EN = 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - udelay(1); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Release); - -void usb_phy_context_save(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); -#endif -} - -void usb_phy_context_restore(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) - usb_phy_switch_to_uart(); -#endif -} - -void usb_dpdm_pulldown(bool enable) -{ - DBG(0, "%s: enable=%d\n", __func__, enable); - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - if (enable) { - /* RG_DPPULLDOWN, 1'b1, RG_DMPULLDOWN, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 6) | (0x1 << 7)); - /* RG_USB20_PHY_REV */ - USBPHY_CLR32(0x18, (0x2 << 24)); - } else { - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 6) | (0x1 << 7)); - /* RG_USB20_PHY_REV */ - USBPHY_SET32(0x18, (0x2 << 24)); - } - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -#endif diff --git a/drivers/misc/mediatek/usb20/mt6781/usb20_phy_debugfs.c b/drivers/misc/mediatek/usb20/mt6781/usb20_phy_debugfs.c deleted file mode 100644 index 7debc1b7d388..000000000000 --- a/drivers/misc/mediatek/usb20/mt6781/usb20_phy_debugfs.c +++ /dev/null @@ -1,918 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016 MediaTek Inc. - */ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* general */ -#define BIT_WIDTH_1 1 -#define MSK_WIDTH_1 0x1 -#define VAL_MAX_WDITH_1 0x1 -#define VAL_0_WIDTH_1 0x0 -#define VAL_1_WIDTH_1 0x1 -#define STRNG_0_WIDTH_1 "0" -#define STRNG_1_WIDTH_1 "1" - -#define BIT_WIDTH_2 2 -#define MSK_WIDTH_2 0x3 -#define VAL_MAX_WDITH_2 0x3 -#define VAL_0_WIDTH_2 0x0 -#define VAL_1_WIDTH_2 0x1 -#define VAL_2_WIDTH_2 0x2 -#define VAL_3_WIDTH_2 0x3 -#define STRNG_0_WIDTH_2 "00" -#define STRNG_1_WIDTH_2 "01" -#define STRNG_2_WIDTH_2 "10" -#define STRNG_3_WIDTH_2 "11" - -#define BIT_WIDTH_3 3 -#define MSK_WIDTH_3 0x7 -#define VAL_MAX_WDITH_3 0x7 -#define VAL_0_WIDTH_3 0x0 -#define VAL_1_WIDTH_3 0x1 -#define VAL_2_WIDTH_3 0x2 -#define VAL_3_WIDTH_3 0x3 -#define VAL_4_WIDTH_3 0x4 -#define VAL_5_WIDTH_3 0x5 -#define VAL_6_WIDTH_3 0x6 -#define VAL_7_WIDTH_3 0x7 -#define STRNG_0_WIDTH_3 "000" -#define STRNG_1_WIDTH_3 "001" -#define STRNG_2_WIDTH_3 "010" -#define STRNG_3_WIDTH_3 "011" -#define STRNG_4_WIDTH_3 "100" -#define STRNG_5_WIDTH_3 "101" -#define STRNG_6_WIDTH_3 "110" -#define STRNG_7_WIDTH_3 "111" - -#define BIT_WIDTH_4 4 -#define MSK_WIDTH_4 0xf -#define VAL_MAX_WDITH_4 0xf -#define VAL_0_WIDTH_4 0x0 -#define VAL_1_WIDTH_4 0x1 -#define VAL_2_WIDTH_4 0x2 -#define VAL_3_WIDTH_4 0x3 -#define VAL_4_WIDTH_4 0x4 -#define VAL_5_WIDTH_4 0x5 -#define VAL_6_WIDTH_4 0x6 -#define VAL_7_WIDTH_4 0x7 -#define VAL_8_WIDTH_4 0x8 -#define VAL_9_WIDTH_4 0x9 -#define VAL_10_WIDTH_4 0xa -#define VAL_11_WIDTH_4 0xb -#define VAL_12_WIDTH_4 0xc -#define VAL_13_WIDTH_4 0xd -#define VAL_14_WIDTH_4 0xe -#define VAL_15_WIDTH_4 0xf -#define STRNG_0_WIDTH_4 "0000" -#define STRNG_1_WIDTH_4 "0001" -#define STRNG_2_WIDTH_4 "0010" -#define STRNG_3_WIDTH_4 "0011" -#define STRNG_4_WIDTH_4 "0100" -#define STRNG_5_WIDTH_4 "0101" -#define STRNG_6_WIDTH_4 "0110" -#define STRNG_7_WIDTH_4 "0111" -#define STRNG_8_WIDTH_4 "1000" -#define STRNG_9_WIDTH_4 "1001" -#define STRNG_10_WIDTH_4 "1010" -#define STRNG_11_WIDTH_4 "1011" -#define STRNG_12_WIDTH_4 "1100" -#define STRNG_13_WIDTH_4 "1101" -#define STRNG_14_WIDTH_4 "1110" -#define STRNG_15_WIDTH_4 "1111" - -/* specific */ -#define FILE_USB_DRIVING_CAPABILITY "USB_DRIVING_CAPABILITY" - -#define FILE_RG_USB20_TERM_VREF_SEL "RG_USB20_TERM_VREF_SEL" -#define MSK_RG_USB20_TERM_VREF_SEL MSK_WIDTH_3 -#define SHFT_RG_USB20_TERM_VREF_SEL 8 -#define OFFSET_RG_USB20_TERM_VREF_SEL 0x4 - -#define FILE_RG_USB20_HSTX_SRCTRL "RG_USB20_HSTX_SRCTRL" -#define MSK_RG_USB20_HSTX_SRCTRL MSK_WIDTH_3 -#define SHFT_RG_USB20_HSTX_SRCTRL 12 -#define OFFSET_RG_USB20_HSTX_SRCTRL 0x14 - -#define FILE_RG_USB20_VRT_VREF_SEL "RG_USB20_VRT_VREF_SEL" -#define MSK_RG_USB20_VRT_VREF_SEL MSK_WIDTH_3 -#define SHFT_RG_USB20_VRT_VREF_SEL 12 -#define OFFSET_RG_USB20_VRT_VREF_SEL 0x4 - -#define FILE_RG_USB20_INTR_EN "RG_USB20_INTR_EN" -#define MSK_RG_USB20_INTR_EN MSK_WIDTH_1 -#define SHFT_RG_USB20_INTR_EN 5 -#define OFFSET_RG_USB20_INTR_EN 0x0 - -#define FILE_RG_USB20_PHY_REV6 "RG_USB20_PHY_REV6" -#define MSK_RG_USB20_PHY_REV6 MSK_WIDTH_2 -#define SHFT_RG_USB20_PHY_REV6 30 -#define OFFSET_RG_USB20_PHY_REV6 0x18 - -#define FILE_RG_USB20_DISCTH "RG_USB20_DISCTH" -#define MSK_RG_USB20_DISCTH MSK_WIDTH_4 -#define SHFT_RG_USB20_DISCTH 4 -#define OFFSET_RG_USB20_DISCTH 0x18 - -static struct proc_dir_entry *usb20_phy_procfs_root; - -void usb20_phy_debugfs_write_width1(u8 offset, u8 shift, char *buf) -{ - u32 clr_val = 0, set_val = 0; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_1, BIT_WIDTH_1)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_1); - clr_val = VAL_1_WIDTH_1; - } - if (!strncmp(buf, STRNG_1_WIDTH_1, BIT_WIDTH_1)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_1); - set_val = VAL_1_WIDTH_1; - } - - if (clr_val || set_val) { - clr_val = VAL_MAX_WDITH_1 - set_val; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, before shft\n", - __func__, __LINE__, - offset, clr_val, - set_val); - clr_val <<= shift; - set_val <<= shift; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, after shft\n", - __func__, __LINE__, - offset, clr_val, - set_val); - - USBPHY_CLR32(offset, clr_val); - USBPHY_SET32(offset, set_val); - } else { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> do nothing\n" - , __func__, __LINE__); - } -} - -void usb20_phy_debugfs_rev6_write(u8 offset, u8 shift, char *buf) -{ - u8 set_val = 0xFF; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_2); - set_val = VAL_0_WIDTH_2; - } - if (!strncmp(buf, STRNG_1_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_2); - set_val = VAL_1_WIDTH_2; - } - if (!strncmp(buf, STRNG_2_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_2); - set_val = VAL_2_WIDTH_2; - } - if (!strncmp(buf, STRNG_3_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_2); - set_val = VAL_3_WIDTH_2; - } - - if (set_val <= VAL_MAX_WDITH_2) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> case offset:%x, set_val:%x, before shft\n", - __func__, __LINE__, offset, set_val); - USBPHY_CLR32(offset, (VAL_MAX_WDITH_2< do nothing\n", - __func__, __LINE__); - } -} - -void usb20_phy_debugfs_write_width3(u8 offset, u8 shift, char *buf) -{ - u32 clr_val = 0, set_val = 0; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - clr_val = VAL_7_WIDTH_3; - } - if (!strncmp(buf, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - set_val = VAL_1_WIDTH_3; - } - if (!strncmp(buf, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - set_val = VAL_2_WIDTH_3; - } - if (!strncmp(buf, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - set_val = VAL_3_WIDTH_3; - } - if (!strncmp(buf, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - set_val = VAL_4_WIDTH_3; - } - if (!strncmp(buf, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - set_val = VAL_5_WIDTH_3; - } - if (!strncmp(buf, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - set_val = VAL_6_WIDTH_3; - } - if (!strncmp(buf, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - set_val = VAL_7_WIDTH_3; - } - - if (clr_val || set_val) { - clr_val = VAL_MAX_WDITH_3 - set_val; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, before shft\n", - __func__, __LINE__, offset, clr_val, set_val); - clr_val <<= shift; - set_val <<= shift; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, after shft\n", - __func__, __LINE__, offset, clr_val, set_val); - - USBPHY_CLR32(offset, clr_val); - USBPHY_SET32(offset, set_val); - } else { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> do nothing\n", - __func__, __LINE__); - } -} - -void usb20_phy_debugfs_write_width4(u8 offset, u8 shift, char *buf) -{ - u32 clr_val = 0, set_val = 0; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_4); - clr_val = VAL_15_WIDTH_4; - } - if (!strncmp(buf, STRNG_1_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_4); - set_val = VAL_1_WIDTH_4; - } - if (!strncmp(buf, STRNG_2_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_4); - set_val = VAL_2_WIDTH_4; - } - if (!strncmp(buf, STRNG_3_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_4); - set_val = VAL_3_WIDTH_4; - } - if (!strncmp(buf, STRNG_4_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_4); - set_val = VAL_4_WIDTH_4; - } - if (!strncmp(buf, STRNG_5_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_4); - set_val = VAL_5_WIDTH_4; - } - if (!strncmp(buf, STRNG_6_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_4); - set_val = VAL_6_WIDTH_4; - } - if (!strncmp(buf, STRNG_7_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_4); - set_val = VAL_7_WIDTH_4; - } - if (!strncmp(buf, STRNG_8_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_8_WIDTH_4); - set_val = VAL_8_WIDTH_4; - } - if (!strncmp(buf, STRNG_9_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_9_WIDTH_4); - set_val = VAL_9_WIDTH_4; - } - if (!strncmp(buf, STRNG_10_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_10_WIDTH_4); - set_val = VAL_10_WIDTH_4; - } - if (!strncmp(buf, STRNG_11_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_11_WIDTH_4); - set_val = VAL_11_WIDTH_4; - } - if (!strncmp(buf, STRNG_12_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_12_WIDTH_4); - set_val = VAL_12_WIDTH_4; - } - if (!strncmp(buf, STRNG_13_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_13_WIDTH_4); - set_val = VAL_13_WIDTH_4; - } - if (!strncmp(buf, STRNG_14_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_14_WIDTH_4); - set_val = VAL_14_WIDTH_4; - } - if (!strncmp(buf, STRNG_15_WIDTH_4, BIT_WIDTH_4)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_15_WIDTH_4); - set_val = VAL_15_WIDTH_4; - } - - if (clr_val || set_val) { - clr_val = VAL_MAX_WDITH_4 - set_val; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, before shft\n", - __func__, __LINE__, offset, clr_val, set_val); - clr_val <<= shift; - set_val <<= shift; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, after shft\n", - __func__, __LINE__, offset, clr_val, set_val); - - USBPHY_CLR32(offset, clr_val); - USBPHY_SET32(offset, set_val); - } else { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> do nothing\n", - __func__, __LINE__); - } -} - -u8 usb20_phy_debugfs_read_val(u8 offset, u8 shft, u8 msk, u8 width, char *str) -{ - u32 val; - int i, temp; - - val = USBPHY_READ32(offset); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - val = val >> shft; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - val = val & msk; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - - temp = val; - str[width] = '\0'; - for (i = (width - 1); i >= 0; i--) { - if (val % 2) - str[i] = '1'; - else - str[i] = '0'; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> str[%d]:%c\n\n", - __func__, __LINE__, i, str[i]); - val /= 2; - } - pr_notice("MTK_ICUSB [DBG], <%s(), %d> str(%s)\n", - __func__, __LINE__, str); - return val; -} - -static int usb_driving_capability_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - u8 combined_val, tmp_val = 0xff; - - val = usb20_phy_debugfs_read_val(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - MSK_RG_USB20_TERM_VREF_SEL, BIT_WIDTH_3, str); - if (!strncmp(str, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - tmp_val = VAL_0_WIDTH_3; - } - if (!strncmp(str, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - tmp_val = VAL_1_WIDTH_3; - } - if (!strncmp(str, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - tmp_val = VAL_2_WIDTH_3; - } - if (!strncmp(str, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - tmp_val = VAL_3_WIDTH_3; - } - if (!strncmp(str, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - tmp_val = VAL_4_WIDTH_3; - } - if (!strncmp(str, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - tmp_val = VAL_5_WIDTH_3; - } - if (!strncmp(str, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - tmp_val = VAL_6_WIDTH_3; - } - if (!strncmp(str, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - tmp_val = VAL_7_WIDTH_3; - } - - combined_val = tmp_val; - - val = usb20_phy_debugfs_read_val(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - MSK_RG_USB20_VRT_VREF_SEL, - BIT_WIDTH_3, str); - if (!strncmp(str, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - tmp_val = VAL_0_WIDTH_3; - } - if (!strncmp(str, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - tmp_val = VAL_1_WIDTH_3; - } - if (!strncmp(str, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - tmp_val = VAL_2_WIDTH_3; - } - if (!strncmp(str, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - tmp_val = VAL_3_WIDTH_3; - } - if (!strncmp(str, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - tmp_val = VAL_4_WIDTH_3; - } - if (!strncmp(str, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - tmp_val = VAL_5_WIDTH_3; - } - if (!strncmp(str, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - tmp_val = VAL_6_WIDTH_3; - } - if (!strncmp(str, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - tmp_val = VAL_7_WIDTH_3; - } - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> combined_val(%d), tmp_val(%d)\n", - __func__, __LINE__, combined_val, tmp_val); - - if ((tmp_val == (combined_val - 1)) || (tmp_val == combined_val)) - combined_val += tmp_val; - else - combined_val = tmp_val * (VAL_MAX_WDITH_3 + 1) + combined_val; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> combined_val(%d), tmp_val(%d)\n", - __func__, __LINE__, combined_val, tmp_val); - - seq_printf(s, "\n%s = %d\n", FILE_USB_DRIVING_CAPABILITY, combined_val); - return 0; -} - -static int rg_usb20_term_vref_sel_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - MSK_RG_USB20_TERM_VREF_SEL, - BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_TERM_VREF_SEL, str); - return 0; -} - -static int rg_usb20_hstx_srctrl_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_HSTX_SRCTRL, - SHFT_RG_USB20_HSTX_SRCTRL, - MSK_RG_USB20_HSTX_SRCTRL, BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_HSTX_SRCTRL, str); - return 0; -} - -static int rg_usb20_vrt_vref_sel_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - MSK_RG_USB20_VRT_VREF_SEL, BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_VRT_VREF_SEL, str); - return 0; -} - -static int rg_usb20_intr_en_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_INTR_EN, - SHFT_RG_USB20_INTR_EN, - MSK_RG_USB20_INTR_EN, BIT_WIDTH_1, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_INTR_EN, str); - return 0; -} - -static int rg_usb20_rev6_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_PHY_REV6, - SHFT_RG_USB20_PHY_REV6, - MSK_RG_USB20_PHY_REV6, BIT_WIDTH_2, str); - - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_PHY_REV6, str); - return 0; -} - -static int rg_usb20_discth_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_DISCTH, - SHFT_RG_USB20_DISCTH, - MSK_RG_USB20_DISCTH, BIT_WIDTH_4, str); - - seq_printf(s, "%s", str); - return 0; -} - -static int usb_driving_capability_open(struct inode *inode, struct file *file) -{ - return single_open(file, usb_driving_capability_show, PDE_DATA(inode)); -} - -static int rg_usb20_term_vref_sel_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_term_vref_sel_show, PDE_DATA(inode)); -} - -static int rg_usb20_hstx_srctrl_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_hstx_srctrl_show, PDE_DATA(inode)); -} - -static int rg_usb20_vrt_vref_sel_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_vrt_vref_sel_show, PDE_DATA(inode)); -} - -static int rg_usb20_intr_en_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_intr_en_show, PDE_DATA(inode)); -} - -static int rg_usb20_rev6_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_rev6_show, PDE_DATA(inode)); -} - -static int rg_usb20_discth_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_discth_show, PDE_DATA(inode)); -} - -void val_to_bstring_width3(u8 val, char *str) -{ - - if (val == VAL_0_WIDTH_3) - memcpy(str, STRNG_0_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_1_WIDTH_3) - memcpy(str, STRNG_1_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_2_WIDTH_3) - memcpy(str, STRNG_2_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_3_WIDTH_3) - memcpy(str, STRNG_3_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_4_WIDTH_3) - memcpy(str, STRNG_4_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_5_WIDTH_3) - memcpy(str, STRNG_5_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_6_WIDTH_3) - memcpy(str, STRNG_6_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_7_WIDTH_3) - memcpy(str, STRNG_7_WIDTH_3, BIT_WIDTH_3 + 1); - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> val(%d), str(%s)\n", - __func__, __LINE__, val, str); -} - -static ssize_t usb_driving_capability_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - u8 val, tmp_val; - char str_rg_usb20_term_vref_sel[18], str_rg_usb20_vrt_vref_sel[18]; - - memset(buf, 0x00, sizeof(buf)); - pr_notice("\n"); - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - - if (kstrtou8(buf, 10, &val) != 0) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> kstrtou8, err(%d)\n)\n", - __func__, __LINE__, kstrtou8(buf, 10, &val)); - return count; - } - pr_notice("MTK_ICUSB [DBG], <%s(), %d> kstrtou8, val(%d)\n)\n", - __func__, __LINE__, val); - - if (val > VAL_7_WIDTH_3 * 2) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> wrong val set(%d), direct return\n", - __func__, __LINE__, val); - return count; - } - tmp_val = val; - val /= 2; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> val(%d), tmp_val(%d)\n", - __func__, __LINE__, val, tmp_val); - - val_to_bstring_width3(tmp_val - val, str_rg_usb20_term_vref_sel); - val_to_bstring_width3(val, str_rg_usb20_vrt_vref_sel); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> Config TERM_VREF_SEL %s\n", - __func__, __LINE__, str_rg_usb20_term_vref_sel); - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - str_rg_usb20_term_vref_sel); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> Config VRT_VREF_SEL %s\n\n", - __func__, __LINE__, str_rg_usb20_vrt_vref_sel); - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - str_rg_usb20_vrt_vref_sel); - return count; -} - -static ssize_t rg_usb20_term_vref_sel_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, buf); - return count; -} - -static ssize_t rg_usb20_hstx_srctrl_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_HSTX_SRCTRL, - SHFT_RG_USB20_HSTX_SRCTRL, buf); - return count; -} - -static ssize_t rg_usb20_vrt_vref_sel_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, buf); - return count; -} - -static ssize_t rg_usb20_intr_en_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width1(OFFSET_RG_USB20_INTR_EN, - SHFT_RG_USB20_INTR_EN, buf); - return count; -} - -static ssize_t rg_usb20_rev6_write(struct file *file, - const char __user *ubuf, size_t count, - loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_rev6_write(OFFSET_RG_USB20_PHY_REV6, - SHFT_RG_USB20_PHY_REV6, buf); - return count; -} - -static ssize_t rg_usb20_discth_write(struct file *file, - const char __user *ubuf, size_t count, - loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width4(OFFSET_RG_USB20_DISCTH, - SHFT_RG_USB20_DISCTH, buf); - return count; -} - -static const struct file_operations usb_driving_capability_fops = { - .open = usb_driving_capability_open, - .write = usb_driving_capability_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_term_vref_sel_fops = { - .open = rg_usb20_term_vref_sel_open, - .write = rg_usb20_term_vref_sel_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_hstx_srctrl_fops = { - .open = rg_usb20_hstx_srctrl_open, - .write = rg_usb20_hstx_srctrl_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_vrt_vref_sel_fops = { - .open = rg_usb20_vrt_vref_sel_open, - .write = rg_usb20_vrt_vref_sel_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_intr_en_fops = { - .open = rg_usb20_intr_en_open, - .write = rg_usb20_intr_en_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_rev6_fops = { - .open = rg_usb20_rev6_open, - .write = rg_usb20_rev6_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_discth_fops = { - .open = rg_usb20_discth_open, - .write = rg_usb20_discth_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -int usb20_phy_init_debugfs(void) -{ - struct proc_dir_entry *root; - struct proc_dir_entry *file; - int ret; - - proc_mkdir("mtk_usb", NULL); - - root = proc_mkdir("mtk_usb/usb20_phy", NULL); - if (!root) { - ret = -ENOMEM; - goto err0; - } - - file = proc_create(FILE_USB_DRIVING_CAPABILITY, 0644, - root, &usb_driving_capability_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_TERM_VREF_SEL, 0644, - root, &rg_usb20_term_vref_sel_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_HSTX_SRCTRL, 0644, - root, &rg_usb20_hstx_srctrl_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_VRT_VREF_SEL, 0644, - root, &rg_usb20_vrt_vref_sel_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_INTR_EN, 0644, - root, &rg_usb20_intr_en_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_PHY_REV6, 0644, - root, &rg_usb20_rev6_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_DISCTH, 0644, - root, &rg_usb20_discth_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - - - usb20_phy_procfs_root = root; - return 0; - -err1: - proc_remove(root); - -err0: - return ret; -} - -void /* __init_or_exit */ usb20_phy_exit_debugfs(struct musb *musb) -{ - proc_remove(usb20_phy_procfs_root); -} diff --git a/drivers/misc/mediatek/usb20/mt6833/Makefile b/drivers/misc/mediatek/usb20/mt6833/Makefile deleted file mode 100644 index d6b08abbecd5..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/Makefile +++ /dev/null @@ -1,36 +0,0 @@ -# -# Copyright (C) 2015 MediaTek Inc. -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License version 2 as -# published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# - -# -# for USB OTG silicon based on Mentor Graphics INVENTRA designs -# -ccflags-$(CONFIG_USB_MTK_HDRC) += -I$(srctree)/drivers/misc/mediatek/usb20 - -# for battery related -ccflags-y += -I$(srctree)/drivers/misc/mediatek/include/mt-plat - -# for SPM control usage -ccflags-y += -I$(srctree)/drivers/misc/mediatek/base/power/include/ - -# for TYPEC connection management -ccflags-y += -I$(srctree)/drivers/misc/mediatek/typec/inc -ifeq ($(CONFIG_TCPC_CLASS),y) - ccflags-y += -I$(srctree)/drivers/misc/mediatek/typec/tcpc/inc -endif -# for ep0 test -ccflags-y += -I$(srctree)/drivers/usb/core/ - -# Phy -obj-$(CONFIG_MTK_MUSB_PHY) += mtk_usb20_phy.o -mtk_usb20_phy-y += usb20_phy.o -mtk_usb20_phy-$(CONFIG_DEBUG_FS) += usb20_phy_debugfs.o diff --git a/drivers/misc/mediatek/usb20/mt6833/mtk-phy-a60810.h b/drivers/misc/mediatek/usb20/mt6833/mtk-phy-a60810.h deleted file mode 100644 index 460e157a9b8e..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/mtk-phy-a60810.h +++ /dev/null @@ -1,3125 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#ifndef __MTK_PHY_A60810_H -#define __MTK_PHY_A60810_H - -#define U2_SR_COEF_A60810 22 - -struct u2phy_reg_a { - /* 0x0 */ - __le32 usbphyacr0; - __le32 usbphyacr1; - __le32 usbphyacr2; - __le32 reserve0; - /* 0x10 */ - __le32 usbphyacr4; - __le32 usbphyacr5; - __le32 usbphyacr6; - __le32 u2phyacr3; - /* 0x20 */ - __le32 u2phyacr4; - __le32 u2phyamon0; - __le32 reserve1[2]; - /* 0x30~0x50 */ - __le32 reserve2[12]; - /* 0x60 */ - __le32 u2phydcr0; - __le32 u2phydcr1; - __le32 u2phydtm0; - __le32 u2phydtm1; - /* 0x70 */ - __le32 u2phydmon0; - __le32 u2phydmon1; - __le32 u2phydmon2; - __le32 u2phydmon3; - /* 0x80 */ - __le32 u2phybc12c; - __le32 u2phybc12c1; - __le32 reserve3[2]; - /* 0x90~0xd0 */ - __le32 reserve4[20]; - /* 0xe0 */ - __le32 regfppc; - __le32 reserve5[3]; - /* 0xf0 */ - __le32 versionc; - __le32 reserve6[2]; - __le32 regfcom; -}; - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL (0x7<<28) /* 30:28 */ -#define A60810_RG_USB20_TX_PH_ROT_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_USB20_PLL_DIVEN (0x7<<20) /* 22:20 */ -#define A60810_RG_USB20_PLL_BR (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_PLL_BP (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_PLL_BLP (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_USBPLL_FORCE_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_PLL_FBDIV (0x7f<<8) /* 14:8 */ -#define A60810_RG_USB20_PLL_PREDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_USB20_INTR_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_REF_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_BGR_DIV (0x3<<2) /* 3:2 */ -#define A60810_RG_SIFSLV_CHP_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SIFSLV_BGR_EN (0x1<<0) /* 0:0 */ - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL (0x1f<<19) /* 23:19 */ -#define A60810_RG_USB20_OTG_VBUSTH (0x7<<16) /* 18:16 */ -#define A60810_RG_USB20_VRT_VREF_SEL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_TERM_VREF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_MPX_SEL (0xff<<0) /* 7:0 */ - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_CLKREF_REV (0xffff<<0) /* 15:0 */ - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_DP_ABIST_SELE (0xf<<24) /* 27:24 */ -#define A60810_RG_USB20_ICUSB_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_LS_CR (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_FS_CR (0x7<<8) /* 10:8 */ -#define A60810_RG_USB20_LS_SR (0x7<<4) /* 6:4 */ -#define A60810_RG_USB20_FS_SR (0x7<<0) /* 2:0 */ - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_INIT_SQ_EN_DG (0x3<<26) /* 27:26 */ -#define A60810_RG_USB20_HSTX_TMODE_SEL (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_SQD (0x3<<22) /* 23:22 */ -#define A60810_RG_USB20_DISCD (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_HSTX_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_PHYD_MONEN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_INLPBK_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_CHIRP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HSTX_SRCAL_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_USB20_HSTX_SRCTRL (0x7<<12) /* 14:12 */ -#define A60810_RG_USB20_HS_100U_U3_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_GBIAS_ENB (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_DM_ABIST_SELE (0xf<<0) /* 3:0 */ - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN (0x1 << 31) /* 31:31 */ -#define A60810_RG_USB20_PHY_REV (0xff<<24) /*31:24*/ -#define A60810_RG_USB20_BC11_SW_EN (0x1<<23) /*23:23*/ -#define A60810_RG_USB20_SR_CLK_SEL (0x1<<22) /*22:22*/ -#define A60810_RG_USB20_OTG_VBUSCMP_EN (0x1<<20) /*20:20*/ -#define A60810_RG_USB20_OTG_ABIST_EN (0x1<<19) /*19:19*/ -#define A60810_RG_USB20_OTG_ABIST_SELE (0x7<<16) /*18:16*/ -#define A60810_RG_USB20_HSRX_MMODE_SELE (0x3<<12) /*13:12*/ -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL (0x3<<9) /*10:9*/ -#define A60810_RG_USB20_HSRX_TMODE_EN (0x1<<8) /*8:8*/ -#define A60810_RG_USB20_DISCTH (0xf<<4) /*7:4*/ -#define A60810_RG_USB20_SQTH (0xf<<0) /*3:0*/ - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST (0xf<<28) /* 31:28 */ -#define A60810_RG_USB20_HSTX_BIST_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_USB20_HSTX_I_EN_MODE (0x3<<24) /* 25:24 */ -#define A60810_RG_USB20_USB11_TMODE_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_USB20_TMODE_FS_LS_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_USB20_HS_TERM_EN_MODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_PUPD_BIST_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_EN_PU_DM (0x1<<11) /* 11:11 */ -#define A60810_RG_USB20_EN_PD_DM (0x1<<10) /* 10:10 */ -#define A60810_RG_USB20_EN_PU_DP (0x1<<9) /* 9:9 */ -#define A60810_RG_USB20_EN_PD_DP (0x1<<8) /* 8:8 */ - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE (0x1<<18) /* 18:18 */ -#define A60810_RG_USB20_DM_100K_EN (0x1<<17) /* 17:17 */ -#define A60810_USB20_DP_100K_EN (0x1<<16) /* 16:16 */ -#define A60810_USB20_GPIO_DM_I (0x1<<15) /* 15:15 */ -#define A60810_USB20_GPIO_DP_I (0x1<<14) /* 14:14 */ -#define A60810_USB20_GPIO_DM_OE (0x1<<13) /* 13:13 */ -#define A60810_USB20_GPIO_DP_OE (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_GPIO_CTL (0x1<<9) /* 9:9 */ -#define A60810_USB20_GPIO_MODE (0x1<<8) /* 8:8 */ -#define A60810_RG_USB20_TX_BIAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_TX_VCMPDN_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_HS_SQ_EN_MODE (0x3<<2) /* 3:2 */ -#define A60810_RG_USB20_HS_RCV_EN_MODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_GPIO_DP_O (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST (0x3<<30) /* 31:30 */ -#define A60810_RG_USB20_GATED_ENB (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_TESTMODE (0x3<<26) /* 27:26 */ -#define A60810_RG_SIFSLV_USB20_PLL_STABLE (0x1<<25) /* 25:25 */ -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON (0x1<<24) /* 24:24 */ -#define A60810_RG_USB20_PHYD_RESERVE (0xffff<<8) /* 23:8 */ -#define A60810_RG_USB20_EBTHRLD (0x1<<7) /* 7:7 */ -#define A60810_RG_USB20_EARLY_HSTX_I (0x1<<6) /* 6:6 */ -#define A60810_RG_USB20_TX_TST (0x1<<5) /* 5:5 */ -#define A60810_RG_USB20_NEGEDGE_ENB (0x1<<4) /* 4:4 */ -#define A60810_RG_USB20_CDR_FILT (0xf<<0) /* 3:0 */ - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL (0xff<<24) /* 31:24 */ -#define A60810_RG_USB20_DRVVBUS (0x1<<23) /* 23:23 */ -#define A60810_RG_DEBUG_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_USB20_OTG_PROBE (0x3<<20) /* 21:20 */ -#define A60810_RG_USB20_SW_PLLMODE (0x3<<18) /* 19:18 */ -#define A60810_RG_USB20_BERTH (0x3<<16) /* 17:16 */ -#define A60810_RG_USB20_LBMODE (0x3<<13) /* 14:13 */ -#define A60810_RG_USB20_FORCE_TAP (0x1<<12) /* 12:12 */ -#define A60810_RG_USB20_TAPSEL (0xfff<<0) /* 11:0 */ - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE (0x3<<30) /* 31:30 */ -#define A60810_FORCE_UART_I (0x1<<29) /* 29:29 */ -#define A60810_FORCE_UART_BIAS_EN (0x1<<28) /* 28:28 */ -#define A60810_FORCE_UART_TX_OE (0x1<<27) /* 27:27 */ -#define A60810_FORCE_UART_EN (0x1<<26) /* 26:26 */ -#define A60810_FORCE_USB_CLKEN (0x1<<25) /* 25:25 */ -#define A60810_FORCE_DRVVBUS (0x1<<24) /* 24:24 */ -#define A60810_FORCE_DATAIN (0x1<<23) /* 23:23 */ -#define A60810_FORCE_TXVALID (0x1<<22) /* 22:22 */ -#define A60810_FORCE_DM_PULLDOWN (0x1<<21) /* 21:21 */ -#define A60810_FORCE_DP_PULLDOWN (0x1<<20) /* 20:20 */ -#define A60810_FORCE_XCVRSEL (0x1<<19) /* 19:19 */ -#define A60810_FORCE_SUSPENDM (0x1<<18) /* 18:18 */ -#define A60810_FORCE_TERMSEL (0x1<<17) /* 17:17 */ -#define A60810_FORCE_OPMODE (0x1<<16) /* 16:16 */ -#define A60810_UTMI_MUXSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_RESET (0x1<<14) /* 14:14 */ -#define A60810_RG_DATAIN (0xf<<10) /* 13:10 */ -#define A60810_RG_TXVALIDH (0x1<<9) /* 9:9 */ -#define A60810_RG_TXVALID (0x1<<8) /* 8:8 */ -#define A60810_RG_DMPULLDOWN (0x1<<7) /* 7:7 */ -#define A60810_RG_DPPULLDOWN (0x1<<6) /* 6:6 */ -#define A60810_RG_XCVRSEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SUSPENDM (0x1<<3) /* 3:3 */ -#define A60810_RG_TERMSEL (0x1<<2) /* 2:2 */ -#define A60810_RG_OPMODE (0x3<<0) /* 1:0 */ - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_USB20_PRBS7_BITCNT (0x3f<<24) /* 29:24 */ -#define A60810_RG_USB20_CLK48M_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_USB20_CLK60M_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_UART_I (0x1<<19) /* 19:19 */ -#define A60810_RG_UART_BIAS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_UART_TX_OE (0x1<<17) /* 17:17 */ -#define A60810_RG_UART_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_IP_U2_PORT_POWER (0x1<<15) /* 15:15 */ -#define A60810_FORCE_IP_U2_PORT_POWER (0x1<<14) /* 14:14 */ -#define A60810_FORCE_VBUSVALID (0x1<<13) /* 13:13 */ -#define A60810_FORCE_SESSEND (0x1<<12) /* 12:12 */ -#define A60810_FORCE_BVALID (0x1<<11) /* 11:11 */ -#define A60810_FORCE_AVALID (0x1<<10) /* 10:10 */ -#define A60810_FORCE_IDDIG (0x1<<9) /* 9:9 */ -#define A60810_FORCE_IDPULLUP (0x1<<8) /* 8:8 */ -#define A60810_RG_VBUSVALID (0x1<<5) /* 5:5 */ -#define A60810_RG_SESSEND (0x1<<4) /* 4:4 */ -#define A60810_RG_BVALID (0x1<<3) /* 3:3 */ -#define A60810_RG_AVALID (0x1<<2) /* 2:2 */ -#define A60810_RG_IDDIG (0x1<<1) /* 1:1 */ -#define A60810_RG_IDPULLUP (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH (0xff<<0) /* 7:0 */ -#define E60802_RG_USB20_EOP_CTL (0xf<<16) /* 19:16 */ - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O (0x1<<31) /* 31:31 */ -#define A60810_RGO_USB20_LB_PASS (0x1<<30) /* 30:30 */ -#define A60810_RGO_USB20_LB_DONE (0x1<<29) /* 29:29 */ -#define A60810_AD_USB20_BVALID (0x1<<28) /* 28:28 */ -#define A60810_USB20_IDDIG (0x1<<27) /* 27:27 */ -#define A60810_AD_USB20_VBUSVALID (0x1<<26) /* 26:26 */ -#define A60810_AD_USB20_SESSEND (0x1<<25) /* 25:25 */ -#define A60810_AD_USB20_AVALID (0x1<<24) /* 24:24 */ -#define A60810_USB20_LINE_STATE (0x3<<22) /* 23:22 */ -#define A60810_USB20_HST_DISCON (0x1<<21) /* 21:21 */ -#define A60810_USB20_TX_READY (0x1<<20) /* 20:20 */ -#define A60810_USB20_RX_ERROR (0x1<<19) /* 19:19 */ -#define A60810_USB20_RX_ACTIVE (0x1<<18) /* 18:18 */ -#define A60810_USB20_RX_VALIDH (0x1<<17) /* 17:17 */ -#define A60810_USB20_RX_VALID (0x1<<16) /* 16:16 */ -#define A60810_USB20_DATA_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT (0xff<<24) /* 31:24 */ -#define A60810_RGO_RXACTIVE_CNT (0xff<<16) /* 23:16 */ -#define A60810_RGO_USB20_LB_BERCNT (0xff<<8) /* 15:8 */ -#define A60810_USB20_PROBE_OUT (0xff<<0) /* 7:0 */ - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGO_USB20_PRBS7_DONE (0x1<<3) /* 3:3 */ -#define A60810_RGO_USB20_PRBS7_LOCK (0x1<<2) /* 2:2 */ -#define A60810_RGO_USB20_PRBS7_PASS (0x1<<1) /* 1:1 */ -#define A60810_RGO_USB20_PRBS7_PASSTH (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT (0xf<<28) /* 31:28 */ -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT (0xf<<24) /* 27:24 */ -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE (0x1<<16) /* 16:16 */ -#define A60810_RG_CHGDT_ISRC_LEV (0x3<<14) /* 15:14 */ -#define A60810_RG_CHGDT_VDATSRC (0x1<<13) /* 13:13 */ -#define A60810_RG_CHGDT_BGVREF_SEL (0x7<<10) /* 12:10 */ -#define A60810_RG_CHGDT_RDVREF_SEL (0x3<<8) /* 9:8 */ -#define A60810_RG_CHGDT_ISRC_DP (0x1<<7) /* 7:7 */ -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM (0x1<<6) /* 6:6 */ -#define A60810_RG_CHGDT_VDAT_DM (0x1<<5) /* 5:5 */ -#define A60810_RG_CHGDT_OPOUT_DP (0x1<<4) /* 4:4 */ -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP (0x1<<3) /* 3:3 */ -#define A60810_RG_SIFSLV_CHGDT_COMP_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_CHGDT_EN (0x1<<0) /* 0:0 */ - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV (0xff<<0) /* 7:0 */ - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG (0x1<<4) /* 4:4 */ -#define A60810_USB20_OTG_REG (0x1<<3) /* 3:3 */ -#define A60810_CHGDT_REG (0x1<<2) /* 2:2 */ -#define A60810_USB11_REG (0x1<<1) /* 1:1 */ -#define A60810_USB20_REG (0x1<<0) /* 0:0 */ - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE (0xff<<24) /* 31:24 */ -#define A60810_USB11_VERSION_CODE (0xff<<16) /* 23:16 */ -#define A60810_VERSION_CODE_ANA (0xff<<8) /* 15:8 */ -#define A60810_VERSION_CODE_DIG (0xff<<0) /* 7:0 */ - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE (0xff<<24) /* 31:24 */ -#define A60810_I2C_MODE (0x1<<16) /* 16:16 */ - -/* OFFSET */ - -/* U3D_USBPHYACR0 */ -#define A60810_RG_USB20_MPX_OUT_SEL_OFST (28) -#define A60810_RG_USB20_TX_PH_ROT_SEL_OFST (24) -#define A60810_RG_USB20_PLL_DIVEN_OFST (20) -#define A60810_RG_USB20_PLL_BR_OFST (18) -#define A60810_RG_USB20_PLL_BP_OFST (17) -#define A60810_RG_USB20_PLL_BLP_OFST (16) -#define A60810_RG_USB20_USBPLL_FORCE_ON_OFST (15) -#define A60810_RG_USB20_PLL_FBDIV_OFST (8) -#define A60810_RG_USB20_PLL_PREDIV_OFST (6) -#define A60810_RG_USB20_INTR_EN_OFST (5) -#define A60810_RG_USB20_REF_EN_OFST (4) -#define A60810_RG_USB20_BGR_DIV_OFST (2) -#define A60810_RG_SIFSLV_CHP_EN_OFST (1) -#define A60810_RG_SIFSLV_BGR_EN_OFST (0) - -/* U3D_USBPHYACR1 */ -#define A60810_RG_USB20_INTR_CAL_OFST (19) -#define A60810_RG_USB20_OTG_VBUSTH_OFST (16) -#define A60810_RG_USB20_VRT_VREF_SEL_OFST (12) -#define A60810_RG_USB20_TERM_VREF_SEL_OFST (8) -#define A60810_RG_USB20_MPX_SEL_OFST (0) - -/* U3D_USBPHYACR2 */ -#define A60810_RG_SIFSLV_MAC_BANDGAP_EN_OFST (17) -#define A60810_RG_SIFSLV_MAC_CHOPPER_EN_OFST (16) -#define A60810_RG_USB20_CLKREF_REV_OFST (0) - -/* U3D_USBPHYACR4 */ -#define A60810_RG_USB20_DP_ABIST_SOURCE_EN_OFST (31) -#define A60810_RG_USB20_DP_ABIST_SELE_OFST (24) -#define A60810_RG_USB20_ICUSB_EN_OFST (16) -#define A60810_RG_USB20_LS_CR_OFST (12) -#define A60810_RG_USB20_FS_CR_OFST (8) -#define A60810_RG_USB20_LS_SR_OFST (4) -#define A60810_RG_USB20_FS_SR_OFST (0) - -/* U3D_USBPHYACR5 */ -#define A60810_RG_USB20_DISC_FIT_EN_OFST (28) -#define A60810_RG_USB20_INIT_SQ_EN_DG_OFST (26) -#define A60810_RG_USB20_HSTX_TMODE_SEL_OFST (24) -#define A60810_RG_USB20_SQD_OFST (22) -#define A60810_RG_USB20_DISCD_OFST (20) -#define A60810_RG_USB20_HSTX_TMODE_EN_OFST (19) -#define A60810_RG_USB20_PHYD_MONEN_OFST (18) -#define A60810_RG_USB20_INLPBK_EN_OFST (17) -#define A60810_RG_USB20_CHIRP_EN_OFST (16) -#define A60810_RG_USB20_HSTX_SRCAL_EN_OFST (15) -#define A60810_RG_USB20_HSTX_SRCTRL_OFST (12) -#define A60810_RG_USB20_HS_100U_U3_EN_OFST (11) -#define A60810_RG_USB20_GBIAS_ENB_OFST (10) -#define A60810_RG_USB20_DM_ABIST_SOURCE_EN_OFST (7) -#define A60810_RG_USB20_DM_ABIST_SELE_OFST (0) - -/* U3D_USBPHYACR6 */ -#define A60810_RG_USB20_ISO_EN_OFST (31) -#define A60810_RG_USB20_PHY_REV_OFST (24) -#define A60810_RG_USB20_BC11_SW_EN_OFST (23) -#define A60810_RG_USB20_SR_CLK_SEL_OFST (22) -#define A60810_RG_USB20_OTG_VBUSCMP_EN_OFST (20) -#define A60810_RG_USB20_OTG_ABIST_EN_OFST (19) -#define A60810_RG_USB20_OTG_ABIST_SELE_OFST (16) -#define A60810_RG_USB20_HSRX_MMODE_SELE_OFST (12) -#define A60810_RG_USB20_HSRX_BIAS_EN_SEL_OFST (9) -#define A60810_RG_USB20_HSRX_TMODE_EN_OFST (8) -#define A60810_RG_USB20_DISCTH_OFST (4) -#define A60810_RG_USB20_SQTH_OFST (0) - -/* U3D_U2PHYACR3 */ -#define A60810_RG_USB20_HSTX_DBIST_OFST (28) -#define A60810_RG_USB20_HSTX_BIST_EN_OFST (26) -#define A60810_RG_USB20_HSTX_I_EN_MODE_OFST (24) -#define A60810_RG_USB20_USB11_TMODE_EN_OFST (19) -#define A60810_RG_USB20_TMODE_FS_LS_TX_EN_OFST (18) -#define A60810_RG_USB20_TMODE_FS_LS_RCV_EN_OFST (17) -#define A60810_RG_USB20_TMODE_FS_LS_MODE_OFST (16) -#define A60810_RG_USB20_HS_TERM_EN_MODE_OFST (13) -#define A60810_RG_USB20_PUPD_BIST_EN_OFST (12) -#define A60810_RG_USB20_EN_PU_DM_OFST (11) -#define A60810_RG_USB20_EN_PD_DM_OFST (10) -#define A60810_RG_USB20_EN_PU_DP_OFST (9) -#define A60810_RG_USB20_EN_PD_DP_OFST (8) - -/* U3D_U2PHYACR4 */ -#define A60810_RG_USB20_DP_100K_MODE_OFST (18) -#define A60810_RG_USB20_DM_100K_EN_OFST (17) -#define A60810_USB20_DP_100K_EN_OFST (16) -#define A60810_USB20_GPIO_DM_I_OFST (15) -#define A60810_USB20_GPIO_DP_I_OFST (14) -#define A60810_USB20_GPIO_DM_OE_OFST (13) -#define A60810_USB20_GPIO_DP_OE_OFST (12) -#define A60810_RG_USB20_GPIO_CTL_OFST (9) -#define A60810_USB20_GPIO_MODE_OFST (8) -#define A60810_RG_USB20_TX_BIAS_EN_OFST (5) -#define A60810_RG_USB20_TX_VCMPDN_EN_OFST (4) -#define A60810_RG_USB20_HS_SQ_EN_MODE_OFST (2) -#define A60810_RG_USB20_HS_RCV_EN_MODE_OFST (0) - -/* U3D_U2PHYAMON0 */ -#define A60810_RGO_USB20_GPIO_DM_O_OFST (1) -#define A60810_RGO_USB20_GPIO_DP_O_OFST (0) - -/* U3D_U2PHYDCR0 */ -#define A60810_RG_USB20_CDR_TST_OFST (30) -#define A60810_RG_USB20_GATED_ENB_OFST (29) -#define A60810_RG_USB20_TESTMODE_OFST (26) -#define A60810_RG_SIFSLV_USB20_PLL_STABLE_OFST (25) -#define A60810_RG_SIFSLV_USB20_PLL_FORCE_ON_OFST (24) -#define A60810_RG_USB20_PHYD_RESERVE_OFST (8) -#define A60810_RG_USB20_EBTHRLD_OFST (7) -#define A60810_RG_USB20_EARLY_HSTX_I_OFST (6) -#define A60810_RG_USB20_TX_TST_OFST (5) -#define A60810_RG_USB20_NEGEDGE_ENB_OFST (4) -#define A60810_RG_USB20_CDR_FILT_OFST (0) - -/* U3D_U2PHYDCR1 */ -#define A60810_RG_USB20_PROBE_SEL_OFST (24) -#define A60810_RG_USB20_DRVVBUS_OFST (23) -#define A60810_RG_DEBUG_EN_OFST (22) -#define A60810_RG_USB20_OTG_PROBE_OFST (20) -#define A60810_RG_USB20_SW_PLLMODE_OFST (18) -#define A60810_RG_USB20_BERTH_OFST (16) -#define A60810_RG_USB20_LBMODE_OFST (13) -#define A60810_RG_USB20_FORCE_TAP_OFST (12) -#define A60810_RG_USB20_TAPSEL_OFST (0) - -/* U3D_U2PHYDTM0 */ -#define A60810_RG_UART_MODE_OFST (30) -#define A60810_FORCE_UART_I_OFST (29) -#define A60810_FORCE_UART_BIAS_EN_OFST (28) -#define A60810_FORCE_UART_TX_OE_OFST (27) -#define A60810_FORCE_UART_EN_OFST (26) -#define A60810_FORCE_USB_CLKEN_OFST (25) -#define A60810_FORCE_DRVVBUS_OFST (24) -#define A60810_FORCE_DATAIN_OFST (23) -#define A60810_FORCE_TXVALID_OFST (22) -#define A60810_FORCE_DM_PULLDOWN_OFST (21) -#define A60810_FORCE_DP_PULLDOWN_OFST (20) -#define A60810_FORCE_XCVRSEL_OFST (19) -#define A60810_FORCE_SUSPENDM_OFST (18) -#define A60810_FORCE_TERMSEL_OFST (17) -#define A60810_FORCE_OPMODE_OFST (16) -#define A60810_UTMI_MUXSEL_OFST (15) -#define A60810_RG_RESET_OFST (14) -#define A60810_RG_DATAIN_OFST (10) -#define A60810_RG_TXVALIDH_OFST (9) -#define A60810_RG_TXVALID_OFST (8) -#define A60810_RG_DMPULLDOWN_OFST (7) -#define A60810_RG_DPPULLDOWN_OFST (6) -#define A60810_RG_XCVRSEL_OFST (4) -#define A60810_RG_SUSPENDM_OFST (3) -#define A60810_RG_TERMSEL_OFST (2) -#define A60810_RG_OPMODE_OFST (0) - -/* U3D_U2PHYDTM1 */ -#define A60810_RG_USB20_PRBS7_EN_OFST (31) -#define A60810_RG_USB20_PRBS7_BITCNT_OFST (24) -#define A60810_RG_USB20_CLK48M_EN_OFST (23) -#define A60810_RG_USB20_CLK60M_EN_OFST (22) -#define A60810_RG_UART_I_OFST (19) -#define A60810_RG_UART_BIAS_EN_OFST (18) -#define A60810_RG_UART_TX_OE_OFST (17) -#define A60810_RG_UART_EN_OFST (16) -#define A60810_RG_IP_U2_PORT_POWER_OFST (15) -#define A60810_FORCE_IP_U2_PORT_POWER_OFST (14) -#define A60810_FORCE_VBUSVALID_OFST (13) -#define A60810_FORCE_SESSEND_OFST (12) -#define A60810_FORCE_BVALID_OFST (11) -#define A60810_FORCE_AVALID_OFST (10) -#define A60810_FORCE_IDDIG_OFST (9) -#define A60810_FORCE_IDPULLUP_OFST (8) -#define A60810_RG_VBUSVALID_OFST (5) -#define A60810_RG_SESSEND_OFST (4) -#define A60810_RG_BVALID_OFST (3) -#define A60810_RG_AVALID_OFST (2) -#define A60810_RG_IDDIG_OFST (1) -#define A60810_RG_IDPULLUP_OFST (0) - -/* U3D_U2PHYDMON0 */ -#define A60810_RG_USB20_PRBS7_BERTH_OFST (0) -#define E60802_RG_USB20_EOP_CTL_OFST (16) - -/* U3D_U2PHYDMON1 */ -#define A60810_USB20_UART_O_OFST (31) -#define A60810_RGO_USB20_LB_PASS_OFST (30) -#define A60810_RGO_USB20_LB_DONE_OFST (29) -#define A60810_AD_USB20_BVALID_OFST (28) -#define A60810_USB20_IDDIG_OFST (27) -#define A60810_AD_USB20_VBUSVALID_OFST (26) -#define A60810_AD_USB20_SESSEND_OFST (25) -#define A60810_AD_USB20_AVALID_OFST (24) -#define A60810_USB20_LINE_STATE_OFST (22) -#define A60810_USB20_HST_DISCON_OFST (21) -#define A60810_USB20_TX_READY_OFST (20) -#define A60810_USB20_RX_ERROR_OFST (19) -#define A60810_USB20_RX_ACTIVE_OFST (18) -#define A60810_USB20_RX_VALIDH_OFST (17) -#define A60810_USB20_RX_VALID_OFST (16) -#define A60810_USB20_DATA_OUT_OFST (0) - -/* U3D_U2PHYDMON2 */ -#define A60810_RGO_TXVALID_CNT_OFST (24) -#define A60810_RGO_RXACTIVE_CNT_OFST (16) -#define A60810_RGO_USB20_LB_BERCNT_OFST (8) -#define A60810_USB20_PROBE_OUT_OFST (0) - -/* U3D_U2PHYDMON3 */ -#define A60810_RGO_USB20_PRBS7_ERRCNT_OFST (16) -#define A60810_RGO_USB20_PRBS7_DONE_OFST (3) -#define A60810_RGO_USB20_PRBS7_LOCK_OFST (2) -#define A60810_RGO_USB20_PRBS7_PASS_OFST (1) -#define A60810_RGO_USB20_PRBS7_PASSTH_OFST (0) - -/* U3D_U2PHYBC12C */ -#define A60810_RG_SIFSLV_CHGDT_DEGLCH_CNT_OFST (28) -#define A60810_RG_SIFSLV_CHGDT_CTRL_CNT_OFST (24) -#define A60810_RG_SIFSLV_CHGDT_FORCE_MODE_OFST (16) -#define A60810_RG_CHGDT_ISRC_LEV_OFST (14) -#define A60810_RG_CHGDT_VDATSRC_OFST (13) -#define A60810_RG_CHGDT_BGVREF_SEL_OFST (10) -#define A60810_RG_CHGDT_RDVREF_SEL_OFST (8) -#define A60810_RG_CHGDT_ISRC_DP_OFST (7) -#define A60810_RG_SIFSLV_CHGDT_OPOUT_DM_OFST (6) -#define A60810_RG_CHGDT_VDAT_DM_OFST (5) -#define A60810_RG_CHGDT_OPOUT_DP_OFST (4) -#define A60810_RG_SIFSLV_CHGDT_VDAT_DP_OFST (3) -#define A60810_RG_SIFSLV_CHGDT_COMP_EN_OFST (2) -#define A60810_RG_SIFSLV_CHGDT_OPDRV_EN_OFST (1) -#define A60810_RG_CHGDT_EN_OFST (0) - -/* U3D_U2PHYBC12C1 */ -#define A60810_RG_CHGDT_REV_OFST (0) - -/* U3D_REGFPPC */ -#define A60810_USB11_OTG_REG_OFST (4) -#define A60810_USB20_OTG_REG_OFST (3) -#define A60810_CHGDT_REG_OFST (2) -#define A60810_USB11_REG_OFST (1) -#define A60810_USB20_REG_OFST (0) - -/* U3D_VERSIONC */ -#define A60810_VERSION_CODE_REGFILE_OFST (24) -#define A60810_USB11_VERSION_CODE_OFST (16) -#define A60810_VERSION_CODE_ANA_OFST (8) -#define A60810_VERSION_CODE_DIG_OFST (0) - -/* U3D_REGFCOM */ -#define A60810_RG_PAGE_OFST (24) -#define A60810_I2C_MODE_OFST (16) - -/* ///////////////////////////////////////////////////////////////// */ - -struct u3phya_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg2; - __le32 reg3; - /* 0x10 */ - __le32 reg4; - __le32 reg5; - __le32 reg6; - __le32 reg7; - /* 0x20 */ - __le32 reg8; - __le32 reg9; - __le32 rega; - __le32 regb; - /* 0x30 */ - __le32 regc; -}; - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CHPEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_BG_DIV (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_INTR_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_MPX_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_MPX_SEL (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_REF_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_VRT_VREF_SEL (0xf<<11) /* 14:11 */ -#define A60810_RG_SSUSB_BG_MONEN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_INT_BIAS_SEL (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EXT_BIAS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_CLKDRV_OFFSET (0x3<<2) /* 3:2 */ -#define A60810_RG_PCIE_CLKDRV_SLEW (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP (0x7<<29) /* 31:29 */ -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_XTAL_MON_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_XTAL_HYS (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE (0xffff<<10) /* 25:10 */ -#define A60810_RG_SSUSB_SYSPLL_PREDIV (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_SYSPLL_POSDIV (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_SYSPLL_VOD_EN (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_SYSPLL_RST_DLY (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_SYSPLL_BLP (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_SYSPLL_BP (0x1<<0) /* 0:0 */ - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_BC (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_SYSPLL_BACK_EN (0x1<<24) /* 24:24 */ - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV (0x7fffffff<<1)/* 31:1 */ -#define A60810_RG_SSUSB_SYSPLL_HR_EN (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS (0x3<<29) /* 30:29 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD (0x3<<27) /* 28:27 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_SYSPLL_RESERVE (0xff<<17)/* 24:17 */ -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE (0xffff<<1)/* 16:1 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_CALIB (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_IDEM_BIAS (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_TX_R50_FON (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_TX_SR (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_RXDET_RSEL (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXDET_UPDN_SEL (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_L (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_RXDET_VTHSEL_H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CKMON_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TX_VLMON_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_TX_VLMON_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CKMON_SEL (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_RXLBTX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXLBRX_EN (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RESERVE (0x3ff<<16)/* 25:16 */ -#define A60810_RG_SSUSB_PLL_POSDIV (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_PLL_VOD_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_PLL_MONREF_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_MONCK_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_PLL_MONVC_EN (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_PLL_RLH_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KS (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_AUTOK_KF (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_RST_DLY (0x3<<2) /* 3:2 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_CLK_PH_INV (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_VADJ (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDS_MONEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE (0x7<<20) /* 22:20 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_DDS_C (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2 (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_LFPS_LPF (0x3<<13) /* 14:13 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_CDR_OSCDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_MONMUX (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_CDR_RST_DLY (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CDR_BYPASS (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_CDR_PI_SLEW (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_CDR_EPEN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_MONEN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_CDR_MONEN_DIG (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_REGOD (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KS (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_CDR_AUTOK_KF (0x3<<9) /* 10:9 */ -#define A60810_RG_SSUSB_RX_DAC_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DAC_PWD (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_CURSEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MUX (0x1f<<1) /* 5:1 */ -#define A60810_RG_SSUSB_RX_R2T_EN (0x1<<0) /* 0:0 */ - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_50_LOWER (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_RX_50_TAR (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_RX_SW_CTRL (0xf<<21) /* 24:21 */ -#define A60810_RG_PCIE_SIGDET_VTH (0x3<<19) /* 20:19 */ -#define A60810_RG_PCIE_SIGDET_LPF (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_LFPS_MON_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RX_PD_RST (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_PD_RST_PASS (0x1<<9) /* 9:9 */ - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_RXAFE_RESERVE (0xff<<16) /* 23:16 */ -#define A60810_RG_PCIE_RX_RESERVE (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_VRT_25M_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_MPX_SEL_L0 (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_SIGDET_HF (0x3<<0) /* 1:0 */ - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_reg0 */ -#define A60810_RG_SSUSB_BGR_EN_OFST (31) -#define A60810_RG_SSUSB_CHPEN_OFST (30) -#define A60810_RG_SSUSB_BG_DIV_OFST (28) -#define A60810_RG_SSUSB_INTR_EN_OFST (26) -#define A60810_RG_SSUSB_MPX_EN_OFST (24) -#define A60810_RG_SSUSB_MPX_SEL_OFST (16) -#define A60810_RG_SSUSB_REF_EN_OFST (15) -#define A60810_RG_SSUSB_VRT_VREF_SEL_OFST (11) -#define A60810_RG_SSUSB_BG_MONEN_OFST (8) -#define A60810_RG_SSUSB_INT_BIAS_SEL_OFST (7) -#define A60810_RG_SSUSB_EXT_BIAS_SEL_OFST (6) -#define A60810_RG_PCIE_CLKDRV_OFFSET_OFST (2) -#define A60810_RG_PCIE_CLKDRV_SLEW_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_PCIE_CLKDRV_AMP_OFST (29) -#define A60810_RG_SSUSB_XTAL_TST_A2DCK_EN_OFST (28) -#define A60810_RG_SSUSB_XTAL_MON_EN_OFST (27) -#define A60810_RG_SSUSB_XTAL_HYS_OFST (26) -#define A60810_RG_SSUSB_XTAL_TOP_RESERVE_OFST (10) -#define A60810_RG_SSUSB_SYSPLL_PREDIV_OFST (8) -#define A60810_RG_SSUSB_SYSPLL_POSDIV_OFST (6) -#define A60810_RG_SSUSB_SYSPLL_VCO_DIV_SEL_OFST (5) -#define A60810_RG_SSUSB_SYSPLL_VOD_EN_OFST (4) -#define A60810_RG_SSUSB_SYSPLL_RST_DLY_OFST (2) -#define A60810_RG_SSUSB_SYSPLL_BLP_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_BP_OFST (0) - -/* U3D_reg2 */ -#define A60810_RG_SSUSB_SYSPLL_BR_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_BC_OFST (30) -#define A60810_RG_SSUSB_SYSPLL_MONCK_EN_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_MONVC_EN_OFST (28) -#define A60810_RG_SSUSB_SYSPLL_MONREF_EN_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_IFM_OFST (26) -#define A60810_RG_SSUSB_SYSPLL_SDM_OUT_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_BACK_EN_OFST (24) - -/* U3D_reg3 */ -#define A60810_RG_SSUSB_SYSPLL_FBDIV_OFST (1) -#define A60810_RG_SSUSB_SYSPLL_HR_EN_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_EN_OFST (31) -#define A60810_RG_SSUSB_SYSPLL_SDM_DI_LS_OFST (29) -#define A60810_RG_SSUSB_SYSPLL_SDM_ORD_OFST (27) -#define A60810_RG_SSUSB_SYSPLL_SDM_MODE_OFST (25) -#define A60810_RG_SSUSB_SYSPLL_RESERVE_OFST (17) -#define A60810_RG_SSUSB_SYSPLL_TOP_RESERVE_OFST (1) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_TX250MCK_INVB_OFST (31) -#define A60810_RG_SSUSB_IDRV_ITAILOP_EN_OFST (30) -#define A60810_RG_SSUSB_IDRV_CALIB_OFST (24) -#define A60810_RG_SSUSB_IDEM_BIAS_OFST (20) -#define A60810_RG_SSUSB_TX_R50_FON_OFST (19) -#define A60810_RG_SSUSB_TX_SR_OFST (16) -#define A60810_RG_SSUSB_RXDET_RSEL_OFST (14) -#define A60810_RG_SSUSB_RXDET_UPDN_FORCE_OFST (13) -#define A60810_RG_SSUSB_RXDET_UPDN_SEL_OFST (12) -#define A60810_RG_SSUSB_RXDET_VTHSEL_L_OFST (10) -#define A60810_RG_SSUSB_RXDET_VTHSEL_H_OFST (8) -#define A60810_RG_SSUSB_CKMON_EN_OFST (7) -#define A60810_RG_SSUSB_TX_VLMON_EN_OFST (6) -#define A60810_RG_SSUSB_TX_VLMON_SEL_OFST (4) -#define A60810_RG_SSUSB_CKMON_SEL_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_TX_EIDLE_CM_OFST (28) -#define A60810_RG_SSUSB_RXLBTX_EN_OFST (27) -#define A60810_RG_SSUSB_TXLBRX_EN_OFST (26) -#define A60810_RG_SSUSB_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_POSDIV_OFST (14) -#define A60810_RG_SSUSB_PLL_AUTOK_LOAD_OFST (13) -#define A60810_RG_SSUSB_PLL_VOD_EN_OFST (12) -#define A60810_RG_SSUSB_PLL_MONREF_EN_OFST (11) -#define A60810_RG_SSUSB_PLL_MONCK_EN_OFST (10) -#define A60810_RG_SSUSB_PLL_MONVC_EN_OFST (9) -#define A60810_RG_SSUSB_PLL_RLH_EN_OFST (8) -#define A60810_RG_SSUSB_PLL_AUTOK_KS_OFST (6) -#define A60810_RG_SSUSB_PLL_AUTOK_KF_OFST (4) -#define A60810_RG_SSUSB_PLL_RST_DLY_OFST (2) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_RESERVE_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_PRD_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_SSC_PHASE_INI_OFST (31) -#define A60810_RG_SSUSB_PLL_SSC_TRI_EN_OFST (30) -#define A60810_RG_SSUSB_PLL_CLK_PH_INV_OFST (29) -#define A60810_RG_SSUSB_PLL_DDS_LPF_EN_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RST_SEL_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_VADJ_OFST (26) -#define A60810_RG_SSUSB_PLL_DDS_MONEN_OFST (25) -#define A60810_RG_SSUSB_PLL_DDS_SEL_EXT_OFST (24) -#define A60810_RG_SSUSB_PLL_DDS_PI_PL_EN_OFST (23) -#define A60810_RG_SSUSB_PLL_DDS_FRAC_MUTE_OFST (20) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_DDS_C_OFST (16) -#define A60810_RG_SSUSB_PLL_DDS_PREDIV2_OFST (15) -#define A60810_RG_SSUSB_LFPS_LPF_OFST (13) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_CDR_PD_DIV_BYPASS_OFST (31) -#define A60810_RG_SSUSB_CDR_PD_DIV_SEL_OFST (30) -#define A60810_RG_SSUSB_CDR_CPBIAS_SEL_OFST (29) -#define A60810_RG_SSUSB_CDR_OSCDET_EN_OFST (28) -#define A60810_RG_SSUSB_CDR_MONMUX_OFST (27) -#define A60810_RG_SSUSB_CDR_RST_DLY_OFST (25) -#define A60810_RG_SSUSB_CDR_RSTB_MANUAL_OFST (24) -#define A60810_RG_SSUSB_CDR_BYPASS_OFST (22) -#define A60810_RG_SSUSB_CDR_PI_SLEW_OFST (20) -#define A60810_RG_SSUSB_CDR_EPEN_OFST (19) -#define A60810_RG_SSUSB_CDR_AUTOK_LOAD_OFST (18) -#define A60810_RG_SSUSB_CDR_MONEN_OFST (16) -#define A60810_RG_SSUSB_CDR_MONEN_DIG_OFST (15) -#define A60810_RG_SSUSB_CDR_REGOD_OFST (13) -#define A60810_RG_SSUSB_CDR_AUTOK_KS_OFST (11) -#define A60810_RG_SSUSB_CDR_AUTOK_KF_OFST (9) -#define A60810_RG_SSUSB_RX_DAC_EN_OFST (8) -#define A60810_RG_SSUSB_RX_DAC_PWD_OFST (7) -#define A60810_RG_SSUSB_EQ_CURSEL_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MUX_OFST (1) -#define A60810_RG_SSUSB_RX_R2T_EN_OFST (0) - -/* U3D_regA */ -#define A60810_RG_SSUSB_RX_T2R_EN_OFST (31) -#define A60810_RG_SSUSB_RX_50_LOWER_OFST (28) -#define A60810_RG_SSUSB_RX_50_TAR_OFST (26) -#define A60810_RG_SSUSB_RX_SW_CTRL_OFST (21) -#define A60810_RG_PCIE_SIGDET_VTH_OFST (19) -#define A60810_RG_PCIE_SIGDET_LPF_OFST (17) -#define A60810_RG_SSUSB_LFPS_MON_EN_OFST (16) -#define A60810_RG_SSUSB_RXAFE_DCMON_SEL_OFST (12) -#define A60810_RG_SSUSB_RX_P1_ENTRY_PASS_OFST (11) -#define A60810_RG_SSUSB_RX_PD_RST_OFST (10) -#define A60810_RG_SSUSB_RX_PD_RST_PASS_OFST (9) - -/* U3D_regB */ -#define A60810_RG_SSUSB_CDR_RESERVE_OFST (24) -#define A60810_RG_SSUSB_RXAFE_RESERVE_OFST (16) -#define A60810_RG_PCIE_RX_RESERVE_OFST (8) -#define A60810_RG_SSUSB_VRT_25M_EN_OFST (7) -#define A60810_RG_SSUSB_RX_PD_PICAL_SWAP_OFST (6) -#define A60810_RG_SSUSB_RX_DAC_MEAS_EN_OFST (5) -#define A60810_RG_SSUSB_MPX_SEL_L0_OFST (4) -#define A60810_RG_SSUSB_LFPS_SLCOUT_SEL_OFST (3) -#define A60810_RG_SSUSB_LFPS_CMPOUT_SEL_OFST (2) -#define A60810_RG_PCIE_SIGDET_HF_OFST (0) - -/* U3D_regC */ -#define A60810_RGS_SSUSB_RX_DEBUG_RESERVE_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phya_da_reg_a { - /* 0x0 */ - __le32 reg0; - __le32 reg1; - __le32 reg4; - __le32 reg5; - /* 0x10 */ - __le32 reg6; - __le32 reg7; - __le32 reg8; - __le32 reg9; - /* 0x20 */ - __le32 reg10; - __le32 reg12; - __le32 reg13; - __le32 reg14; - /* 0x30 */ - __le32 reg15; - __le32 reg16; - __le32 reg19; - __le32 reg20; - /* 0x40 */ - __le32 reg21; - __le32 reg23; - __le32 reg25; - __le32 reg26; - /* 0x50 */ - __le32 reg28; - __le32 reg29; - __le32 reg30; - __le32 reg31; - /* 0x60 */ - __le32 reg32; - __le32 reg33; -}; - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_SPEED_PE2H (0x1<<23) /* 23:23 */ -#define A60810_RG_PCIE_SPEED_PE1D (0x1<<22) /* 22:22 */ -#define A60810_RG_PCIE_SPEED_PE1H (0x1<<21) /* 21:21 */ -#define A60810_RG_PCIE_SPEED_U3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3 (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D (0x1<<30) /* 30:30 */ -#define A60810_RG_USB20_REFCK_SEL_PE2H (0x1<<29) /* 29:29 */ -#define A60810_RG_USB20_REFCK_SEL_PE1D (0x1<<28) /* 28:28 */ -#define A60810_RG_USB20_REFCK_SEL_PE1H (0x1<<27) /* 27:27 */ -#define A60810_RG_USB20_REFCK_SEL_U3 (0x1<<26) /* 26:26 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1D (0x1<<18) /* 18:18 */ -#define A60810_RG_PCIE_REFCK_DIV4_PE1H (0x1<<17) /* 17:17 */ -#define A60810_RG_PCIE_REFCK_DIV4_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_PCIE_MODE_PE2D (0x1<<8) /* 8:8 */ -#define A60810_RG_PCIE_MODE_PE2H (0x1<<3) /* 3:3 */ -#define A60810_RG_PCIE_MODE_PE1D (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_MODE_PE1H (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_MODE_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D (0x7<<22) /* 24:22 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H (0x7<<19) /* 21:19 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H (0x7<<13) /* 15:13 */ -#define A60810_RG_SSUSB_PLL_DIVEN_U3 (0x7<<10) /* 12:10 */ -#define A60810_RG_SSUSB_PLL_BC_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_BC_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_PLL_BC_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_PLL_BC_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_BC_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_PLL_BR_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_PLL_BR_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_BR_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_BR_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_PLL_IC_PE2D (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IC_PE2H (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_PLL_IC_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IC_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IC_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_IR_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_IR_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_IR_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_IR_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_PLL_BP_PE2H (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_PLL_BP_PE1D (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_PLL_BP_PE1H (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PLL_BP_U3 (0xf<<0) /* 3:0 */ - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H (0x7f<<24)/* 30:24 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D (0x7f<<16)/* 22:16 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_PLL_PREDIV_U3 (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3 (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D (0x7fffffff<<0)/* 30:0 */ - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3 (0xffff<<0) /* 15:0 */ - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D (0xffff<<0) /* 15:0 */ - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D (0xffff<<0) /* 15:0 */ - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H (0xffff<<0) /* 15:0 */ - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H (0xffff<<0) /* 15:0 */ - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3 (0x1<<0) /* 0:0 */ - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2H (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1D (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_CDR_BPA_PE1H (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_CDR_BPA_U3 (0x3<<0) /* 1:0 */ - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BPB_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BPB_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CDR_BR_PE2H (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_CDR_BR_PE1D (0x7<<6) /* 8:6 */ -#define A60810_RG_SSUSB_CDR_BR_PE1H (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_CDR_BR_U3 (0x7<<0) /* 2:0 */ - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_CDR_FBDIV_U3 (0x7f<<0) /* 6:0 */ - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D (0x3<<30) /* 31:30 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H (0x3<<28) /* 29:28 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_U3 (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H (0x3<<14) /* 15:14 */ -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3 (0x3<<12) /* 13:12 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_KVSEL_U3 (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D (0x7f<<0) /* 6:0 */ - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2H (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1D (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE1H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_CMPWD_U3 (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_EQ_RSTEP2_U3 (0x3<<0) /* 1:0 */ - -/* OFFSET DEFINITION */ - -/* U3D_reg0 */ -#define A60810_RG_PCIE_SPEED_PE2D_OFST (24) -#define A60810_RG_PCIE_SPEED_PE2H_OFST (23) -#define A60810_RG_PCIE_SPEED_PE1D_OFST (22) -#define A60810_RG_PCIE_SPEED_PE1H_OFST (21) -#define A60810_RG_PCIE_SPEED_U3_OFST (20) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2D_OFST (18) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE2H_OFST (16) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1D_OFST (14) -#define A60810_RG_SSUSB_XTAL_EXT_EN_PE1H_OFST (12) -#define A60810_RG_SSUSB_XTAL_EXT_EN_U3_OFST (10) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2D_OFST (8) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE2H_OFST (6) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1D_OFST (4) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_CDR_REFCK_SEL_U3_OFST (0) - -/* U3D_reg1 */ -#define A60810_RG_USB20_REFCK_SEL_PE2D_OFST (30) -#define A60810_RG_USB20_REFCK_SEL_PE2H_OFST (29) -#define A60810_RG_USB20_REFCK_SEL_PE1D_OFST (28) -#define A60810_RG_USB20_REFCK_SEL_PE1H_OFST (27) -#define A60810_RG_USB20_REFCK_SEL_U3_OFST (26) -#define A60810_RG_PCIE_REFCK_DIV4_PE2D_OFST (25) -#define A60810_RG_PCIE_REFCK_DIV4_PE2H_OFST (24) -#define A60810_RG_PCIE_REFCK_DIV4_PE1D_OFST (18) -#define A60810_RG_PCIE_REFCK_DIV4_PE1H_OFST (17) -#define A60810_RG_PCIE_REFCK_DIV4_U3_OFST (16) -#define A60810_RG_PCIE_MODE_PE2D_OFST (8) -#define A60810_RG_PCIE_MODE_PE2H_OFST (3) -#define A60810_RG_PCIE_MODE_PE1D_OFST (2) -#define A60810_RG_PCIE_MODE_PE1H_OFST (1) -#define A60810_RG_PCIE_MODE_U3_OFST (0) - -/* U3D_reg4 */ -#define A60810_RG_SSUSB_PLL_DIVEN_PE2D_OFST (22) -#define A60810_RG_SSUSB_PLL_DIVEN_PE2H_OFST (19) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_DIVEN_PE1H_OFST (13) -#define A60810_RG_SSUSB_PLL_DIVEN_U3_OFST (10) -#define A60810_RG_SSUSB_PLL_BC_PE2D_OFST (8) -#define A60810_RG_SSUSB_PLL_BC_PE2H_OFST (6) -#define A60810_RG_SSUSB_PLL_BC_PE1D_OFST (4) -#define A60810_RG_SSUSB_PLL_BC_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_BC_U3_OFST (0) - -/* U3D_reg5 */ -#define A60810_RG_SSUSB_PLL_BR_PE2D_OFST (30) -#define A60810_RG_SSUSB_PLL_BR_PE2H_OFST (28) -#define A60810_RG_SSUSB_PLL_BR_PE1D_OFST (26) -#define A60810_RG_SSUSB_PLL_BR_PE1H_OFST (24) -#define A60810_RG_SSUSB_PLL_BR_U3_OFST (22) -#define A60810_RG_SSUSB_PLL_IC_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_IC_PE2H_OFST (12) -#define A60810_RG_SSUSB_PLL_IC_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IC_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IC_U3_OFST (0) - -/* U3D_reg6 */ -#define A60810_RG_SSUSB_PLL_IR_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_IR_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_IR_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_IR_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_IR_U3_OFST (0) - -/* U3D_reg7 */ -#define A60810_RG_SSUSB_PLL_BP_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_BP_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_BP_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_BP_PE1H_OFST (4) -#define A60810_RG_SSUSB_PLL_BP_U3_OFST (0) - -/* U3D_reg8 */ -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2D_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1D_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKSEL_PE1H_OFST (2) -#define A60810_RG_SSUSB_PLL_FBKSEL_U3_OFST (0) - -/* U3D_reg9 */ -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_U3_OFST (0) - -/* U3D_reg10 */ -#define A60810_RG_SSUSB_PLL_PREDIV_PE2D_OFST (26) -#define A60810_RG_SSUSB_PLL_PREDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1D_OFST (18) -#define A60810_RG_SSUSB_PLL_PREDIV_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_PREDIV_U3_OFST (8) -#define A60810_RG_SSUSB_PLL_FBKDIV_PE2D_OFST (0) - -/* U3D_reg12 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_U3_OFST (0) - -/* U3D_reg13 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1H_OFST (0) - -/* U3D_reg14 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE1D_OFST (0) - -/* U3D_reg15 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2H_OFST (0) - -/* U3D_reg16 */ -#define A60810_RG_SSUSB_PLL_PCW_NCPO_PE2D_OFST (0) - -/* U3D_reg19 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST (0) - -/* U3D_reg20 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2H_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1D_OFST (0) - -/* U3D_reg21 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_U3_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA1_PE2D_OFST (0) - -/* U3D_reg23 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE1H_OFST (0) - -/* U3D_reg25 */ -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2D_OFST (16) -#define A60810_RG_SSUSB_PLL_SSC_DELTA_PE2H_OFST (0) - -/* U3D_reg26 */ -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2D_OFST (25) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_PLL_REFCKDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_PLL_REFCKDIV_U3_OFST (0) - -/* U3D_reg28 */ -#define A60810_RG_SSUSB_CDR_BPA_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPA_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPA_PE1D_OFST (10) -#define A60810_RG_SSUSB_CDR_BPA_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_BPA_U3_OFST (0) - -/* U3D_reg29 */ -#define A60810_RG_SSUSB_CDR_BPB_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BPB_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BPB_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BPB_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BPB_U3_OFST (0) - -/* U3D_reg30 */ -#define A60810_RG_SSUSB_CDR_BR_PE2D_OFST (24) -#define A60810_RG_SSUSB_CDR_BR_PE2H_OFST (16) -#define A60810_RG_SSUSB_CDR_BR_PE1D_OFST (6) -#define A60810_RG_SSUSB_CDR_BR_PE1H_OFST (3) -#define A60810_RG_SSUSB_CDR_BR_U3_OFST (0) - -/* U3D_reg31 */ -#define A60810_RG_SSUSB_CDR_FBDIV_PE2H_OFST (24) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1D_OFST (16) -#define A60810_RG_SSUSB_CDR_FBDIV_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_FBDIV_U3_OFST (0) - -/* U3D_reg32 */ -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2D_OFST (30) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE2H_OFST (28) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1D_OFST (26) -#define A60810_RG_SSUSB_EQ_RSTEP1_PE1H_OFST (24) -#define A60810_RG_SSUSB_EQ_RSTEP1_U3_OFST (22) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2D_OFST (20) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE2H_OFST (18) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1D_OFST (16) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_PE1H_OFST (14) -#define A60810_RG_SSUSB_LFPS_DEGLITCH_U3_OFST (12) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2D_OFST (11) -#define A60810_RG_SSUSB_CDR_KVSEL_PE2H_OFST (10) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1D_OFST (9) -#define A60810_RG_SSUSB_CDR_KVSEL_PE1H_OFST (8) -#define A60810_RG_SSUSB_CDR_KVSEL_U3_OFST (7) -#define A60810_RG_SSUSB_CDR_FBDIV_PE2D_OFST (0) - -/* U3D_reg33 */ -#define A60810_RG_SSUSB_RX_CMPWD_PE2D_OFST (26) -#define A60810_RG_SSUSB_RX_CMPWD_PE2H_OFST (25) -#define A60810_RG_SSUSB_RX_CMPWD_PE1D_OFST (24) -#define A60810_RG_SSUSB_RX_CMPWD_PE1H_OFST (23) -#define A60810_RG_SSUSB_RX_CMPWD_U3_OFST (16) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2D_OFST (8) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE2H_OFST (6) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1D_OFST (4) -#define A60810_RG_SSUSB_EQ_RSTEP2_PE1H_OFST (2) -#define A60810_RG_SSUSB_EQ_RSTEP2_U3_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phyd_reg_a { - /* 0x0 */ - __le32 phyd_mix0; - __le32 phyd_mix1; - __le32 phyd_lfps0; - __le32 phyd_lfps1; - /* 0x10 */ - __le32 phyd_impcal0; - __le32 phyd_impcal1; - __le32 phyd_txpll0; - __le32 phyd_txpll1; - /* 0x20 */ - __le32 phyd_txpll2; - __le32 phyd_fl0; - __le32 phyd_mix2; - __le32 phyd_rx0; - /* 0x30 */ - __le32 phyd_t2rlb; - __le32 phyd_cppat; - __le32 phyd_mix3; - __le32 phyd_ebufctl; - /* 0x40 */ - __le32 phyd_pipe0; - __le32 phyd_pipe1; - __le32 phyd_mix4; - __le32 phyd_ckgen0; - /* 0x50 */ - __le32 phyd_mix5; - __le32 phyd_reserved; - __le32 phyd_cdr0; - __le32 phyd_cdr1; - /* 0x60 */ - __le32 phyd_pll_0; - __le32 phyd_pll_1; - __le32 phyd_bcn_det_1; - __le32 phyd_bcn_det_2; - /* 0x70 */ - __le32 eq0; - __le32 eq1; - __le32 eq2; - __le32 eq3; - /* 0x80 */ - __le32 eq_eye0; - __le32 eq_eye1; - __le32 eq_eye2; - __le32 eq_dfe0; - /* 0x90 */ - __le32 eq_dfe1; - __le32 eq_dfe2; - __le32 eq_dfe3; - __le32 reserve0; - /* 0xa0 */ - __le32 phyd_mon0; - __le32 phyd_mon1; - __le32 phyd_mon2; - __le32 phyd_mon3; - /* 0xb0 */ - __le32 phyd_mon4; - __le32 phyd_mon5; - __le32 phyd_mon6; - __le32 phyd_mon7; - /* 0xc0 */ - __le32 phya_rx_mon0; - __le32 phya_rx_mon1; - __le32 phya_rx_mon2; - __le32 phya_rx_mon3; - /* 0xd0 */ - __le32 phya_rx_mon4; - __le32 phya_rx_mon5; - __le32 phyd_cppat2; - __le32 eq_eye3; - /* 0xe0 */ - __le32 kband_out; - __le32 kband_out1; -}; - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TSEQ_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TSEQ_POLEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TSEQ_POL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_P3_PCLK_NG (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TSEQ_TH (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PRBS_BERTH (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_PRBS_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_BPSLOCK (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RTCOMCNT (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_COMCNT (0xf<<4) /* 7:4 */ -#define A60810_RG_SSUSB_PRBSEL_CALIB (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PRBSEL_PCS (0x7<<28) /* 30:28 */ -#define A60810_RG_SSUSB_TXLFPS_PRD (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_P_RX_P0S_CK (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P_TX_P0S_CK (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PDNCTL (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_DRV_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TX_DRV_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TX_DRV_DLY (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_BERT_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_SCP_TH (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_SCP_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXANSIDEC_TEST (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_LFPS_PWD (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXLFPS_OVF (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_P3_ENTRY_SEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_P3_ENTRY (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_RXLFPS_CDRSEL (0x3<<20) /* 21:20 */ -#define A60810_RG_SSUSB_RXLFPS_CDRTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LOCK5G_BLOCK (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_LOB (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_TXLFPS_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_TXLFPS_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RXLFPS_UPB (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_TX_IMP_BIAS (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_FWAKE_TH (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_P1_ENTRY_SEL (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_P1_ENTRY (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RXLFPS_UDF (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_TX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_TX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_IMPCAL_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RX_IMPSEL (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC (0x1f<<10)/* 14:10 */ -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_TXPLL_ON (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_TXPLLON (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_TXPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC (0x3<<10) /* 11:10 */ -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC (0x7<<0) /* 2:0 */ - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PLL_NCPO_CHG (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PLL_DDS_RSTB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_PLL_DDS_PWDB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_PLL_DDSEN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_PLL_AUTOK_VCO (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_PLL_PWD (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_RX_AFE_PWD (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_TCADJ (0x3f<<16)/* 21:16 */ -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PLL_PWD (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FLT_1_DISPERR_B (0x1<<2) /* 2:2 */ - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_TX_LFPS (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_TX_LFPS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXPLL_STB (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TXPLL_STB (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_RXPLL_STB (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TXPLL_STB (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_RXPLL_REFCKSEL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RXPLL_STBMODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_RXPLL_ON (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_FORCE_RXPLLON (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_CDR_AUTOK_VCO (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_CDR_PWD (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_CDR_TCADJ (0x3f<<0) /* 5:0 */ - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET (0xffff<<16)/* 31:16 */ -#define A60810_RG_SSUSB_RX_FL_CYCLECNT (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_RX_EQ_RST_SEL (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXVAL_RST (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXVAL_CNT (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDROS_EN (0x1<<18) /* 18:18 */ -#define A60810_RG_SSUSB_CDR_LCKOP (0x3<<16) /* 17:16 */ -#define A60810_RG_SSUSB_RX_FL_LOCKTH (0xf<<8) /* 11:8 */ -#define A60810_RG_SSUSB_RX_FL_OFFSET (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_T2RLB_PAT (0xff<<16)/* 23:16 */ -#define A60810_RG_SSUSB_T2RLB_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_T2RLB_SERIAL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_T2RLB_MODE (0x3<<11) /* 12:11 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_RX_DFE_OPTION (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RX_DFE_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_RX_DFE_EN_SEL (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_RX_EQ_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_RX_EQ_EN_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_RX_DFE_RST (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RX_DFE_RST_SEL (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_PRB_OUT_CPPAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_BPANSIENC (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_VALID_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_EBUF_SRST (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_K_EMP (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_K_FUL (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_T2RLB_BDATRST (0xf<<12) /* 15:12 */ -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PATMODE (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_T2RLB_TSEQCNT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_CPPAT_TOZ (0x3<<21) /* 22:21 */ -#define A60810_RG_SSUSB_CPPAT_PRBS_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_CDROS_EN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_PLL_SSCEN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_PI_PWD (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CDR_PI_MODE (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXEQTRAINING (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_RXPOLARITY (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_TXDEEMPH (0x3<<26) /* 27:26 */ -#define A60810_RG_SSUSB_POWERDOWN (0x3<<24) /* 25:24 */ -#define A60810_RG_SSUSB_TXONESZEROS (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_TXELECIDLE (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_TXDETECTRX (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_PIPE_SEL (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_TXDATAK (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CDR_STABLE_SEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_CDR_STABLE (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CDR_RSTB_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_CDR_RSTB (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P_TXBCN_DIS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_ERROR_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_TXMARGIN (0x7<<1) /* 3:1 */ -#define A60810_RG_SSUSB_TXCOMPLIANCE (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT (0x3f<<24)/* 29:24 */ -#define A60810_RG_SSUSB_T2RLB_BER_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_T2RLB_BER_RATE (0xffff<<0)/* 15:0 */ - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_TFIFO_PSEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_CKGEN_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_RXCK_INV (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RXPLL_STBCYC (0x7ff<<0) /* 10:0 */ - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_CDR_BC_LTD1 (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1 (0x1f<<24)/* 28:24 */ -#define A60810_RG_SSUSB_CDR_BIR_LTR (0x1f<<16)/* 20:16 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_CDR_BW_SEL (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_EQ_T_SEL (0x3ff<<15)/* 24:15 */ -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC (0x3ff<<5)/* 14:5 */ -#define A60810_RG_SSUSB_PLLBAND_RECAL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_U_BCN_OBS_PRD (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL (0xfff<<16) /* 27:16 */ -#define A60810_RG_SSUSB_BCN_DET_DIS (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_U_BCN_OBS_SEL (0xfff<<0) /* 11:0 */ - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHL_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DE0OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_DE1OS_LFI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_STOPTIME (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL (0x7<<11) /* 13:11 */ -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_STARTTIME (0x3<<6) /* 7:6 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL (0x7<<3) /* 5:3 */ -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL (0x7<<0) /* 2:0 */ - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2 (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_EN (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_TRI_DET_TH (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET (0x7f<<25) /* 31:25 */ -#define A60810_RG_SSUSB_EQ_EYE_MON_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_EQ_EYE0_Y (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_EYE1_Y (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PILPO_ROUT (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_PI_KPGAIN (0x7<<4) /* 6:4 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN (0x1<<3) /* 3:3 */ - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_EQ_EYE_MASK (0x3ff<<7) /* 16:7 */ - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_EQ_SD_CNT1 (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL (0x3<<22) /* 23:22 */ -#define A60810_RG_SSUSB_EQ_SD_CNT0 (0x3f<<16) /* 21:16 */ - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_EQ_DFEX_EN (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_CHK_EYE_H (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EQ_PIEYE_INI (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_EQ_PI90_INI (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_EQ_PI0_INI (0x7f<<0) /* 6:0 */ - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR (0x7<<12) /* 14:12 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR (0x7<<8) /* 10:8 */ -#define A60810_RG_SSUSB_EQ_DFEX_RST (0x1<<7) /* 7:7 */ -#define A60810_RG_SSUSB_EQ_GATED_RXD_B (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_EQ_PI90CK_SEL (0x3<<4) /* 5:4 */ -#define A60810_RG_SSUSB_EQ_DFEX_DIS (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL (0x1<<0) /* 0:0 */ - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT (0x7<<16) /* 18:16 */ -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_EQ_DFE_TOG (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO (0x3<<0) /* 1:0 */ - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_LFPS (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_TRAINDEC (0x7<<8) /* 10:8 */ -#define A60810_RGS_SSUSB_SCP_PAT (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RETRACK (0xf<<12) /* 15:12 */ -#define A60810_RGS_SSUSB_RXPLL_LOCK (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PDNCTL (0xff<<0) /* 7:0 */ - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_PRBS_ERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_SCP_DETCNT (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_TSEQ_DETCNT (0xffff<<0) /* 15:0 */ - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_BERT_LOCK (0x1<<15) /* 15:15 */ -#define A60810_RGS_SSUSB_SCP_DET (0x1<<14) /* 14:14 */ -#define A60810_RGS_SSUSB_TSEQ_DET (0x1<<13) /* 13:13 */ -#define A60810_RGS_SSUSB_EBUF_UDF (0x1<<12) /* 12:12 */ -#define A60810_RGS_SSUSB_EBUF_OVF (0x1<<11) /* 11:11 */ -#define A60810_RGS_SSUSB_PRBS_PASSTH (0x1<<10) /* 10:10 */ -#define A60810_RGS_SSUSB_PRBS_PASS (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_PRBS_LOCK (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_T2RLB_ERR (0x1<<6) /* 6:6 */ -#define A60810_RGS_SSUSB_T2RLB_PASSTH (0x1<<5) /* 5:5 */ -#define A60810_RGS_SSUSB_T2RLB_PASS (0x1<<4) /* 4:4 */ -#define A60810_RGS_SSUSB_T2RLB_LOCK (0x1<<3) /* 3:3 */ -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE (0x1<<2) /* 2:2 */ -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE (0x1<<1) /* 1:1 */ -#define A60810_RGS_SSUSB_RXDETECTED (0x1<<0) /* 0:0 */ - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE (0x1<<30) /* 30:30 */ -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT (0x1<<29) /* 29:29 */ -#define A60810_RGS_SSUSB_SIGCAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RGS_SSUSB_RX_IMP_SEL (0x1f<<16) /* 20:16 */ -#define A60810_RGS_SSUSB_TX_IMP_SEL (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_TFIFO_MSG (0xf<<4) /* 7:4 */ -#define A60810_RGS_SSUSB_RFIFO_MSG (0xf<<0) /* 3:0 */ - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PRB_OUT (0xff<<0) /* 7:0 */ - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ (0xf<<24) /* 27:24 */ -#define A60810_RGS_SSUSB_EQ_DCD0H (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCD0L (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCD1H (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_DCE0 (0x7f<<16) /* 22:16 */ -#define A60810_RGS_SSUSB_EQ_DCE1 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCHHL (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP (0x1<<31) /* 31:31 */ -#define A60810_RGS_SSUSB_EQ_DCLHL (0x7f<<24) /* 30:24 */ -#define A60810_RGS_SSUSB_EQ_STATUS (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_EQ_DCEYE0 (0x7f<<8) /* 14:8 */ -#define A60810_RGS_SSUSB_EQ_DCEYE1 (0x7f<<0) /* 6:0 */ - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1 (0xfffff<<0) /* 19:0 */ - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS (0x1f<<8) /* 12:8 */ -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY (0x1<<7) /* 7:7 */ -#define A60810_RGS_SSUSB_EQ_PILPO (0x7f<<0) /* 6:0 */ - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2 (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1 (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0 (0xff<<0) /* 7:0 */ - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT (0x7<<24) /* 26:24 */ -#define A60810_RG_SSUSB_EQ_EYE_CNT (0xfffff<<0) /* 19:0 */ - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G (0xff<<24) /* 31:24 */ -#define A60810_RGS_SSUSB_CDR_BAND_2P5G (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_BAND_5G (0xff<<8) /* 15:8 */ -#define A60810_RGS_SSUSB_PLL_BAND_2P5G (0xff<<0) /* 7:0 */ - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL (0x1<<24) /* 24:24 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE (0xff<<16) /* 23:16 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE (0xff<<0) /* 7:0 */ - -/* OFFSET */ - -/* U3D_PHYD_MIX0 */ -#define A60810_RG_SSUSB_P_P3_TX_NG_OFST (31) -#define A60810_RG_SSUSB_TSEQ_EN_OFST (30) -#define A60810_RG_SSUSB_TSEQ_POLEN_OFST (29) -#define A60810_RG_SSUSB_TSEQ_POL_OFST (28) -#define A60810_RG_SSUSB_P_P3_PCLK_NG_OFST (27) -#define A60810_RG_SSUSB_TSEQ_TH_OFST (24) -#define A60810_RG_SSUSB_PRBS_BERTH_OFST (16) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_ON_OFST (15) -#define A60810_RG_SSUSB_DISABLE_PHY_U2_OFF_OFST (14) -#define A60810_RG_SSUSB_PRBS_EN_OFST (13) -#define A60810_RG_SSUSB_BPSLOCK_OFST (12) -#define A60810_RG_SSUSB_RTCOMCNT_OFST (8) -#define A60810_RG_SSUSB_COMCNT_OFST (4) -#define A60810_RG_SSUSB_PRBSEL_CALIB_OFST (0) - -/* U3D_PHYD_MIX1 */ -#define A60810_RG_SSUSB_SLEEP_EN_OFST (31) -#define A60810_RG_SSUSB_PRBSEL_PCS_OFST (28) -#define A60810_RG_SSUSB_TXLFPS_PRD_OFST (24) -#define A60810_RG_SSUSB_P_RX_P0S_CK_OFST (23) -#define A60810_RG_SSUSB_P_TX_P0S_CK_OFST (22) -#define A60810_RG_SSUSB_PDNCTL_OFST (16) -#define A60810_RG_SSUSB_TX_DRV_EN_OFST (15) -#define A60810_RG_SSUSB_TX_DRV_SEL_OFST (14) -#define A60810_RG_SSUSB_TX_DRV_DLY_OFST (8) -#define A60810_RG_SSUSB_BERT_EN_OFST (7) -#define A60810_RG_SSUSB_SCP_TH_OFST (4) -#define A60810_RG_SSUSB_SCP_EN_OFST (3) -#define A60810_RG_SSUSB_RXANSIDEC_TEST_OFST (0) - -/* U3D_PHYD_LFPS0 */ -#define A60810_RG_SSUSB_LFPS_PWD_OFST (30) -#define A60810_RG_SSUSB_FORCE_LFPS_PWD_OFST (29) -#define A60810_RG_SSUSB_RXLFPS_OVF_OFST (24) -#define A60810_RG_SSUSB_P3_ENTRY_SEL_OFST (23) -#define A60810_RG_SSUSB_P3_ENTRY_OFST (22) -#define A60810_RG_SSUSB_RXLFPS_CDRSEL_OFST (20) -#define A60810_RG_SSUSB_RXLFPS_CDRTH_OFST (16) -#define A60810_RG_SSUSB_LOCK5G_BLOCK_OFST (15) -#define A60810_RG_SSUSB_TFIFO_EXT_D_SEL_OFST (14) -#define A60810_RG_SSUSB_TFIFO_NO_EXTEND_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_LOB_OFST (8) -#define A60810_RG_SSUSB_TXLFPS_EN_OFST (7) -#define A60810_RG_SSUSB_TXLFPS_SEL_OFST (6) -#define A60810_RG_SSUSB_RXLFPS_CDRLOCK_OFST (5) -#define A60810_RG_SSUSB_RXLFPS_UPB_OFST (0) - -/* U3D_PHYD_LFPS1 */ -#define A60810_RG_SSUSB_RX_IMP_BIAS_OFST (28) -#define A60810_RG_SSUSB_TX_IMP_BIAS_OFST (24) -#define A60810_RG_SSUSB_FWAKE_TH_OFST (16) -#define A60810_RG_SSUSB_P1_ENTRY_SEL_OFST (14) -#define A60810_RG_SSUSB_P1_ENTRY_OFST (13) -#define A60810_RG_SSUSB_RXLFPS_UDF_OFST (8) -#define A60810_RG_SSUSB_RXLFPS_P0IDLETH_OFST (0) - -/* U3D_PHYD_IMPCAL0 */ -#define A60810_RG_SSUSB_FORCE_TX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_TX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_TX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_TX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_TX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_TX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_TX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_IMPCAL1 */ -#define A60810_RG_SSUSB_FORCE_RX_IMPSEL_OFST (31) -#define A60810_RG_SSUSB_RX_IMPCAL_EN_OFST (30) -#define A60810_RG_SSUSB_FORCE_RX_IMPCAL_EN_OFST (29) -#define A60810_RG_SSUSB_RX_IMPSEL_OFST (24) -#define A60810_RG_SSUSB_RX_IMPCAL_CALCYC_OFST (16) -#define A60810_RG_SSUSB_RX_IMPCAL_STBCYC_OFST (10) -#define A60810_RG_SSUSB_RX_IMPCAL_CYCCNT_OFST (0) - -/* U3D_PHYD_TXPLL0 */ -#define A60810_RG_SSUSB_TXPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_TXPLL_ON_OFST (26) -#define A60810_RG_SSUSB_FORCE_TXPLLON_OFST (25) -#define A60810_RG_SSUSB_TXPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_TXPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_TXPLL_NCPOEN_CYC_OFST (10) -#define A60810_RG_SSUSB_TXPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_PHYD_TXPLL1 */ -#define A60810_RG_SSUSB_PLL_NCPO_EN_OFST (31) -#define A60810_RG_SSUSB_PLL_FIFO_START_MAN_OFST (30) -#define A60810_RG_SSUSB_PLL_NCPO_CHG_OFST (28) -#define A60810_RG_SSUSB_PLL_DDS_RSTB_OFST (27) -#define A60810_RG_SSUSB_PLL_DDS_PWDB_OFST (26) -#define A60810_RG_SSUSB_PLL_DDSEN_OFST (25) -#define A60810_RG_SSUSB_PLL_AUTOK_VCO_OFST (24) -#define A60810_RG_SSUSB_PLL_PWD_OFST (23) -#define A60810_RG_SSUSB_RX_AFE_PWD_OFST (22) -#define A60810_RG_SSUSB_PLL_TCADJ_OFST (16) -#define A60810_RG_SSUSB_FORCE_CDR_TCADJ_OFST (15) -#define A60810_RG_SSUSB_FORCE_CDR_AUTOK_VCO_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PWD_OFST (13) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_EN_OFST (12) -#define A60810_RG_SSUSB_FORCE_PLL_FIFO_START_MAN_OFST (11) -#define A60810_RG_SSUSB_FORCE_PLL_NCPO_CHG_OFST (9) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_RSTB_OFST (8) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWDB_OFST (7) -#define A60810_RG_SSUSB_FORCE_PLL_DDSEN_OFST (6) -#define A60810_RG_SSUSB_FORCE_PLL_TCADJ_OFST (5) -#define A60810_RG_SSUSB_FORCE_PLL_AUTOK_VCO_OFST (4) -#define A60810_RG_SSUSB_FORCE_PLL_PWD_OFST (3) -#define A60810_RG_SSUSB_FLT_1_DISPERR_B_OFST (2) - -/* U3D_PHYD_TXPLL2 */ -#define A60810_RG_SSUSB_TX_LFPS_EN_OFST (31) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_EN_OFST (30) -#define A60810_RG_SSUSB_TX_LFPS_OFST (29) -#define A60810_RG_SSUSB_FORCE_TX_LFPS_OFST (28) -#define A60810_RG_SSUSB_RXPLL_STB_OFST (27) -#define A60810_RG_SSUSB_TXPLL_STB_OFST (26) -#define A60810_RG_SSUSB_FORCE_RXPLL_STB_OFST (25) -#define A60810_RG_SSUSB_FORCE_TXPLL_STB_OFST (24) -#define A60810_RG_SSUSB_RXPLL_REFCKSEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBMODE_OFST (11) -#define A60810_RG_SSUSB_RXPLL_ON_OFST (10) -#define A60810_RG_SSUSB_FORCE_RXPLLON_OFST (9) -#define A60810_RG_SSUSB_FORCE_RX_AFE_PWD_OFST (8) -#define A60810_RG_SSUSB_CDR_AUTOK_VCO_OFST (7) -#define A60810_RG_SSUSB_CDR_PWD_OFST (6) -#define A60810_RG_SSUSB_CDR_TCADJ_OFST (0) - -/* U3D_PHYD_FL0 */ -#define A60810_RG_SSUSB_RX_FL_TARGET_OFST (16) -#define A60810_RG_SSUSB_RX_FL_CYCLECNT_OFST (0) - -/* U3D_PHYD_MIX2 */ -#define A60810_RG_SSUSB_RX_EQ_RST_OFST (31) -#define A60810_RG_SSUSB_RX_EQ_RST_SEL_OFST (30) -#define A60810_RG_SSUSB_RXVAL_RST_OFST (29) -#define A60810_RG_SSUSB_RXVAL_CNT_OFST (24) -#define A60810_RG_SSUSB_CDROS_EN_OFST (18) -#define A60810_RG_SSUSB_CDR_LCKOP_OFST (16) -#define A60810_RG_SSUSB_RX_FL_LOCKTH_OFST (8) -#define A60810_RG_SSUSB_RX_FL_OFFSET_OFST (0) - -/* U3D_PHYD_RX0 */ -#define A60810_RG_SSUSB_T2RLB_BERTH_OFST (24) -#define A60810_RG_SSUSB_T2RLB_PAT_OFST (16) -#define A60810_RG_SSUSB_T2RLB_EN_OFST (15) -#define A60810_RG_SSUSB_T2RLB_BPSCRAMB_OFST (14) -#define A60810_RG_SSUSB_T2RLB_SERIAL_OFST (13) -#define A60810_RG_SSUSB_T2RLB_MODE_OFST (11) -#define A60810_RG_SSUSB_RX_SAOSC_EN_OFST (10) -#define A60810_RG_SSUSB_RX_SAOSC_EN_SEL_OFST (9) -#define A60810_RG_SSUSB_RX_DFE_OPTION_OFST (8) -#define A60810_RG_SSUSB_RX_DFE_EN_OFST (7) -#define A60810_RG_SSUSB_RX_DFE_EN_SEL_OFST (6) -#define A60810_RG_SSUSB_RX_EQ_EN_OFST (5) -#define A60810_RG_SSUSB_RX_EQ_EN_SEL_OFST (4) -#define A60810_RG_SSUSB_RX_SAOSC_RST_OFST (3) -#define A60810_RG_SSUSB_RX_SAOSC_RST_SEL_OFST (2) -#define A60810_RG_SSUSB_RX_DFE_RST_OFST (1) -#define A60810_RG_SSUSB_RX_DFE_RST_SEL_OFST (0) - -/* U3D_PHYD_T2RLB */ -#define A60810_RG_SSUSB_EQTRAIN_CH_MODE_OFST (28) -#define A60810_RG_SSUSB_PRB_OUT_CPPAT_OFST (27) -#define A60810_RG_SSUSB_BPANSIENC_OFST (26) -#define A60810_RG_SSUSB_VALID_EN_OFST (25) -#define A60810_RG_SSUSB_EBUF_SRST_OFST (24) -#define A60810_RG_SSUSB_K_EMP_OFST (20) -#define A60810_RG_SSUSB_K_FUL_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BDATRST_OFST (12) -#define A60810_RG_SSUSB_P_T2RLB_SKP_EN_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PATMODE_OFST (8) -#define A60810_RG_SSUSB_T2RLB_TSEQCNT_OFST (0) - -/* U3D_PHYD_CPPAT */ -#define A60810_RG_SSUSB_CPPAT_PROGRAM_EN_OFST (24) -#define A60810_RG_SSUSB_CPPAT_TOZ_OFST (21) -#define A60810_RG_SSUSB_CPPAT_PRBS_EN_OFST (20) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_TMP0_OFST (0) - -/* U3D_PHYD_MIX3 */ -#define A60810_RG_SSUSB_CDR_TCADJ_MINUS_OFST (31) -#define A60810_RG_SSUSB_P_CDROS_EN_OFST (30) -#define A60810_RG_SSUSB_P_P2_TX_DRV_DIS_OFST (28) -#define A60810_RG_SSUSB_CDR_TCADJ_OFFSET_OFST (24) -#define A60810_RG_SSUSB_PLL_TCADJ_MINUS_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_LPF_EN_OFST (20) -#define A60810_RG_SSUSB_PLL_BIAS_LPF_EN_OFST (19) -#define A60810_RG_SSUSB_PLL_TCADJ_OFFSET_OFST (16) -#define A60810_RG_SSUSB_FORCE_PLL_SSCEN_OFST (15) -#define A60810_RG_SSUSB_PLL_SSCEN_OFST (14) -#define A60810_RG_SSUSB_FORCE_CDR_PI_PWD_OFST (13) -#define A60810_RG_SSUSB_CDR_PI_PWD_OFST (12) -#define A60810_RG_SSUSB_CDR_PI_MODE_OFST (11) -#define A60810_RG_SSUSB_TXPLL_SSCEN_CYC_OFST (0) - -/* U3D_PHYD_EBUFCTL */ -#define A60810_RG_SSUSB_EBUFCTL_OFST (0) - -/* U3D_PHYD_PIPE0 */ -#define A60810_RG_SSUSB_RXTERMINATION_OFST (30) -#define A60810_RG_SSUSB_RXEQTRAINING_OFST (29) -#define A60810_RG_SSUSB_RXPOLARITY_OFST (28) -#define A60810_RG_SSUSB_TXDEEMPH_OFST (26) -#define A60810_RG_SSUSB_POWERDOWN_OFST (24) -#define A60810_RG_SSUSB_TXONESZEROS_OFST (23) -#define A60810_RG_SSUSB_TXELECIDLE_OFST (22) -#define A60810_RG_SSUSB_TXDETECTRX_OFST (21) -#define A60810_RG_SSUSB_PIPE_SEL_OFST (20) -#define A60810_RG_SSUSB_TXDATAK_OFST (16) -#define A60810_RG_SSUSB_CDR_STABLE_SEL_OFST (15) -#define A60810_RG_SSUSB_CDR_STABLE_OFST (14) -#define A60810_RG_SSUSB_CDR_RSTB_SEL_OFST (13) -#define A60810_RG_SSUSB_CDR_RSTB_OFST (12) -#define A60810_RG_SSUSB_FRC_PIPE_POWERDOWN_OFST (11) -#define A60810_RG_SSUSB_P_TXBCN_DIS_OFST (6) -#define A60810_RG_SSUSB_P_ERROR_SEL_OFST (4) -#define A60810_RG_SSUSB_TXMARGIN_OFST (1) -#define A60810_RG_SSUSB_TXCOMPLIANCE_OFST (0) - -/* U3D_PHYD_PIPE1 */ -#define A60810_RG_SSUSB_TXDATA_OFST (0) - -/* U3D_PHYD_MIX4 */ -#define A60810_RG_SSUSB_CDROS_CNT_OFST (24) -#define A60810_RG_SSUSB_T2RLB_BER_EN_OFST (16) -#define A60810_RG_SSUSB_T2RLB_BER_RATE_OFST (0) - -/* U3D_PHYD_CKGEN0 */ -#define A60810_RG_SSUSB_RFIFO_IMPLAT_OFST (27) -#define A60810_RG_SSUSB_TFIFO_PSEL_OFST (24) -#define A60810_RG_SSUSB_CKGEN_PSEL_OFST (8) -#define A60810_RG_SSUSB_RXCK_INV_OFST (0) - -/* U3D_PHYD_MIX5 */ -#define A60810_RG_SSUSB_PRB_SEL_OFST (16) -#define A60810_RG_SSUSB_RXPLL_STBCYC_OFST (0) - -/* U3D_PHYD_RESERVED */ -#define A60810_RG_SSUSB_PHYD_RESERVE_OFST (0) - -/* U3D_PHYD_CDR0 */ -#define A60810_RG_SSUSB_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_CDR_BC_LTD0_OFST (0) - -/* U3D_PHYD_CDR1 */ -#define A60810_RG_SSUSB_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_CDR_BW_SEL_OFST (6) -#define A60810_RG_SSUSB_CDR_BIC_LTD1_OFST (0) - -/* U3D_PHYD_PLL_0 */ -#define A60810_RG_SSUSB_FORCE_CDR_BAND_5G_OFST (28) -#define A60810_RG_SSUSB_FORCE_CDR_BAND_2P5G_OFST (27) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_5G_OFST (26) -#define A60810_RG_SSUSB_FORCE_PLL_BAND_2P5G_OFST (25) -#define A60810_RG_SSUSB_P_EQ_T_SEL_OFST (15) -#define A60810_RG_SSUSB_PLL_ISO_EN_CYC_OFST (5) -#define A60810_RG_SSUSB_PLLBAND_RECAL_OFST (4) -#define A60810_RG_SSUSB_PLL_DDS_ISO_EN_OFST (3) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_ISO_EN_OFST (2) -#define A60810_RG_SSUSB_PLL_DDS_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_PWR_ON_OFST (0) - -/* U3D_PHYD_PLL_1 */ -#define A60810_RG_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RG_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RG_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RG_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_PHYD_BCN_DET_1 */ -#define A60810_RG_SSUSB_P_BCN_OBS_PRD_OFST (16) -#define A60810_RG_SSUSB_U_BCN_OBS_PRD_OFST (0) - -/* U3D_PHYD_BCN_DET_2 */ -#define A60810_RG_SSUSB_P_BCN_OBS_SEL_OFST (16) -#define A60810_RG_SSUSB_BCN_DET_DIS_OFST (12) -#define A60810_RG_SSUSB_U_BCN_OBS_SEL_OFST (0) - -/* U3D_EQ0 */ -#define A60810_RG_SSUSB_EQ_DLHL_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHL_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DD0HOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DD0LOS_LFI_OFST (0) - -/* U3D_EQ1 */ -#define A60810_RG_SSUSB_EQ_DD1HOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DD1LOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DE0OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DE1OS_LFI_OFST (0) - -/* U3D_EQ2 */ -#define A60810_RG_SSUSB_EQ_DLHLOS_LFI_OFST (24) -#define A60810_RG_SSUSB_EQ_DHHLOS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_STOPTIME_OFST (14) -#define A60810_RG_SSUSB_EQ_DHHL_LF_SEL_OFST (11) -#define A60810_RG_SSUSB_EQ_DSAOS_LF_SEL_OFST (8) -#define A60810_RG_SSUSB_EQ_STARTTIME_OFST (6) -#define A60810_RG_SSUSB_EQ_DLEQ_LF_SEL_OFST (3) -#define A60810_RG_SSUSB_EQ_DLHL_LF_SEL_OFST (0) - -/* U3D_EQ3 */ -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN2_OFST (28) -#define A60810_RG_SSUSB_EQ_DLEQ_LFI_GEN1_OFST (24) -#define A60810_RG_SSUSB_EQ_DEYE0OS_LFI_OFST (16) -#define A60810_RG_SSUSB_EQ_DEYE1OS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_TRI_DET_EN_OFST (7) -#define A60810_RG_SSUSB_EQ_TRI_DET_TH_OFST (0) - -/* U3D_EQ_EYE0 */ -#define A60810_RG_SSUSB_EQ_EYE_XOFFSET_OFST (25) -#define A60810_RG_SSUSB_EQ_EYE_MON_EN_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE0_Y_OFST (16) -#define A60810_RG_SSUSB_EQ_EYE1_Y_OFST (8) -#define A60810_RG_SSUSB_EQ_PILPO_ROUT_OFST (7) -#define A60810_RG_SSUSB_EQ_PI_KPGAIN_OFST (4) -#define A60810_RG_SSUSB_EQ_EYE_CNT_EN_OFST (3) - -/* U3D_EQ_EYE1 */ -#define A60810_RG_SSUSB_EQ_SIGDET_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_MASK_OFST (7) - -/* U3D_EQ_EYE2 */ -#define A60810_RG_SSUSB_EQ_RX500M_CK_SEL_OFST (31) -#define A60810_RG_SSUSB_EQ_SD_CNT1_OFST (24) -#define A60810_RG_SSUSB_EQ_ISIFLAG_SEL_OFST (22) -#define A60810_RG_SSUSB_EQ_SD_CNT0_OFST (16) - -/* U3D_EQ_DFE0 */ -#define A60810_RG_SSUSB_EQ_LEQMAX_OFST (28) -#define A60810_RG_SSUSB_EQ_DFEX_EN_OFST (27) -#define A60810_RG_SSUSB_EQ_DFEX_LF_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_CHK_EYE_H_OFST (23) -#define A60810_RG_SSUSB_EQ_PIEYE_INI_OFST (16) -#define A60810_RG_SSUSB_EQ_PI90_INI_OFST (8) -#define A60810_RG_SSUSB_EQ_PI0_INI_OFST (0) - -/* U3D_EQ_DFE1 */ -#define A60810_RG_SSUSB_EQ_REV_OFST (16) -#define A60810_RG_SSUSB_EQ_DFEYEN_DUR_OFST (12) -#define A60810_RG_SSUSB_EQ_DFEXEN_DUR_OFST (8) -#define A60810_RG_SSUSB_EQ_DFEX_RST_OFST (7) -#define A60810_RG_SSUSB_EQ_GATED_RXD_B_OFST (6) -#define A60810_RG_SSUSB_EQ_PI90CK_SEL_OFST (4) -#define A60810_RG_SSUSB_EQ_DFEX_DIS_OFST (2) -#define A60810_RG_SSUSB_EQ_DFEYEN_STOP_DIS_OFST (1) -#define A60810_RG_SSUSB_EQ_DFEXEN_SEL_OFST (0) - -/* U3D_EQ_DFE2 */ -#define A60810_RG_SSUSB_EQ_MON_SEL_OFST (24) -#define A60810_RG_SSUSB_EQ_LEQOSC_DLYCNT_OFST (16) -#define A60810_RG_SSUSB_EQ_DLEQOS_LFI_OFST (8) -#define A60810_RG_SSUSB_EQ_DFE_TOG_OFST (2) -#define A60810_RG_SSUSB_EQ_LEQ_STOP_TO_OFST (0) - -/* U3D_EQ_DFE3 */ -#define A60810_RG_SSUSB_EQ_RESERVED_OFST (0) - -/* U3D_PHYD_MON0 */ -#define A60810_RGS_SSUSB_BERT_BERC_OFST (16) -#define A60810_RGS_SSUSB_LFPS_OFST (12) -#define A60810_RGS_SSUSB_TRAINDEC_OFST (8) -#define A60810_RGS_SSUSB_SCP_PAT_OFST (0) - -/* U3D_PHYD_MON1 */ -#define A60810_RGS_SSUSB_RX_FL_OUT_OFST (0) - -/* U3D_PHYD_MON2 */ -#define A60810_RGS_SSUSB_T2RLB_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_RETRACK_OFST (12) -#define A60810_RGS_SSUSB_RXPLL_LOCK_OFST (10) -#define A60810_RGS_SSUSB_CDR_VCOCAL_CPLT_D_OFST (9) -#define A60810_RGS_SSUSB_PLL_VCOCAL_CPLT_D_OFST (8) -#define A60810_RGS_SSUSB_PDNCTL_OFST (0) - -/* U3D_PHYD_MON3 */ -#define A60810_RGS_SSUSB_TSEQ_ERRCNT_OFST (16) -#define A60810_RGS_SSUSB_PRBS_ERRCNT_OFST (0) - -/* U3D_PHYD_MON4 */ -#define A60810_RGS_SSUSB_RX_LSLOCK_CNT_OFST (24) -#define A60810_RGS_SSUSB_SCP_DETCNT_OFST (16) -#define A60810_RGS_SSUSB_TSEQ_DETCNT_OFST (0) - -/* U3D_PHYD_MON5 */ -#define A60810_RGS_SSUSB_EBUFMSG_OFST (16) -#define A60810_RGS_SSUSB_BERT_LOCK_OFST (15) -#define A60810_RGS_SSUSB_SCP_DET_OFST (14) -#define A60810_RGS_SSUSB_TSEQ_DET_OFST (13) -#define A60810_RGS_SSUSB_EBUF_UDF_OFST (12) -#define A60810_RGS_SSUSB_EBUF_OVF_OFST (11) -#define A60810_RGS_SSUSB_PRBS_PASSTH_OFST (10) -#define A60810_RGS_SSUSB_PRBS_PASS_OFST (9) -#define A60810_RGS_SSUSB_PRBS_LOCK_OFST (8) -#define A60810_RGS_SSUSB_T2RLB_ERR_OFST (6) -#define A60810_RGS_SSUSB_T2RLB_PASSTH_OFST (5) -#define A60810_RGS_SSUSB_T2RLB_PASS_OFST (4) -#define A60810_RGS_SSUSB_T2RLB_LOCK_OFST (3) -#define A60810_RGS_SSUSB_RX_IMPCAL_DONE_OFST (2) -#define A60810_RGS_SSUSB_TX_IMPCAL_DONE_OFST (1) -#define A60810_RGS_SSUSB_RXDETECTED_OFST (0) - -/* U3D_PHYD_MON6 */ -#define A60810_RGS_SSUSB_SIGCAL_DONE_OFST (30) -#define A60810_RGS_SSUSB_SIGCAL_CAL_OUT_OFST (29) -#define A60810_RGS_SSUSB_SIGCAL_OFFSET_OFST (24) -#define A60810_RGS_SSUSB_RX_IMP_SEL_OFST (16) -#define A60810_RGS_SSUSB_TX_IMP_SEL_OFST (8) -#define A60810_RGS_SSUSB_TFIFO_MSG_OFST (4) -#define A60810_RGS_SSUSB_RFIFO_MSG_OFST (0) - -/* U3D_PHYD_MON7 */ -#define A60810_RGS_SSUSB_FT_OUT_OFST (8) -#define A60810_RGS_SSUSB_PRB_OUT_OFST (0) - -/* U3D_PHYA_RX_MON0 */ -#define A60810_RGS_SSUSB_EQ_DCLEQ_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCD0H_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCD0L_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCD1H_OFST (0) - -/* U3D_PHYA_RX_MON1 */ -#define A60810_RGS_SSUSB_EQ_DCD1L_OFST (24) -#define A60810_RGS_SSUSB_EQ_DCE0_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCE1_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCHHL_OFST (0) - -/* U3D_PHYA_RX_MON2 */ -#define A60810_RGS_SSUSB_EQ_LEQ_STOP_OFST (31) -#define A60810_RGS_SSUSB_EQ_DCLHL_OFST (24) -#define A60810_RGS_SSUSB_EQ_STATUS_OFST (16) -#define A60810_RGS_SSUSB_EQ_DCEYE0_OFST (8) -#define A60810_RGS_SSUSB_EQ_DCEYE1_OFST (0) - -/* U3D_PHYA_RX_MON3 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_0_OFST (0) - -/* U3D_PHYA_RX_MON4 */ -#define A60810_RGS_SSUSB_EQ_EYE_MONITOR_ERRCNT_1_OFST (0) - -/* U3D_PHYA_RX_MON5 */ -#define A60810_RGS_SSUSB_EQ_DCLEQOS_OFST (8) -#define A60810_RGS_SSUSB_EQ_EYE_CNT_RDY_OFST (7) -#define A60810_RGS_SSUSB_EQ_PILPO_OFST (0) - -/* U3D_PHYD_CPPAT2 */ -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP2_OFST (16) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP1_OFST (8) -#define A60810_RG_SSUSB_CPPAT_OUT_H_TMP0_OFST (0) - -/* U3D_EQ_EYE3 */ -#define A60810_RG_SSUSB_EQ_LEQ_SHIFT_OFST (24) -#define A60810_RG_SSUSB_EQ_EYE_CNT_OFST (0) - -/* U3D_KBAND_OUT */ -#define A60810_RGS_SSUSB_CDR_BAND_5G_OFST (24) -#define A60810_RGS_SSUSB_CDR_BAND_2P5G_OFST (16) -#define A60810_RGS_SSUSB_PLL_BAND_5G_OFST (8) -#define A60810_RGS_SSUSB_PLL_BAND_2P5G_OFST (0) - -/* U3D_KBAND_OUT1 */ -#define A60810_RGS_SSUSB_CDR_VCOCAL_FAIL_OFST (24) -#define A60810_RGS_SSUSB_CDR_VCOCAL_STATE_OFST (16) -#define A60810_RGS_SSUSB_PLL_VCOCAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_PLL_VCOCAL_STATE_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct u3phyd_bank2_reg_a { - /* 0x0 */ - __le32 b2_phyd_top1; - __le32 b2_phyd_top2; - __le32 b2_phyd_top3; - __le32 b2_phyd_top4; - /* 0x10 */ - __le32 b2_phyd_top5; - __le32 b2_phyd_top6; - __le32 b2_phyd_top7; - __le32 b2_phyd_p_sigdet1; - /* 0x20 */ - __le32 b2_phyd_p_sigdet2; - __le32 b2_phyd_p_sigdet_cal1; - __le32 b2_phyd_rxdet1; - __le32 b2_phyd_rxdet2; - /* 0x30 */ - __le32 b2_phyd_misc0; - __le32 b2_phyd_misc2; - __le32 b2_phyd_misc3; - __le32 b2_phyd_l1ss; - /* 0x40 */ - __le32 b2_rosc_0; - __le32 b2_rosc_1; - __le32 b2_rosc_2; - __le32 b2_rosc_3; - /* 0x50 */ - __le32 b2_rosc_4; - __le32 b2_rosc_5; - __le32 b2_rosc_6; - __le32 b2_rosc_7; - /* 0x60 */ - __le32 b2_rosc_8; - __le32 b2_rosc_9; - __le32 b2_rosc_a; - __le32 reserve1; - /* 0x70~0xd0 */ - __le32 reserve2[28]; - /* 0xe0 */ - __le32 phyd_version; - __le32 phyd_model; -}; - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_PCIE2_K_FUL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN (0x1<<17) /* 17:17 */ -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_SIGDET_EN (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_CLKRX_EN (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_CLKRX_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_CLKTX_EN (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_FORCE_CLKTX_EN (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_CLK_REQ_N_I (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RATE (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_FORCE_RATE (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_PCIE_MODE_SEL (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_PHY_MODE (0x3<<1) /* 2:1 */ -#define A60810_RG_SSUSB_FORCE_PHY_MODE (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_IDRV_6DB (0x3f<<24) /* 29:24 */ -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_IDEM_3P5DB (0x3f<<16) /* 21:16 */ -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_IDRV_3P5DB (0x3f<<8) /* 13:8 */ -#define A60810_RG_SSUSB_FORCE_IDRV_0DB (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_IDRV_0DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI (0x7<<25) /* 27:25 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TX_BIASI_EN (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_FORCE_TX_BIASI (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_FORCE_IDEM_6DB (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_IDEM_6DB (0x3f<<0) /* 5:0 */ - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR (0xf<<28) /* 31:28 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0 (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1 (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL (0x3<<13) /* 14:13 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTR (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BW_SEL (0x3<<5) /* 6:5 */ -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0 (0x1f<<0) /* 4:0 */ - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1 (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR (0x1f<<16) /* 20:16 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0 (0x1f<<8) /* 12:8 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1 (0xf<<0) /* 3:0 */ - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL (0x7f<<24) /* 30:24 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL (0x7f<<8) /* 14:8 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL (0x7f<<0) /* 6:0 */ - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S (0x3<<25) /* 26:25 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS (0x1<<6) /* 6:6 */ -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD (0x1<<5) /* 5:5 */ -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL (0x3<<0) /* 1:0 */ - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET (0x1f<<24) /* 28:24 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_P_SIGDET_REK (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FORCE_CMDET (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_RXDET_EN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_FORCE_RXDET_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_RXDET_K_TWICE (0x1<<27) /* 27:27 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET (0x1ff<<18) /* 26:18 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB1_SET (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN (0x1<<30) /* 30:30 */ -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN (0x1<<29) /* 29:29 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_EN (0x1<<28) /* 28:28 */ -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL (0xf<<24) /* 27:24 */ -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL (0xf<<20) /* 23:20 */ -#define A60810_RG_SSUSB_PDN_T_SEL (0x3<<18) /* 19:18 */ -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3 (0x1ff<<9) /* 17:9 */ -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3 (0x1ff<<0) /* 8:0 */ - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC (0x3f<<26) /* 31:26 */ -#define A60810_RG_SSUSB_TX_SER_EN (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_FORCE_TX_SER_EN (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_TXPLL_REFCKSEL (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN (0x1<<21) /* 21:21 */ -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH (0xf<<16) /* 19:16 */ -#define A60810_RG_SSUSB_LFPS_PSEL (0x1<<15) /* 15:15 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN (0x1<<14) /* 14:14 */ -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL (0x1<<13) /* 13:13 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN (0x1<<12) /* 12:12 */ -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_P3_CLS_CK_SEL (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_T2RLB_PSEL (0x3<<8) /* 9:8 */ -#define A60810_RG_SSUSB_PPCTL_PSEL (0x7<<5) /* 7:5 */ -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV (0x1<<4) /* 4:4 */ -#define A60810_RG_SSUSB_BERTLB_PSEL (0x3<<2) /* 3:2 */ -#define A60810_RG_SSUSB_RETRACK_DIS (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_PPERRCNT_CLR (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2 (0x1<<31) /* 31:31 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ (0xf<<27) /* 30:27 */ -#define A60810_RG_SSUSB_P_SIGDET_125FILTER (0x1<<26) /* 26:26 */ -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER (0x1<<25) /* 25:25 */ -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW (0x1<<24) /* 24:24 */ -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW (0x1<<23) /* 23:23 */ -#define A60810_RG_SSUSB_EIDLE_BF_RXDET (0x1<<22) /* 22:22 */ -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC (0x1ff<<13) /* 21:13 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY (0x3f<<7) /* 12:7 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY (0x3f<<1) /* 6:1 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV (0x1<<0) /* 0:0 */ - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE (0x7<<16) /* 18:16 */ -#define A60810_RGS_SSUSB_PPERRCNT (0xffff<<0) /* 15:0 */ - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1 (0xff<<24) /* 31:24 */ -#define A60810_RG_SSUSB_L1SS_REV0 (0xff<<16) /* 23:16 */ -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS (0x1<<11) /* 11:11 */ -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS (0x1<<10) /* 10:10 */ -#define A60810_RG_SSUSB_P_PLL_REK_SEL (0x1<<9) /* 9:9 */ -#define A60810_RG_SSUSB_TXDRV_MASKDLY (0x1<<8) /* 8:8 */ -#define A60810_RG_SSUSB_RXSTS_VAL (0x1<<7) /* 7:7 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN (0x1<<6) /* 6:6 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN (0x1<<5) /* 5:5 */ -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT (0x1<<4) /* 4:4 */ -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RXPLL_STB_PX0 (0x1<<2) /* 2:2 */ -#define A60810_RG_PCIE_L1SS_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_PCIE_FORCE_L1SS_EN (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND (0x1ff<<23) /* 31:23 */ -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND (0x7f<<16) /* 22:16 */ -#define A60810_RG_SSUSB_RING_OSC_EN (0x1<<3) /* 3:3 */ -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN (0x1<<2) /* 2:2 */ -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_BYPASS_DET (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3 (0x1<<20) /* 20:20 */ -#define A60810_RG_SSUSB_RING_OSC_P3 (0x1<<19) /* 19:19 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL (0x3<<17) /* 18:17 */ -#define A60810_RG_SSUSB_RING_OSC_RECAL (0x1<<16) /* 16:16 */ -#define A60810_RG_SSUSB_RING_OSC_SEL (0xff<<8) /* 15:8 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND1 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND2 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3 (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_RING_DET_UBOND3 (0xffff<<0) /* 15:0 */ - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE (0xffff<<16) /* 31:16 */ -#define A60810_RG_SSUSB_ROSC_PROB_SEL (0xf<<2) /* 5:2 */ -#define A60810_RG_SSUSB_RING_FREQMETER_EN (0x1<<1) /* 1:1 */ -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND (0x1<<0) /* 0:0 */ - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT (0xffff<<16) /* 31:16 */ -#define A60810_RGS_SSUSB_RING_OSC_STATE (0x3<<10) /* 11:10 */ -#define A60810_RGS_SSUSB_RING_OSC_STABLE (0x1<<9) /* 9:9 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL (0x1<<8) /* 8:8 */ -#define A60810_RGS_SSUSB_RING_OSC_CAL (0xff<<0) /* 7:0 */ - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT (0xff<<0)/* 7:0 */ - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION (0xffffffff<<0)/* 31:0 */ - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL (0xffffffff<<0)/* 31:0 */ - -/* OFFSET */ - -/* U3D_B2_PHYD_TOP1 */ -#define A60810_RG_SSUSB_PCIE2_K_EMP_OFST (28) -#define A60810_RG_SSUSB_PCIE2_K_FUL_OFST (24) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_OFST (17) -#define A60810_RG_SSUSB_FORCE_TX_EIDLE_LP_EN_OFST (16) -#define A60810_RG_SSUSB_SIGDET_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_CLKRX_EN_OFST (13) -#define A60810_RG_SSUSB_FORCE_CLKRX_EN_OFST (12) -#define A60810_RG_SSUSB_CLKTX_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_CLKTX_EN_OFST (10) -#define A60810_RG_SSUSB_CLK_REQ_N_I_OFST (9) -#define A60810_RG_SSUSB_FORCE_CLK_REQ_N_I_OFST (8) -#define A60810_RG_SSUSB_RATE_OFST (6) -#define A60810_RG_SSUSB_FORCE_RATE_OFST (5) -#define A60810_RG_SSUSB_PCIE_MODE_SEL_OFST (4) -#define A60810_RG_SSUSB_FORCE_PCIE_MODE_SEL_OFST (3) -#define A60810_RG_SSUSB_PHY_MODE_OFST (1) -#define A60810_RG_SSUSB_FORCE_PHY_MODE_OFST (0) - -/* U3D_B2_PHYD_TOP2 */ -#define A60810_RG_SSUSB_FORCE_IDRV_6DB_OFST (30) -#define A60810_RG_SSUSB_IDRV_6DB_OFST (24) -#define A60810_RG_SSUSB_FORCE_IDEM_3P5DB_OFST (22) -#define A60810_RG_SSUSB_IDEM_3P5DB_OFST (16) -#define A60810_RG_SSUSB_FORCE_IDRV_3P5DB_OFST (14) -#define A60810_RG_SSUSB_IDRV_3P5DB_OFST (8) -#define A60810_RG_SSUSB_FORCE_IDRV_0DB_OFST (6) -#define A60810_RG_SSUSB_IDRV_0DB_OFST (0) - -/* U3D_B2_PHYD_TOP3 */ -#define A60810_RG_SSUSB_TX_BIASI_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_EN_OFST (24) -#define A60810_RG_SSUSB_TX_BIASI_EN_OFST (16) -#define A60810_RG_SSUSB_FORCE_TX_BIASI_OFST (13) -#define A60810_RG_SSUSB_FORCE_IDEM_6DB_OFST (8) -#define A60810_RG_SSUSB_IDEM_6DB_OFST (0) - -/* U3D_B2_PHYD_TOP4 */ -#define A60810_RG_SSUSB_G1_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G1_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G1_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G1_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP5 */ -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G1_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G1_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_TOP6 */ -#define A60810_RG_SSUSB_G2_CDR_BIC_LTR_OFST (28) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD0_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD1_OFST (16) -#define A60810_RG_SSUSB_G2_L1SS_CDR_BW_SEL_OFST (13) -#define A60810_RG_SSUSB_G2_CDR_BC_LTR_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BW_SEL_OFST (5) -#define A60810_RG_SSUSB_G2_CDR_BC_LTD0_OFST (0) - -/* U3D_B2_PHYD_TOP7 */ -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD1_OFST (24) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTR_OFST (16) -#define A60810_RG_SSUSB_G2_CDR_BIR_LTD0_OFST (8) -#define A60810_RG_SSUSB_G2_CDR_BIC_LTD1_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET1 */ -#define A60810_RG_SSUSB_P_SIGDET_FLT_DIS_OFST (31) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G2_DEAST_SEL_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_FLT_G1_DEAST_SEL_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_FLT_P2_AST_SEL_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_FLT_PX_AST_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET2 */ -#define A60810_RG_SSUSB_P_SIGDET_RX_VAL_S_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_L0S_DEAS_SEL_OFST (28) -#define A60810_RG_SSUSB_P_SIGDET_L0_EXIT_S_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_T_S_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_L0S_EXIT_S_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_L0S_ENTRY_S_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_PRB_SEL_OFST (10) -#define A60810_RG_SSUSB_P_SIGDET_BK_SIG_T_OFST (8) -#define A60810_RG_SSUSB_P_SIGDET_P2_RXLFPS_OFST (6) -#define A60810_RG_SSUSB_P_SIGDET_NON_BK_AD_OFST (5) -#define A60810_RG_SSUSB_P_SIGDET_BK_B_RXEQ_OFST (4) -#define A60810_RG_SSUSB_P_SIGDET_G2_KO_SEL_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_G1_KO_SEL_OFST (0) - -/* U3D_B2_PHYD_P_SIGDET_CAL1 */ -#define A60810_RG_SSUSB_G2_2EIOS_DET_EN_OFST (29) -#define A60810_RG_SSUSB_P_SIGDET_CAL_OFFSET_OFST (24) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_OFFSET_OFST (16) -#define A60810_RG_SSUSB_P_SIGDET_CAL_EN_OFST (8) -#define A60810_RG_SSUSB_P_FORCE_SIGDET_CAL_EN_OFST (3) -#define A60810_RG_SSUSB_P_SIGDET_FLT_EN_OFST (2) -#define A60810_RG_SSUSB_P_SIGDET_SAMPLE_PRD_OFST (1) -#define A60810_RG_SSUSB_P_SIGDET_REK_OFST (0) - -/* U3D_B2_PHYD_RXDET1 */ -#define A60810_RG_SSUSB_RXDET_PRB_SEL_OFST (31) -#define A60810_RG_SSUSB_FORCE_CMDET_OFST (30) -#define A60810_RG_SSUSB_RXDET_EN_OFST (29) -#define A60810_RG_SSUSB_FORCE_RXDET_EN_OFST (28) -#define A60810_RG_SSUSB_RXDET_K_TWICE_OFST (27) -#define A60810_RG_SSUSB_RXDET_STB3_SET_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB2_SET_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB1_SET_OFST (0) - -/* U3D_B2_PHYD_RXDET2 */ -#define A60810_RG_SSUSB_PHYD_TRAINDEC_FORCE_CGEN_OFST (31) -#define A60810_RG_SSUSB_PHYD_BERTLB_FORCE_CGEN_OFST (30) -#define A60810_RG_SSUSB_PHYD_T2RLB_FORCE_CGEN_OFST (29) -#define A60810_RG_SSUSB_LCK2REF_EXT_EN_OFST (28) -#define A60810_RG_SSUSB_G2_LCK2REF_EXT_SEL_OFST (24) -#define A60810_RG_SSUSB_LCK2REF_EXT_SEL_OFST (20) -#define A60810_RG_SSUSB_PDN_T_SEL_OFST (18) -#define A60810_RG_SSUSB_RXDET_STB3_SET_P3_OFST (9) -#define A60810_RG_SSUSB_RXDET_STB2_SET_P3_OFST (0) - -/* U3D_B2_PHYD_MISC0 */ -#define A60810_RG_SSUSB_TX_EIDLE_LP_P0DLYCYC_OFST (26) -#define A60810_RG_SSUSB_TX_SER_EN_OFST (25) -#define A60810_RG_SSUSB_FORCE_TX_SER_EN_OFST (24) -#define A60810_RG_SSUSB_TXPLL_REFCKSEL_OFST (23) -#define A60810_RG_SSUSB_FORCE_PLL_DDS_HF_EN_OFST (22) -#define A60810_RG_SSUSB_PLL_DDS_HF_EN_MAN_OFST (21) -#define A60810_RG_SSUSB_RXLFPS_ENTXDRV_OFST (20) -#define A60810_RG_SSUSB_RX_FL_UNLOCKTH_OFST (16) -#define A60810_RG_SSUSB_LFPS_PSEL_OFST (15) -#define A60810_RG_SSUSB_RX_SIGDET_EN_OFST (14) -#define A60810_RG_SSUSB_RX_SIGDET_EN_SEL_OFST (13) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_OFST (12) -#define A60810_RG_SSUSB_RX_PI_CAL_EN_SEL_OFST (11) -#define A60810_RG_SSUSB_P3_CLS_CK_SEL_OFST (10) -#define A60810_RG_SSUSB_T2RLB_PSEL_OFST (8) -#define A60810_RG_SSUSB_PPCTL_PSEL_OFST (5) -#define A60810_RG_SSUSB_PHYD_TX_DATA_INV_OFST (4) -#define A60810_RG_SSUSB_BERTLB_PSEL_OFST (2) -#define A60810_RG_SSUSB_RETRACK_DIS_OFST (1) -#define A60810_RG_SSUSB_PPERRCNT_CLR_OFST (0) - -/* U3D_B2_PHYD_MISC2 */ -#define A60810_RG_SSUSB_FRC_PLL_DDS_PREDIV2_OFST (31) -#define A60810_RG_SSUSB_FRC_PLL_DDS_IADJ_OFST (27) -#define A60810_RG_SSUSB_P_SIGDET_125FILTER_OFST (26) -#define A60810_RG_SSUSB_P_SIGDET_RST_FILTER_OFST (25) -#define A60810_RG_SSUSB_P_SIGDET_EID_USE_RAW_OFST (24) -#define A60810_RG_SSUSB_P_SIGDET_LTD_USE_RAW_OFST (23) -#define A60810_RG_SSUSB_EIDLE_BF_RXDET_OFST (22) -#define A60810_RG_SSUSB_EIDLE_LP_STBCYC_OFST (13) -#define A60810_RG_SSUSB_TX_EIDLE_LP_POSTDLY_OFST (7) -#define A60810_RG_SSUSB_TX_EIDLE_LP_PREDLY_OFST (1) -#define A60810_RG_SSUSB_TX_EIDLE_LP_EN_ADV_OFST (0) - -/* U3D_B2_PHYD_MISC3 */ -#define A60810_RGS_SSUSB_DDS_CALIB_C_STATE_OFST (16) -#define A60810_RGS_SSUSB_PPERRCNT_OFST (0) - -/* U3D_B2_PHYD_L1SS */ -#define A60810_RG_SSUSB_L1SS_REV1_OFST (24) -#define A60810_RG_SSUSB_L1SS_REV0_OFST (16) -#define A60810_RG_SSUSB_P_LTD1_SLOCK_DIS_OFST (11) -#define A60810_RG_SSUSB_PLL_CNT_CLEAN_DIS_OFST (10) -#define A60810_RG_SSUSB_P_PLL_REK_SEL_OFST (9) -#define A60810_RG_SSUSB_TXDRV_MASKDLY_OFST (8) -#define A60810_RG_SSUSB_RXSTS_VAL_OFST (7) -#define A60810_RG_PCIE_PHY_CLKREQ_N_EN_OFST (6) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_EN_OFST (5) -#define A60810_RG_PCIE_PHY_CLKREQ_N_OUT_OFST (4) -#define A60810_RG_PCIE_FORCE_PHY_CLKREQ_N_OUT_OFST (3) -#define A60810_RG_SSUSB_RXPLL_STB_PX0_OFST (2) -#define A60810_RG_PCIE_L1SS_EN_OFST (1) -#define A60810_RG_PCIE_FORCE_L1SS_EN_OFST (0) - -/* U3D_B2_ROSC_0 */ -#define A60810_RG_SSUSB_RING_OSC_CNTEND_OFST (23) -#define A60810_RG_SSUSB_XTAL_OSC_CNTEND_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_EN_OFST (3) -#define A60810_RG_SSUSB_RING_OSC_FORCE_EN_OFST (2) -#define A60810_RG_SSUSB_FRC_RING_BYPASS_DET_OFST (1) -#define A60810_RG_SSUSB_RING_BYPASS_DET_OFST (0) - -/* U3D_B2_ROSC_1 */ -#define A60810_RG_SSUSB_RING_OSC_FRC_P3_OFST (20) -#define A60810_RG_SSUSB_RING_OSC_P3_OFST (19) -#define A60810_RG_SSUSB_RING_OSC_FRC_RECAL_OFST (17) -#define A60810_RG_SSUSB_RING_OSC_RECAL_OFST (16) -#define A60810_RG_SSUSB_RING_OSC_SEL_OFST (8) -#define A60810_RG_SSUSB_RING_OSC_FRC_SEL_OFST (0) - -/* U3D_B2_ROSC_2 */ -#define A60810_RG_SSUSB_RING_DET_STRCYC2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC1_OFST (0) - -/* U3D_B2_ROSC_3 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_STRCYC3_OFST (0) - -/* U3D_B2_ROSC_4 */ -#define A60810_RG_SSUSB_RING_DET_DETWIN3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_DETWIN2_OFST (0) - -/* U3D_B2_ROSC_5 */ -#define A60810_RG_SSUSB_RING_DET_LBOND1_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND1_OFST (0) - -/* U3D_B2_ROSC_6 */ -#define A60810_RG_SSUSB_RING_DET_LBOND2_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND2_OFST (0) - -/* U3D_B2_ROSC_7 */ -#define A60810_RG_SSUSB_RING_DET_LBOND3_OFST (16) -#define A60810_RG_SSUSB_RING_DET_UBOND3_OFST (0) - -/* U3D_B2_ROSC_8 */ -#define A60810_RG_SSUSB_RING_RESERVE_OFST (16) -#define A60810_RG_SSUSB_ROSC_PROB_SEL_OFST (2) -#define A60810_RG_SSUSB_RING_FREQMETER_EN_OFST (1) -#define A60810_RG_SSUSB_RING_DET_BPS_UBOND_OFST (0) - -/* U3D_B2_ROSC_9 */ -#define A60810_RGS_FM_RING_CNT_OFST (16) -#define A60810_RGS_SSUSB_RING_OSC_STATE_OFST (10) -#define A60810_RGS_SSUSB_RING_OSC_STABLE_OFST (9) -#define A60810_RGS_SSUSB_RING_OSC_CAL_FAIL_OFST (8) -#define A60810_RGS_SSUSB_RING_OSC_CAL_OFST (0) - -/* U3D_B2_ROSC_A */ -#define A60810_RGS_SSUSB_ROSC_PROB_OUT_OFST (0) - -/* U3D_PHYD_VERSION */ -#define A60810_RGS_SSUSB_PHYD_VERSION_OFST (0) - -/* U3D_PHYD_MODEL */ -#define A60810_RGS_SSUSB_PHYD_MODEL_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct sifslv_chip_reg_a { - /* 0x0 */ - __le32 gpio_ctla; - __le32 gpio_ctlb; - __le32 gpio_ctlc; -}; - -/* //////////////////////////////////////////////////////////////////////// */ - -struct sifslv_fm_reg_a { - /* 0x0 */ - __le32 fmcr0; - __le32 fmcr1; - __le32 fmcr2; - __le32 fmmonr0; - /* 0X10 */ - __le32 fmmonr1; -}; - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH (0xf<<28)/* 31:28 */ -#define A60810_RG_MONCLK_SEL (0x3<<26)/* 27:26 */ -#define A60810_RG_FM_MODE (0x1<<25)/* 25:25 */ -#define A60810_RG_FREQDET_EN (0x1<<24)/* 24:24 */ -#define A60810_RG_CYCLECNT (0xffffff<<0)/* 23:0 */ - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT (0xffffffff<<0)/* 31:0 */ - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2 (0x1<<9)/* 9:9 */ -#define A60810_RG_FRCK_EN (0x1<<8)/* 8:8 */ -#define A60810_USBPLL_LOCK (0x1<<1)/* 1:1 */ -#define A60810_USB_FM_VLD (0x1<<0)/* 0:0 */ - -/* OFFSET */ - -/* U3D_FMCR0 */ -#define A60810_RG_LOCKTH_OFST (28) -#define A60810_RG_MONCLK_SEL_OFST (26) -#define A60810_RG_FM_MODE_OFST (25) -#define A60810_RG_FREQDET_EN_OFST (24) -#define A60810_RG_CYCLECNT_OFST (0) - -/* U3D_FMCR1 */ -#define A60810_RG_TARGET_OFST (0) - -/* U3D_FMCR2 */ -#define A60810_RG_OFFSET_OFST (0) - -/* U3D_FMMONR0 */ -#define A60810_USB_FM_OUT_OFST (0) - -/* U3D_FMMONR1 */ -#define A60810_RG_MONCLK_SEL_2_OFST (9) -#define A60810_RG_FRCK_EN_OFST (8) -#define A60810_USBPLL_LOCK_OFST (1) -#define A60810_USB_FM_VLD_OFST (0) - -/* //////////////////////////////////////////////////////////////////////// */ - -struct spllc_reg_a { - /* 0x0 */ - __le32 u3d_syspll_0; - __le32 u3d_syspll_1; - __le32 u3d_syspll_2; - __le32 u3d_syspll_sdm; - /* 0x10 */ - __le32 u3d_xtalctl_1; - __le32 u3d_xtalctl_2; - __le32 u3d_xtalctl3; -}; - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC (0x1f<<27)/* 31:27 */ -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC (0x3<<25)/* 26:25 */ -#define A60810_RG_SSUSB_SPLL_STBCYC (0x1ff<<16)/* 24:16 */ -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_SYSPLL_ON (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SYSPLLON (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC (0x7<<0)/* 2:0 */ - -/* U3D_SYSPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC (0xff<<24)/* 31:24 */ -#define A60810_RG_SSUSB_SYSPLL_STB (0x1<<23)/* 23:23 */ -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB (0x1<<22)/* 22:22 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN (0x1<<21)/* 21:21 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_PLL_BIAS_PWD (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN (0x1<<14)/* 14:14 */ -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FORCE_SPLL_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_SPLL_NCPO_EN (0x1<<7)/* 7:7 */ -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN (0x1<<6)/* 6:6 */ -#define A60810_RG_SSUSB_SPLL_NCPO_CHG (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_SPLL_DDS_RSTB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_SPLL_DDS_PWDB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_SPLL_DDSEN (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC (0x3ff<<0)/* 9:0 */ - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC (0x3ff<<14)/* 23:14 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN (0x1<<13)/* 13:13 */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN (0x1<<12)/* 12:12 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC (0x3ff<<2)/* 11:2 */ -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC (0x3fff<<17)/* 30:17 */ -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N (0x1<<15)/* 15:15 */ -#define A60810_RG_SSUSB_XTAL_STBCYC (0x7fff<<0)/* 14:0 */ - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL (0x1<<29)/* 29:29 */ -#define A60810_RG_SSUSB_BG_LPF_DLY (0x3<<27)/* 28:27 */ -#define A60810_RG_SSUSB_BG_LPF_EN (0x1<<26)/* 26:26 */ -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN (0x1<<25)/* 25:25 */ -#define A60810_RG_SSUSB_P3_BIAS_PWD (0x1<<24)/* 24:24 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT (0x1<<20)/* 20:20 */ -#define A60810_RG_SSUSB_PCIE_CLKDET_EN (0x1<<19)/* 19:19 */ -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN (0x1<<18)/* 18:18 */ -#define A60810_RG_SSUSB_USB20_BIAS_EN (0x1<<17)/* 17:17 */ -#define A60810_RG_SSUSB_USB20_SLEEP (0x1<<16)/* 16:16 */ -#define A60810_RG_SSUSB_OSC_ONLY (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_OSC_EN (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_XTALBIAS_STB (0x1<<5)/* 5:5 */ -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB (0x1<<4)/* 4:4 */ -#define A60810_RG_SSUSB_BIAS_PWD (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_PWD (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_FORCE_BIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_FORCE_XTAL_PWD (0x1<<0)/* 0:0 */ - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV (0xf<<12)/* 15:12 */ -#define A60810_RG_SSUSB_BIASIMR_EN (0x1<<11)/* 11:11 */ -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN (0x1<<10)/* 10:10 */ -#define A60810_RG_SSUSB_XTAL_RX_PWD (0x1<<9)/* 9:9 */ -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD (0x1<<8)/* 8:8 */ -#define A60810_RG_SSUSB_CKBG_PROB_SEL (0x3<<6)/* 7:6 */ -#define A60810_RG_SSUSB_XTAL_PROB_SEL (0x3<<4)/* 5:4 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB (0x1<<3)/* 3:3 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB (0x1<<2)/* 2:2 */ -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD (0x1<<1)/* 1:1 */ -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD (0x1<<0)/* 0:0 */ - - -/* SSUSB_SIFSLV_SPLLC FIELD OFFSET DEFINITION */ - -/* U3D_SYSPLL_0 */ -#define A60810_RG_SSUSB_SPLL_DDSEN_CYC_OFST (27) -#define A60810_RG_SSUSB_SPLL_NCPOEN_CYC_OFST (25) -#define A60810_RG_SSUSB_SPLL_STBCYC_OFST (16) -#define A60810_RG_SSUSB_SPLL_NCPOCHG_CYC_OFST (12) -#define A60810_RG_SSUSB_SYSPLL_ON_OFST (11) -#define A60810_RG_SSUSB_FORCE_SYSPLLON_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDSRSTB_CYC_OFST (0) - -/* U3D_SYA60810_SPLL_1 */ -#define A60810_RG_SSUSB_PLL_BIAS_CYC_OFST (24) -#define A60810_RG_SSUSB_SYSPLL_STB_OFST (23) -#define A60810_RG_SSUSB_FORCE_SYSPLL_STB_OFST (22) -#define A60810_RG_SSUSB_SPLL_DDS_ISO_EN_OFST (21) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_ISO_EN_OFST (20) -#define A60810_RG_SSUSB_SPLL_DDS_PWR_ON_OFST (19) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWR_ON_OFST (18) -#define A60810_RG_SSUSB_PLL_BIAS_PWD_OFST (17) -#define A60810_RG_SSUSB_FORCE_PLL_BIAS_PWD_OFST (16) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_EN_OFST (15) -#define A60810_RG_SSUSB_FORCE_SPLL_FIFO_START_MAN_OFST (14) -#define A60810_RG_SSUSB_FORCE_SPLL_NCPO_CHG_OFST (12) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_RSTB_OFST (11) -#define A60810_RG_SSUSB_FORCE_SPLL_DDS_PWDB_OFST (10) -#define A60810_RG_SSUSB_FORCE_SPLL_DDSEN_OFST (9) -#define A60810_RG_SSUSB_FORCE_SPLL_PWD_OFST (8) -#define A60810_RG_SSUSB_SPLL_NCPO_EN_OFST (7) -#define A60810_RG_SSUSB_SPLL_FIFO_START_MAN_OFST (6) -#define A60810_RG_SSUSB_SPLL_NCPO_CHG_OFST (4) -#define A60810_RG_SSUSB_SPLL_DDS_RSTB_OFST (3) -#define A60810_RG_SSUSB_SPLL_DDS_PWDB_OFST (2) -#define A60810_RG_SSUSB_SPLL_DDSEN_OFST (1) -#define A60810_RG_SSUSB_SPLL_PWD_OFST (0) - -/* U3D_SYSPLL_2 */ -#define A60810_RG_SSUSB_SPLL_P_ON_SEL_OFST (11) -#define A60810_RG_SSUSB_SPLL_FBDIV_CHG_OFST (10) -#define A60810_RG_SSUSB_SPLL_DDS_ISOEN_CYC_OFST (0) - -/* U3D_SYSPLL_SDM */ -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_CYC_OFST (14) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_ISO_EN_OFST (13) -#define A60810_RG_SSUSB_SPLL_SDM_ISO_EN_OFST (12) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_CYC_OFST (2) -#define A60810_RG_SSUSB_SPLL_FORCE_SDM_PWR_ON_OFST (1) -#define A60810_RG_SSUSB_SPLL_SDM_PWR_ON_OFST (0) - -/* U3D_XTALCTL_1 */ -#define A60810_RG_SSUSB_BIAS_STBCYC_OFST (17) -#define A60810_RG_SSUSB_XTAL_CLK_REQ_N_OFST (16) -#define A60810_RG_SSUSB_XTAL_FORCE_CLK_REQ_N_OFST (15) -#define A60810_RG_SSUSB_XTAL_STBCYC_OFST (0) - -/* U3D_XTALCTL_2 */ -#define A60810_RG_SSUSB_INT_XTAL_SEL_OFST (29) -#define A60810_RG_SSUSB_BG_LPF_DLY_OFST (27) -#define A60810_RG_SSUSB_BG_LPF_EN_OFST (26) -#define A60810_RG_SSUSB_FORCE_BG_LPF_EN_OFST (25) -#define A60810_RG_SSUSB_P3_BIAS_PWD_OFST (24) -#define A60810_RG_SSUSB_PCIE_CLKDET_HIT_OFST (20) -#define A60810_RG_SSUSB_PCIE_CLKDET_EN_OFST (19) -#define A60810_RG_SSUSB_FRC_PCIE_CLKDET_EN_OFST (18) -#define A60810_RG_SSUSB_USB20_BIAS_EN_OFST (17) -#define A60810_RG_SSUSB_USB20_SLEEP_OFST (16) -#define A60810_RG_SSUSB_OSC_ONLY_OFST (9) -#define A60810_RG_SSUSB_OSC_EN_OFST (8) -#define A60810_RG_SSUSB_XTALBIAS_STB_OFST (5) -#define A60810_RG_SSUSB_FORCE_XTALBIAS_STB_OFST (4) -#define A60810_RG_SSUSB_BIAS_PWD_OFST (3) -#define A60810_RG_SSUSB_XTAL_PWD_OFST (2) -#define A60810_RG_SSUSB_FORCE_BIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_FORCE_XTAL_PWD_OFST (0) - -/* U3D_XTALCTL3 */ -#define A60810_RG_SSUSB_XTALCTL_REV_OFST (12) -#define A60810_RG_SSUSB_BIASIMR_EN_OFST (11) -#define A60810_RG_SSUSB_FORCE_BIASIMR_EN_OFST (10) -#define A60810_RG_SSUSB_XTAL_RX_PWD_OFST (9) -#define A60810_RG_SSUSB_FRC_XTAL_RX_PWD_OFST (8) -#define A60810_RG_SSUSB_CKBG_PROB_SEL_OFST (6) -#define A60810_RG_SSUSB_XTAL_PROB_SEL_OFST (4) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_LPF_ENB_OFST (3) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_LPF_ENB_OFST (2) -#define A60810_RG_SSUSB_XTAL_VREGBIAS_PWD_OFST (1) -#define A60810_RG_SSUSB_XTAL_FRC_VREGBIAS_PWD_OFST (0) - -struct u3phy_info { - struct u2phy_reg_a *u2phy_regs_a; - struct u3phya_reg_a *u3phya_regs_a; - struct u3phya_da_reg_a *u3phya_da_regs_a; - struct u3phyd_reg_a *u3phyd_regs_a; - struct u3phyd_bank2_reg_a *u3phyd_bank2_regs_a; - struct sifslv_chip_reg_a *sifslv_chip_regs_a; - struct spllc_reg_a *spllc_regs_a; - struct sifslv_fm_reg_a *sifslv_fm_regs_a; -}; - -#endif diff --git a/drivers/misc/mediatek/usb20/mt6833/otg.c b/drivers/misc/mediatek/usb20/mt6833/otg.c deleted file mode 100644 index 2c54b9cc224c..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/otg.c +++ /dev/null @@ -1,136 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include "musb_core.h" - -#ifdef CONFIG_MTK_MUSB_CARPLAY_SUPPORT - -struct carplay_dev { - struct usb_interface *intf; - struct usb_device *dev; -}; - -struct carplay_dev *apple_dev; -bool apple; - -int send_switch_cmd(void) -{ - int retval; - - if (apple_dev == NULL) { - DBG(0, "no apple device attach.\n"); - return -1; - } - DBG(0, "before usb_control_msg\n"); - retval = usb_control_msg(apple_dev->dev, - usb_rcvctrlpipe(apple_dev->dev, 0), - 0x51, 0x40, 1, 0, NULL, 0, - USB_CTRL_GET_TIMEOUT); - - DBG(0, "after usb_control_msg retval = %d\n", retval); - - if (retval != 0) { - DBG(0, "%s fail retval = %d\n", __func__, retval); - return -1; - } - - return 0; -} - -static int carplay_probe(struct usb_interface *intf, - const struct usb_device_id *id) -{ - struct usb_device *udev; - struct carplay_dev *car_dev; - - DBG(0, "++ carplay probe ++\n"); - udev = interface_to_usbdev(intf); - - car_dev = kzalloc(sizeof(*car_dev), GFP_KERNEL); - if (!car_dev) - return -ENOMEM; - - usb_set_intfdata(intf, car_dev); - car_dev->dev = udev; - car_dev->intf = intf; - apple_dev = car_dev; - apple = true; - if (car_dev->dev == NULL) - DBG(0, "car_dev->dev error\n"); - - return 0; -} - -static void carplay_disconnect(struct usb_interface *intf) -{ - struct carplay_dev *car_dev = usb_get_intfdata(intf); - - usb_set_intfdata(intf, NULL); - dev_dbg(&intf->dev, "disconnect\n"); - car_dev->dev = NULL; - car_dev->intf = NULL; - kfree(car_dev); - apple_dev = NULL; - apple = false; - DBG(0, "%s.\n", __func__); -} - -static const struct usb_device_id id_table[] = { - - /*-------------------------------------------------------------*/ - - /* EZ-USB devices which download firmware to replace (or in our - * case augment) the default device implementation. - */ - - /* generic EZ-USB FX2 controller (or development board) */ - {USB_DEVICE(0x05ac, 0x12a8), - }, - - /*-------------------------------------------------------------*/ - - {} -}; - -/* MODULE_DEVICE_TABLE(usb, id_table); */ - -static struct usb_driver carplay_driver = { - .name = "carplay", - .id_table = id_table, - .probe = carplay_probe, - .disconnect = carplay_disconnect, -}; - -/*-------------------------------------------------------------------------*/ - -static int __init carplay_init(void) -{ - DBG(0, "%s register carplay_driver\n", __func__); - return usb_register(&carplay_driver); -} -module_init(carplay_init); - -static void __exit carplay_exit(void) -{ - usb_deregister(&carplay_driver); -} -module_exit(carplay_exit); - -MODULE_DESCRIPTION("USB Core/HCD Testing Driver"); -MODULE_LICENSE("GPL"); -#endif diff --git a/drivers/misc/mediatek/usb20/mt6833/usb20.c b/drivers/misc/mediatek/usb20/mt6833/usb20.c deleted file mode 100644 index 2c18b43fee84..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/usb20.c +++ /dev/null @@ -1,2114 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -#include -MODULE_LICENSE("GPL v2"); - -struct musb *mtk_musb; -EXPORT_SYMBOL(mtk_musb); - -bool mtk_usb_power; -EXPORT_SYMBOL(mtk_usb_power); - -int musb_force_on; -EXPORT_SYMBOL(musb_force_on); - -static void (*usb_hal_dpidle_request_fptr)(int); -void usb_hal_dpidle_request(int mode) -{ - if (usb_hal_dpidle_request_fptr) - usb_hal_dpidle_request_fptr(mode); -} -EXPORT_SYMBOL(usb_hal_dpidle_request); - -void register_usb_hal_dpidle_request(void (*function)(int)) -{ - usb_hal_dpidle_request_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_dpidle_request); - -void (*usb_hal_disconnect_check_fptr)(void); -void usb_hal_disconnect_check(void) -{ - if (usb_hal_disconnect_check_fptr) - usb_hal_disconnect_check_fptr(); -} -EXPORT_SYMBOL(usb_hal_disconnect_check); - -void register_usb_hal_disconnect_check(void (*function)(void)) -{ - usb_hal_disconnect_check_fptr = function; -} -EXPORT_SYMBOL(register_usb_hal_disconnect_check); - -#ifdef FPGA_PLATFORM -#include -#include "mtk-phy-a60810.h" -#endif - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT -#include "musb_qmu.h" -#endif - -#ifdef CONFIG_MTK_USB2JTAG_SUPPORT -#include -#endif - -#ifndef FPGA_PLATFORM -#include -#include -static void usb_dpidle_request(int mode) -{ - struct arm_smccc_res res; - int op; - - switch (mode) { - case USB_DPIDLE_SUSPEND: - op = MTK_USB_SMC_INFRA_REQUEST; - break; - case USB_DPIDLE_RESUME: - op = MTK_USB_SMC_INFRA_RELEASE; - break; - default: - return; - } - - DBG(0, "operatio = %d\n", op); - arm_smccc_smc(MTK_SIP_KERNEL_USB_CONTROL, op, 0, 0, 0, 0, 0, 0, &res); -} -#endif - -/* default value 0 */ -static int usb_rdy; -bool is_usb_rdy(void) -{ - if (mtk_musb->is_ready) { - usb_rdy = 1; - DBG(0, "set usb_rdy, wake up bat\n"); - } - - if (usb_rdy) - return true; - else - return false; -} -EXPORT_SYMBOL(is_usb_rdy); - -/* BC1.2 */ -/* Duplicate define in phy-mtk-tphy */ -#define PHY_MODE_BC11_SW_SET 1 -#define PHY_MODE_BC11_SW_CLR 2 - -void Charger_Detect_Init(void) -{ -#if 0 - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } -#endif - - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - - /* RG_USB20_BC11_SW_EN = 1'b1 */ - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_SET); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Init); - -void Charger_Detect_Release(void) -{ -#if 0 - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } -#endif - - usb_prepare_enable_clock(true); - - /* RG_USB20_BC11_SW_EN = 1'b0 */ - phy_set_mode_ext(glue->phy, PHY_MODE_USB_DEVICE, PHY_MODE_BC11_SW_CLR); - - udelay(1); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Release); - -void usb_phy_context_save(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); -#endif -} - -void usb_phy_context_restore(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) - usb_phy_switch_to_uart(); -#endif -} - - -#ifdef CONFIG_USB_MTK_OTG -static struct regmap *pericfg; -static struct regmap *infracg; - -static void mt_usb_wakeup(struct musb *musb, bool enable) -{ - u32 tmp; - bool is_con = musb->port1_status & USB_PORT_STAT_CONNECTION; - - if (IS_ERR_OR_NULL(pericfg) || IS_ERR_OR_NULL(infracg)) { - DBG(0, "init fail"); - return; - } - - DBG(0, "connection=%d\n", is_con); - - if (enable) { - tmp = musb_readl(musb->mregs, RESREG); - if (is_con) - tmp &= ~HSTPWRDWN_OPT; - else - tmp |= HSTPWRDWN_OPT; - musb_writel(musb->mregs, RESREG, tmp); - - regmap_read(infracg, MISC_CONFIG, &tmp); - tmp |= USB_CD_CLR; - regmap_write(infracg, MISC_CONFIG, tmp); - - mdelay(5); - - regmap_read(pericfg, USB_WK_CTRL, &tmp); - tmp |= USB_CDDEBOUNCE(0x8) | USB_CDEN; - regmap_write(pericfg, USB_WK_CTRL, tmp); - - mdelay(5); - - regmap_read(infracg, MISC_CONFIG, &tmp); - tmp &= ~USB_CD_CLR; - regmap_write(infracg, MISC_CONFIG, tmp); - } else { - regmap_read(pericfg, USB_WK_CTRL, &tmp); - tmp &= ~(USB_CDEN | USB_CDDEBOUNCE(0x8)); - regmap_write(pericfg, USB_WK_CTRL, tmp); - - tmp = musb_readw(musb->mregs, RESREG); - tmp &= ~HSTPWRDWN_OPT; - musb_writew(musb->mregs, RESREG, tmp); - } -} - -static int mt_usb_wakeup_init(struct musb *musb) -{ - struct device_node *node; - - node = of_find_compatible_node(NULL, NULL, - "mediatek,mt6833-usb20"); - if (!node) { - DBG(0, "map node failed\n"); - return -ENODEV; - } - - pericfg = syscon_regmap_lookup_by_phandle(node, - "pericfg"); - if (IS_ERR(pericfg)) { - DBG(0, "fail to get pericfg regs\n"); - return PTR_ERR(pericfg); - } - - infracg = syscon_regmap_lookup_by_phandle(node, - "infracg"); - if (IS_ERR(infracg)) { - DBG(0, "fail to get infracg regs\n"); - return PTR_ERR(infracg); - } - - return 0; -} -#endif - -static u32 cable_mode = CABLE_MODE_NORMAL; -#ifndef FPGA_PLATFORM -struct clk *musb_clk; -struct clk *musb_ref_clk; -struct clk *musb_clk_top_sel; -struct clk *musb_clk_univpll5_d4; -static struct regulator *reg_vusb; -static struct regulator *reg_vio18; -static struct regulator *reg_va12; -#endif - -void __iomem *usb_phy_base; - -#ifdef CONFIG_MTK_UART_USB_SWITCH -static u32 port_mode = PORT_MODE_USB; -#define AP_GPIO_COMPATIBLE_NAME "mediatek,gpio" -void __iomem *ap_gpio_base; -#endif - -/*EP Fifo Config*/ -static struct musb_fifo_cfg fifo_cfg[] __initdata = { - {.hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_DOUBLE}, - {.hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_INT, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_BULK, .mode = BUF_SINGLE}, - {.hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, - {.hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, - .ep_mode = EP_ISO, .mode = BUF_DOUBLE}, -}; - -#ifdef FPGA_PLATFORM -bool usb_enable_clock(bool enable) -{ - return true; -} - -bool usb_prepare_clock(bool enable) -{ - return true; -} - -void usb_prepare_enable_clock(bool enable) -{ -} -#else -void usb_prepare_enable_clock(bool enable) -{ - if (enable) { - usb_prepare_clock(true); - usb_enable_clock(true); - } else { - usb_enable_clock(false); - usb_prepare_clock(false); - } -} - -DEFINE_MUTEX(prepare_lock); -static atomic_t clk_prepare_cnt = ATOMIC_INIT(0); - -bool usb_prepare_clock(bool enable) -{ - int before_cnt = atomic_read(&clk_prepare_cnt); - - mutex_lock(&prepare_lock); - - if (IS_ERR_OR_NULL(glue->musb_clk) || - IS_ERR_OR_NULL(glue->musb_ref_clk) || - IS_ERR_OR_NULL(glue->musb_clk_top_sel) || - IS_ERR_OR_NULL(glue->musb_clk_univpll5_d4)) { - DBG(0, "clk not ready\n"); - mutex_unlock(&prepare_lock); - return 0; - } - - if (enable) { - - if (clk_prepare(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel prepare fail\n"); - } else { - if (clk_set_parent(glue->musb_clk_top_sel, - glue->musb_clk_univpll5_d4)) - DBG(0, "musb_clk_top_sel set_parent fail\n"); - } - if (clk_prepare(glue->musb_clk)) - DBG(0, "musb_clk prepare fail\n"); - - if (clk_prepare(glue->musb_ref_clk)) - DBG(0, "musb_ref_clk prepare fail\n"); - - atomic_inc(&clk_prepare_cnt); - } else { - - clk_unprepare(glue->musb_clk_top_sel); - clk_unprepare(glue->musb_ref_clk); - clk_unprepare(glue->musb_clk); - - atomic_dec(&clk_prepare_cnt); - } - - mutex_unlock(&prepare_lock); - - DBG(1, "enable(%d), usb prepare_cnt, before(%d), after(%d)\n", - enable, before_cnt, atomic_read(&clk_prepare_cnt)); - -#ifdef CONFIG_MTK_AEE_FEATURE - if (atomic_read(&clk_prepare_cnt) < 0) - aee_kernel_warning("usb20", "usb clock prepare_cnt error\n"); -#endif - - return 1; -} -EXPORT_SYMBOL(usb_prepare_clock); - -static DEFINE_SPINLOCK(musb_reg_clock_lock); - -bool usb_enable_clock(bool enable) -{ - static int count; - static int real_enable = 0, real_disable; - static int virt_enable = 0, virt_disable; - unsigned long flags; - - DBG(1, "enable(%d),count(%d),<%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - - spin_lock_irqsave(&musb_reg_clock_lock, flags); - - if (unlikely(atomic_read(&clk_prepare_cnt) <= 0)) { - DBG_LIMIT(1, "clock not prepare"); - goto exit; - } - - if (enable && count == 0) { - if (clk_enable(glue->musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel enable fail\n"); - goto exit; - } - - if (clk_enable(glue->musb_clk)) { - DBG(0, "musb_clk enable fail\n"); - clk_disable(glue->musb_clk_top_sel); - goto exit; - } - - if (clk_enable(glue->musb_ref_clk)) { - DBG(0, "musb_ref_clk enable fail\n"); - clk_disable(glue->musb_clk); - clk_disable(glue->musb_clk_top_sel); - goto exit; - } - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); - real_enable++; - - } else if (!enable && count == 1) { - clk_disable(glue->musb_clk); - clk_disable(glue->musb_ref_clk); - clk_disable(glue->musb_clk_top_sel); - - usb_hal_dpidle_request(USB_DPIDLE_ALLOWED); - real_disable++; - } - - if (enable) - count++; - else - count = (count == 0) ? 0 : (count - 1); - -exit: - if (enable) - virt_enable++; - else - virt_disable++; - - spin_unlock_irqrestore(&musb_reg_clock_lock, flags); - - DBG(1, "enable(%d),count(%d), <%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - return 1; -} -EXPORT_SYMBOL(usb_enable_clock); -#endif -/*=======================================================================*/ -/* USB GADGET */ -/*=======================================================================*/ -static const struct of_device_id apusb_of_ids[] = { - {.compatible = "mediatek,mt6833-usb20",}, - {}, -}; - -MODULE_DEVICE_TABLE(of, apusb_of_ids); - -static struct delayed_work idle_work; - -void do_idle_work(struct work_struct *data) -{ - struct musb *musb = mtk_musb; - unsigned long flags; - u8 devctl; - enum usb_otg_state old_state; - - usb_prepare_clock(true); - - spin_lock_irqsave(&musb->lock, flags); - old_state = musb->xceiv->otg->state; - if (musb->is_active) { - DBG(0, - "%s active, igonre do_idle\n", - otg_state_string(musb->xceiv->otg->state)); - goto exit; - } - - switch (musb->xceiv->otg->state) { - case OTG_STATE_B_PERIPHERAL: - case OTG_STATE_A_WAIT_BCON: - devctl = musb_readb(musb->mregs, MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) { - musb->xceiv->otg->state = OTG_STATE_B_IDLE; - MUSB_DEV_MODE(musb); - } else { - musb->xceiv->otg->state = OTG_STATE_A_IDLE; - MUSB_HST_MODE(musb); - } - break; - case OTG_STATE_A_HOST: - devctl = musb_readb(musb->mregs, MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) - musb->xceiv->otg->state = OTG_STATE_B_IDLE; - else - musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON; - break; - default: - break; - } - DBG(0, "otg_state %s to %s, is_active<%d>\n", - otg_state_string(old_state), - otg_state_string(musb->xceiv->otg->state), - musb->is_active); -exit: - spin_unlock_irqrestore(&musb->lock, flags); - - usb_prepare_clock(false); -} - -static void musb_do_idle(struct timer_list *t) -{ - struct musb *musb = from_timer(musb, t, idle_timer); - - queue_delayed_work(musb->st_wq, &idle_work, 0); -} - -static void mt_usb_try_idle(struct musb *musb, unsigned long timeout) -{ - unsigned long default_timeout = jiffies + msecs_to_jiffies(3); - static unsigned long last_timer; - - DBG(0, "skip %s\n", __func__); - return; - - if (timeout == 0) - timeout = default_timeout; - - /* Never idle if active, or when VBUS timeout is not set as host */ - if (musb->is_active || ((musb->a_wait_bcon == 0) - && (musb->xceiv->otg->state - == OTG_STATE_A_WAIT_BCON))) { - DBG(0, "%s active, deleting timer\n", - otg_state_string(musb->xceiv->otg->state)); - del_timer(&musb->idle_timer); - last_timer = jiffies; - return; - } - - if (time_after(last_timer, timeout)) { - if (!timer_pending(&musb->idle_timer)) - last_timer = timeout; - else { - DBG(0, "Longer idle timer already pending, ignoring\n"); - return; - } - } - last_timer = timeout; - - DBG(0, "%s inactive, for idle timer for %lu ms\n", - otg_state_string(musb->xceiv->otg->state), - (unsigned long)jiffies_to_msecs(timeout - jiffies)); - mod_timer(&musb->idle_timer, timeout); -} - -static int real_enable = 0, real_disable; -static int virt_enable = 0, virt_disable; -static void mt_usb_enable(struct musb *musb) -{ - unsigned long flags; - #ifdef CONFIG_MTK_UART_USB_SWITCH - static int is_check; - #endif - - virt_enable++; - DBG(0, "begin <%d,%d>,<%d,%d,%d,%d>\n", - mtk_usb_power, musb->power, - virt_enable, virt_disable, - real_enable, real_disable); - if (musb->power == true) - return; - - /* clock alredy prepare before enter here */ - usb_enable_clock(true); - - mdelay(10); - #ifdef CONFIG_MTK_UART_USB_SWITCH - if (!is_check) { - in_uart_mode = usb_phy_check_in_uart_mode(); - is_check = 1; - } - #endif - - flags = musb_readl(musb->mregs, USB_L1INTM); - - /* update musb->power & mtk_usb_power in the same time */ - musb->power = true; - mtk_usb_power = true; - real_enable++; - if (in_interrupt()) { - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - DBG(0, "in interrupt !!!!!!!!!!!!!!!\n"); - } - DBG(0, "end, <%d,%d,%d,%d>\n", - virt_enable, virt_disable, - real_enable, real_disable); - musb_writel(mtk_musb->mregs, USB_L1INTM, flags); -} - -static void mt_usb_disable(struct musb *musb) -{ - virt_disable++; - - DBG(0, "begin, <%d,%d>,<%d,%d,%d,%d>\n", - mtk_usb_power, musb->power, - virt_enable, virt_disable, - real_enable, real_disable); - if (musb->power == false) - return; - - - usb_enable_clock(false); - /* clock will unprepare when leave here */ - - real_disable++; - DBG(0, "end, <%d,%d,%d,%d>\n", - virt_enable, virt_disable, - real_enable, real_disable); - - /* update musb->power & mtk_usb_power in the same time */ - musb->power = 0; - mtk_usb_power = false; -} - -/* ================================ */ -/* connect and disconnect functions */ -/* ================================ */ -bool mt_usb_is_device(void) -{ - DBG(4, "called\n"); - - if (!mtk_musb) { - DBG(0, "mtk_musb is NULL\n"); - /* don't do charger detection when usb is not ready */ - return false; - } - DBG(4, "is_host=%d\n", mtk_musb->is_host); - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "in UART Mode\n"); - return false; - } -#endif -#ifdef CONFIG_USB_MTK_OTG - return !mtk_musb->is_host; -#else - return true; -#endif -} - -static struct delayed_work disconnect_check_work; -static bool musb_hal_is_vbus_exist(void); -void do_disconnect_check_work(struct work_struct *data) -{ - bool vbus_exist = false; - unsigned long flags = 0; - struct musb *musb = mtk_musb; - - msleep(200); - - vbus_exist = musb_hal_is_vbus_exist(); - DBG(1, "vbus_exist:<%d>\n", vbus_exist); - if (vbus_exist) - return; - - spin_lock_irqsave(&mtk_musb->lock, flags); - DBG(1, "speed <%d>\n", musb->g.speed); - /* notify gadget driver, g.speed judge is very important */ - if (!musb->is_host && musb->g.speed != USB_SPEED_UNKNOWN) { - DBG(0, "musb->gadget_driver:%p\n", musb->gadget_driver); - if (musb->gadget_driver && musb->gadget_driver->disconnect) { - DBG(0, "musb->gadget_driver->disconnect:%p\n", - musb->gadget_driver->disconnect); - /* align musb_g_disconnect */ - spin_unlock(&musb->lock); - musb->gadget_driver->disconnect(&musb->g); - spin_lock(&musb->lock); - - } - musb->g.speed = USB_SPEED_UNKNOWN; - } - DBG(1, "speed <%d>\n", musb->g.speed); - spin_unlock_irqrestore(&mtk_musb->lock, flags); -} -void trigger_disconnect_check_work(void) -{ - static int inited; - - if (!inited) { - INIT_DELAYED_WORK(&disconnect_check_work, - do_disconnect_check_work); - inited = 1; - } - queue_delayed_work(mtk_musb->st_wq, &disconnect_check_work, 0); -} - - -static bool musb_hal_is_vbus_exist(void) -{ - bool vbus_exist = true; - - return vbus_exist; -} - -DEFINE_MUTEX(cable_connected_lock); -/* be aware this could not be used in non-sleep context */ -bool usb_cable_connected(struct musb *musb) -{ - if (musb->usb_connected) - return true; - else - return false; -} - -static bool cmode_effect_on(void) -{ - bool effect = false; - - /* CMODE CHECK */ - if (cable_mode == CABLE_MODE_CHRG_ONLY /*|| - (cable_mode == CABLE_MODE_HOST_ONLY && - chg_type != CHARGING_HOST)*/) - effect = true; - - DBG(0, "cable_mode=%d, effect=%d\n", cable_mode, effect); - return effect; -} - -void do_connection_work(struct work_struct *data) -{ - unsigned long flags = 0; - int usb_clk_state = NO_CHANGE; - bool usb_on, usb_connected; - struct mt_usb_work *work = - container_of(data, struct mt_usb_work, dwork.work); - - DBG(0, "is_host<%d>, power<%d>, ops<%d>\n", - mtk_musb->is_host, mtk_musb->power, work->ops); - - /* always prepare clock and check if need to unprepater later */ - /* clk_prepare_cnt +1 here*/ - usb_prepare_clock(true); - - /* be aware this could not be used in non-sleep context */ - usb_connected = mtk_musb->usb_connected; - - /* additional check operation here */ - if (musb_force_on) - usb_on = true; - else if (work->ops == CONNECTION_OPS_CHECK) - usb_on = usb_connected; - else - usb_on = (work->ops == - CONNECTION_OPS_CONN ? true : false); - - if (cmode_effect_on()) - usb_on = false; - /* additional check operation done */ - - spin_lock_irqsave(&mtk_musb->lock, flags); - - if (mtk_musb->is_host) { - DBG(0, "is host, return\n"); - goto exit; - } - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "in uart mode, return\n"); - goto exit; - } -#endif - - if (!mtk_musb->power && (usb_on == true)) { - /* enable usb */ - if (!mtk_musb->usb_lock->active) { - __pm_stay_awake(mtk_musb->usb_lock); - DBG(0, "lock\n"); - } else { - DBG(0, "already lock\n"); - } - - /* note this already put SOFTCON */ - musb_start(mtk_musb); - usb_clk_state = OFF_TO_ON; - - } else if (mtk_musb->power && (usb_on == false)) { - /* disable usb */ - musb_stop(mtk_musb); - if (mtk_musb->usb_lock->active) { - DBG(0, "unlock\n"); - __pm_relax(mtk_musb->usb_lock); - } else { - DBG(0, "lock not active\n"); - } - usb_clk_state = ON_TO_OFF; - mtk_musb->xceiv->otg->state = OTG_STATE_B_IDLE; - } else - DBG(0, "do nothing, usb_on:%d, power:%d\n", - usb_on, mtk_musb->power); -exit: - spin_unlock_irqrestore(&mtk_musb->lock, flags); - - if (usb_clk_state == ON_TO_OFF) { - /* clock on -> of: clk_prepare_cnt -2 */ - usb_prepare_clock(false); - usb_prepare_clock(false); - } else if (usb_clk_state == NO_CHANGE) { - /* clock no change : clk_prepare_cnt -1 */ - usb_prepare_clock(false); - } - - /* free mt_usb_work */ - kfree(work); -} - -static void issue_connection_work(int ops) -{ - struct mt_usb_work *work; - - if (!mtk_musb) { - DBG(0, "mtk_musb = NULL\n"); - return; - } - /* create and prepare worker */ - work = kzalloc(sizeof(struct mt_usb_work), GFP_ATOMIC); - if (!work) { - DBG(0, "wrap is NULL, directly return\n"); - return; - } - work->ops = ops; - INIT_DELAYED_WORK(&work->dwork, do_connection_work); - /* issue connection work */ - DBG(0, "issue work, ops<%d>\n", ops); - queue_delayed_work(mtk_musb->st_wq, &work->dwork, 0); -} - -void mt_usb_connect(void) -{ - DBG(0, "[MUSB] USB connect\n"); - issue_connection_work(CONNECTION_OPS_CONN); -} -EXPORT_SYMBOL(mt_usb_connect); - -void mt_usb_disconnect(void) -{ - DBG(0, "[MUSB] USB disconnect\n"); - issue_connection_work(CONNECTION_OPS_DISC); -} - -void mt_usb_reconnect(void) -{ - DBG(0, "[MUSB] USB reconnect\n"); - issue_connection_work(CONNECTION_OPS_CHECK); -} -EXPORT_SYMBOL(mt_usb_reconnect); - -/* build time force on */ -#if defined(CONFIG_FPGA_EARLY_PORTING) ||\ - defined(U3_COMPLIANCE) || defined(FOR_BRING_UP) -#define BYPASS_PMIC_LINKAGE -#endif - -void musb_platform_reset(struct musb *musb) -{ - u16 swrst = 0; - void __iomem *mbase = musb->mregs; - u8 bit; - - /* clear all DMA enable bit */ - for (bit = 0; bit < MUSB_HSDMA_CHANNELS; bit++) - musb_writew(mbase, - MUSB_HSDMA_CHANNEL_OFFSET(bit, MUSB_HSDMA_CONTROL), 0); - - /* set DMA channel 0 burst mode to boost QMU speed */ - musb_writel(musb->mregs, 0x204, - musb_readl(musb->mregs, 0x204) | 0x600); -#ifdef CONFIG_MTK_MUSB_DRV_36BIT - /* eanble DMA channel 0 36-BIT support */ - musb_writel(musb->mregs, 0x204, - musb_readl(musb->mregs, 0x204) | 0x4000); -#endif - - swrst = musb_readw(mbase, MUSB_SWRST); - swrst |= (MUSB_SWRST_DISUSBRESET | MUSB_SWRST_SWRST); - musb_writew(mbase, MUSB_SWRST, swrst); -} -EXPORT_SYMBOL(musb_platform_reset); - -bool is_switch_charger(void) -{ -#ifdef SWITCH_CHARGER - return true; -#else - return false; -#endif -} - -void pmic_chrdet_int_en(int is_on) -{ -#ifndef FPGA_PLATFORM -#ifdef CONFIG_MTK_PMIC - DBG(0, "is_on<%d>\n", is_on); - upmu_interrupt_chrdet_int_en(is_on); -#else - DBG(0, "FIXME, no upmu_interrupt_chrdet_int_en ???\n"); -#endif -#endif -} - -void musb_sync_with_bat(struct musb *musb, int usb_state) -{ -#ifndef FPGA_PLATFORM - - DBG(1, "BATTERY_SetUSBState, state=%d\n", usb_state); -#ifdef CONFIG_MTK_CHARGER - BATTERY_SetUSBState(usb_state); -#endif -#endif -} -EXPORT_SYMBOL(musb_sync_with_bat); - -/*-------------------------------------------------------------------------*/ -static irqreturn_t generic_interrupt(int irq, void *__hci) -{ - irqreturn_t retval = IRQ_NONE; - struct musb *musb = __hci; - - /* musb_read_clear_generic_interrupt */ - musb->int_usb = - musb_readb(musb->mregs, MUSB_INTRUSB) & - musb_readb(musb->mregs, MUSB_INTRUSBE); - musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX) & - musb_readw(musb->mregs, MUSB_INTRTXE); - musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX) & - musb_readw(musb->mregs, MUSB_INTRRXE); -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - musb->int_queue = musb_readl(musb->mregs, MUSB_QISAR); -#endif - /* hw status up to date before W1C */ - mb(); - musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx); - musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx); - musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb); -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - if (musb->int_queue) { - musb_writel(musb->mregs, MUSB_QISAR, musb->int_queue); - musb->int_queue &= ~(musb_readl(musb->mregs, MUSB_QIMR)); - } -#endif - /* musb_read_clear_generic_interrupt */ - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - if (musb->int_usb || musb->int_tx || musb->int_rx || musb->int_queue) - retval = musb_interrupt(musb); -#else - if (musb->int_usb || musb->int_tx || musb->int_rx) - retval = musb_interrupt(musb); -#endif - - - return retval; -} - -static irqreturn_t mt_usb_interrupt(int irq, void *dev_id) -{ - irqreturn_t tmp_status; - irqreturn_t status = IRQ_NONE; - struct musb *musb = (struct musb *)dev_id; - u32 usb_l1_ints; - unsigned long flags; - - spin_lock_irqsave(&musb->lock, flags); - usb_l1_ints = musb_readl(musb->mregs, USB_L1INTS) & - musb_readl(mtk_musb->mregs, USB_L1INTM); - DBG(1, "usb interrupt assert %x %x %x %x %x %x %x\n", usb_l1_ints, - musb_readl(mtk_musb->mregs, USB_L1INTM), - musb_readb(musb->mregs, MUSB_INTRUSBE), - musb_readw(musb->mregs, MUSB_INTRTX), - musb_readw(musb->mregs, MUSB_INTRTXE), - musb_readw(musb->mregs, MUSB_INTRRX), - musb_readw(musb->mregs, MUSB_INTRRXE)); - - if ((usb_l1_ints & TX_INT_STATUS) || (usb_l1_ints & RX_INT_STATUS) - || (usb_l1_ints & USBCOM_INT_STATUS) -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - || (usb_l1_ints & QINT_STATUS) -#endif - ) { - tmp_status = generic_interrupt(irq, musb); - if (tmp_status != IRQ_NONE) - status = tmp_status; - } - spin_unlock_irqrestore(&musb->lock, flags); - - /* FIXME, workaround for device_qmu + host_dma */ -#if 1 -/* #ifndef CONFIG_MTK_MUSB_QMU_SUPPORT */ - if (usb_l1_ints & DMA_INT_STATUS) { - tmp_status = dma_controller_irq(irq, musb->dma_controller); - if (tmp_status != IRQ_NONE) - status = tmp_status; - } -#endif - - return status; - -} - -static bool saving_mode; - -static ssize_t saving_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - return scnprintf(buf, PAGE_SIZE, "%d\n", saving_mode); -} - -static ssize_t saving_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - int saving; - long tmp_val; - - if (!dev) { - DBG(0, "dev is null!!\n"); - return count; - /* } else if (1 == sscanf(buf, "%d", &saving)) { */ - } else if (kstrtol(buf, 10, (long *)&tmp_val) == 0) { - saving = tmp_val; - DBG(0, "old=%d new=%d\n", saving, saving_mode); - if (saving_mode == (!saving)) - saving_mode = !saving_mode; - } - return count; -} - -bool is_saving_mode(void) -{ - DBG(0, "%d\n", saving_mode); - return saving_mode; -} -EXPORT_SYMBOL(is_saving_mode); - -void usb_dump_debug_register(void) -{ - struct musb *musb = mtk_musb; - - usb_enable_clock(true); - - /* 1:Read 0x11200620; */ - pr_notice("[IPI USB dump]addr: 0x620, value: %x\n", - musb_readl(musb->mregs, 0x620)); - - /* 2: set 0x11200600[5:0] = 0x23; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x23); - pr_notice("[IPI USB dump]addr: 0x634, 0x23 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 3: set 0x11200600[5:0] = 0x24; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x24); - pr_notice("[IPI USB dump]addr: 0x634, 0x24 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 4:set 0x11200600[5:0] = 0x25; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x25); - pr_notice("[IPI USB dump]addr: 0x634, 0x25 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - /* 5:set 0x11200600[5:0] = 0x26; */ - /* Read 0x11200634; */ - musb_writew(musb->mregs, 0x600, 0x26); - pr_notice("[IPI USB dump]addr: 0x634, 0x26 value: %x\n", - musb_readl(musb->mregs, 0x634)); - - usb_enable_clock(false); -} - -DEVICE_ATTR_RW(saving); - -#ifdef CONFIG_MTK_UART_USB_SWITCH -static void uart_usb_switch_dump_register(void) -{ - usb_enable_clock(true); - -#ifdef CONFIG_MTK_MUSB_PHY - DBG(0, "[MUSB]addr: 0x68, value: %x\n" - "[MUSB]addr: 0x6C, value: %x\n" - "[MUSB]addr: 0x20, value: %x\n" - "[MUSB]addr: 0x18, value: %x\n", - USBPHY_READ32(0x68), - USBPHY_READ32(0x6C), - USBPHY_READ32(0x20), - USBPHY_READ32(0x18)); -#endif - - usb_enable_clock(false); - DBG(0, "[MUSB]GPIO_SEL=%x\n", GET_GPIO_SEL_VAL(readl(ap_gpio_base))); -} - -static ssize_t mt_usb_show_portmode(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - usb_prepare_enable_clock(true); - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) - port_mode = PORT_MODE_UART; - else - port_mode = PORT_MODE_USB; - - if (port_mode == PORT_MODE_USB) - DBG(0, "\nUSB Port mode -> USB\n"); - else if (port_mode == PORT_MODE_UART) - DBG(0, "\nUSB Port mode -> UART\n"); - - uart_usb_switch_dump_register(); - - usb_prepare_enable_clock(false); - - return scnprintf(buf, PAGE_SIZE, "%d\n", port_mode); -} - -static ssize_t portmode_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - unsigned int portmode; - - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) - port_mode = PORT_MODE_UART; - - if (!dev) { - DBG(0, "dev is null!!\n"); - return count; - } else if (kstrtouint(buf, 10, &portmode) == 0) { - usb_prepare_enable_clock(true); - DBG(0, - "\nUSB Port mode: current => %d (port_mode), change to => %d (portmode)\n", - port_mode, portmode); - if (portmode >= PORT_MODE_MAX) - portmode = PORT_MODE_USB; - - if (port_mode != portmode) { - /* Changing to USB Mode */ - if (portmode == PORT_MODE_USB) { - DBG(0, "USB Port mode -> USB\n"); - usb_phy_switch_to_usb(); - /* Changing to UART Mode */ - } else if (portmode == PORT_MODE_UART) { - DBG(0, "USB Port mode -> UART\n"); - usb_phy_switch_to_uart(); - } - uart_usb_switch_dump_register(); - port_mode = portmode; - } - usb_prepare_enable_clock(false); - } - return count; -} - -DEVICE_ATTR_RW(portmode); - -static ssize_t mt_usb_show_uart_path(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - u32 var; - - if (!dev) { - DBG(0, "dev is null!!\n"); - return 0; - } - - var = GET_GPIO_SEL_VAL(readl(ap_gpio_base)); - DBG(0, "[MUSB]GPIO SELECT=%x\n", var); - - return scnprintf(buf, PAGE_SIZE, "%x\n", var); -} - -DEVICE_ATTR(uartpath, 0444, mt_usb_show_uart_path, NULL); -#endif - -#ifndef FPGA_PLATFORM -static struct device_attribute *mt_usb_attributes[] = { - &dev_attr_saving, -#ifdef CONFIG_MTK_UART_USB_SWITCH - &dev_attr_portmode, - &dev_attr_uartpath, -#endif - NULL -}; - -static int init_sysfs(struct device *dev) -{ - struct device_attribute **attr; - int rc; - - for (attr = mt_usb_attributes; *attr; attr++) { - rc = device_create_file(dev, *attr); - if (rc) - goto out_unreg; - } - return 0; - -out_unreg: - for (; attr >= mt_usb_attributes; attr--) - device_remove_file(dev, *attr); - return rc; -} -#endif - -#ifdef FPGA_PLATFORM -static struct i2c_client *usb_i2c_client; -static const struct i2c_device_id usb_i2c_id[] = { {"mtk-usb", 0}, {} }; - -void USB_PHY_Write_Register8(u8 var, u8 addr) -{ - char buffer[2]; - - buffer[0] = addr; - buffer[1] = var; - i2c_master_send(usb_i2c_client, buffer, 2); -} - -u8 USB_PHY_Read_Register8(u8 addr) -{ - u8 var; - - i2c_master_send(usb_i2c_client, &addr, 1); - i2c_master_recv(usb_i2c_client, &var, 1); - return var; -} - -#define U3_PHY_PAGE 0xff - -void _u3_write_bank(u32 value) -{ - USB_PHY_Write_Register8((u8)value, (u8)U3_PHY_PAGE); -} - -u32 _u3_read_reg(u32 address) -{ - u8 databuffer = 0; - - databuffer = USB_PHY_Read_Register8((u8)address); - return databuffer; -} - -void _u3_write_reg(u32 address, u32 value) -{ - USB_PHY_Write_Register8((u8)value, (u8)address); -} - -u32 u3_phy_read_reg32(u32 addr) -{ - u32 bank; - u32 addr8; - u32 data; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - - _u3_write_bank(bank); - data = _u3_read_reg(addr8); - data |= (_u3_read_reg(addr8 + 1) << 8); - data |= (_u3_read_reg(addr8 + 2) << 16); - data |= (_u3_read_reg(addr8 + 3) << 24); - return data; -} - -u32 u3_phy_write_reg32(u32 addr, u32 data) -{ - u32 bank; - u32 addr8; - u32 data_0, data_1, data_2, data_3; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - data_0 = data & 0xff; - data_1 = (data >> 8) & 0xff; - data_2 = (data >> 16) & 0xff; - data_3 = (data >> 24) & 0xff; - - _u3_write_bank(bank); - _u3_write_reg(addr8, data_0); - _u3_write_reg(addr8 + 1, data_1); - _u3_write_reg(addr8 + 2, data_2); - _u3_write_reg(addr8 + 3, data_3); - - return 0; -} - -void u3_phy_write_field32(int addr, int offset, int mask, int value) -{ - u32 cur_value; - u32 new_value; - - cur_value = u3_phy_read_reg32(addr); - new_value = (cur_value & (~mask)) | ((value << offset) & mask); - - u3_phy_write_reg32(addr, new_value); -} - -u32 u3_phy_write_reg8(u32 addr, u8 data) -{ - u32 bank; - u32 addr8; - - bank = (addr >> 16) & 0xff; - addr8 = addr & 0xff; - _u3_write_bank(bank); - _u3_write_reg(addr8, data); - - return 0; -} - -static int usb_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - void __iomem *base; - u32 val = 0; - /* if i2c probe before musb prob, this would cause KE */ - /* base = (unsigned long)((unsigned long)mtk_musb->xceiv->io_priv); */ - base = usb_phy_base + USB_PHY_OFFSET; - DBG(0, "[MUSB]%s, start, base:%p\n", __func__, base); - - usb_i2c_client = client; - - /* disable usb mac suspend */ - val = musb_readl(base, 0x68); - DBG(0, "[MUSB]0x68=0x%x\n", val); - - musb_writel(base, 0x68, (val & ~(0x4 << 16))); - - DBG(0, "[MUSB]0x68=0x%x\n" - "[MUSB]addr: 0xFF, value: %x\n", - musb_readl(base, 0x68), - USB_PHY_Read_Register8(0xFF)); - - USB_PHY_Write_Register8(0x20, 0xFF); - - DBG(0, "[MUSB]version=[%02x %02x %02x %02x]\n", - USB_PHY_Read_Register8(0xE4), - USB_PHY_Read_Register8(0xE5), - USB_PHY_Read_Register8(0xE6), - USB_PHY_Read_Register8(0xE7)); - - if (USB_PHY_Read_Register8(0xE7) == 0xa) { - static struct u3phy_info info; - - DBG(0, "[A60801A] Phy version is %x\n", - u3_phy_read_reg32(0x2000e4)); - - info.u2phy_regs_a = (struct u2phy_reg_a *)0x0; - info.u3phyd_regs_a = (struct u3phyd_reg_a *)0x100000; - info.u3phyd_bank2_regs_a = - (struct u3phyd_bank2_reg_a *)0x200000; - info.u3phya_regs_a = (struct u3phya_reg_a *)0x300000; - info.u3phya_da_regs_a = (struct u3phya_da_reg_a *)0x400000; - info.sifslv_chip_regs_a = (struct sifslv_chip_reg_a *)0x500000; - info.spllc_regs_a = (struct spllc_reg_a *)0x600000; - info.sifslv_fm_regs_a = (struct sifslv_fm_reg_a *)0xf00000; - - /* BANK 0x00 */ - /* for U2 hS eye diagram */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr1) - , A60810_RG_USB20_TERM_VREF_SEL_OFST - , A60810_RG_USB20_TERM_VREF_SEL - , 0x05); - /* for U2 hS eye diagram */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr1) - , A60810_RG_USB20_VRT_VREF_SEL_OFST - , A60810_RG_USB20_VRT_VREF_SEL - , 0x05); - /* for U2 sensititvity */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr6) - , A60810_RG_USB20_SQTH_OFST - , A60810_RG_USB20_SQTH - , 0x04); - - /* BANK 0x10 */ - /* disable ssusb_p3_entry to work around resume from P3 bug */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phyd_regs_a->phyd_lfps0) - , A60810_RG_SSUSB_P3_ENTRY_OFST - , A60810_RG_SSUSB_P3_ENTRY - , 0x00); - /* force disable ssusb_p3_entry to - * work around resume from P3 bug - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phyd_regs_a->phyd_lfps0) - , A60810_RG_SSUSB_P3_ENTRY_SEL_OFST - , A60810_RG_SSUSB_P3_ENTRY_SEL - , 0x01); - - /* BANK 0x40 */ - /* fine tune SSC delta1 to let SSC min average ~0ppm */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg19) - , A60810_RG_SSUSB_PLL_SSC_DELTA1_U3_OFST - , A60810_RG_SSUSB_PLL_SSC_DELTA1_U3 - , 0x46); - /* U3PhyWriteField32(((u32)&info.u3phya_da_regs_a->reg19) */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg21) - , A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H_OFST - , A60810_RG_SSUSB_PLL_SSC_DELTA1_PE1H - , 0x40); - - /* fine tune SSC delta to let SSC min average ~0ppm */ - - /* Fine tune SYSPLL to improve phase noise */ - /* I2C 60 0x08[01:00] 0x03 - * RW RG_SSUSB_PLL_BC_U3 - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg4) - , A60810_RG_SSUSB_PLL_BC_U3_OFST - , A60810_RG_SSUSB_PLL_BC_U3 - , 0x3); - /* I2C 60 0x08[12:10] 0x03 - * RW RG_SSUSB_PLL_DIVEN_U3 - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg4) - , A60810_RG_SSUSB_PLL_DIVEN_U3_OFST - , A60810_RG_SSUSB_PLL_DIVEN_U3 - , 0x3); - /* I2C 60 0x0C[03:00] 0x01 RW RG_SSUSB_PLL_IC_U3 */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg5) - , A60810_RG_SSUSB_PLL_IC_U3_OFST - , A60810_RG_SSUSB_PLL_IC_U3 - , 0x1); - /* I2C 60 0x0C[23:22] 0x01 RW RG_SSUSB_PLL_BR_U3 */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg5) - , A60810_RG_SSUSB_PLL_BR_U3_OFST - , A60810_RG_SSUSB_PLL_BR_U3 - , 0x1); - /* I2C 60 0x10[03:00] 0x01 - * RW RG_SSUSB_PLL_IR_U3 - */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg6) - , A60810_RG_SSUSB_PLL_IR_U3_OFST - , A60810_RG_SSUSB_PLL_IR_U3 - , 0x1); - /* I2C 60 0x14[03:00] 0x0F RW RG_SSUSB_PLL_BP_U3 */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u3phya_da_regs_a->reg7) - , A60810_RG_SSUSB_PLL_BP_U3_OFST - , A60810_RG_SSUSB_PLL_BP_U3 - , 0x0f); - - /* BANK 0x60 */ - /* force xtal pwd mode enable */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_FORCE_XTAL_PWD_OFST - , A60810_RG_SSUSB_FORCE_XTAL_PWD - , 0x1); - /* force bias pwd mode enable */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_FORCE_BIAS_PWD_OFST - , A60810_RG_SSUSB_FORCE_BIAS_PWD - , 0x1); - /* force xtal pwd mode off to work around xtal drv de */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_XTAL_PWD_OFST - , A60810_RG_SSUSB_XTAL_PWD - , 0x0); - /* force bias pwd mode off to work around xtal drv de */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.spllc_regs_a->u3d_xtalctl_2) - , A60810_RG_SSUSB_BIAS_PWD_OFST - , A60810_RG_SSUSB_BIAS_PWD - , 0x0); - - /********* test chip settings ***********/ - /* BANK 0x00 */ - /* slew rate setting */ - u3_phy_write_field32(((phys_addr_t)(uintptr_t) - &info.u2phy_regs_a->usbphyacr5) - , A60810_RG_USB20_HSTX_SRCTRL_OFST - , A60810_RG_USB20_HSTX_SRCTRL - , 0x4); - - /* BANK 0x50 */ - - /* PIPE setting BANK5 */ - /* PIPE drv = 2 */ - u3_phy_write_reg8(((phys_addr_t)(uintptr_t) - &info.sifslv_chip_regs_a->gpio_ctla) + 2, 0x10); - /* PIPE phase */ - /* U3PhyWriteReg8(((u32)&info.sifslv_chip_regs_a->gpio_ctla)+3, - * 0xdc); - */ - u3_phy_write_reg8(((phys_addr_t)(uintptr_t) - &info.sifslv_chip_regs_a->gpio_ctla) + 3, 0x24); - } else { - USB_PHY_Write_Register8(0x00, 0xFF); - - DBG(0, "[MUSB]addr: 0xFF, value: %x\n", - USB_PHY_Read_Register8(0xFF)); - - /* usb phy initial sequence */ - USB_PHY_Write_Register8(0x00, 0xFF); - USB_PHY_Write_Register8(0x04, 0x61); - USB_PHY_Write_Register8(0x00, 0x68); - USB_PHY_Write_Register8(0x00, 0x6a); - USB_PHY_Write_Register8(0x6e, 0x00); - USB_PHY_Write_Register8(0x0c, 0x1b); - USB_PHY_Write_Register8(0x44, 0x08); - USB_PHY_Write_Register8(0x55, 0x11); - USB_PHY_Write_Register8(0x68, 0x1a); - - - DBG(0, "[MUSB]addr: 0xFF, value: %x\n" - "[MUSB]addr: 0x61, value: %x\n" - "[MUSB]addr: 0x68, value: %x\n" - "[MUSB]addr: 0x6a, value: %x\n" - "[MUSB]addr: 0x00, value: %x\n" - "[MUSB]addr: 0x1b, value: %x\n" - "[MUSB]addr: 0x08, value: %x\n" - "[MUSB]addr: 0x11, value: %x\n" - "[MUSB]addr: 0x1a, value: %x\n", - USB_PHY_Read_Register8(0xFF), - USB_PHY_Read_Register8(0x61), - USB_PHY_Read_Register8(0x68), - USB_PHY_Read_Register8(0x6a), - USB_PHY_Read_Register8(0x00), - USB_PHY_Read_Register8(0x1b), - USB_PHY_Read_Register8(0x08), - USB_PHY_Read_Register8(0x11), - USB_PHY_Read_Register8(0x1a)); - } - - DBG(0, "[MUSB]%s, end\n", __func__); - return 0; - -} - -static int usb_i2c_remove(struct i2c_client *client) -{ - return 0; -} - -static const struct of_device_id usb_of_match[] = { - {.compatible = "mediatek,mtk-usb"}, - {}, -}; - -struct i2c_driver usb_i2c_driver = { - .probe = usb_i2c_probe, - .remove = usb_i2c_remove, - .driver = { - .name = "mtk-usb", - .of_match_table = usb_of_match, - }, - .id_table = usb_i2c_id, -}; - -static int add_usb_i2c_driver(void) -{ - DBG(0, "%s\n", __func__); - - if (i2c_add_driver(&usb_i2c_driver) != 0) { - DBG(0, "[MUSB]usb_i2c_driver initialization failed!!\n"); - return -1; - } - DBG(0, "[MUSB]usb_i2c_driver initialization succeed!!\n"); - return 0; -} -#endif /* End of FPGA_PLATFORM */ - -static int __init mt_usb_init(struct musb *musb) -{ - int ret; - - DBG(1, "%s\n", __func__); - - musb->phy = glue->phy; - musb->xceiv = glue->xceiv; - - musb->dma_irq = (int)SHARE_IRQ; - musb->fifo_cfg = fifo_cfg; - musb->fifo_cfg_size = ARRAY_SIZE(fifo_cfg); - musb->dyn_fifo = true; - musb->power = false; - musb->is_host = false; - musb->fifo_size = 8 * 1024; - musb->usb_lock = wakeup_source_register(NULL, "USB suspend lock"); - - ret = phy_init(glue->phy); - if (ret) - goto err_phy_init; - -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - glue->phy_mode = PHY_MODE_UART; - DBG(0, "At UART mode. Switch to USB is not support\n"); - } -#endif - phy_set_mode(glue->phy, glue->phy_mode); - - if (glue->phy_mode != PHY_MODE_UART) - ret = phy_power_on(glue->phy); - - if (ret) - goto err_phy_power_on; - -#ifndef FPGA_PLATFORM - reg_vusb = regulator_get(musb->controller, "vusb"); - if (!IS_ERR(reg_vusb)) { -#ifdef NEVER -#define VUSB33_VOL_MIN 3070000 -#define VUSB33_VOL_MAX 3070000 - ret = regulator_set_voltage(reg_vusb, - VUSB33_VOL_MIN, VUSB33_VOL_MAX); - if (ret < 0) - pr_err("regulator set vol failed: %d\n", ret); - else - DBG(0, "regulator set vol ok, <%d,%d>\n", - VUSB33_VOL_MIN, VUSB33_VOL_MAX); -#endif /* NEVER */ - ret = regulator_enable(reg_vusb); - if (ret < 0) { - pr_err("regulator_enable vusb failed: %d\n", ret); - regulator_put(reg_vusb); - } - } else - pr_err("regulator_get vusb failed\n"); - - reg_vio18 = regulator_get(musb->controller, "vio18"); - if (!IS_ERR(reg_vio18)) { - ret = regulator_enable(reg_vio18); - if (ret < 0) { - pr_err("regulator_enable vio18 failed: %d\n", ret); - regulator_put(reg_vio18); - } - } else - pr_err("regulator_get vio18 failed\n"); - - reg_va12 = regulator_get(musb->controller, "va12"); - if (!IS_ERR(reg_va12)) { - ret = regulator_enable(reg_va12); - if (ret < 0) { - pr_err("regulator_enable va12 failed: %d\n", ret); - regulator_put(reg_va12); - } - } else - pr_err("regulator_get va12 failed\n"); - -#endif - - /* ret = device_create_file(musb->controller, &dev_attr_cmode); */ - - /* mt_usb_enable(musb); */ - - musb->isr = mt_usb_interrupt; - musb_writel(musb->mregs, - MUSB_HSDMA_INTR, 0xff | - (0xff << DMA_INTR_UNMASK_SET_OFFSET)); - DBG(1, "musb platform init %x\n", - musb_readl(musb->mregs, MUSB_HSDMA_INTR)); - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - /* FIXME, workaround for device_qmu + host_dma */ - musb_writel(musb->mregs, - USB_L1INTM, - TX_INT_STATUS | - RX_INT_STATUS | - USBCOM_INT_STATUS | - DMA_INT_STATUS | - QINT_STATUS); -#else - musb_writel(musb->mregs, - USB_L1INTM, - TX_INT_STATUS | - RX_INT_STATUS | - USBCOM_INT_STATUS | - DMA_INT_STATUS); -#endif - - timer_setup(&musb->idle_timer, musb_do_idle, 0); - -#ifdef CONFIG_USB_MTK_OTG - mt_usb_otg_init(musb); - /* enable host suspend mode */ - mt_usb_wakeup_init(musb); - musb->host_suspend = true; -#endif - return 0; -err_phy_power_on: - phy_exit(glue->phy); -err_phy_init: - - return ret; -} - -static int mt_usb_exit(struct musb *musb) -{ - del_timer_sync(&musb->idle_timer); -#ifndef FPGA_PLATFORM - if (reg_vusb) { - regulator_put(reg_vusb); - reg_vusb = NULL; - } - if (reg_vio18) { - regulator_put(reg_vio18); - reg_vio18 = NULL; - } - if (reg_va12) { - regulator_put(reg_va12); - reg_va12 = NULL; - } -#endif -#ifdef CONFIG_USB_MTK_OTG - mt_usb_otg_exit(musb); -#endif - phy_power_off(glue->phy); - phy_exit(glue->phy); - return 0; -} - -static void mt_usb_enable_clk(struct musb *musb) -{ - usb_enable_clock(true); -} - -static void mt_usb_disable_clk(struct musb *musb) -{ - usb_enable_clock(false); -} - -static void mt_usb_prepare_clk(struct musb *musb) -{ - usb_prepare_clock(true); -} - -static void mt_usb_unprepare_clk(struct musb *musb) -{ - usb_prepare_clock(false); -} - -static const struct musb_platform_ops mt_usb_ops = { - .init = mt_usb_init, - .exit = mt_usb_exit, - /*.set_mode = mt_usb_set_mode, */ - .try_idle = mt_usb_try_idle, - .enable = mt_usb_enable, - .disable = mt_usb_disable, - /* .set_vbus = mt_usb_set_vbus, */ - .vbus_status = mt_usb_get_vbus_status, - .enable_clk = mt_usb_enable_clk, - .disable_clk = mt_usb_disable_clk, - .prepare_clk = mt_usb_prepare_clk, - .unprepare_clk = mt_usb_unprepare_clk, -#ifdef CONFIG_USB_MTK_OTG - .enable_wakeup = mt_usb_wakeup, -#endif -}; - -#ifdef CONFIG_MTK_MUSB_DRV_36BIT -static u64 mt_usb_dmamask = DMA_BIT_MASK(36); -#else -static u64 mt_usb_dmamask = DMA_BIT_MASK(32); -#endif - -struct mt_usb_glue *glue; -EXPORT_SYMBOL(glue); - -static int mt_usb_probe(struct platform_device *pdev) -{ - struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data; - struct platform_device *musb_pdev; - struct musb_hdrc_config *config; - struct device_node *np = pdev->dev.of_node; -#ifdef CONFIG_MTK_UART_USB_SWITCH - struct device_node *ap_gpio_node = NULL; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk *otg_sx; -#endif - int ret = -ENOMEM; - - glue = kzalloc(sizeof(*glue), GFP_KERNEL); - if (!glue) { - /* dev_err(&pdev->dev, "failed to allocate glue context\n"); */ - goto err0; - } - - musb_pdev = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_NONE); - if (!musb_pdev) { - dev_notice(&pdev->dev, "failed to allocate musb device\n"); - goto err1; - } - - glue->phy = devm_of_phy_get_by_index(&pdev->dev, np, 0); - if (IS_ERR(glue->phy)) { - dev_err(&pdev->dev, "fail to getting phy %ld\n", - PTR_ERR(glue->phy)); - return PTR_ERR(glue->phy); - } - - glue->usb_phy = usb_phy_generic_register(); - if (IS_ERR(glue->usb_phy)) { - dev_err(&pdev->dev, "fail to registering usb-phy %ld\n", - PTR_ERR(glue->usb_phy)); - return PTR_ERR(glue->usb_phy); - } - glue->xceiv = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2); - if (IS_ERR(glue->xceiv)) { - dev_err(&pdev->dev, "fail to getting usb-phy %d\n", ret); - ret = PTR_ERR(glue->xceiv); - goto err_unregister_usb_phy; - } - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) { - dev_notice(&pdev->dev, "failed to allocate musb platform data\n"); - goto err2; - } - - config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); - if (!config) { - /* dev_notice(&pdev->dev, - * "failed to allocate musb hdrc config\n"); - */ - goto err2; - } - -#ifdef CONFIG_MTK_UART_USB_SWITCH - ap_gpio_node = - of_find_compatible_node(NULL, NULL, AP_GPIO_COMPATIBLE_NAME); - - if (ap_gpio_node == NULL) { - dev_err(&pdev->dev, "USB get ap_gpio_node failed\n"); - if (ap_gpio_base) - iounmap(ap_gpio_base); - ap_gpio_base = 0; - } else { - ap_gpio_base = of_iomap(ap_gpio_node, 0); - ap_gpio_base += RG_GPIO_SELECT; - } -#endif - - of_property_read_u32(np, "num_eps", (u32 *) &config->num_eps); - config->multipoint = of_property_read_bool(np, "multipoint"); - - pdata->config = config; - - musb_pdev->dev.parent = &pdev->dev; - musb_pdev->dev.dma_mask = &mt_usb_dmamask; - musb_pdev->dev.coherent_dma_mask = mt_usb_dmamask; - - pdev->dev.dma_mask = &mt_usb_dmamask; - pdev->dev.coherent_dma_mask = mt_usb_dmamask; - arch_setup_dma_ops(&musb_pdev->dev, 0, mt_usb_dmamask, NULL, 0); - - glue->dev = &pdev->dev; - glue->musb_pdev = musb_pdev; - - pdata->platform_ops = &mt_usb_ops; - - /* - * Don't use the name from dtsi, like "11200000.usb0". - * So modify the device name. And rc can use the same path for - * all platform, like "/sys/devices/platform/mt_usb/". - */ - ret = device_rename(&pdev->dev, "mt_usb"); - if (ret) - dev_notice(&pdev->dev, "failed to rename\n"); - - /* - * fix uaf(use afer free) issue:backup pdev->name, - * device_rename will free pdev->name - */ - pdev->name = pdev->dev.kobj.name; - - platform_set_drvdata(pdev, glue); - - ret = platform_device_add_resources(musb_pdev, - pdev->resource, pdev->num_resources); - if (ret) { - dev_err(&pdev->dev, "failed to add resources\n"); - goto err2; - } - -#ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - isoc_ep_end_idx = 1; - isoc_ep_gpd_count = 248; /* 30 ms for HS, at most (30*8 + 1) */ - - mtk_host_qmu_force_isoc_restart = 0; -#endif -#ifndef FPGA_PLATFORM - register_usb_hal_dpidle_request(usb_dpidle_request); -#endif -#ifdef BYPASS_PMIC_LINKAGE - register_usb_hal_disconnect_check(trigger_disconnect_check_work); -#endif - INIT_DELAYED_WORK(&idle_work, do_idle_work); - - DBG(0, "keep musb->power & mtk_usb_power in the samae value\n"); - mtk_usb_power = false; - -#ifndef FPGA_PLATFORM - glue->musb_clk = devm_clk_get(&pdev->dev, "usb0"); - if (IS_ERR(glue->musb_clk)) { - DBG(0, "cannot get musb_clk clock\n"); - goto err2; - } - - glue->musb_ref_clk = devm_clk_get(&pdev->dev, "usb0_ref"); - if (IS_ERR(glue->musb_ref_clk)) { - DBG(0, "cannot get musb_ref_clk clock\n"); - goto err2; - } - - - glue->musb_clk_top_sel = devm_clk_get(&pdev->dev, "usb0_clk_top_sel"); - if (IS_ERR(glue->musb_clk_top_sel)) { - DBG(0, "cannot get musb_clk_top_sel clock\n"); - goto err2; - } - - glue->musb_clk_univpll5_d4 = devm_clk_get(&pdev->dev, "usb0_clk_univpll5_d4"); - if (IS_ERR(glue->musb_clk_univpll5_d4)) { - DBG(0, "cannot get musb_clk_univpll5_d4 clock\n"); - goto err2; - } - - if (init_sysfs(&pdev->dev)) { - DBG(0, "failed to init_sysfs\n"); - goto err2; - } -#ifdef CONFIG_USB_MTK_OTG - pdata->dr_mode = usb_get_dr_mode(&pdev->dev); -#else - of_property_read_u32(np, "dr_mode", (u32 *) &pdata->dr_mode); -#endif - - switch (pdata->dr_mode) { - case USB_DR_MODE_HOST: - glue->phy_mode = PHY_MODE_USB_HOST; - break; - case USB_DR_MODE_PERIPHERAL: - glue->phy_mode = PHY_MODE_USB_DEVICE; - break; - case USB_DR_MODE_OTG: - glue->phy_mode = PHY_MODE_USB_OTG; - break; - default: - dev_err(&pdev->dev, "Error 'dr_mode' property\n"); - return -EINVAL; - } - - DBG(0, "get dr_mode: %d\n", pdata->dr_mode); - - /* assign usb-role-sw */ - otg_sx = &glue->otg_sx; - -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - otg_sx->manual_drd_enabled = - of_property_read_bool(np, "enable-manual-drd"); - otg_sx->role_sw_used = of_property_read_bool(np, "usb-role-switch"); - - if (!otg_sx->role_sw_used && of_property_read_bool(np, "extcon")) { - otg_sx->edev = extcon_get_edev_by_phandle(&musb_pdev->dev, 0); - if (IS_ERR(otg_sx->edev)) { - dev_err(&musb_pdev->dev, "couldn't get extcon device\n"); - return PTR_ERR(otg_sx->edev); - } - } -#endif - - ret = platform_device_add_data(musb_pdev, pdata, sizeof(*pdata)); - if (ret) { - dev_notice(&pdev->dev, "failed to add platform_data\n"); - goto err2; - } - - ret = platform_device_add(musb_pdev); - - if (ret) { - dev_notice(&pdev->dev, "failed to register musb device\n"); - goto err2; - } -#endif - DBG(0, "USB probe done!\n"); - -#if defined(FPGA_PLATFORM) || defined(FOR_BRING_UP) - musb_force_on = 1; -#endif - - return 0; - -err2: - platform_device_put(musb_pdev); - platform_device_unregister(glue->musb_pdev); -err_unregister_usb_phy: - usb_phy_generic_unregister(glue->usb_phy); -err1: - kfree(glue); -err0: - return ret; -} - -static int mt_usb_remove(struct platform_device *pdev) -{ - struct mt_usb_glue *glue = platform_get_drvdata(pdev); - struct platform_device *usb_phy = glue->usb_phy; - - platform_device_unregister(glue->musb_pdev); - usb_phy_generic_unregister(usb_phy); - kfree(glue); - - return 0; -} - -static struct platform_driver mt_usb_driver = { - .remove = mt_usb_remove, - .probe = mt_usb_probe, - .driver = { - .name = "mt_usb", - .of_match_table = apusb_of_ids, - }, -}; -module_platform_driver(mt_usb_driver); - -static int __init usb20_init(void) -{ - int ret; - - DBG(0, "usb20 init\n"); - -#ifdef CONFIG_MTK_USB2JTAG_SUPPORT - if (usb2jtag_mode()) { - pr_notice("[USB2JTAG] in usb2jtag mode, not to initialize usb driver\n"); - return 0; - } -#endif - - /* Fix musb_plat build-in */ - /* ret = platform_driver_register(&mt_usb_driver); */ - ret = 0; - -#ifdef FPGA_PLATFORM - add_usb_i2c_driver(); -#endif - - DBG(0, "usb20 init ret:%d\n", ret); - return ret; -} -fs_initcall(usb20_init); - -static void __exit usb20_exit(void) -{ - /* Fix musb_plat build-in */ - /* platform_driver_unregister(&mt_usb_driver); */ -} -module_exit(usb20_exit); diff --git a/drivers/misc/mediatek/usb20/mt6833/usb20.h b/drivers/misc/mediatek/usb20/mt6833/usb20.h deleted file mode 100644 index 8247d1b3e794..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/usb20.h +++ /dev/null @@ -1,152 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#ifndef __USB20_H__ -#define __USB20_H__ - -#ifdef CONFIG_FPGA_EARLY_PORTING -#define FPGA_PLATFORM -#endif - -#include -#include - -struct mt_usb_work { - struct delayed_work dwork; - int ops; -}; - -/* ToDo: should be moved to glue */ -extern struct musb *mtk_musb; -extern struct musb *musb; - -struct mt_usb_glue { - struct device *dev; - struct platform_device *musb_pdev; - struct musb *mtk_musb; - /* common power & clock */ - struct clk *musb_clk; - struct clk *musb_ref_clk; - struct clk *musb_clk_top_sel; - struct clk *musb_clk_univpll5_d4; -#ifdef CONFIG_PHY_MTK_TPHY - struct platform_device *usb_phy; - struct phy *phy; - struct usb_phy *xceiv; - enum phy_mode phy_mode; -#endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - struct otg_switch_mtk otg_sx; -#endif -}; - -extern struct mt_usb_glue *glue; - -#define glue_to_musb(g) platform_get_drvdata(g->musb) - -extern int kernel_init_done; - -extern unsigned int upmu_get_rgs_chrdet(void); -extern bool upmu_is_chr_det(void); - -extern enum charger_type mt_charger_type_detection(void); -extern void BATTERY_SetUSBState(int usb_state); -extern void upmu_interrupt_chrdet_int_en(unsigned int val); - -/* specific USB fuctnion */ -enum CABLE_MODE { - CABLE_MODE_CHRG_ONLY = 0, - CABLE_MODE_NORMAL, - CABLE_MODE_HOST_ONLY, - CABLE_MODE_MAX -}; - -enum USB_CLK_STATE { - NO_CHANGE = 0, - ON_TO_OFF, - OFF_TO_ON, -}; - -/* specific USB operation */ -enum CONNECTION_OPS { - CONNECTION_OPS_DISC = 0, - CONNECTION_OPS_CHECK, - CONNECTION_OPS_CONN -}; - -enum VBUS_OPS { - VBUS_OPS_OFF = 0, - VBUS_OPS_ON -}; - -enum MTK_USB_SMC_CALL { - MTK_USB_SMC_INFRA_REQUEST = 0, - MTK_USB_SMC_INFRA_RELEASE, - MTK_USB_SMC_NUM -}; - -#ifdef CONFIG_MTK_UART_USB_SWITCH -enum PORT_MODE { - PORT_MODE_USB = 0, - PORT_MODE_UART, - PORT_MODE_MAX -}; - -extern bool usb_phy_check_in_uart_mode(void); -extern void usb_phy_switch_to_usb(void); -extern void usb_phy_switch_to_uart(void); -#endif - -#ifdef FPGA_PLATFORM -extern void USB_PHY_Write_Register8(u8 var, u8 addr); -extern u8 USB_PHY_Read_Register8(u8 addr); -#endif - -extern void usb_phy_savecurrent(void); -extern void usb_phy_recover(void); -extern bool usb20_check_vbus_on(void); -#ifdef CONFIG_MTK_UART_USB_SWITCH - -#define RG_GPIO_SELECT (0x600) -#define GPIO_SEL_OFFSET (4) -#define GPIO_SEL_MASK (0x7 << GPIO_SEL_OFFSET) -#define GPIO_SEL_UART0 (0x1 << GPIO_SEL_OFFSET) -#define GPIO_SEL_UART1 (0x2 << GPIO_SEL_OFFSET) -#define GET_GPIO_SEL_VAL(x) ((x & GPIO_SEL_MASK) >> GPIO_SEL_OFFSET) - -extern void __iomem *ap_gpio_base; -extern bool in_uart_mode; -#endif -extern int usb20_phy_init_debugfs(void); -extern enum charger_type mt_get_charger_type(void); -#ifndef CONFIG_FPGA_EARLY_PORTING -#include -#endif -#define PHY_IDLE_MODE 0 -#define PHY_DEV_ACTIVE 1 -#define PHY_HOST_ACTIVE 2 -void set_usb_phy_mode(int mode); -#ifdef CONFIG_USB_MTK_OTG -extern void mt_usb_otg_init(struct musb *musb); -extern void mt_usb_otg_exit(struct musb *musb); -extern int mt_usb_get_vbus_status(struct musb *musb); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); -extern void mt_usb_host_connect(int delay); -extern void mt_usb_host_disconnect(int delay); -#endif -extern void musb_platform_reset(struct musb *musb); -extern bool usb_enable_clock(bool enable); -extern bool usb_prepare_clock(bool enable); -extern void usb_prepare_enable_clock(bool enable); - -/* usb host mode wakeup */ -#define USB_WK_CTRL 0x420 -#define USB_CDEN BIT(6) -#define USB_IP_SLEEP BIT(12) -#define USB_CDDEBOUNCE(x) (((x) & 0xf) << 28) -#define MISC_CONFIG 0xf08 -#define USB_CD_CLR BIT(7) -#endif diff --git a/drivers/misc/mediatek/usb20/mt6833/usb20_host.c b/drivers/misc/mediatek/usb20/mt6833/usb20_host.c deleted file mode 100644 index c1753f49fbff..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/usb20_host.c +++ /dev/null @@ -1,779 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include - -#ifdef CONFIG_USB_MTK_OTG -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_MTK_USB_TYPEC -#ifdef CONFIG_TCPC_CLASS -#include -#endif -#endif -#include -#include -#include - -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -MODULE_LICENSE("GPL v2"); - -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 -#include -static struct charger_device *primary_charger; -#endif -#endif -#include - -struct device_node *usb_node; -static int iddig_eint_num; -static ktime_t ktime_start, ktime_end; - -static struct musb_fifo_cfg fifo_cfg_host[] = { -{ .hw_ep_num = 1, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 1, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 2, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 3, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 4, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 5, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 6, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 7, .style = FIFO_RX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_TX, - .maxpacket = 512, .mode = BUF_SINGLE}, -{ .hw_ep_num = 8, .style = FIFO_RX, - .maxpacket = 64, .mode = BUF_SINGLE}, -}; - -u32 delay_time = 15; -module_param(delay_time, int, 0644); -u32 delay_time1 = 55; -module_param(delay_time1, int, 0644); -u32 iddig_cnt; -module_param(iddig_cnt, int, 0644); - -static bool vbus_on; -module_param(vbus_on, bool, 0644); -static int vbus_control; -module_param(vbus_control, int, 0644); - -#ifdef CONFIG_MTK_MUSB_PHY -void set_usb_phy_mode(int mode) -{ - switch (mode) { - case PHY_MODE_USB_DEVICE: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ - USBPHY_CLR32(0x6C, (0x10<<0)); - USBPHY_SET32(0x6C, (0x2F<<0)); - USBPHY_SET32(0x6C, (0x3F<<8)); - break; - case PHY_MODE_USB_HOST: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ - USBPHY_CLR32(0x6c, (0x12<<0)); - USBPHY_SET32(0x6c, (0x2d<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - case PHY_MODE_INVALID: - /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ - USBPHY_SET32(0x6c, (0x11<<0)); - USBPHY_CLR32(0x6c, (0x2e<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - default: - DBG(0, "mode error %d\n", mode); - } - DBG(0, "force PHY to mode %d, 0x6c=%x\n", mode, USBPHY_READ32(0x6c)); -} -#endif - -static void _set_vbus(int is_on) -{ -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 - if (!primary_charger) { - DBG(0, "vbus_init<%d>\n", vbus_on); - - primary_charger = get_charger_by_name("primary_chg"); - if (!primary_charger) { - DBG(0, "get primary charger device failed\n"); - return; - } - } -#endif -#endif - - DBG(0, "op<%d>, status<%d>\n", is_on, vbus_on); - if (is_on && !vbus_on) { - /* update flag 1st then enable VBUS to make - * host mode correct used by PMIC - */ - vbus_on = true; -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 - charger_dev_enable_otg(primary_charger, true); - charger_dev_set_boost_current_limit(primary_charger, 1500000); -#else - set_chr_enable_otg(0x1); - set_chr_boost_current_limit(1500); -#endif -#endif - } else if (!is_on && vbus_on) { - /* disable VBUS 1st then update flag - * to make host mode correct used by PMIC - */ - vbus_on = false; - -#ifdef CONFIG_MTK_CHARGER -#if CONFIG_MTK_GAUGE_VERSION == 30 - charger_dev_enable_otg(primary_charger, false); -#else - set_chr_enable_otg(0x0); -#endif -#endif - } -} - -int mt_usb_get_vbus_status(struct musb *musb) -{ -#if 1 - return true; -#else - int ret = 0; - - if ((musb_readb(musb->mregs, MUSB_DEVCTL) & - MUSB_DEVCTL_VBUS) != MUSB_DEVCTL_VBUS) - ret = 1; - else - DBG(0, "VBUS error, devctl=%x, power=%d\n", - musb_readb(musb->mregs, MUSB_DEVCTL), - musb->power); - pr_debug("vbus ready = %d\n", ret); - return ret; -#endif -} - -#if defined(CONFIG_USBIF_COMPLIANCE) -u32 sw_deboun_time = 1; -#else -u32 sw_deboun_time = 400; -#endif -module_param(sw_deboun_time, int, 0644); - -u32 typec_control; -module_param(typec_control, int, 0644); -static bool typec_req_host; -static bool iddig_req_host; - -static void do_host_work(struct work_struct *data); -static void issue_host_work(int ops, int delay, bool on_st) -{ - struct mt_usb_work *work; - - if (!mtk_musb) { - DBG(0, "mtk_musb = NULL\n"); - return; - } - - /* create and prepare worker */ - work = kzalloc(sizeof(struct mt_usb_work), GFP_ATOMIC); - if (!work) { - DBG(0, "work is NULL, directly return\n"); - return; - } - work->ops = ops; - INIT_DELAYED_WORK(&work->dwork, do_host_work); - - /* issue connection work */ - DBG(0, "issue work, ops<%d>, delay<%d>, on_st<%d>\n", - ops, delay, on_st); - - if (on_st) - queue_delayed_work(mtk_musb->st_wq, - &work->dwork, msecs_to_jiffies(delay)); - else - schedule_delayed_work(&work->dwork, - msecs_to_jiffies(delay)); -} -void mt_usb_host_connect(int delay) -{ - typec_req_host = true; - DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); - issue_host_work(CONNECTION_OPS_CONN, delay, true); -} -void mt_usb_host_disconnect(int delay) -{ - typec_req_host = false; - DBG(0, "%s\n", typec_req_host ? "connect" : "disconnect"); - issue_host_work(CONNECTION_OPS_DISC, delay, true); -} -EXPORT_SYMBOL(mt_usb_host_disconnect); - -static bool musb_is_host(void) -{ - bool host_mode = 0; - - if (typec_control) - host_mode = typec_req_host; - else - host_mode = iddig_req_host; - - return host_mode; -} - -void musb_session_restart(struct musb *musb) -{ - void __iomem *mbase = musb->mregs; - - musb_writeb(mbase, MUSB_DEVCTL, - (musb_readb(mbase, - MUSB_DEVCTL) & (~MUSB_DEVCTL_SESSION))); -#ifdef CONFIG_MTK_MUSB_PHY - DBG(0, "[MUSB] stopped session for VBUSERROR interrupt\n"); - USBPHY_SET32(0x6c, (0x3c<<8)); - USBPHY_SET32(0x6c, (0x10<<0)); - USBPHY_CLR32(0x6c, (0x2c<<0)); - DBG(0, "[MUSB] force PHY to idle, 0x6c=%x\n", USBPHY_READ32(0x6c)); - mdelay(5); - USBPHY_CLR32(0x6c, (0x3c<<8)); - USBPHY_CLR32(0x6c, (0x3c<<0)); - DBG(0, "[MUSB] let PHY resample VBUS, 0x6c=%x\n" - , USBPHY_READ32(0x6c)); -#endif - musb_writeb(mbase, MUSB_DEVCTL, - (musb_readb(mbase, - MUSB_DEVCTL) | MUSB_DEVCTL_SESSION)); - DBG(0, "[MUSB] restart session\n"); -} -EXPORT_SYMBOL(musb_session_restart); - -static struct delayed_work host_plug_test_work; -int host_plug_test_enable; /* default disable */ -module_param(host_plug_test_enable, int, 0644); -int host_plug_in_test_period_ms = 5000; -module_param(host_plug_in_test_period_ms, int, 0644); -int host_plug_out_test_period_ms = 5000; -module_param(host_plug_out_test_period_ms, int, 0644); -int host_test_vbus_off_time_us = 3000; -module_param(host_test_vbus_off_time_us, int, 0644); -int host_test_vbus_only = 1; -module_param(host_test_vbus_only, int, 0644); -static int host_plug_test_triggered; -void switch_int_to_device(struct musb *musb) -{ - irq_set_irq_type(iddig_eint_num, IRQF_TRIGGER_HIGH); - enable_irq(iddig_eint_num); - DBG(0, "%s is done\n", __func__); -} - -void switch_int_to_host(struct musb *musb) -{ - irq_set_irq_type(iddig_eint_num, IRQF_TRIGGER_LOW); - enable_irq(iddig_eint_num); - DBG(0, "%s is done\n", __func__); -} - -static void do_host_plug_test_work(struct work_struct *data) -{ - static ktime_t ktime_begin, ktime_end; - static s64 diff_time; - static int host_on; - static struct wakeup_source *host_test_wakelock; - static int wake_lock_inited; - - if (!wake_lock_inited) { - DBG(0, "wake_lock_init\n"); - host_test_wakelock = wakeup_source_register(NULL, - "host.test.lock"); - wake_lock_inited = 1; - } - - host_plug_test_triggered = 1; - /* sync global status */ - mb(); - __pm_stay_awake(host_test_wakelock); - DBG(0, "BEGIN"); - ktime_begin = ktime_get(); - - host_on = 1; - while (1) { - if (!musb_is_host() && host_on) { - DBG(0, "about to exit"); - break; - } - msleep(50); - - ktime_end = ktime_get(); - diff_time = ktime_to_ms(ktime_sub(ktime_end, ktime_begin)); - if (host_on && diff_time >= host_plug_in_test_period_ms) { - host_on = 0; - DBG(0, "OFF\n"); - - ktime_begin = ktime_get(); - - /* simulate plug out */ - _set_vbus(0); - udelay(host_test_vbus_off_time_us); - - if (!host_test_vbus_only) - issue_host_work(CONNECTION_OPS_DISC, 0, false); - } else if (!host_on && diff_time >= - host_plug_out_test_period_ms) { - host_on = 1; - DBG(0, "ON\n"); - - ktime_begin = ktime_get(); - if (!host_test_vbus_only) - issue_host_work(CONNECTION_OPS_CONN, 0, false); - - _set_vbus(1); - msleep(100); - - } - } - - /* wait host_work done */ - msleep(1000); - host_plug_test_triggered = 0; - __pm_relax(host_test_wakelock); - DBG(0, "END\n"); -} - -#define ID_PIN_WORK_RECHECK_TIME 30 /* 30 ms */ -#define ID_PIN_WORK_BLOCK_TIMEOUT 30000 /* 30000 ms */ -static void do_host_work(struct work_struct *data) -{ - u8 devctl = 0; - unsigned long flags; - static int inited, timeout; /* default to 0 */ - static s64 diff_time; - bool host_on; - int usb_clk_state = NO_CHANGE; - struct mt_usb_work *work = - container_of(data, struct mt_usb_work, dwork.work); - struct mt_usb_glue *glue = mtk_musb->glue; - - /* - * kernel_init_done should be set in - * early-init stage through init.$platform.usb.rc - */ - while (!inited && !kernel_init_done && - !mtk_musb->is_ready && !timeout) { - ktime_end = ktime_get(); - diff_time = ktime_to_ms(ktime_sub(ktime_end, ktime_start)); - - DBG_LIMIT(3, - "init_done:%d, is_ready:%d, inited:%d, TO:%d, diff:%lld", - kernel_init_done, - mtk_musb->is_ready, - inited, - timeout, - diff_time); - - if (diff_time > ID_PIN_WORK_BLOCK_TIMEOUT) { - DBG(0, "diff_time:%lld\n", diff_time); - timeout = 1; - } - msleep(ID_PIN_WORK_RECHECK_TIME); - } - - if (!inited) { - DBG(0, "PASS,init_done:%d,is_ready:%d,inited:%d, TO:%d\n", - kernel_init_done, mtk_musb->is_ready, - inited, timeout); - inited = 1; - } - - /* always prepare clock and check if need to unprepater later */ - /* clk_prepare_cnt +1 here */ - usb_prepare_clock(true); - - down(&mtk_musb->musb_lock); - - host_on = (work->ops == - CONNECTION_OPS_CONN ? true : false); - - DBG(0, "work start, is_host=%d, host_on=%d\n", - mtk_musb->is_host, host_on); - - if (host_on && !mtk_musb->is_host) { - /* switch to HOST state before turn on VBUS */ - MUSB_HST_MODE(mtk_musb); - - /* to make sure all event clear */ - msleep(32); -#ifdef CONFIG_MTK_UAC_POWER_SAVING - if (!usb_on_sram) { - int ret; - - ret = gpd_switch_to_sram(mtk_musb->controller); - DBG(0, "gpd_switch_to_sram, ret<%d>\n", ret); - if (ret == 0) - usb_on_sram = 1; - } -#endif - /* setup fifo for host mode */ - ep_config_from_table_for_host(mtk_musb); - - if (!mtk_musb->host_suspend) - __pm_stay_awake(mtk_musb->usb_lock); - - - /* this make PHY operation workable */ - musb_platform_enable(mtk_musb); - - /* for no VBUS sensing IP*/ - /* wait VBUS ready */ - msleep(100); - /* clear session*/ - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, (devctl&(~MUSB_DEVCTL_SESSION))); - phy_set_mode(glue->phy, PHY_MODE_INVALID); - /* wait */ - mdelay(5); - /* restart session */ - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, (devctl | MUSB_DEVCTL_SESSION)); - phy_set_mode(glue->phy, PHY_MODE_USB_HOST); - - musb_start(mtk_musb); - if (!typec_control && !host_plug_test_triggered) - switch_int_to_device(mtk_musb); - - if (host_plug_test_enable && !host_plug_test_triggered) - queue_delayed_work(mtk_musb->st_wq, - &host_plug_test_work, 0); - usb_clk_state = OFF_TO_ON; - } else if (!host_on && mtk_musb->is_host) { - /* switch from host -> device */ - /* for device no disconnect interrupt */ - spin_lock_irqsave(&mtk_musb->lock, flags); - if (mtk_musb->is_active) { - DBG(0, "for not receiving disconnect interrupt\n"); - usb_hcd_resume_root_hub(musb_to_hcd(mtk_musb)); - musb_root_disconnect(mtk_musb); - } - spin_unlock_irqrestore(&mtk_musb->lock, flags); - - DBG(1, "devctl is %x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - if (mtk_musb->usb_lock->active) - __pm_relax(mtk_musb->usb_lock); - - /* for no VBUS sensing IP */ - phy_set_mode(glue->phy, PHY_MODE_INVALID); - - musb_stop(mtk_musb); - - if (!typec_control && !host_plug_test_triggered) - switch_int_to_host(mtk_musb); - -#ifdef CONFIG_MTK_UAC_POWER_SAVING - if (usb_on_sram) { - gpd_switch_to_dram(mtk_musb->controller); - usb_on_sram = 0; - } -#endif - /* to make sure all event clear */ - msleep(32); - - mtk_musb->xceiv->otg->state = OTG_STATE_B_IDLE; - /* switch to DEV state after turn off VBUS */ - MUSB_DEV_MODE(mtk_musb); - - usb_clk_state = ON_TO_OFF; - } - DBG(0, "work end, is_host=%d\n", mtk_musb->is_host); - up(&mtk_musb->musb_lock); - - if (usb_clk_state == ON_TO_OFF) { - /* clock on -> of: clk_prepare_cnt -2 */ - usb_prepare_clock(false); - usb_prepare_clock(false); - } else if (usb_clk_state == NO_CHANGE) { - /* clock no change : clk_prepare_cnt -1 */ - usb_prepare_clock(false); - } - /* free mt_usb_work */ - kfree(work); -} - -static irqreturn_t mt_usb_ext_iddig_int(int irq, void *dev_id) -{ - iddig_cnt++; - - iddig_req_host = !iddig_req_host; - DBG(0, "id pin assert, %s\n", iddig_req_host ? - "connect" : "disconnect"); - - if (iddig_req_host) - mt_usb_host_connect(0); - else - mt_usb_host_disconnect(0); - disable_irq_nosync(iddig_eint_num); - return IRQ_HANDLED; -} - -static const struct of_device_id otg_iddig_of_match[] = { - {.compatible = "mediatek,usb_iddig_bi_eint"}, - {}, -}; - -static int otg_iddig_probe(struct platform_device *pdev) -{ - int ret; - struct device *dev = &pdev->dev; - struct device_node *node = dev->of_node; - - iddig_eint_num = irq_of_parse_and_map(node, 0); - DBG(0, "iddig_eint_num<%d>\n", iddig_eint_num); - if (iddig_eint_num < 0) - return -ENODEV; - - ret = request_irq(iddig_eint_num, mt_usb_ext_iddig_int, - IRQF_TRIGGER_LOW, "USB_IDDIG", NULL); - if (ret) { - DBG(0, - "request EINT <%d> fail, ret<%d>\n", - iddig_eint_num, ret); - return ret; - } - - return 0; -} - -static struct platform_driver otg_iddig_driver = { - .probe = otg_iddig_probe, - /* .remove = otg_iddig_remove, */ - /* .shutdown = otg_iddig_shutdown, */ - .driver = { - .name = "otg_iddig", - .owner = THIS_MODULE, - .of_match_table = of_match_ptr(otg_iddig_of_match), - }, -}; - - -static int iddig_int_init(void) -{ - int ret = 0; - - ret = platform_driver_register(&otg_iddig_driver); - if (ret) - DBG(0, "ret:%d\n", ret); - - return 0; -} - -void mt_usb_otg_init(struct musb *musb) -{ - - /* test */ - INIT_DELAYED_WORK(&host_plug_test_work, do_host_plug_test_work); - ktime_start = ktime_get(); - - /* CONNECTION MANAGEMENT*/ -#ifdef CONFIG_MTK_USB_TYPEC - DBG(0, "host controlled by TYPEC\n"); - typec_control = 1; -#ifdef CONFIG_TCPC_CLASS - DBG(0, "host controlled by IDDIG\n"); - iddig_int_init(); - vbus_control = 1; -#endif /* CONFIG_TCPC_CLASS */ -#endif /* CONFIG_MTK_USB_TYPEC */ - - /* EP table */ - musb->fifo_cfg_host = fifo_cfg_host; - musb->fifo_cfg_host_size = ARRAY_SIZE(fifo_cfg_host); - -} -EXPORT_SYMBOL(mt_usb_otg_init); - -void mt_usb_otg_exit(struct musb *musb) -{ - DBG(0, "OTG disable vbus\n"); -} -EXPORT_SYMBOL(mt_usb_otg_exit); - -enum { - DO_IT = 0, - REVERT, -}; - -#ifdef CONFIG_MTK_MUSB_PHY -static void bypass_disc_circuit(int act) -{ - u32 val; - - usb_prepare_enable_clock(true); - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - /* 0x18, 13-12 RG_USB20_HSRX_MMODE_SELE, dft:00 */ - if (act == DO_IT) { - USBPHY_CLR32(0x18, (0x10<<8)); - USBPHY_SET32(0x18, (0x20<<8)); - } else { - USBPHY_CLR32(0x18, (0x10<<8)); - USBPHY_CLR32(0x18, (0x20<<8)); - } - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - usb_prepare_enable_clock(false); -} - -static void disc_threshold_to_max(int act) -{ - u32 val; - - usb_prepare_enable_clock(true); - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - /* 0x18, 7-4 RG_USB20_DISCTH, dft:1000 */ - if (act == DO_IT) { - USBPHY_SET32(0x18, (0xf0<<0)); - } else { - USBPHY_CLR32(0x18, (0x70<<0)); - USBPHY_SET32(0x18, (0x80<<0)); - } - - val = USBPHY_READ32(0x18); - DBG(0, "val<0x%x>\n", val); - - usb_prepare_enable_clock(false); -} -#endif - -static int option; -static int set_option(const char *val, const struct kernel_param *kp) -{ - int local_option; - int rv; - - /* update module parameter */ - rv = param_set_int(val, kp); - if (rv) - return rv; - - /* update local_option */ - rv = kstrtoint(val, 10, &local_option); - if (rv != 0) - return rv; - - DBG(0, "option:%d, local_option:%d\n", option, local_option); - - switch (local_option) { - case 0: - DBG(0, "case %d\n", local_option); - iddig_int_init(); - break; - case 1: - DBG(0, "case %d\n", local_option); - mt_usb_host_connect(0); - break; - case 2: - DBG(0, "case %d\n", local_option); - mt_usb_host_disconnect(0); - break; - case 3: - DBG(0, "case %d\n", local_option); - mt_usb_host_connect(3000); - break; - case 4: - DBG(0, "case %d\n", local_option); - mt_usb_host_disconnect(3000); - break; -#ifdef CONFIG_MTK_MUSB_PHY - case 5: - DBG(0, "case %d\n", local_option); - disc_threshold_to_max(DO_IT); - break; - case 6: - DBG(0, "case %d\n", local_option); - disc_threshold_to_max(REVERT); - break; - case 7: - DBG(0, "case %d\n", local_option); - bypass_disc_circuit(DO_IT); - break; - case 8: - DBG(0, "case %d\n", local_option); - bypass_disc_circuit(REVERT); - break; -#endif - case 9: - DBG(0, "case %d\n", local_option); - _set_vbus(1); - break; - case 10: - DBG(0, "case %d\n", local_option); - _set_vbus(0); - break; - default: - break; - } - return 0; -} -static struct kernel_param_ops option_param_ops = { - .set = set_option, - .get = param_get_int, -}; -module_param_cb(option, &option_param_ops, &option, 0644); -#else -#include "musb_core.h" -/* for not define CONFIG_USB_MTK_OTG */ -void mt_usb_otg_init(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_init); -void mt_usb_otg_exit(struct musb *musb) {} -EXPORT_SYMBOL(mt_usb_otg_exit); -void mt_usb_set_vbus(struct musb *musb, int is_on) {} -int mt_usb_get_vbus_status(struct musb *musb) {return 1; } -void switch_int_to_device(struct musb *musb) {} -void switch_int_to_host(struct musb *musb) {} -void musb_session_restart(struct musb *musb) {} -EXPORT_SYMBOL(musb_session_restart); -#endif diff --git a/drivers/misc/mediatek/usb20/mt6833/usb20_otg_if.c b/drivers/misc/mediatek/usb20/mt6833/usb20_otg_if.c deleted file mode 100644 index c95322f54c4b..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/usb20_otg_if.c +++ /dev/null @@ -1,1497 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "musb_core.h" -#ifdef CONFIG_OF -#include -#endif -#define DRIVER_AUTHOR "Mediatek" -#define DRIVER_DESC "driver for OTG USB-IF test" -#define MUSB_OTG_CSR0 0x102 -#define MUSB_OTG_COUNT0 0x108 - -#define TEST_DRIVER_NAME "mt_otg_test" - -#define DX_DBG - -#define TEST_IS_STOP 0xfff1 -#define DEV_NOT_CONNECT 0xfff2 -#define DEV_HNP_TIMEOUT 0xfff3 -#define DEV_NOT_RESET 0xfff4 - -MODULE_AUTHOR(DRIVER_AUTHOR); -MODULE_LICENSE("GPL"); - - -/*for USB-IF OTG test*/ -/* - * when this func is called in EM, it will reset the USB hw. - * and tester should not connet the uut to PC or connect a A-cable to it - * macro for USB-IF for OTG driver - */ -#define OTG_CMD_E_ENABLE_VBUS 0x00 -#define OTG_CMD_E_ENABLE_SRP 0x01 -#define OTG_CMD_E_START_DET_SRP 0x02 -#define OTG_CMD_E_START_DET_VBUS 0x03 -#define OTG_CMD_P_A_UUT 0x04 -#define OTG_CMD_P_B_UUT 0x05 -#define HOST_CMD_TEST_SE0_NAK 0x6 -#define HOST_CMD_TEST_J 0x7 -#define HOST_CMD_TEST_K 0x8 -#define HOST_CMD_TEST_PACKET 0x9 -#define HOST_CMD_SUSPEND_RESUME 0xa -#define HOST_CMD_GET_DESCRIPTOR 0xb -#define HOST_CMD_SET_FEATURE 0xc -#define OTG_CMD_P_B_UUT_TD59 0xd -#define HOST_CMD_ENV_INIT 0xe -#define HOST_CMD_ENV_EXIT 0xf - -#define OTG_MSG_DEV_NOT_SUPPORT 0x01 -#define OTG_MSG_DEV_NOT_RESPONSE 0x02 -#define OTG_MSG_HUB_NOT_SUPPORT 0x03 - -#define OTG_STOP_CMD 0x10 -#define OTG_INIT_MSG 0x20 - -struct otg_message { - spinlock_t lock; - unsigned int msg; -}; - -static struct otg_message g_otg_message; -static atomic_t g_exec; - -unsigned long usb_l1intm_store; -unsigned short usb_intrrxe_store; -unsigned short usb_intrtxe_store; -unsigned char usb_intrusbe_store; -unsigned long pericfg_base; -bool device_enumed; -bool set_hnp; -bool high_speed; -bool is_td_59; - -struct completion stop_event; - -void musb_otg_reset_usb(void) -{ - /* reset all of the USB IP, including PHY and MAC */ - unsigned int usb_reset; - - usb_reset = __raw_readl((void __iomem *)pericfg_base); - usb_reset |= 1 << 29; - __raw_writel(usb_reset, (void __iomem *)pericfg_base); - mdelay(10); - usb_reset &= ~(1 << 29); - __raw_writel(usb_reset, (void __iomem *)pericfg_base); - /* power on the USB */ - usb_phy_poweron(); - /* enable interrupt */ - musb_writel(mtk_musb->mregs, USB_L1INTM, 0x105); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 1); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0xf7); -} - -int musb_otg_env_init(void) -{ - u8 power; - /* u8 intrusb; */ - /* step1: mask the PMU/PMIC EINT */ - mtk_musb->usb_if = true; - /* workaround for PMIC charger detection */ - mtk_musb->is_host = true; - /* mt65xx_eint_mask(EINT_CHR_DET_NUM); */ - - pmic_chrdet_int_en(0); - - mt_usb_init_drvvbus(); - - /* step5: make sure to power on the USB module */ - if (mtk_musb->power) - mtk_musb->power = FALSE; - - musb_platform_enable(mtk_musb); - /* step6: clear session bit */ - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - /* step7: disable and enable usb interrupt */ - usb_l1intm_store = musb_readl(mtk_musb->mregs, USB_L1INTM); - usb_intrrxe_store = musb_readw(mtk_musb->mregs, MUSB_INTRRXE); - usb_intrtxe_store = musb_readw(mtk_musb->mregs, MUSB_INTRTXE); - usb_intrusbe_store = musb_readb(mtk_musb->mregs, MUSB_INTRUSBE); - - musb_writel(mtk_musb->mregs, USB_L1INTM, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 0); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - free_irq(mtk_musb->nIrq, mtk_musb); - musb_writel(mtk_musb->mregs, USB_L1INTM, 0x105); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 1); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0xf7); - /* setp8: set the index to 0 for ep0, maybe no need. - * Designers said it is better not to use the index register. - */ - musb_writeb(mtk_musb->mregs, MUSB_INDEX, 0); - /* setp9: init message */ - g_otg_message.msg = 0; - spin_lock_init(&g_otg_message.lock); - - init_completion(&stop_event); -#ifdef DX_DBG - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - DBG(0, "start the USB-IF test in EM,power=0x%x!\n", power); -#endif - - return 0; -} - -int musb_otg_env_exit(void) -{ - DBG(0, "stop the USB-IF test in EM!\n"); - musb_writel(mtk_musb->mregs, USB_L1INTM, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, 0); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, 0); - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - musb_writel(mtk_musb->mregs, USB_L1INTM, usb_l1intm_store); - musb_writew(mtk_musb->mregs, MUSB_INTRRXE, usb_intrrxe_store); - musb_writew(mtk_musb->mregs, MUSB_INTRTXE, usb_intrtxe_store); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSBE, usb_intrusbe_store); - mtk_musb->usb_if = false; - mtk_musb->is_host = false; - pmic_chrdet_int_en(1); - return 0; -} - -void musb_otg_write_fifo(u16 len, u8 *buf) -{ - int i; - - DBG(0, "%s,len=%d\n", __func__, len); - for (i = 0; i < len; i++) - musb_writeb(mtk_musb->mregs, 0x20, *(buf + i)); -} - -void musb_otg_read_fifo(u16 len, u8 *buf) -{ - int i; - - DBG(0, "%s,len=%d\n", __func__, len); - for (i = 0; i < len; i++) - *(buf + i) = musb_readb(mtk_musb->mregs, 0x20); -} - -unsigned int musb_polling_ep0_interrupt(void) -{ - unsigned short intrtx; - - DBG(0, "polling ep0 interrupt\n"); - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - if (intrtx & 0x1) { /* ep0 interrupt happen */ - DBG(0, "get ep0 interrupt,csr0=0x%x\n", - musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0)); - break; - } - DBG(0, "polling ep0 interrupt,csr0=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_OTG_CSR0)); - wait_for_completion_timeout(&stop_event, 1); - if (atomic_read(&g_exec) == 0) - return TEST_IS_STOP; - } while (atomic_read(&g_exec) == 1); - return 0; -} - -void musb_h_setup(struct usb_ctrlrequest *setup) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - musb_otg_write_fifo(sizeof(struct usb_ctrlrequest), (u8 *) setup); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "%s,csr0=0x%x\n", __func__, csr0); - csr0 |= MUSB_CSR0_H_SETUPPKT | MUSB_CSR0_TXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - /* polling the Tx interrupt */ - if (musb_polling_ep0_interrupt()) - return; - DBG(0, "%s--\n", __func__); -} - -void musb_h_in_data(unsigned char *buf, u16 len) -{ - /* will receive all of the data in this transfer. */ - unsigned short csr0; - u16 received = 0; - bool bshort = false; - - DBG(0, "%s++\n", __func__); - while ((received < len) && (!bshort)) { - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_REQPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); - if (csr0 & MUSB_CSR0_RXPKTRDY) { - /* get the data from ep fifo */ - u8 count = musb_readb(mtk_musb->mregs, MUSB_OTG_COUNT0); - - if (count < 64) - bshort = true; - - if (received + count > len) { - DBG(0, "Data is too large\n"); - - /* read FIFO until data end (maximum size of len) */ - musb_otg_read_fifo(len - received, buf); - } else { - musb_otg_read_fifo(count, buf + received); - } - - received += count; - csr0 &= ~MUSB_CSR0_RXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - } else - DBG(0, "error, not receive the rxpktrdy interrupt!\n"); - DBG(0, "%s--\n", __func__); - } -} - -void musb_h_in_status(void) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_REQPKT | MUSB_CSR0_H_STATUSPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); - - if (csr0 & MUSB_CSR0_RXPKTRDY) { - csr0 &= ~MUSB_CSR0_RXPKTRDY; - /* whether this bit will be cleared auto, - * need to clear by sw?? - */ - if (csr0 & MUSB_CSR0_H_STATUSPKT) - csr0 &= ~MUSB_CSR0_H_STATUSPKT; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - } else if (csr0 & MUSB_CSR0_H_RXSTALL) { - DBG(0, "stall!\n"); - if (set_hnp) { - DBG(0, "will pop up:DEV_NOT_RESPONSE!\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - set_hnp = false; - msleep(1000); - } - } - DBG(0, "%s--\n", __func__); -} - -void musb_h_out_status(void) -{ - unsigned short csr0; - - DBG(0, "%s++\n", __func__); - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_H_STATUSPKT | MUSB_CSR0_TXPKTRDY; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; -#ifdef DX_DBG - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "csr0 = 0x%x!\n", csr0); -#endif - DBG(0, "%s--\n", __func__); -} - -void musb_d_reset(void) -{ - unsigned short swrst; - - swrst = musb_readw(mtk_musb->mregs, 0x74); - swrst |= 0x2; - musb_writew(mtk_musb->mregs, 0x74, swrst); -} - -void musb_d_setup(struct usb_ctrlrequest *setup_packet, u16 len) -{ - musb_otg_read_fifo(len, (u8 *) setup_packet); - DBG(0, - "receive setup packet:0x%x 0x%x 0x%x 0x%x 0x%x\n", - setup_packet->bRequest, - setup_packet->bRequestType, - setup_packet->wIndex, - setup_packet->wValue, - setup_packet->wLength); -} - -void musb_d_out_data(struct usb_ctrlrequest *setup_packet) -{ - unsigned short csr0; - - static struct usb_device_descriptor device_descriptor = { - 0x12, - 0x01, - 0x0200, - 0x00, - 0x00, - 0x00, - 0x40, - 0x0951, - 0x1603, - 0x0200, - 0x01, - 0x02, - 0x03, - 0x01 - }; - static struct usb_config_descriptor configuration_descriptor = { - 0x09, - 0x02, - 0x0023, - 0x01, - 0x01, - 0x00, - 0x80, - 0x32 - }; - static struct usb_interface_descriptor interface_descriptor = { - 0x09, - 0x04, - 0x00, - 0x00, - 0x02, - 0x08, - 0x06, - 0x50, - 0x00 - }; - static struct usb_endpoint_descriptor endpoint_descriptor_in = { - 0x07, - 0x05, - 0x81, - 0x02, - 0x0200, - 0x00 - }; - static struct usb_endpoint_descriptor endpoint_descriptor_out = { - 0x07, - 0x05, - 0x02, - 0x02, - 0x0200, - 0x00 - }; - static struct usb_otg_descriptor usb_otg_descriptor = { - 0x03, - 0x09, - 0x03 - }; - - if (setup_packet->wValue == 0x0100) { - musb_otg_write_fifo(sizeof(struct usb_device_descriptor), - (u8 *) &device_descriptor); - } else if (setup_packet->wValue == 0x0200) { - if (setup_packet->wLength == 9) { - musb_otg_write_fifo( - sizeof(struct usb_config_descriptor), - (u8 *) &configuration_descriptor); - } else { - musb_otg_write_fifo( - sizeof(struct usb_config_descriptor), - (u8 *) &configuration_descriptor); - musb_otg_write_fifo( - sizeof(struct usb_interface_descriptor), - (u8 *) &interface_descriptor); - musb_otg_write_fifo(7, (u8 *) &endpoint_descriptor_in); - musb_otg_write_fifo(7, (u8 *) &endpoint_descriptor_out); - musb_otg_write_fifo(sizeof(struct usb_otg_descriptor), - (u8 *) &usb_otg_descriptor); - } - } - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - csr0 |= MUSB_CSR0_TXPKTRDY | MUSB_CSR0_P_DATAEND; - musb_writew(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; -} - -unsigned int musb_polling_bus_interrupt(unsigned int intr) -{ - unsigned char intrusb; - unsigned long timeout; - - if (intr == MUSB_INTR_CONNECT) - timeout = jiffies + 15 * HZ; - if (intr == (MUSB_INTR_CONNECT | MUSB_INTR_RESUME)) - timeout = jiffies + 1; - if (intr == MUSB_INTR_RESET) - timeout = jiffies + 2 * HZ; - - do { - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrusb & intr) { - DBG(0, - "interrupt happen, intrusb=0x%x, intr=0x%x\n", - intrusb, intr); - break; - } - - /* check the timeout */ - if ((intr == MUSB_INTR_CONNECT) && - time_after(jiffies, timeout)) { - DBG(0, "time out for MUSB_INTR_CONNECT\n"); - return DEV_NOT_CONNECT; - } - if ((intr == (MUSB_INTR_CONNECT | MUSB_INTR_RESUME)) - && time_after(jiffies, timeout)) { - DBG(0, - "time out for MUSB_INTR_CONNECT|MUSB_INTR_RESUME\n"); - return DEV_HNP_TIMEOUT; - } - if ((intr == MUSB_INTR_RESET) && time_after(jiffies, timeout)) { - DBG(0, "time out for MUSB_INTR_RESET\n"); - return DEV_NOT_RESET; - } - /* delay for the interrupt */ - if (intr != MUSB_INTR_RESET) { - wait_for_completion_timeout(&stop_event, 1); - if (atomic_read(&g_exec) == 0) - break; - } - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) { - DBG(0, "TEST_IS_STOP\n"); - return TEST_IS_STOP; - } - if (intrusb & MUSB_INTR_RESUME) { /* for TD.4.8, remote wakeup */ - DBG(0, "MUSB_INTR_RESUME\n"); - return MUSB_INTR_RESUME; - } else { - return intrusb; - } -} - -void musb_h_suspend(void) -{ - unsigned char power; - /* before suspend, should to send SOF for a while (USB-IF plan need) */ - /* mdelay(100); */ - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - DBG(0, "before suspend,power=0x%x\n", power); - if (high_speed) - power = 0x63; - else - power = 0x43; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -void musb_h_remote_wakeup(void) -{ - unsigned char power; - - msleep(25); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power &= ~MUSB_POWER_RESUME; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -bool musb_h_reset(void) -{ - unsigned char power; - - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_RESET | MUSB_POWER_HSENAB; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - msleep(60); - power &= ~MUSB_POWER_RESET; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (power & MUSB_POWER_HSMODE) { - DBG(0, "the device is a hs device!\n"); - high_speed = true; - return true; - } - DBG(0, "the device is a fs device!\n"); - high_speed = false; - return false; -} - -void musb_d_soft_connect(bool connect) -{ - unsigned char power; - - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (connect) - power |= MUSB_POWER_SOFTCONN; - else - power &= ~MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -} - -void musb_otg_set_session(bool set) -{ - unsigned char devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - if (set) - devctl |= MUSB_DEVCTL_SESSION; - else - devctl &= ~MUSB_DEVCTL_SESSION; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); -} - -void musb_h_enumerate(void) -{ - struct usb_ctrlrequest setup_packet; - struct usb_device_descriptor device_descriptor; - struct usb_config_descriptor configuration_descriptor; - struct usb_otg_descriptor *otg_descriptor; - unsigned char descriptor[65535]; - - /* set address */ - musb_writew(mtk_musb->mregs, MUSB_TXFUNCADDR, 0); - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_ADDRESS; - setup_packet.wIndex = 0; - setup_packet.wValue = 1; - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - musb_writew(mtk_musb->mregs, MUSB_TXFUNCADDR, 1); - DBG(0, "set address OK!\n"); - /* get device descriptor */ - setup_packet.bRequestType = USB_DIR_IN | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0100; - setup_packet.wLength = 0x40; - musb_h_setup(&setup_packet); - musb_h_in_data((char *)&device_descriptor, - sizeof(struct usb_device_descriptor)); - musb_h_out_status(); - - if (device_descriptor.idProduct == 0x1234) { - pr_debug("device pid not match!\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_SUPPORT; - /* msleep(1000); */ - } - - DBG(0, - "get device descriptor OK!device class=0x%x PID=0x%x VID=0x%x\n", - device_descriptor.bDeviceClass, device_descriptor.idProduct, - device_descriptor.idVendor); - DBG(0, - "get device descriptor OK!DescriptorType=0x%x DeviceSubClass=0x%x\n", - device_descriptor.bDescriptorType, - device_descriptor.bDeviceSubClass); - /* get configuration descriptor */ - setup_packet.bRequestType = USB_DIR_IN - | USB_TYPE_STANDARD - | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0200; - setup_packet.wLength = 0x9; - musb_h_setup(&setup_packet); - musb_h_in_data((char *)&configuration_descriptor, - sizeof(struct usb_config_descriptor)); - musb_h_out_status(); - DBG(0, "get configuration descriptor OK!\n"); - /* get all configuration descriptor */ - setup_packet.bRequestType = USB_DIR_IN - | USB_TYPE_STANDARD - | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0200; - setup_packet.wLength = configuration_descriptor.wTotalLength; - musb_h_setup(&setup_packet); - - /* - * According to USB specification, - * the maximum length of wTotalLength is 65535 bytes - */ - if (configuration_descriptor.wTotalLength <= sizeof(descriptor)) - musb_h_in_data(descriptor, - configuration_descriptor.wTotalLength); - musb_h_out_status(); - DBG(0, "get all configuration descriptor OK!\n"); - /* get otg descriptor */ - otg_descriptor = - (struct usb_otg_descriptor *) - (descriptor + configuration_descriptor.wTotalLength - 3); - DBG(0, "otg descriptor::bLegth=%d,bDescriptorTye=%d,bmAttr=%d\n", - otg_descriptor->bLength, - otg_descriptor->bDescriptorType, otg_descriptor->bmAttributes); - if (otg_descriptor->bLength == 3 && - otg_descriptor->bDescriptorType == 9) { - - DBG(0, "get an otg descriptor!\n"); - } else { - DBG(0, "not an otg device, will pop Unsupported Device\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_SUPPORT; - msleep(1000); - } - /* set hnp, need before set_configuration */ - set_hnp = true; - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_FEATURE; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x3; /* b_hnp_enable */ - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - DBG(0, "set hnp OK!\n"); - /* set configuration */ - setup_packet.bRequestType = USB_DIR_OUT | - USB_TYPE_STANDARD | - USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_SET_CONFIGURATION; - setup_packet.wIndex = 0; - setup_packet.wValue = configuration_descriptor.iConfiguration; - setup_packet.wLength = 0; - musb_h_setup(&setup_packet); - musb_h_in_status(); - DBG(0, "set configuration OK!\n"); -} - -void musb_d_enumerated(void) -{ - unsigned char devctl; - unsigned short csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - - DBG(0, "csr0=0x%x\n", csr0); - if (csr0 & MUSB_CSR0_P_SETUPEND) { - DBG(0, "SETUPEND\n"); - csr0 |= MUSB_CSR0_P_SVDSETUPEND; - musb_writeb(mtk_musb->mregs, MUSB_OTG_CSR0, csr0); - csr0 &= ~MUSB_CSR0_P_SVDSETUPEND; - } - if (csr0 & MUSB_CSR0_RXPKTRDY) { - u8 count0; - - count0 = musb_readb(mtk_musb->mregs, MUSB_OTG_COUNT0); - if (count0 == 8) { - struct usb_ctrlrequest setup_packet; - /* get the setup packet */ - musb_d_setup(&setup_packet, count0); - - if (setup_packet.bRequest == - USB_REQ_SET_ADDRESS) { - device_enumed = false; - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) { - DBG(0, - "B-UUT:when set address, do not detect ep0 interrupt\n"); - return; - } - musb_writeb(mtk_musb->mregs, - MUSB_FADDR, - (u8) setup_packet.wValue); - } else if (setup_packet.bRequest == - USB_REQ_GET_DESCRIPTOR) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - /* device --> host */ - musb_d_out_data(&setup_packet); - } else if (setup_packet.bRequest == - USB_REQ_SET_CONFIGURATION) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - device_enumed = true; - /* will set host_req for B-device */ - devctl = musb_readb(mtk_musb->mregs, - MUSB_DEVCTL); - if (devctl & MUSB_DEVCTL_BDEVICE) { - devctl |= MUSB_DEVCTL_HR; - musb_writeb(mtk_musb->mregs, - MUSB_DEVCTL, devctl); - } - } else if (setup_packet.bRequest == - USB_REQ_SET_FEATURE) { - csr0 |= MUSB_CSR0_P_SVDRXPKTRDY - | MUSB_CSR0_P_DATAEND; - /* clear the RXPKTRDY */ - musb_writew(mtk_musb->mregs, - MUSB_OTG_CSR0, csr0); - if (musb_polling_ep0_interrupt()) - return; - } - } - } -} - -void musb_otg_test_return(void) -{ -} - -static int musb_host_test_mode(unsigned char cmd); - -void otg_cmd_a_uut(void) -{ - unsigned long timeout; - unsigned char devctl; - bool timeout_flag = false; - unsigned int ret; - unsigned char power; - unsigned short csr0; - unsigned char intrusb; - unsigned short intrtx; - - /* polling the session req from B-OPT and start a new session */ - device_enumed = false; -TD_4_6: - musb_otg_reset_usb(); - DBG(0, "A-UUT reset success\n"); - timeout = jiffies + 5 * HZ; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - while ((atomic_read(&g_exec) == 1) && (devctl & 0x18)) { - DBG(0, "musb::not below session end!\n"); - msleep(100); - if (time_after(jiffies, timeout)) { - timeout_flag = true; - return TEST_IS_STOP; - } - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - if (timeout_flag) { - timeout_flag = false; - musb_otg_reset_usb(); - BG(0, - "timeout for below session end, after reset usb, devctl=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - } - BG(0, "polling session request,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_SESSREQ); - pBG(0, "polling session request,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - /* session is set and VBUS will be out. */ - musb_otg_set_session(true); -#if 1 - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power &= ~MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -#endif - /* polling the connect interrupt from B-OPT */ - DBG(0, "polling connect interrupt,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT); - DBG(0, "polling connect interrupt,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == DEV_NOT_CONNECT) { - DBG(0, "device is not connected in 15s\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - return TEST_IS_STOP; - } - DBG(0, "musb::connect interrupt is detected!\n"); - /* the test is fail because the reset starts less than100 ms - * from the B-OPT connect. the IF test needs - */ - msleep(100); - /* reset the bus,check whether it is a hs device */ - musb_h_reset(); /* should last for more than 50ms, TD.4.2 */ - musb_h_enumerate(); - /* suspend the bus */ - csr0 = musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0); - DBG(0, "after enum B-OPT,csr0=0x%x\n", csr0); - musb_h_suspend(); - - /* polling the disconnect interrupt from B-OPT, - * and remote wakeup(TD.4.8) - */ - DBG(0, "polling disconnect or remote wakeup,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_DISCONNECT - | MUSB_INTR_RESUME); - DBG(0, "polling disconnect or remote wakeup,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == MUSB_INTR_RESUME) { - /* for TD4.8 */ - musb_h_remote_wakeup(); - /* maybe need to access the B-OPT, get device descriptor */ - if (atomic_read(&g_exec) == 1) - wait_for_completion(&stop_event); - return TEST_IS_STOP; - } - /* polling the reset interrupt from B-OPT */ - if (!(ret & MUSB_INTR_RESET)) { - DBG(0, "polling reset for B-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - DBG(0, "polling reset for B-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == DEV_NOT_RESET) { - if (atomic_read(&g_exec) == 1) - wait_for_completion(&stop_event); - return TEST_IS_STOP; - } - } - - DBG(0, "after receive reset,devctl=0x%x,csr0=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_DEVCTL), - musb_readw(mtk_musb->mregs, MUSB_OTG_CSR0)); - - /* enumerate and polling the suspend interrupt form B-OPT */ - - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrtx || (intrusb & MUSB_INTR_SUSPEND)) { - if (intrtx) { - if (intrtx & 0x1) - musb_d_enumerated(); - } - if (intrusb) { - /* maybe receive disconnect interrupt when the session is end */ - if (intrusb & MUSB_INTR_SUSPEND) { - if (device_enumed) { - /* return form the while loop */ - break; - } - /* TD.4.6 */ - musb_d_soft_connect(false); - goto TD_4_6; - } - } - } else - wait_for_completion_timeout(&stop_event, 1); - /* the enum will be repeated for 5 times */ - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) { - /* return form the switch-case */ - return TEST_IS_STOP; - } - DBG(0, "polling connect form B-OPT,begin\n"); - /* B-OPT will connect again 100ms after A disconnect */ - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT); - DBG(0, "polling connect form B-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - musb_h_reset(); /* should reset bus again, TD.4.7 */ - wait_for_completion(&stop_event); -} - -void otg_cmd_b_uut(void) -{ - unsigned long timeout; - unsigned char devctl; - bool timeout_flag = false; - unsigned int ret; - unsigned char power; - unsigned char intrusb; - unsigned short intrtx; - - musb_otg_reset_usb(); - /* The B-UUT issues an SRP to start a session with the A-OPT */ - musb_otg_set_session(true); - /* 100ms after VBUS begins to decay the A-OPT powers VBUS */ - timeout = jiffies + 5 * HZ; - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - while (((devctl & MUSB_DEVCTL_VBUS) >> MUSB_DEVCTL_VBUS_SHIFT) < 0x3) { - if (time_after(jiffies, timeout)) { - timeout_flag = true; - break; - } - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - if (timeout_flag) { - DBG(0, "B-UUT set vbus timeout\n"); - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - timeout_flag = false; - return TEST_IS_STOP; - } - - /* After detecting the VBUS, B-UUT should connect to the A_OPT */ - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_HSENAB; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); -/* TD5_5: */ - musb_d_soft_connect(true); - - device_enumed = false; - /* polling the reset single form the A-OPT */ - DBG(0, "polling reset form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - DBG(0, "polling reset form A-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - if (power & MUSB_POWER_HSMODE) - high_speed = true; - else - high_speed = false; - /* The A-OPT enumerates the B-UUT */ -TD6_13: - do { - intrtx = musb_readw(mtk_musb->mregs, MUSB_INTRTX); - /* sync status */ - mb(); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, intrtx); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - /* sync status */ - mb(); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, intrusb); - if (intrtx || (intrusb & 0xf7)) { - if (intrtx) { - /* DBG(0,"B-enum,intrtx=0x%x\n",intrtx); */ - if (intrtx & 0x1) - DBG(0, "ep0 interrupt\n"); - musb_d_enumerated(); - } - if (intrusb) { - if (intrusb & 0xf7) - DBG(0, - "B-enum,intrusb=0x%x,power=0x%x\n", - intrusb, - musb_readb(mtk_musb->mregs, - MUSB_POWER)); - if ((device_enumed) && - (intrusb & MUSB_INTR_SUSPEND)) { - DBG(0, - "suspend interrupt is received,power=0x%x,devctl=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_POWER), - musb_readb(mtk_musb->mregs, MUSB_DEVCTL)); - break; - } - } - } else { - DBG(0, - "power=0x%x,devctl=0x%x,intrtx=0x%x,intrusb=0x%x\n", - musb_readb(mtk_musb->mregs, MUSB_POWER), - musb_readb(mtk_musb->mregs, - MUSB_DEVCTL), - musb_readw(mtk_musb->mregs, - MUSB_INTRTX), - musb_readb(mtk_musb->mregs, - MUSB_INTRUSB)); - wait_for_completion_timeout(&stop_event, 1); - } - } while (atomic_read(&g_exec) == 1); - if (atomic_read(&g_exec) == 0) - return TEST_IS_STOP; - DBG(0, "hnp start\n"); - if (intrusb & MUSB_INTR_RESUME) - goto TD6_13; - if (!(intrusb & MUSB_INTR_CONNECT)) { - /* polling the connect from A-OPT, the UUT acts as host */ - DBG(0, "polling connect or resume form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_CONNECT - | MUSB_INTR_RESUME); - DBG(0, "polling connect or resume form A-OPT,done,ret=0x%x\n", - ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - if (ret == MUSB_INTR_RESUME) - goto TD6_13; - if (ret == DEV_HNP_TIMEOUT) { - DBG(0, "B-UUT HNP timeout\n"); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - - devctl &= ~MUSB_DEVCTL_HR; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); - if (is_td_59) - g_otg_message.msg = OTG_MSG_DEV_NOT_RESPONSE; - return TEST_IS_STOP; - } - } - /* reset the bus and check whether it is a hs device */ - musb_h_reset(); - musb_h_enumerate(); - /* suspend the bus */ - musb_h_suspend(); - /* polling the disconnect interrupt from A-OPT */ - DBG(0, "polling disconnect form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_DISCONNECT); - DBG(0, "polling disconnect form A-OPT,done,ret=0x%x\n", ret); - - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - DBG(0, "A-OPT is disconnected, UUT will be back to device\n"); - if (!(ret & MUSB_INTR_RESET)) { - musb_d_soft_connect(true); - /* polling the reset single form the A-OPT */ - DBG(0, "polling reset form A-OPT,begin\n"); - ret = musb_polling_bus_interrupt(MUSB_INTR_RESET); - /* musb_d_reset (); */ - DBG(0, "polling reset form A-OPT,done,ret=0x%x\n", ret); - if (ret == TEST_IS_STOP) - return TEST_IS_STOP; - } - device_enumed = false; - if (atomic_read(&g_exec) == 1) - goto TD6_13; /* TD5_5 */ - wait_for_completion(&stop_event); -} - -int musb_otg_exec_cmd(unsigned int cmd) -{ - - unsigned char devctl; - unsigned char intrusb; - unsigned char power; - unsigned short csr0; - unsigned int usb_l1intp; - unsigned int usb_l1ints; - - if (!mtk_musb) { - DBG(0, "mtk_musb is NULL,error!\n"); - return false; - } - - switch (cmd) { - case HOST_CMD_ENV_INIT: - musb_otg_env_init(); - return 0; - case HOST_CMD_ENV_EXIT: - musb_otg_env_exit(); - return 0; - } - - /* init */ - musb_writeb(mtk_musb->mregs, MUSB_POWER, 0x21); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - msleep(300); - -#ifdef DX_DBG - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - DBG(0, "1:cmd=%d,devctl=0x%x,power=0x%x,intrusb=0x%x\n", - cmd, devctl, power, intrusb); -#endif - musb_writew(mtk_musb->mregs, MUSB_INTRRX, 0xffff); - musb_writew(mtk_musb->mregs, MUSB_INTRTX, 0xffff); - musb_writeb(mtk_musb->mregs, MUSB_INTRUSB, 0xff); - mdelay(10); -#ifdef DX_DBG - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - intrusb = musb_readb(mtk_musb->mregs, MUSB_INTRUSB); - DBG(0, "2:cmd=%d,devctl=0x%x,power=0x%x,intrusb=0x%x\n", - cmd, devctl, power, intrusb); -#endif - high_speed = false; - atomic_set(&g_exec, 1); - - DBG(0, "before exec:cmd=%d\n", cmd); - - switch (cmd) { - /* electrical */ - case OTG_CMD_E_ENABLE_VBUS: - DBG(0, "musb::enable VBUS!\n"); - musb_otg_set_session(true); - musb_platform_set_vbus(mtk_musb, 1); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_otg_set_session(false); - musb_platform_set_vbus(mtk_musb, 0); - break; - case OTG_CMD_E_ENABLE_SRP: /* need to clear session? */ - DBG(0, "musb::enable srp!\n"); - musb_otg_reset_usb(); - { - u32 val = 0; - - val = USBPHY_READ32(0x6c); - val = (val & ~(0xff<<0)) | (0x1<<0); - USBPHY_WRITE32(0x6c, val); - - val = USBPHY_READ32(0x6c); - val = (val & ~(0xff<<8)) | (0x1<<8); - USBPHY_WRITE32(0x6c, val); - } - musb_writeb(mtk_musb->mregs, 0x7B, 1); - musb_otg_set_session(true); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_otg_set_session(false); - break; - case OTG_CMD_E_START_DET_SRP: - /* need as a A-device */ - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - while ((atomic_read(&g_exec) == 1) && (devctl & 0x18)) { - DBG(0, "musb::not below session end!\n"); - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - while ((atomic_read(&g_exec) == 1) && (!(devctl & 0x10))) { - DBG(0, "musb::not above session end!\n"); - msleep(100); - devctl = musb_readb(mtk_musb->mregs, MUSB_DEVCTL); - } - devctl |= MUSB_DEVCTL_SESSION; - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, devctl); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_writeb(mtk_musb->mregs, MUSB_DEVCTL, 0); - break; - case OTG_CMD_E_START_DET_VBUS: - usb_l1intp = musb_readl(mtk_musb->mregs, USB_L1INTP); - usb_l1intp &= ~(1 << 10); - musb_writel(mtk_musb->mregs, USB_L1INTP, usb_l1intp); - usb_l1ints = musb_readl(mtk_musb->mregs, USB_L1INTS); - while ((usb_l1ints & (1 << 8)) == 0) { - DBG(0, "musb::vbus is 0!\n"); - msleep(100); - usb_l1ints = musb_readl(mtk_musb->mregs, USB_L1INTS); - } - DBG(0, "musb::vbus is detected!\n"); - power = musb_readb(mtk_musb->mregs, MUSB_POWER); - power |= MUSB_POWER_SOFTCONN; - musb_writeb(mtk_musb->mregs, MUSB_POWER, power); - while (atomic_read(&g_exec) == 1) - msleep(100); - musb_writeb(mtk_musb->mregs, MUSB_POWER, 0x21); - break; - - case OTG_CMD_P_B_UUT_TD59: - is_td_59 = true; - if (is_td_59) - DBG(0, "TD5.9 will be tested!\n"); - break; - - /* protocal */ - case OTG_CMD_P_A_UUT: - DBG(0, "A-UUT starts...\n"); - otg_cmd_a_uut(); - DBG(0, "the test as A-UUT is done\n"); - break; - - case OTG_CMD_P_B_UUT: - DBG(0, "B-UUT starts...\n"); - otg_cmd_b_uut(); - DBG(0, "the test as B_UUT is done\n"); - break; - - case HOST_CMD_TEST_SE0_NAK: - case HOST_CMD_TEST_J: - case HOST_CMD_TEST_K: - case HOST_CMD_TEST_PACKET: - case HOST_CMD_SUSPEND_RESUME: - case HOST_CMD_GET_DESCRIPTOR: - case HOST_CMD_SET_FEATURE: - musb_host_test_mode(cmd); - while (atomic_read(&g_exec) == 1) - msleep(100); - break; - } - DBG(0, "%s--\n", __func__); - return 0; - -} - -void musb_otg_stop_cmd(void) -{ - DBG(0, "%s++\n", __func__); - atomic_set(&g_exec, 0); - is_td_59 = false; - complete(&stop_event); -} - -unsigned int musb_otg_message(void) -{ - /* for EM to pop the message */ - unsigned int msg; - - msg = g_otg_message.msg; - g_otg_message.msg = 0; - return msg; -} - -void musb_otg_message_cb(void) -{ - /* when the OK button is clicked on EM, this func is called. */ - spin_lock(&g_otg_message.lock); - g_otg_message.msg = 0; - spin_unlock(&g_otg_message.lock); -} - -static int musb_otg_test_open(struct inode *inode, struct file *file) -{ - DBG(0, "%s++\n", __func__); - return 0; -} - -static int musb_otg_test_release(struct inode *inode, struct file *file) -{ - return 0; -} - -ssize_t musb_otg_test_read(struct file *filp, - char __user *buf, size_t count, loff_t *ppos) -{ - int ret = 0; - unsigned int message = musb_otg_message(); - - if (message) - DBG(0, "%s:message=0x%x\n", __func__, message); - if (put_user((unsigned int)message, (unsigned int *)buf)) - ret = -EFAULT; - return ret; -} - -ssize_t musb_otg_test_write(struct file *filp, - const char __user *buf, size_t count, - loff_t *ppos) -{ - int ret = 0; - unsigned char value; - - if (get_user(value, (unsigned char *)buf)) - ret = -EFAULT; - else { - if (value == OTG_STOP_CMD) { - DBG(0, "%s::OTG_STOP_CMD\n", __func__); - musb_otg_stop_cmd(); - } else if (value == OTG_INIT_MSG) { - DBG(0, "%s::OTG_INIT_MSG\n", __func__); - musb_otg_message_cb(); - } else { - DBG(0, "musb_otg_test_write::the - value is invalid,0x%x\n", - value); - ret = -EFAULT; - } - } - return ret; -} - -static long musb_otg_test_ioctl - (struct file *file, unsigned int cmd, unsigned long arg) -{ - int ret = 0; - - DBG(0, "%s :cmd=0x%x\n", __func__, cmd); - ret = musb_otg_exec_cmd(cmd); - return (long)ret; -} - - -static const struct file_operations musb_otg_test_fops = { - .owner = THIS_MODULE, - .open = musb_otg_test_open, - .release = musb_otg_test_release, - .read = musb_otg_test_read, - .write = musb_otg_test_write, - .unlocked_ioctl = musb_otg_test_ioctl, -}; - -static struct miscdevice musb_otg_test_dev = { - .minor = MISC_DYNAMIC_MINOR, - /* .minor = 254, */ - .name = TEST_DRIVER_NAME, - .fops = &musb_otg_test_fops, - .mode = 0666, -}; - - -static const u8 musb_host_test_packet[53] = { - /* implicit SYNC then DATA0 to start */ - - /* JKJKJKJK x9 */ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - /* JJKKJJKK x8 */ - 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, - /* JJJJKKKK x8 */ - 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, - /* JJJJJJJKKKKKKK x8 */ - 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - /* JJJJJJJK x8 */ - 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, - /* JKKKKKKK x10, JK */ - 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e - /* implicit CRC16 then EOP to end */ -}; - -void musb_host_load_testpacket(struct musb *musb) -{ - unsigned short csr0 = musb_readw(musb->mregs, 0x102); - - DBG(0, "csr0=0x%x\n", csr0); - musb->ignore_disconnect = 1; - musb_otg_write_fifo(53, (u8 *) musb_host_test_packet); -} - - -void host_test_mode(struct musb *musb, unsigned int wIndex) -{ - unsigned char temp; - unsigned char power; - struct usb_ctrlrequest setup_packet; - struct usb_device_descriptor device_descriptor; - - setup_packet.bRequestType = USB_DIR_IN | - USB_TYPE_STANDARD | USB_RECIP_DEVICE; - setup_packet.bRequest = USB_REQ_GET_DESCRIPTOR; - setup_packet.wIndex = 0; - setup_packet.wValue = 0x0100; - setup_packet.wLength = 0x40; - musb_otg_set_session(true); - msleep(200); - pr_debug("devctl = 0x%x\n", musb_readb(musb->mregs, MUSB_DEVCTL)); - switch (wIndex) { - case HOST_CMD_TEST_SE0_NAK: - DBG(0, "TEST_SE0_NAK\n"); - temp = MUSB_TEST_SE0_NAK; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_J: - DBG(0, "TEST_J\n"); - temp = MUSB_TEST_J; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_K: - DBG(0, "TEST_K\n"); - temp = MUSB_TEST_K; - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - - break; - case HOST_CMD_TEST_PACKET: - DBG(0, "TEST_PACKET\n"); - temp = MUSB_TEST_PACKET; - musb_host_load_testpacket(musb); - musb_writeb(musb->mregs, MUSB_TESTMODE, temp); - musb_writew(musb->mregs, 0x102, MUSB_CSR0_TXPKTRDY); - break; - - case HOST_CMD_SUSPEND_RESUME: - /* HS_HOST_PORT_SUSPEND_RESUME */ - DBG(0, "HS_HOST_PORT_SUSPEND_RESUME\n"); - msleep(5000); - /* the host must continue sending SOFs for 15s */ - DBG(0, "please begin to trigger suspend!\n"); - msleep(10000); - power = musb_readb(musb->mregs, MUSB_POWER); - power |= MUSB_POWER_SUSPENDM | MUSB_POWER_ENSUSPEND; - musb_writeb(musb->mregs, MUSB_POWER, power); - msleep(5000); - DBG(0, "please begin to trigger resume!\n"); - msleep(10000); - power &= ~MUSB_POWER_SUSPENDM; - power |= MUSB_POWER_RESUME; - musb_writeb(musb->mregs, MUSB_POWER, power); - mdelay(25); - power &= ~MUSB_POWER_RESUME; - musb_writeb(musb->mregs, MUSB_POWER, power); - /* SOF continue */ - musb_h_setup(&setup_packet); - break; - case HOST_CMD_GET_DESCRIPTOR: - /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR setup */ - DBG(0, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR\n"); - /* the host issues SOFs for 15s allowing the test engineer - * to raise the scope trigger just above the SOF voltage level. - */ - msleep(15000); - musb_h_setup(&setup_packet); - break; - case HOST_CMD_SET_FEATURE: - /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR execute */ - DBG(0, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR\n"); - /* get device descriptor */ - musb_h_setup(&setup_packet); - msleep(15000); - musb_h_in_data((char *)&device_descriptor, - sizeof(struct usb_device_descriptor)); - musb_h_out_status(); - break; - default: - break; - - } - /* while(1); */ -} - -static int musb_host_test_mode(unsigned char cmd) -{ - musb_platform_set_vbus(mtk_musb, 1); - musb_otg_reset_usb(); - host_test_mode(mtk_musb, cmd); - return 0; -} - -static int __init musb_otg_test_init(void) -{ -#ifdef CONFIG_OF - struct device_node *np; - - np = of_find_compatible_node(NULL, NULL, "mediatek,PERICFG"); - if (!np) - pr_debug("get PERICFG node fail"); - pericfg_base = (unsigned long)of_iomap(np, 0); -#else - pericfg_base = PERICFG_BASE; -#endif - misc_register(&musb_otg_test_dev); - return 0; -} - -static void __exit musb_otg_test_exit(void) -{ - misc_deregister(&musb_otg_test_dev); -} - - -module_init(musb_otg_test_init); -module_exit(musb_otg_test_exit); diff --git a/drivers/misc/mediatek/usb20/mt6833/usb20_phy.c b/drivers/misc/mediatek/usb20/mt6833/usb20_phy.c deleted file mode 100644 index 37e8032bf2cf..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/usb20_phy.c +++ /dev/null @@ -1,905 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#ifdef CONFIG_MTK_CLKMGR -#include -#else -#include -#endif -#include -#include -#include -#include -#include -#include -#include "usb20.h" -#include "mtk_devinfo.h" -#include - -#ifdef CONFIG_OF -#include -#endif -#ifdef CONFIG_MTK_AEE_FEATURE -#include -#endif - -#include - -#define FRA (48) -#define PARA (28) -#ifdef CONFIG_OF -extern struct musb *mtk_musb; - -#ifdef USB2_PHY_V2 -#define USB_PHY_OFFSET 0x300 -#else -#define USB_PHY_OFFSET 0x800 -#endif - -#define USBPHY_READ8(offset) \ - readb((void __iomem *)\ - (((unsigned long)\ - mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) -#define USBPHY_WRITE8(offset, value) writeb(value, (void __iomem *)\ - (((unsigned long)mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) -#define USBPHY_SET8(offset, mask) \ - USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) | (mask)) -#define USBPHY_CLR8(offset, mask) \ - USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) & (~(mask))) -#define USBPHY_READ32(offset) \ - readl((void __iomem *)(((unsigned long)\ - mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) -#define USBPHY_WRITE32(offset, value) \ - writel(value, (void __iomem *)\ - (((unsigned long)mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) -#define USBPHY_SET32(offset, mask) \ - USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) | (mask)) -#define USBPHY_CLR32(offset, mask) \ - USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) & (~(mask))) - -#ifdef MTK_UART_USB_SWITCH -#define UART2_BASE 0x11003000 -#endif - -#else - -#include - -#define USBPHY_READ8(offset) \ - readb((void __iomem *)(USB_SIF_BASE+USB_PHY_OFFSET+offset)) -#define USBPHY_WRITE8(offset, value) \ - writeb(value, (void __iomem *)(USB_SIF_BASE+USB_PHY_OFFSET+offset)) -#define USBPHY_SET8(offset, mask) \ - USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) | (mask)) -#define USBPHY_CLR8(offset, mask) \ - USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) & (~mask)) - -#define USBPHY_READ32(offset) \ - readl((void __iomem *)(USB_SIF_BASE+USB_PHY_OFFSET+offset)) -#define USBPHY_WRITE32(offset, value) \ - writel(value, (void __iomem *)(USB_SIF_BASE+USB_PHY_OFFSET+offset)) -#define USBPHY_SET32(offset, mask) \ - USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) | (mask)) -#define USBPHY_CLR32(offset, mask) \ - USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) & (~mask)) - -#endif -#ifdef FPGA_PLATFORM -bool usb_enable_clock(bool enable) -{ - return true; -} - -bool usb_prepare_clock(bool enable) -{ - return true; -} - -void usb_prepare_enable_clock(bool enable) -{ -} - -void usb_phy_poweron(void) -{ -} - -void usb_phy_savecurrent(void) -{ -} - -void usb_phy_recover(void) -{ -} - -/* BC1.2 */ -void Charger_Detect_Init(void) -{ -} - -void Charger_Detect_Release(void) -{ -} - -void usb_phy_context_save(void) -{ -} - -void usb_phy_context_restore(void) -{ -} - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool usb_phy_check_in_uart_mode(void) -{ - return false; -} - -void usb_phy_switch_to_uart(void) -{ -} - -void usb_phy_switch_to_usb(void) -{ -} -#endif - -#else -#include -#include -#define VAL_MAX_WIDTH_2 0x3 -#define VAL_MAX_WIDTH_3 0x7 -#define OFFSET_RG_USB20_VRT_VREF_SEL 0x4 -#define SHFT_RG_USB20_VRT_VREF_SEL 12 -#define OFFSET_RG_USB20_TERM_VREF_SEL 0x4 -#define SHFT_RG_USB20_TERM_VREF_SEL 8 -#define OFFSET_RG_USB20_PHY_REV6 0x18 -#define SHFT_RG_USB20_PHY_REV6 30 -void usb_phy_tuning(void) -{ - static bool inited; - static s32 u2_vrt_ref, u2_term_ref, u2_enhance; - struct device_node *of_node; - - if (!inited) { - /* apply default value */ - u2_vrt_ref = 5; - u2_term_ref = 5; - u2_enhance = 1; - - of_node = of_find_compatible_node(NULL, - NULL, "mediatek,phy_tuning"); - if (of_node) { - /* value won't be updated if property not being found */ - of_property_read_u32(of_node, - "u2_vrt_ref", (u32 *) &u2_vrt_ref); - of_property_read_u32(of_node, - "u2_term_ref", (u32 *) &u2_term_ref); - of_property_read_u32(of_node, - "u2_enhance", (u32 *) &u2_enhance); - } - inited = true; - } - - if (u2_vrt_ref != -1) { - if (u2_vrt_ref <= VAL_MAX_WIDTH_3) { - USBPHY_CLR32(OFFSET_RG_USB20_VRT_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_VRT_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_VRT_VREF_SEL, - u2_vrt_ref << SHFT_RG_USB20_VRT_VREF_SEL); - } - } - if (u2_term_ref != -1) { - if (u2_term_ref <= VAL_MAX_WIDTH_3) { - USBPHY_CLR32(OFFSET_RG_USB20_TERM_VREF_SEL, - VAL_MAX_WIDTH_3 << SHFT_RG_USB20_TERM_VREF_SEL); - USBPHY_SET32(OFFSET_RG_USB20_TERM_VREF_SEL, - u2_term_ref << SHFT_RG_USB20_TERM_VREF_SEL); - } - } - if (u2_enhance != -1) { - if (u2_enhance <= VAL_MAX_WIDTH_2) { - USBPHY_CLR32(OFFSET_RG_USB20_PHY_REV6, - VAL_MAX_WIDTH_2 << SHFT_RG_USB20_PHY_REV6); - USBPHY_SET32(OFFSET_RG_USB20_PHY_REV6, - u2_enhance<\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - - spin_lock_irqsave(&musb_reg_clock_lock, flags); - - if (unlikely(atomic_read(&clk_prepare_cnt) <= 0)) { - DBG_LIMIT(1, "clock not prepare"); - goto exit; - } - - if (enable && count == 0) { - if (clk_enable(musb_clk_top_sel)) { - DBG(0, "musb_clk_top_sel enable fail\n"); - goto exit; - } - - if (clk_enable(musb_clk)) { - DBG(0, "musb_clk enable fail\n"); - clk_disable(musb_clk_top_sel); - goto exit; - } - - if (clk_enable(musb_ref_clk)) { - DBG(0, "musb_ref_clk enable fail\n"); - clk_disable(musb_clk); - clk_disable(musb_clk_top_sel); - goto exit; - } - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); - real_enable++; - - } else if (!enable && count == 1) { - clk_disable(musb_clk); - clk_disable(musb_ref_clk); - clk_disable(musb_clk_top_sel); - - usb_hal_dpidle_request(USB_DPIDLE_ALLOWED); - real_disable++; - } - - if (enable) - count++; - else - count = (count == 0) ? 0 : (count - 1); - -exit: - if (enable) - virt_enable++; - else - virt_disable++; - - spin_unlock_irqrestore(&musb_reg_clock_lock, flags); - - DBG(1, "enable(%d),count(%d), <%d,%d,%d,%d>\n", - enable, count, virt_enable, virt_disable, - real_enable, real_disable); - return 1; -} -EXPORT_SYMBOL(usb_enable_clock); - -#ifdef CONFIG_MTK_UART_USB_SWITCH -bool usb_phy_check_in_uart_mode(void) -{ - u32 usb_port_mode; - - usb_enable_clock(true); - udelay(50); - usb_port_mode = USBPHY_READ32(0x68); - usb_enable_clock(false); - - if (((usb_port_mode >> 30) & 0x3) == 1) { - DBG(0, "%s:%d - IN UART MODE : 0x%x\n", - __func__, __LINE__, usb_port_mode); - in_uart_mode = true; - } else { - DBG(0, "%s:%d - NOT IN UART MODE : 0x%x\n", - __func__, __LINE__, usb_port_mode); - in_uart_mode = false; - } - return in_uart_mode; -} - -void usb_phy_switch_to_uart(void) -{ - unsigned int val = 0; - - if (usb_phy_check_in_uart_mode()) { - DBG(0, "Already in UART mode.\n"); - return; - } - - udelay(50); - - /* RG_USB20_BC11_SW_EN 0x11F4_0818[23] = 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - /* Set RG_SUSPENDM 0x11F4_0868[3] to 1 */ - USBPHY_SET32(0x68, (0x1 << 3)); - - /* force suspendm 0x11F4_0868[18] = 1 */ - USBPHY_SET32(0x68, (0x1 << 18)); - - /* Set rg_uart_mode 0x11F4_0868[31:30] to 2'b01 */ - USBPHY_CLR32(0x68, (0x3 << 30)); - USBPHY_SET32(0x68, (0x1 << 30)); - - /* force_uart_i 0x11F4_0868[29] = 0*/ - USBPHY_CLR32(0x68, (0x1 << 29)); - - /* force_uart_bias_en 0x11F4_0868[28] = 1 */ - USBPHY_SET32(0x68, (0x1 << 28)); - - /* force_uart_tx_oe 0x11F4_0868[27] = 1 */ - USBPHY_SET32(0x68, (0x1 << 27)); - - /* force_uart_en 0x11F4_0868[26] = 1 */ - USBPHY_SET32(0x68, (0x1 << 26)); - - /* RG_UART_BIAS_EN 0x11F4_086c[18] = 1 */ - USBPHY_SET32(0x6C, (0x1 << 18)); - - /* RG_UART_TX_OE 0x11F4_086c[17] = 1 */ - USBPHY_SET32(0x6C, (0x1 << 17)); - - /* Set RG_UART_EN to 1 */ - USBPHY_SET32(0x6C, (0x1 << 16)); - - /* Set RG_USB20_DM_100K_EN to 1 */ - USBPHY_SET32(0x20, (0x1 << 17)); - - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - val = readl(ap_gpio_base); - writel(val | (GPIO_SEL_UART0), ap_gpio_base); - - in_uart_mode = true; -} - -void usb_phy_switch_to_usb(void) -{ - unsigned int val = 0; - - /* GPIO Selection */ - val = readl(ap_gpio_base); - writel(val & (~(GPIO_SEL_MASK)), ap_gpio_base); - - /* clear force_uart_en */ - USBPHY_CLR32(0x68, (0x1 << 26)); - - /* Set rg_uart_mode 0x11F4_0868[31:30] to 2'b00 */ - USBPHY_CLR32(0x68, (0x3 << 30)); - - in_uart_mode = false; - - usb_phy_poweron(); -} -#endif - -void set_usb_phy_mode(int mode) -{ - switch (mode) { - case PHY_MODE_USB_DEVICE: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=1, IDPULLUP=1 */ - USBPHY_CLR32(0x6C, (0x10<<0)); - USBPHY_SET32(0x6C, (0x2F<<0)); - USBPHY_SET32(0x6C, (0x3F<<8)); - break; - case PHY_MODE_USB_HOST: - /* VBUSVALID=1, AVALID=1, BVALID=1, SESSEND=0, IDDIG=0, IDPULLUP=1 */ - USBPHY_CLR32(0x6c, (0x12<<0)); - USBPHY_SET32(0x6c, (0x2d<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - case PHY_MODE_INVALID: - /* VBUSVALID=0, AVALID=0, BVALID=0, SESSEND=1, IDDIG=0, IDPULLUP=1 */ - USBPHY_SET32(0x6c, (0x11<<0)); - USBPHY_CLR32(0x6c, (0x2e<<0)); - USBPHY_SET32(0x6c, (0x3f<<8)); - break; - default: - DBG(0, "mode error %d\n", mode); - } - DBG(0, "force PHY to mode %d, 0x6c=%x\n", mode, USBPHY_READ32(0x6c)); -} - -void usb_rev6_setting(int value) -{ - static int direct_return; - - if (direct_return) - return; - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - USBPHY_CLR32(0x18, (0xFF << 24)); - - if (value) - USBPHY_SET32(0x18, (value << 24)); - else - direct_return = 1; -} - -/* M17_USB_PWR Sequence 20160603.xls */ -void usb_phy_poweron(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* wait 50 usec for PHY3.3v/1.8v stable. */ - udelay(50); - - /* RG_USB20_PLL_PREDIV[1:0]=2'b00 */ - USBPHY_CLR32(0x00, (0x3 << 6)); - /* RG_USB20_PLL_FBDIV[21:0]=22'd1814843 */ - USBPHY_CLR32(0x30, (0x3fffff << 0)); - USBPHY_SET32(0x30, (0x1bb13b << 0)); - /* RG_USB20_PLL_FRA_EN=1'b1 */ - USBPHY_SET32(0x44, (0x1 << 3)); - /* RG_USB20_PLL_ REFCLK_SEL=1'b1 */ - USBPHY_SET32(0x44, (0x1 << 5)); - /* RG_USB20_PLL_BW[2:0]=3'b011 */ - USBPHY_CLR32(0x08, (0x7 << 19)); - USBPHY_SET32(0x08, (0x3 << 19)); - - /* - * force_uart_en 1'b0 0x68 26 - * RG_UART_EN 1'b0 0x6c 16 - * rg_usb20_gpio_ctl 1'b0 0x20 09 - * usb20_gpio_mode 1'b0 0x20 08 - * RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * rg_usb20_dp_100k_mode 1'b1 0x20 18 - * USB20_DP_100K_EN 1'b0 0x20 16 - * RG_USB20_DM_100K_EN 1'b0 0x20 17 - * RG_USB20_OTG_VBUSCMP_EN 1'b1 0x18 20 - * force_suspendm 1'b0 0x68 18 - */ - - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6c, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, ((0x1 << 9) | (0x1 << 8))); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - /* rg_usb20_dp_100k_mode, 1'b1 */ - USBPHY_SET32(0x20, (0x1 << 18)); - /* USB20_DP_100K_EN 1'b0, RG_USB20_DM_100K_EN, 1'b0 */ - USBPHY_CLR32(0x20, ((0x1 << 16) | (0x1 << 17))); - - /* RG_USB20_OTG_VBUSCMP_EN, 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 20)); - - /* force_suspendm, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 18)); - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - USBPHY_CLR32(0x18, (0xFF << 24)); - USBPHY_SET32(0x18, (0x40 << 24)); - - /* wait for 800 usec. */ - udelay(800); - - DBG(0, "usb power on success\n"); -} - -/* M17_USB_PWR Sequence 20160603.xls */ -void usb_phy_savecurrent_internal(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* - * force_uart_en 1'b0 0x68 26 - * RG_UART_EN 1'b0 0x6c 16 - * rg_usb20_gpio_ctl 1'b0 0x20 09 - * usb20_gpio_mode 1'b0 0x20 08 - - * RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * RG_USB20_OTG_VBUSCMP_EN 1'b0 0x18 20 - * RG_SUSPENDM 1'b1 0x68 03 - * force_suspendm 1'b1 0x68 18 - - * RG_DPPULLDOWN 1'b1 0x68 06 - * RG_DMPULLDOWN 1'b1 0x68 07 - * RG_XCVRSEL[1:0] 2'b01 0x68 [04-05] - * RG_TERMSEL 1'b1 0x68 02 - * RG_DATAIN[3:0] 4'b0000 0x68 [10-13] - * force_dp_pulldown 1'b1 0x68 20 - * force_dm_pulldown 1'b1 0x68 21 - * force_xcversel 1'b1 0x68 19 - * force_termsel 1'b1 0x68 17 - * force_datain 1'b1 0x68 23 - - * RG_SUSPENDM 1'b0 0x68 03 - */ - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6c, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, (0x1 << 9)); - USBPHY_CLR32(0x20, (0x1 << 8)); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - /* RG_USB20_OTG_VBUSCMP_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 20)); - - /* RG_SUSPENDM, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 3)); - /* force_suspendm, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 18)); - - /* RG_DPPULLDOWN, 1'b1, RG_DMPULLDOWN, 1'b1 */ - USBPHY_SET32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* RG_XCVRSEL[1:0], 2'b01. */ - USBPHY_CLR32(0x68, (0x3 << 4)); - USBPHY_SET32(0x68, (0x1 << 4)); - /* RG_TERMSEL, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 2)); - /* RG_DATAIN[3:0], 4'b0000 */ - USBPHY_CLR32(0x68, (0xF << 10)); - - /* force_dp_pulldown, 1'b1, force_dm_pulldown, 1'b1, - * force_xcversel, 1'b1, force_termsel, 1'b1, force_datain, 1'b1 - */ - USBPHY_SET32(0x68, ((0x1 << 20) | (0x1 << 21) | - (0x1 << 19) | (0x1 << 17) | (0x1 << 23))); - - udelay(800); - - /* RG_SUSPENDM, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 3)); - - udelay(1); - - set_usb_phy_mode(PHY_MODE_INVALID); -} - -void usb_phy_savecurrent(void) -{ - usb_phy_savecurrent_internal(); - DBG(0, "usb save current success\n"); -} -EXPORT_SYMBOL(usb_phy_savecurrent); -/* M17_USB_PWR Sequence 20160603.xls */ -void usb_phy_recover(void) -{ - unsigned int efuse_val = 0; - -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) { - DBG(0, "At UART mode. No %s\n", __func__); - return; - } -#endif - /* wait 50 usec. */ - udelay(50); - - /* RG_USB20_PLL_PREDIV[1:0]=2'b00 */ - USBPHY_CLR32(0x00, (0x3 << 6)); - /* RG_USB20_PLL_FBDIV[21:0]=22'd1814843 */ - USBPHY_CLR32(0x30, (0x3fffff << 0)); - USBPHY_SET32(0x30, (0x1bb13b << 0)); - /* RG_USB20_PLL_FRA_EN=1'b1 */ - USBPHY_SET32(0x44, (0x1 << 3)); - /* RG_USB20_PLL_ REFCLK_SEL=1'b1 */ - USBPHY_SET32(0x44, (0x1 << 5)); - /* RG_USB20_PLL_BW[2:0]=3'b011 */ - USBPHY_CLR32(0x08, (0x7 << 19)); - USBPHY_SET32(0x08, (0x3 << 19)); - - /* - * 04.force_uart_en 1'b0 0x68 26 - * 04.RG_UART_EN 1'b0 0x6C 16 - * 04.rg_usb20_gpio_ctl 1'b0 0x20 09 - * 04.usb20_gpio_mode 1'b0 0x20 08 - - * 05.force_suspendm 1'b0 0x68 18 - - * 06.RG_DPPULLDOWN 1'b0 0x68 06 - * 07.RG_DMPULLDOWN 1'b0 0x68 07 - * 08.RG_XCVRSEL[1:0] 2'b00 0x68 [04:05] - * 09.RG_TERMSEL 1'b0 0x68 02 - * 10.RG_DATAIN[3:0] 4'b0000 0x68 [10:13] - * 11.force_dp_pulldown 1'b0 0x68 20 - * 12.force_dm_pulldown 1'b0 0x68 21 - * 13.force_xcversel 1'b0 0x68 19 - * 14.force_termsel 1'b0 0x68 17 - * 15.force_datain 1'b0 0x68 23 - * 16.RG_USB20_BC11_SW_EN 1'b0 0x18 23 - * 17.RG_USB20_OTG_VBUSCMP_EN 1'b1 0x18 20 - */ - - /* clean PUPD_BIST_EN */ - /* PUPD_BIST_EN = 1'b0 */ - /* PMIC will use it to detect charger type */ - /* NEED?? USBPHY_CLR8(0x1d, 0x10);*/ - USBPHY_CLR32(0x1c, (0x1 << 12)); - - /* force_uart_en, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 26)); - /* RG_UART_EN, 1'b0 */ - USBPHY_CLR32(0x6C, (0x1 << 16)); - /* rg_usb20_gpio_ctl, 1'b0, usb20_gpio_mode, 1'b0 */ - USBPHY_CLR32(0x20, (0x1 << 9)); - USBPHY_CLR32(0x20, (0x1 << 8)); - - /* force_suspendm, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 18)); - - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, ((0x1 << 6) | (0x1 << 7))); - - /* RG_XCVRSEL[1:0], 2'b00. */ - USBPHY_CLR32(0x68, (0x3 << 4)); - - /* RG_TERMSEL, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 2)); - /* RG_DATAIN[3:0], 4'b0000 */ - USBPHY_CLR32(0x68, (0xF << 10)); - - /* force_dp_pulldown, 1'b0, force_dm_pulldown, 1'b0, - * force_xcversel, 1'b0, force_termsel, 1'b0, force_datain, 1'b0 - */ - USBPHY_CLR32(0x68, ((0x1 << 20) | (0x1 << 21) | - (0x1 << 19) | (0x1 << 17) | (0x1 << 23))); - - /* RG_USB20_BC11_SW_EN, 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - /* RG_USB20_OTG_VBUSCMP_EN, 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 20)); - - /* RG_USB20_PHY_REV[7:0] = 8'b01000000 */ - usb_rev6_setting(0x40); - - /* wait 800 usec. */ - udelay(800); - - /* force enter device mode */ - set_usb_phy_mode(PHY_DEV_ACTIVE); - - /* M_ANALOG8[4:0] => RG_USB20_INTR_CAL[4:0] */ - efuse_val = (get_devinfo_with_index(107) & (0x1f<<0)) >> 0; - if (efuse_val) { - DBG(0, "apply efuse setting, RG_USB20_INTR_CAL=0x%x\n", - efuse_val); - USBPHY_CLR32(0x04, (0x1F<<19)); - USBPHY_SET32(0x04, (efuse_val<<19)); - } - - /* RG_USB20_DISCTH[7:4], 4'b0111 for 700 mV */ - USBPHY_CLR32(0x18, (0xf0<<0)); - USBPHY_SET32(0x18, (0x70<<0)); - - USBPHY_SET32(0x18, (0x1<<28)); - USBPHY_CLR32(0x18, (0xf<<0)); - USBPHY_SET32(0x18, (0x5<<0)); - - usb_phy_tuning(); - - DBG(0, "usb recovery success\n"); -} -EXPORT_SYMBOL(usb_phy_recover); -/* BC1.2 */ -void Charger_Detect_Init(void) -{ -#if 0 - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } -#endif - - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - - /* RG_USB20_BC11_SW_EN = 1'b1 */ - USBPHY_SET32(0x18, (0x1 << 23)); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Init); - -void Charger_Detect_Release(void) -{ -#if 0 - if ((get_boot_mode() == META_BOOT) || - (get_boot_mode() == ADVMETA_BOOT) || - !mtk_musb) { - DBG(0, "%s Skip, musb<%p>\n", - __func__, mtk_musb); - return; - } -#endif - - usb_prepare_enable_clock(true); - - /* RG_USB20_BC11_SW_EN = 1'b0 */ - USBPHY_CLR32(0x18, (0x1 << 23)); - - udelay(1); - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -EXPORT_SYMBOL(Charger_Detect_Release); - -void usb_phy_context_save(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); -#endif -} - -void usb_phy_context_restore(void) -{ -#ifdef CONFIG_MTK_UART_USB_SWITCH - if (in_uart_mode) - usb_phy_switch_to_uart(); -#endif -} - -void usb_dpdm_pulldown(bool enable) -{ - DBG(0, "%s: enable=%d\n", __func__, enable); - usb_prepare_enable_clock(true); - - /* wait 50 usec. */ - udelay(50); - if (enable) { - /* RG_DPPULLDOWN, 1'b1, RG_DMPULLDOWN, 1'b1 */ - USBPHY_SET32(0x68, (0x1 << 6) | (0x1 << 7)); - /* RG_USB20_PHY_REV */ - USBPHY_CLR32(0x18, (0x2 << 24)); - } else { - /* RG_DPPULLDOWN, 1'b0, RG_DMPULLDOWN, 1'b0 */ - USBPHY_CLR32(0x68, (0x1 << 6) | (0x1 << 7)); - /* RG_USB20_PHY_REV */ - USBPHY_SET32(0x18, (0x2 << 24)); - } - - usb_prepare_enable_clock(false); - - DBG(0, "%s\n", __func__); -} -#endif diff --git a/drivers/misc/mediatek/usb20/mt6833/usb20_phy_debugfs.c b/drivers/misc/mediatek/usb20/mt6833/usb20_phy_debugfs.c deleted file mode 100644 index 53fb7d3f6449..000000000000 --- a/drivers/misc/mediatek/usb20/mt6833/usb20_phy_debugfs.c +++ /dev/null @@ -1,725 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 MediaTek Inc. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* general */ -#define BIT_WIDTH_1 1 -#define MSK_WIDTH_1 0x1 -#define VAL_MAX_WDITH_1 0x1 -#define VAL_0_WIDTH_1 0x0 -#define VAL_1_WIDTH_1 0x1 -#define STRNG_0_WIDTH_1 "0" -#define STRNG_1_WIDTH_1 "1" - -#define BIT_WIDTH_2 2 -#define MSK_WIDTH_2 0x3 -#define VAL_MAX_WDITH_2 0x3 -#define VAL_0_WIDTH_2 0x0 -#define VAL_1_WIDTH_2 0x1 -#define VAL_2_WIDTH_2 0x2 -#define VAL_3_WIDTH_2 0x3 -#define STRNG_0_WIDTH_2 "00" -#define STRNG_1_WIDTH_2 "01" -#define STRNG_2_WIDTH_2 "10" -#define STRNG_3_WIDTH_2 "11" - -#define BIT_WIDTH_3 3 -#define MSK_WIDTH_3 0x7 -#define VAL_MAX_WDITH_3 0x7 -#define VAL_0_WIDTH_3 0x0 -#define VAL_1_WIDTH_3 0x1 -#define VAL_2_WIDTH_3 0x2 -#define VAL_3_WIDTH_3 0x3 -#define VAL_4_WIDTH_3 0x4 -#define VAL_5_WIDTH_3 0x5 -#define VAL_6_WIDTH_3 0x6 -#define VAL_7_WIDTH_3 0x7 -#define STRNG_0_WIDTH_3 "000" -#define STRNG_1_WIDTH_3 "001" -#define STRNG_2_WIDTH_3 "010" -#define STRNG_3_WIDTH_3 "011" -#define STRNG_4_WIDTH_3 "100" -#define STRNG_5_WIDTH_3 "101" -#define STRNG_6_WIDTH_3 "110" -#define STRNG_7_WIDTH_3 "111" - -/* specific */ -#define FILE_USB_DRIVING_CAPABILITY "USB_DRIVING_CAPABILITY" - -#define FILE_RG_USB20_TERM_VREF_SEL "RG_USB20_TERM_VREF_SEL" -#define MSK_RG_USB20_TERM_VREF_SEL MSK_WIDTH_3 -#define SHFT_RG_USB20_TERM_VREF_SEL 8 -#define OFFSET_RG_USB20_TERM_VREF_SEL 0x4 - -#define FILE_RG_USB20_HSTX_SRCTRL "RG_USB20_HSTX_SRCTRL" -#define MSK_RG_USB20_HSTX_SRCTRL MSK_WIDTH_3 -#define SHFT_RG_USB20_HSTX_SRCTRL 12 -#define OFFSET_RG_USB20_HSTX_SRCTRL 0x14 - -#define FILE_RG_USB20_VRT_VREF_SEL "RG_USB20_VRT_VREF_SEL" -#define MSK_RG_USB20_VRT_VREF_SEL MSK_WIDTH_3 -#define SHFT_RG_USB20_VRT_VREF_SEL 12 -#define OFFSET_RG_USB20_VRT_VREF_SEL 0x4 - -#define FILE_RG_USB20_INTR_EN "RG_USB20_INTR_EN" -#define MSK_RG_USB20_INTR_EN MSK_WIDTH_1 -#define SHFT_RG_USB20_INTR_EN 5 -#define OFFSET_RG_USB20_INTR_EN 0x0 - -#define FILE_RG_USB20_PHY_REV6 "RG_USB20_PHY_REV6" -#define MSK_RG_USB20_PHY_REV6 MSK_WIDTH_2 -#define SHFT_RG_USB20_PHY_REV6 30 -#define OFFSET_RG_USB20_PHY_REV6 0x18 - -static struct proc_dir_entry *usb20_phy_procfs_root; - -void usb20_phy_debugfs_write_width1(u8 offset, u8 shift, char *buf) -{ - u32 clr_val = 0, set_val = 0; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_1, BIT_WIDTH_1)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_1); - clr_val = VAL_1_WIDTH_1; - } - if (!strncmp(buf, STRNG_1_WIDTH_1, BIT_WIDTH_1)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_1); - set_val = VAL_1_WIDTH_1; - } - - if (clr_val || set_val) { - clr_val = VAL_MAX_WDITH_1 - set_val; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, before shft\n", - __func__, __LINE__, - offset, clr_val, - set_val); - clr_val <<= shift; - set_val <<= shift; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, after shft\n", - __func__, __LINE__, - offset, clr_val, - set_val); - - USBPHY_CLR32(offset, clr_val); - USBPHY_SET32(offset, set_val); - } else { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> do nothing\n" - , __func__, __LINE__); - } -} - -void usb20_phy_debugfs_rev6_write(u8 offset, u8 shift, char *buf) -{ - u8 set_val = 0xFF; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_2); - set_val = VAL_0_WIDTH_2; - } - if (!strncmp(buf, STRNG_1_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_2); - set_val = VAL_1_WIDTH_2; - } - if (!strncmp(buf, STRNG_2_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_2); - set_val = VAL_2_WIDTH_2; - } - if (!strncmp(buf, STRNG_3_WIDTH_2, BIT_WIDTH_2)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_2); - set_val = VAL_3_WIDTH_2; - } - - if (set_val <= VAL_MAX_WDITH_2) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> case offset:%x, set_val:%x, before shft\n", - __func__, __LINE__, offset, set_val); - USBPHY_CLR32(offset, (VAL_MAX_WDITH_2< do nothing\n", - __func__, __LINE__); - } -} - -void usb20_phy_debugfs_write_width3(u8 offset, u8 shift, char *buf) -{ - u32 clr_val = 0, set_val = 0; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> s(%s)\n", - __func__, __LINE__, buf); - if (!strncmp(buf, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - clr_val = VAL_7_WIDTH_3; - } - if (!strncmp(buf, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - set_val = VAL_1_WIDTH_3; - } - if (!strncmp(buf, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - set_val = VAL_2_WIDTH_3; - } - if (!strncmp(buf, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - set_val = VAL_3_WIDTH_3; - } - if (!strncmp(buf, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - set_val = VAL_4_WIDTH_3; - } - if (!strncmp(buf, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - set_val = VAL_5_WIDTH_3; - } - if (!strncmp(buf, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - set_val = VAL_6_WIDTH_3; - } - if (!strncmp(buf, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - set_val = VAL_7_WIDTH_3; - } - - if (clr_val || set_val) { - clr_val = VAL_MAX_WDITH_3 - set_val; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, before shft\n", - __func__, __LINE__, offset, clr_val, set_val); - clr_val <<= shift; - set_val <<= shift; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, clr_val:%x, set_val:%x, after shft\n", - __func__, __LINE__, offset, clr_val, set_val); - - USBPHY_CLR32(offset, clr_val); - USBPHY_SET32(offset, set_val); - } else { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> do nothing\n", - __func__, __LINE__); - } -} - -u8 usb20_phy_debugfs_read_val(u8 offset, u8 shft, u8 msk, u8 width, char *str) -{ - u32 val; - int i, temp; - - val = USBPHY_READ32(offset); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - val = val >> shft; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - val = val & msk; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> offset:%x, val:%x, shft:%x, msk:%x\n", - __func__, __LINE__, offset, val, shft, msk); - - temp = val; - str[width] = '\0'; - for (i = (width - 1); i >= 0; i--) { - if (val % 2) - str[i] = '1'; - else - str[i] = '0'; - pr_notice("MTK_ICUSB [DBG], <%s(), %d> str[%d]:%c\n\n", - __func__, __LINE__, i, str[i]); - val /= 2; - } - pr_notice("MTK_ICUSB [DBG], <%s(), %d> str(%s)\n", - __func__, __LINE__, str); - return val; -} - -static int usb_driving_capability_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - u8 combined_val, tmp_val = 0xff; - - val = usb20_phy_debugfs_read_val(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - MSK_RG_USB20_TERM_VREF_SEL, BIT_WIDTH_3, str); - if (!strncmp(str, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - tmp_val = VAL_0_WIDTH_3; - } - if (!strncmp(str, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - tmp_val = VAL_1_WIDTH_3; - } - if (!strncmp(str, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - tmp_val = VAL_2_WIDTH_3; - } - if (!strncmp(str, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - tmp_val = VAL_3_WIDTH_3; - } - if (!strncmp(str, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - tmp_val = VAL_4_WIDTH_3; - } - if (!strncmp(str, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - tmp_val = VAL_5_WIDTH_3; - } - if (!strncmp(str, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - tmp_val = VAL_6_WIDTH_3; - } - if (!strncmp(str, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - tmp_val = VAL_7_WIDTH_3; - } - - combined_val = tmp_val; - - val = usb20_phy_debugfs_read_val(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - MSK_RG_USB20_VRT_VREF_SEL, - BIT_WIDTH_3, str); - if (!strncmp(str, STRNG_0_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_0_WIDTH_3); - tmp_val = VAL_0_WIDTH_3; - } - if (!strncmp(str, STRNG_1_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_1_WIDTH_3); - tmp_val = VAL_1_WIDTH_3; - } - if (!strncmp(str, STRNG_2_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_2_WIDTH_3); - tmp_val = VAL_2_WIDTH_3; - } - if (!strncmp(str, STRNG_3_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_3_WIDTH_3); - tmp_val = VAL_3_WIDTH_3; - } - if (!strncmp(str, STRNG_4_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_4_WIDTH_3); - tmp_val = VAL_4_WIDTH_3; - } - if (!strncmp(str, STRNG_5_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_5_WIDTH_3); - tmp_val = VAL_5_WIDTH_3; - } - if (!strncmp(str, STRNG_6_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_6_WIDTH_3); - tmp_val = VAL_6_WIDTH_3; - } - if (!strncmp(str, STRNG_7_WIDTH_3, BIT_WIDTH_3)) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> %s case\n", - __func__, __LINE__, STRNG_7_WIDTH_3); - tmp_val = VAL_7_WIDTH_3; - } - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> combined_val(%d), tmp_val(%d)\n", - __func__, __LINE__, combined_val, tmp_val); - - if ((tmp_val == (combined_val - 1)) || (tmp_val == combined_val)) - combined_val += tmp_val; - else - combined_val = tmp_val * (VAL_MAX_WDITH_3 + 1) + combined_val; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> combined_val(%d), tmp_val(%d)\n", - __func__, __LINE__, combined_val, tmp_val); - - seq_printf(s, "\n%s = %d\n", FILE_USB_DRIVING_CAPABILITY, combined_val); - return 0; -} - -static int rg_usb20_term_vref_sel_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - MSK_RG_USB20_TERM_VREF_SEL, - BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_TERM_VREF_SEL, str); - return 0; -} - -static int rg_usb20_hstx_srctrl_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_HSTX_SRCTRL, - SHFT_RG_USB20_HSTX_SRCTRL, - MSK_RG_USB20_HSTX_SRCTRL, BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_HSTX_SRCTRL, str); - return 0; -} - -static int rg_usb20_vrt_vref_sel_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - MSK_RG_USB20_VRT_VREF_SEL, BIT_WIDTH_3, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_VRT_VREF_SEL, str); - return 0; -} - -static int rg_usb20_intr_en_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_INTR_EN, - SHFT_RG_USB20_INTR_EN, - MSK_RG_USB20_INTR_EN, BIT_WIDTH_1, str); - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_INTR_EN, str); - return 0; -} - -static int rg_usb20_rev6_show(struct seq_file *s, void *unused) -{ - u8 val; - char str[16]; - - val = - usb20_phy_debugfs_read_val(OFFSET_RG_USB20_PHY_REV6, - SHFT_RG_USB20_PHY_REV6, - MSK_RG_USB20_PHY_REV6, BIT_WIDTH_2, str); - - seq_printf(s, "\n%s = %s\n", FILE_RG_USB20_PHY_REV6, str); - return 0; -} - -static int usb_driving_capability_open(struct inode *inode, struct file *file) -{ - return single_open(file, usb_driving_capability_show, PDE_DATA(inode)); -} - -static int rg_usb20_term_vref_sel_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_term_vref_sel_show, PDE_DATA(inode)); -} - -static int rg_usb20_hstx_srctrl_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_hstx_srctrl_show, PDE_DATA(inode)); -} - -static int rg_usb20_vrt_vref_sel_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_vrt_vref_sel_show, PDE_DATA(inode)); -} - -static int rg_usb20_intr_en_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_intr_en_show, PDE_DATA(inode)); -} - -static int rg_usb20_rev6_open(struct inode *inode, struct file *file) -{ - return single_open(file, rg_usb20_rev6_show, PDE_DATA(inode)); -} - -void val_to_bstring_width3(u8 val, char *str) -{ - - if (val == VAL_0_WIDTH_3) - memcpy(str, STRNG_0_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_1_WIDTH_3) - memcpy(str, STRNG_1_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_2_WIDTH_3) - memcpy(str, STRNG_2_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_3_WIDTH_3) - memcpy(str, STRNG_3_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_4_WIDTH_3) - memcpy(str, STRNG_4_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_5_WIDTH_3) - memcpy(str, STRNG_5_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_6_WIDTH_3) - memcpy(str, STRNG_6_WIDTH_3, BIT_WIDTH_3 + 1); - if (val == VAL_7_WIDTH_3) - memcpy(str, STRNG_7_WIDTH_3, BIT_WIDTH_3 + 1); - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> val(%d), str(%s)\n", - __func__, __LINE__, val, str); -} - -static ssize_t usb_driving_capability_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - u8 val, tmp_val; - char str_rg_usb20_term_vref_sel[18], str_rg_usb20_vrt_vref_sel[18]; - - memset(buf, 0x00, sizeof(buf)); - pr_notice("\n"); - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - - if (kstrtol(buf, 10, (long *)&val) != 0) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> kstrtol, err(%d)\n)\n", - __func__, __LINE__, kstrtol(buf, 10, (long *)&val)); - return count; - } - pr_notice("MTK_ICUSB [DBG], <%s(), %d> kstrtol, val(%d)\n)\n", - __func__, __LINE__, val); - - if (val > VAL_7_WIDTH_3 * 2) { - pr_notice("MTK_ICUSB [DBG], <%s(), %d> wrong val set(%d), direct return\n", - __func__, __LINE__, val); - return count; - } - tmp_val = val; - val /= 2; - - pr_notice("MTK_ICUSB [DBG], <%s(), %d> val(%d), tmp_val(%d)\n", - __func__, __LINE__, val, tmp_val); - - val_to_bstring_width3(tmp_val - val, str_rg_usb20_term_vref_sel); - val_to_bstring_width3(val, str_rg_usb20_vrt_vref_sel); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> Config TERM_VREF_SEL %s\n", - __func__, __LINE__, str_rg_usb20_term_vref_sel); - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, - str_rg_usb20_term_vref_sel); - pr_notice("MTK_ICUSB [DBG], <%s(), %d> Config VRT_VREF_SEL %s\n\n", - __func__, __LINE__, str_rg_usb20_vrt_vref_sel); - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, - str_rg_usb20_vrt_vref_sel); - return count; -} - -static ssize_t rg_usb20_term_vref_sel_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_TERM_VREF_SEL, - SHFT_RG_USB20_TERM_VREF_SEL, buf); - return count; -} - -static ssize_t rg_usb20_hstx_srctrl_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_HSTX_SRCTRL, - SHFT_RG_USB20_HSTX_SRCTRL, buf); - return count; -} - -static ssize_t rg_usb20_vrt_vref_sel_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width3(OFFSET_RG_USB20_VRT_VREF_SEL, - SHFT_RG_USB20_VRT_VREF_SEL, buf); - return count; -} - -static ssize_t rg_usb20_intr_en_write(struct file *file, - const char __user *ubuf, - size_t count, loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_write_width1(OFFSET_RG_USB20_INTR_EN, - SHFT_RG_USB20_INTR_EN, buf); - return count; -} - -static ssize_t rg_usb20_rev6_write(struct file *file, - const char __user *ubuf, size_t count, - loff_t *ppos) -{ - char buf[18]; - - memset(buf, 0x00, sizeof(buf)); - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - usb20_phy_debugfs_rev6_write(OFFSET_RG_USB20_PHY_REV6, - SHFT_RG_USB20_PHY_REV6, buf); - return count; -} - - -static const struct file_operations usb_driving_capability_fops = { - .open = usb_driving_capability_open, - .write = usb_driving_capability_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_term_vref_sel_fops = { - .open = rg_usb20_term_vref_sel_open, - .write = rg_usb20_term_vref_sel_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_hstx_srctrl_fops = { - .open = rg_usb20_hstx_srctrl_open, - .write = rg_usb20_hstx_srctrl_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_vrt_vref_sel_fops = { - .open = rg_usb20_vrt_vref_sel_open, - .write = rg_usb20_vrt_vref_sel_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_intr_en_fops = { - .open = rg_usb20_intr_en_open, - .write = rg_usb20_intr_en_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations rg_usb20_rev6_fops = { - .open = rg_usb20_rev6_open, - .write = rg_usb20_rev6_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -int usb20_phy_init_debugfs(void) -{ - struct proc_dir_entry *root; - struct proc_dir_entry *file; - int ret; - - proc_mkdir("mtk_usb", NULL); - - root = proc_mkdir("mtk_usb/usb20_phy", NULL); - if (!root) { - ret = -ENOMEM; - goto err0; - } - - file = proc_create(FILE_USB_DRIVING_CAPABILITY, 0644, - root, &usb_driving_capability_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_TERM_VREF_SEL, 0644, - root, &rg_usb20_term_vref_sel_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_HSTX_SRCTRL, 0644, - root, &rg_usb20_hstx_srctrl_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_VRT_VREF_SEL, 0644, - root, &rg_usb20_vrt_vref_sel_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_INTR_EN, 0644, - root, &rg_usb20_intr_en_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - file = proc_create(FILE_RG_USB20_PHY_REV6, 0644, - root, &rg_usb20_rev6_fops); - if (!file) { - ret = -ENOMEM; - goto err1; - } - - usb20_phy_procfs_root = root; - return 0; - -err1: - proc_remove(root); - -err0: - return ret; -} - -void /* __init_or_exit */ usb20_phy_exit_debugfs(struct musb *musb) -{ - proc_remove(usb20_phy_procfs_root); -} diff --git a/drivers/misc/mediatek/usb20/mtk_musb.h b/drivers/misc/mediatek/usb20/mtk_musb.h index 61f3d03f2d71..1da800b58785 100644 --- a/drivers/misc/mediatek/usb20/mtk_musb.h +++ b/drivers/misc/mediatek/usb20/mtk_musb.h @@ -6,22 +6,15 @@ #ifndef __MUSB_MTK_MUSB_H__ #define __MUSB_MTK_MUSB_H__ -#ifdef CONFIG_MTK_MUSB_PHY #ifdef CONFIG_OF extern struct musb *mtk_musb; -#ifdef USB2_PHY_V2 -#define USB_PHY_OFFSET 0x300 -#else -#define USB_PHY_OFFSET 0x800 -#endif - #define USBPHY_READ8(offset) \ readb((void __iomem *)\ (((unsigned long)\ - mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) + mtk_musb->xceiv->io_priv)+0x800+offset)) #define USBPHY_WRITE8(offset, value) writeb(value, (void __iomem *)\ - (((unsigned long)mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) + (((unsigned long)mtk_musb->xceiv->io_priv)+0x800+offset)) #define USBPHY_SET8(offset, mask) \ USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) | (mask)) #define USBPHY_CLR8(offset, mask) \ @@ -29,18 +22,42 @@ extern struct musb *mtk_musb; #define USBPHY_READ32(offset) \ readl((void __iomem *)(((unsigned long)\ - mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) + mtk_musb->xceiv->io_priv)+0x800+offset)) #define USBPHY_WRITE32(offset, value) \ writel(value, (void __iomem *)\ - (((unsigned long)mtk_musb->xceiv->io_priv)+USB_PHY_OFFSET+offset)) + (((unsigned long)mtk_musb->xceiv->io_priv)+0x800+offset)) #define USBPHY_SET32(offset, mask) \ USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) | (mask)) #define USBPHY_CLR32(offset, mask) \ USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) & (~(mask))) -#endif /* End of CONFIG_OF define */ -#endif /* End of CONFIG_MTK_MUSB_PHY */ +#ifdef MTK_UART_USB_SWITCH +#define UART2_BASE 0x11003000 +#endif + +#else + +#include +#define USBPHY_READ8(offset) \ + readb((void __iomem *)(USB_SIF_BASE+0x800+offset)) +#define USBPHY_WRITE8(offset, value) \ + writeb(value, (void __iomem *)(USB_SIF_BASE+0x800+offset)) +#define USBPHY_SET8(offset, mask) \ + USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) | (mask)) +#define USBPHY_CLR8(offset, mask) \ + USBPHY_WRITE8(offset, (USBPHY_READ8(offset)) & (~mask)) + +#define USBPHY_READ32(offset) \ + readl((void __iomem *)(USB_SIF_BASE+0x800+offset)) +#define USBPHY_WRITE32(offset, value) \ + writel(value, (void __iomem *)(USB_SIF_BASE+0x800+offset)) +#define USBPHY_SET32(offset, mask) \ + USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) | (mask)) +#define USBPHY_CLR32(offset, mask) \ + USBPHY_WRITE32(offset, (USBPHY_READ32(offset)) & (~mask)) + +#endif struct musb; enum usb_state_enum { @@ -51,10 +68,14 @@ enum usb_state_enum { /* USB phy and clock */ extern bool usb_pre_clock(bool enable); -#ifdef CONFIG_MTK_UART_USB_SWITCH +extern void usb_phy_poweron(void); +extern unsigned int usb_phy_get_efuse_val(struct device *dev); +extern void usb_phy_recover(struct musb *musb); +extern void usb_phy_savecurrent(void); extern void usb_phy_context_restore(void); extern void usb_phy_context_save(void); -#endif +extern bool usb_enable_clock(bool enable); +extern void usb_rev6_setting(int value); /* general USB */ extern bool mt_usb_is_device(void); @@ -62,12 +83,17 @@ extern void mt_usb_connect(void); extern void mt_usb_disconnect(void); extern void mt_usb_reconnect(void); extern bool usb_cable_connected(struct musb *musb); +extern void musb_platform_reset(struct musb *musb); extern void musb_sync_with_bat(struct musb *musb, int usb_state); -bool is_saving_mode(void); +extern bool is_saving_mode(void); /* host and otg */ +extern void mt_usb_otg_init(struct musb *musb); +extern void mt_usb_otg_exit(struct musb *musb); extern void mt_usb_init_drvvbus(void); +extern void mt_usb_set_vbus(struct musb *musb, int is_on); +extern int mt_usb_get_vbus_status(struct musb *musb); extern void mt_usb_iddig_int(struct musb *musb); extern void switch_int_to_device(struct musb *musb); extern void switch_int_to_host(struct musb *musb); diff --git a/drivers/misc/mediatek/usb20/mtk_musb_reg.h b/drivers/misc/mediatek/usb20/mtk_musb_reg.h index 500401c2bffe..87d98fac70bf 100644 --- a/drivers/misc/mediatek/usb20/mtk_musb_reg.h +++ b/drivers/misc/mediatek/usb20/mtk_musb_reg.h @@ -6,7 +6,6 @@ #ifndef __MT_MUSB_REG_H__ #define __MT_MUSB_REG_H__ -#include "musb_debug.h" #define MUSB_EP0_FIFOSIZE 64 /* This is non-configurable */ @@ -221,7 +220,6 @@ #define MUSB_DEVCTL 0x60 /* 8 bit */ #define MUSB_OPSTATE 0x620 -#define MUSB_OPSTATE_HOST_WAIT_DEV 0x21 #define OTG_IDLE 0 /* @@ -339,9 +337,6 @@ #define IDDIG_INT_POL (1<<9) #define DRVVBUS_INT_POL (1<<10) -#define RESREG 0x700 /* Reserved Register */ -#define HSTPWRDWN_OPT (1<<0) /* connection detection option */ - /* * OTG 2.0 Registers */ diff --git a/drivers/misc/mediatek/usb20/mtk_qmu.c b/drivers/misc/mediatek/usb20/mtk_qmu.c index b1dcb4fcd4c9..58e7fe45a361 100644 --- a/drivers/misc/mediatek/usb20/mtk_qmu.c +++ b/drivers/misc/mediatek/usb20/mtk_qmu.c @@ -11,7 +11,6 @@ #ifdef CONFIG_MTK_AEE_FEATURE #include #endif -#include #ifdef CONFIG_MTK_UAC_POWER_SAVING #define USB_AUDIO_DATA_OUT 0 @@ -36,22 +35,6 @@ static u32 Tx_gpd_max_count[MAX_QMU_EP + 1]; static bool Tx_enable[MAX_QMU_EP + 1]; static bool Rx_enable[MAX_QMU_EP + 1]; -int isoc_ep_end_idx = 3; -EXPORT_SYMBOL(isoc_ep_end_idx); - -int isoc_ep_gpd_count = 260; -EXPORT_SYMBOL(isoc_ep_gpd_count); - -int mtk_qmu_dbg_level = LOG_WARN; -EXPORT_SYMBOL(mtk_qmu_dbg_level); - -int mtk_qmu_max_gpd_num; -EXPORT_SYMBOL(mtk_qmu_max_gpd_num); - -module_param(mtk_qmu_dbg_level, int, 0644); -module_param(mtk_qmu_max_gpd_num, int, 0644); -module_param(isoc_ep_end_idx, int, 0644); -module_param(isoc_ep_gpd_count, int, 0644); u32 qmu_used_gpd_count(u8 isRx, u32 num) { @@ -609,7 +592,6 @@ bool mtk_is_qmu_enabled(u8 ep_num, u8 isRx) } return false; } -EXPORT_SYMBOL(mtk_is_qmu_enabled); void mtk_qmu_enable(struct musb *musb, u8 ep_num, u8 isRx) { @@ -782,15 +764,10 @@ void mtk_qmu_enable(struct musb *musb, u8 ep_num, u8 isRx) MGC_WriteQMU32(base, MGC_O_QMU_TQCSR(ep_num), DQMU_QUE_START); } } -EXPORT_SYMBOL(mtk_qmu_enable); void mtk_qmu_stop(u8 ep_num, u8 isRx) { void __iomem *base = qmu_base; - int ret; - u32 value = 0; - - DBG(4, "ep_num=%d, isRx=%d\n", ep_num, isRx); if (!isRx) { if (MGC_ReadQMU16(base, @@ -799,34 +776,21 @@ void mtk_qmu_stop(u8 ep_num, u8 isRx) MGC_O_QMU_TQCSR(ep_num), DQMU_QUE_STOP); QMU_INFO("Stop TQ %d\n", ep_num); - - ret = readl_poll_timeout_atomic(base+ - MGC_O_QMU_TQCSR(ep_num), value, - !(value & DQMU_QUE_ACTIVE), 1, 1000); - if (ret) - QMU_ERR("Stop TQ %d failed\n", ep_num); } else { QMU_INFO("TQ %d already inactive\n", ep_num); } } else { - if (MGC_ReadQMU16(base, - MGC_O_QMU_RQCSR(ep_num)) & DQMU_QUE_ACTIVE) { - MGC_WriteQMU32(base, - MGC_O_QMU_RQCSR(ep_num), - DQMU_QUE_STOP); + if (MGC_ReadQMU16(base + , MGC_O_QMU_RQCSR(ep_num)) & DQMU_QUE_ACTIVE) { + MGC_WriteQMU32(base + , MGC_O_QMU_RQCSR(ep_num) + , DQMU_QUE_STOP); QMU_INFO("Stop RQ %d\n", ep_num); - - ret = readl_poll_timeout_atomic(base+ - MGC_O_QMU_RQCSR(ep_num), value, - !(value & DQMU_QUE_ACTIVE), 1, 1000); - if (ret) - QMU_ERR("Stop RQ %d failed\n", ep_num); } else { QMU_INFO("RQ %d already inactive\n", ep_num); } } } -EXPORT_SYMBOL(mtk_qmu_stop); static void mtk_qmu_disable(u8 ep_num, u8 isRx) { @@ -943,13 +907,6 @@ void qmu_done_rx(struct musb *musb, u8 ep_num) return; } request = &req->request; - if (!request) { - QMU_ERR( - "[RXD]%s Cannot get next usb_request of %d" - "but we should have next request and QMU has done.\n" - , __func__, ep_num); - return; - } /*Transfer PHY addr got from QMU register to VIR addr */ gpd_current = (struct TGPD *) @@ -1259,7 +1216,6 @@ void mtk_disable_q(struct musb *musb, u8 ep_num, u8 isRx) flush_ep_csr(musb, ep_num, isRx); } } -EXPORT_SYMBOL(mtk_disable_q); void h_qmu_done_rx(struct musb *musb, u8 ep_num) { diff --git a/drivers/misc/mediatek/usb20/mtk_qmu.h b/drivers/misc/mediatek/usb20/mtk_qmu.h index 2e9f72890680..8fa2cbf4b601 100644 --- a/drivers/misc/mediatek/usb20/mtk_qmu.h +++ b/drivers/misc/mediatek/usb20/mtk_qmu.h @@ -22,7 +22,7 @@ */ #define GPD_EXT_LEN (48) #define GPD_SZ (16) -#define DFT_MAX_GPD_NUM 144 +#define DFT_MAX_GPD_NUM 36 #ifndef MUSB_QMU_LIMIT_SUPPORT #define RXQ_NUM 8 #define TXQ_NUM 8 @@ -44,7 +44,7 @@ /*#define TXZLP NO_ZLP */ /* #define CFG_RX_ZLP_EN */ -#define CFG_RX_COZ_EN +/* #define CFG_RX_COZ_EN */ #define CFG_CS_CHECK /* #define CFG_EMPTY_CHECK */ diff --git a/drivers/misc/mediatek/usb20/musb.h b/drivers/misc/mediatek/usb20/musb.h index f6a5f295a4e6..eb9c4f389f8d 100644 --- a/drivers/misc/mediatek/usb20/musb.h +++ b/drivers/misc/mediatek/usb20/musb.h @@ -6,10 +6,6 @@ #ifndef __LINUX_USB_MUSB_H #define __LINUX_USB_MUSB_H -#include -#include -#include - /* The USB role is defined by the connector used on the board, so long as * standards are being followed. (Developer boards sometimes won't.) */ @@ -20,16 +16,25 @@ enum musb_mode { MUSB_OTG /* Mini-AB connector */ }; +/* add MUSB_ prefix to avoid + * confilicts with musbfsh.h, gang + */ + enum musb_fifo_style { - FIFO_RXTX, - FIFO_TX, - FIFO_RX -} __attribute__ ((packed)); + MUSB_FIFO_RXTX, + MUSB_FIFO_TX, + MUSB_FIFO_RX +} __packed; + +/* add MUSB_ prefix to + * avoid confilicts + * with musbfsh.h, gang + */ enum musb_buf_mode { - BUF_SINGLE, - BUF_DOUBLE -} __attribute__ ((packed)); + MUSB_BUF_SINGLE, + MUSB_BUF_DOUBLE +} __packed; enum musb_ep_mode { EP_CONT, @@ -97,7 +102,7 @@ struct musb_hdrc_config { struct musb_hdrc_platform_data { /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */ - u8 dr_mode; + u8 mode; /* for clk_get() */ const char *clock; @@ -129,64 +134,4 @@ struct musb_hdrc_platform_data { /* Platform specific struct musb_ops pointer */ const void *platform_ops; }; - -/** - * MUSB_DR_FORCE_NONE: automatically switch host and periperal mode - * by IDPIN signal. - * MUSB_DR_FORCE_HOST: force to enter host mode and override OTG - * IDPIN signal. - * MUSB_DR_FORCE_DEVICE: force to enter peripheral mode. - */ -enum mt_usb_dr_force_mode { - MUSB_DR_FORCE_NONE = 0, - MUSB_DR_FORCE_HOST, - MUSB_DR_FORCE_DEVICE, -}; - -/** - * MUSB_DR_OPERATION_NONE: force to tun off usb - * MUSB_DR_OPERATION_NORMAL: automatically switch host and - * periperal mode by usb role switch. - * MUSB_DR_OPERATION_HOST: force to enter host mode. - * MUSB_DR_OPERATION_DEVICE: force to enter peripheral mode. - */ -enum mt_usb_dr_operation_mode { - MUSB_DR_OPERATION_NONE = 0, - MUSB_DR_OPERATION_NORMAL, - MUSB_DR_OPERATION_HOST, - MUSB_DR_OPERATION_DEVICE, -}; - -/** - * @vbus: vbus 5V used by host mode - * @edev: external connector used to detect vbus and iddig changes - * @vbus_nb: notifier for vbus detection - * @vbus_work : work of vbus detection notifier, used to avoid sleep in - * notifier callback which is atomic context - * @vbus_event : event of vbus detecion notifier - * @id_nb : notifier for iddig(idpin) detection - * @id_work : work of iddig detection notifier - * @id_event : event of iddig detecion notifier - * @role_sw : use USB Role Switch to support dual-role switch, can't use - * extcon at the same time, and extcon is deprecated. - * @role_sw_used : true when the USB Role Switch is used. - * @manual_drd_enabled: it's true when supports dual-role device by debugfs - * to switch host/device modes depending on user input. - */ -struct otg_switch_mtk { - struct regulator *vbus; - struct extcon_dev *edev; - struct notifier_block vbus_nb; - struct work_struct vbus_work; - unsigned long vbus_event; - struct notifier_block id_nb; - struct work_struct id_work; - unsigned long id_event; - struct usb_role_switch *role_sw; - bool role_sw_used; - bool manual_drd_enabled; - u32 sw_state; - enum usb_role latest_role; - enum mt_usb_dr_operation_mode op_mode; -}; #endif /* __LINUX_USB_MUSB_H */ diff --git a/drivers/misc/mediatek/usb20/musb_core.c b/drivers/misc/mediatek/usb20/musb_core.c index 27b2ce4dfe92..747b35404951 100644 --- a/drivers/misc/mediatek/usb20/musb_core.c +++ b/drivers/misc/mediatek/usb20/musb_core.c @@ -21,43 +21,52 @@ #include #endif -#include -#include +#include "musb_core.h" +#include "musbhsdma.h" #ifdef CONFIG_OF #include #include -#include +#include "mtk_musb.h" #endif -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - -#include - +static void (*usb_hal_dpidle_request_fptr)(int); +void usb_hal_dpidle_request(int mode) +{ + if (usb_hal_dpidle_request_fptr) + usb_hal_dpidle_request_fptr(mode); +} +void register_usb_hal_dpidle_request(void (*function)(int)) +{ + usb_hal_dpidle_request_fptr = function; +} +static void (*usb_hal_disconnect_check_fptr)(void); +void usb_hal_disconnect_check(void) +{ + if (usb_hal_disconnect_check_fptr) + usb_hal_disconnect_check_fptr(); +} +void register_usb_hal_disconnect_check(void (*function)(void)) +{ + usb_hal_disconnect_check_fptr = function; +} int musb_fake_CDP; - -/* - * kernel_init_done should be set in early-init stage through +/* kernel_init_done should be set in + * early-init stage through * init.$platform.usb.rc - * Fixme: kernel_init_done should be move to mt6765/usb20_host.c */ int kernel_init_done; -EXPORT_SYMBOL(kernel_init_done); -module_param(kernel_init_done, int, 0644); - +int musb_force_on; int musb_host_dynamic_fifo = 1; int musb_host_dynamic_fifo_usage_msk; bool musb_host_db_enable; bool musb_host_db_workaround1; bool musb_host_db_workaround2; -EXPORT_SYMBOL(musb_host_db_workaround2); - long musb_host_db_delay_ns; long musb_host_db_workaround_cnt; int mtk_host_audio_free_ep_udelay = 1000; module_param(musb_fake_CDP, int, 0644); +module_param(kernel_init_done, int, 0644); module_param(musb_host_dynamic_fifo, int, 0644); module_param(musb_host_dynamic_fifo_usage_msk, int, 0644); module_param(musb_host_db_enable, bool, 0644); @@ -72,8 +81,6 @@ int mtk_host_qmu_concurrent = 1; /* | (PIPE_BULK + 1) | (PIPE_INTERRUPT+ 1) */ int mtk_host_qmu_pipe_msk = (PIPE_ISOCHRONOUS + 1); int mtk_host_qmu_force_isoc_restart = 1; -EXPORT_SYMBOL(mtk_host_qmu_force_isoc_restart); - int mtk_host_active_dev_cnt; module_param(mtk_host_qmu_concurrent, int, 0644); module_param(mtk_host_qmu_pipe_msk, int, 0644); @@ -98,21 +105,23 @@ module_param(use_mtk_audio, int, 0644); #include "musb_qmu.h" u32 dma_channel_setting, qmu_ioc_setting; +int mtk_qmu_dbg_level = LOG_WARN; +int mtk_qmu_max_gpd_num; +int isoc_ep_end_idx = 3; +int isoc_ep_gpd_count = 260; +module_param(mtk_qmu_dbg_level, int, 0644); +module_param(mtk_qmu_max_gpd_num, int, 0644); +module_param(isoc_ep_end_idx, int, 0644); +module_param(isoc_ep_gpd_count, int, 0644); #endif DEFINE_SPINLOCK(usb_io_lock); -EXPORT_SYMBOL(usb_io_lock); - unsigned int musb_debug; -EXPORT_SYMBOL(musb_debug); - unsigned int musb_debug_limit = 1; -EXPORT_SYMBOL(musb_debug_limit); - unsigned int musb_uart_debug = 1; -EXPORT_SYMBOL(musb_uart_debug); - +struct musb *mtk_musb; unsigned int musb_speed = 1; +bool mtk_usb_power; struct timeval writeTime; struct timeval interruptTime; @@ -127,9 +136,14 @@ static const struct of_device_id apusb_of_ids[] = { {}, }; +/* void __iomem *USB_BASE; */ + +module_param_named(speed, musb_speed, uint, 0644); +MODULE_PARM_DESC(debug, "USB speed configuration. default = 1, high speed"); module_param_named(debug, musb_debug, uint, 0644); MODULE_PARM_DESC(debug, "Debug message level. Default = 0"); module_param_named(debug_limit, musb_debug_limit, uint, 0644); +module_param_named(dbg_uart, musb_uart_debug, uint, 0644); #define TA_WAIT_BCON(m) max_t(int, (m)->a_wait_bcon, OTG_TIME_A_WAIT_BCON) @@ -659,7 +673,7 @@ EXPORT_SYMBOL_GPL(musb_hnp_stop); * @param power */ static struct musb_fifo_cfg ep0_cfg = { - .style = FIFO_RXTX, .maxpacket = 64, .ep_mode = EP_CONT, + .style = MUSB_FIFO_RXTX, .maxpacket = 64, .ep_mode = EP_CONT, }; static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, u8 devctl) @@ -1127,10 +1141,8 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, u8 devctl) * Recover usb phy setting and allow it can be * enter suspend status */ -#ifdef CONFIG_MTK_MUSB_PHY USBPHY_CLR8(0x68, 0x08); USBPHY_CLR8(0x6a, 0x04); -#endif #ifdef CONFIG_MTK_MUSB_QMU_SUPPORT musb_disable_q_all(musb); #endif @@ -1333,7 +1345,6 @@ void musb_generic_disable(struct musb *musb) musb_writeb(musb->mregs, MUSB_INTRUSB, 0xEF); #endif } -EXPORT_SYMBOL(musb_start); static void gadget_stop(struct musb *musb) { @@ -1476,7 +1487,6 @@ void musb_stop(struct musb *musb) mt_usb_dual_role_changed(musb); #endif } -EXPORT_SYMBOL(musb_stop); static void musb_shutdown(struct platform_device *pdev) { @@ -1540,7 +1550,7 @@ static int fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, c_size = size - 3; #ifdef NEVER - if (cfg->mode == BUF_DOUBLE) { + if (cfg->mode == MUSB_BUF_DOUBLE) { if ((offset + (maxpacket << 1)) > (musb->fifo_size)) return -EMSGSIZE; c_size |= MUSB_FIFOSZ_DPB; @@ -1552,7 +1562,7 @@ static int fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, #endif switch (cfg->style) { - case FIFO_TX: + case MUSB_FIFO_TX: DBG(1, "Tx ep:%d fifo size:%d fifo address:%x\n", hw_ep->epnum, maxpacket, c_off); /* musb_write_txfifosz(mbase, c_size); */ @@ -1562,7 +1572,7 @@ static int fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, hw_ep->ep_in.fifo_size = maxpacket; hw_ep->ep_in.fifo_mode = cfg->mode; break; - case FIFO_RX: + case MUSB_FIFO_RX: DBG(1, "Rx ep:%d fifo size:%d fifo address:%x\n" , hw_ep->epnum, maxpacket, c_off); /* musb_write_rxfifosz(mbase, c_size); */ @@ -1572,7 +1582,7 @@ static int fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, hw_ep->ep_out.fifo_size = maxpacket; hw_ep->ep_out.fifo_mode = cfg->mode; break; - case FIFO_RXTX: + case MUSB_FIFO_RXTX: /* musb_write_txfifosz(mbase, c_size); */ /* musb_write_txfifoadd(mbase, c_off); */ hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); @@ -1667,7 +1677,7 @@ static int fifo_setup_for_host(struct musb *musb, struct musb_hw_ep *hw_ep, maxpacket = 1 << size; c_size = size - 3; - if (cfg->mode == BUF_DOUBLE) { + if (cfg->mode == MUSB_BUF_DOUBLE) { if ((offset + (maxpacket << 1)) > (musb->fifo_size)) return -EMSGSIZE; c_size |= MUSB_FIFOSZ_DPB; @@ -1678,7 +1688,7 @@ static int fifo_setup_for_host(struct musb *musb, struct musb_hw_ep *hw_ep, musb_writeb(mbase, MUSB_INDEX, hw_ep->epnum); switch (cfg->style) { - case FIFO_TX: + case MUSB_FIFO_TX: DBG(4, "Tx ep %d fifo size is %d fifo address is %x\n", hw_ep->epnum, c_size, c_off); musb_write_txfifosz(mbase, c_size); @@ -1686,7 +1696,7 @@ static int fifo_setup_for_host(struct musb *musb, struct musb_hw_ep *hw_ep, hw_ep->tx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); hw_ep->max_packet_sz_tx = maxpacket; break; - case FIFO_RX: + case MUSB_FIFO_RX: DBG(4, "Rx ep %d fifo size is %d fifo address is %x\n", hw_ep->epnum, c_size, c_off); musb_write_rxfifosz(mbase, c_size); @@ -1694,7 +1704,7 @@ static int fifo_setup_for_host(struct musb *musb, struct musb_hw_ep *hw_ep, hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); hw_ep->max_packet_sz_rx = maxpacket; break; - case FIFO_RXTX: + case MUSB_FIFO_RXTX: musb_write_txfifosz(mbase, c_size); musb_write_txfifoadd(mbase, c_off); hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); @@ -1772,7 +1782,7 @@ int ep_config_from_table_for_host(struct musb *musb) return 0; } -EXPORT_SYMBOL(ep_config_from_table_for_host); + /* * ep_config_from_hw - when MUSB_C_DYNFIFO_DEF is false @@ -2398,10 +2408,6 @@ static int musb_init_controller musb->min_power = plat->min_power; musb->ops = plat->platform_ops; musb->nIrq = nIrq; - - glue->mtk_musb = mtk_musb; - mtk_musb->glue = glue; - /* The musb_platform_init() call: * - adjusts musb->mregs * - sets the musb->isr @@ -2539,8 +2545,6 @@ static int musb_init_controller #endif status = musb_gadget_setup(musb); - if (status < 0) - goto fail3; /* only enable on iddig mode */ #ifndef CONFIG_MTK_USB_TYPEC @@ -2549,24 +2553,14 @@ static int musb_init_controller #endif #endif -#ifdef CONFIG_MTK_MUSB_DUAL_ROLE - /* - * Dual-role-switch will turn off USB after initialize done. - * Therefore, no need to power off MUSB when Dual-role-switch is - * enabled. - */ - status = mt_usb_otg_switch_init(glue); - if (status < 0) { - DBG(0, "failed to initialize switch\n"); - goto fail3; - } -#else - /* initial done, turn off usb */ + /*initial done, turn off usb */ musb_platform_disable(musb); musb_platform_unprepare_clk(musb); -#endif -#ifdef CONFIG_PROC_FS + if (status < 0) + goto fail3; + +#ifdef CONFIG_DEBUG_FS status = musb_init_debugfs(musb); if (status < 0) goto fail4; @@ -2582,7 +2576,7 @@ static int musb_init_controller return 0; -#ifdef CONFIG_PROC_FS +#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_SYSFS fail5: musb_exit_debugfs(musb); @@ -2624,12 +2618,7 @@ static int musb_probe(struct platform_device *pdev) void __iomem *base; void __iomem *pbase; struct resource *iomem; - - if (usb_disabled()) - return 0; - - pr_info("%s: version " MUSB_VERSION ", ?dma?, otg (peripheral+host)\n" - , musb_driver_name); + static struct device *efuse_dev; iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap(dev, iomem->start, resource_size(iomem)); @@ -2649,6 +2638,12 @@ static int musb_probe(struct platform_device *pdev) , __func__, (unsigned long)base, (unsigned long)pbase, irq); status = musb_init_controller(dev, irq, base, pbase); + if (!status) { + efuse_dev = &pdev->dev; + /* get phy efuse val */ + mtk_musb->efuse_val = usb_phy_get_efuse_val(efuse_dev); + } + return status; } @@ -2663,7 +2658,7 @@ static int musb_remove(struct platform_device *pdev) * - Peripheral mode: peripheral is deactivated (or never-activated) * - OTG mode: both roles are deactivated (or never-activated) */ -#ifdef CONFIG_PROC_FS +#ifdef CONFIG_DEBUG_FS musb_exit_debugfs(musb); #endif musb_shutdown(pdev); @@ -2701,6 +2696,7 @@ static void musb_save_context(struct musb *musb) musb->context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE); musb->context.index = musb_readb(musb_base, MUSB_INDEX); musb->context.devctl = musb_readb(musb_base, MUSB_DEVCTL); + musb->context.l1_int = musb_readl(musb_base, USB_L1INTM); for (i = 0; i < musb->config->num_eps; ++i) { @@ -2807,17 +2803,7 @@ bool __attribute__ ((weak)) usb_pre_clock(bool enable) static int musb_suspend_noirq(struct device *dev) { struct musb *musb = dev_to_musb(dev); - - if (is_host_active(musb)) { - if (musb->host_suspend) { - DBG(0, "host suspend\n"); - musb_platform_enable_wakeup(musb); - musb_platform_disable_clk(musb); - musb_platform_unprepare_clk(musb); - usb_hal_dpidle_request(USB_DPIDLE_SUSPEND); - } - return 0; - } + /*unsigned long flags; */ /*No need spin lock in xxx_noirq() */ /*spin_lock_irqsave(&musb->lock, flags); */ @@ -2831,9 +2817,7 @@ static int musb_suspend_noirq(struct device *dev) musb_platform_enable_clk(musb); musb_save_context(musb); -#ifdef CONFIG_MTK_UART_USB_SWITCH usb_phy_context_save(); -#endif /*Turn off USB clock, after finishing reading regs */ musb_platform_disable_clk(musb); @@ -2844,7 +2828,7 @@ static int musb_suspend_noirq(struct device *dev) #endif usb_pre_clock(false); - /* spin_unlock_irqrestore(&musb->lock, flags); */ + /*spin_unlock_irqrestore(&musb->lock, flags); */ return 0; } @@ -2853,20 +2837,9 @@ static int musb_resume_noirq(struct device *dev) { struct musb *musb = dev_to_musb(dev); - if (is_host_active(musb)) { - if (musb->host_suspend) { - DBG(0, "host resume\n"); - usb_hal_dpidle_request(USB_DPIDLE_RESUME); - musb_platform_prepare_clk(musb); - musb_platform_enable_clk(musb); - musb_platform_disable_wakeup(musb); - } - return 0; - } - usb_pre_clock(true); - /* Turn on USB clock, before writing a batch of regs */ + /*Turn on USB clock, before writing a batch of regs */ mtk_usb_power = true; #ifdef CONFIG_MTK_MUSB_PORT0_LOWPOWER_MODE mt_usb_clock_prepare(); @@ -2875,9 +2848,7 @@ static int musb_resume_noirq(struct device *dev) musb_platform_enable_clk(musb); musb_restore_context(musb); -#ifdef CONFIG_MTK_UART_USB_SWITCH usb_phy_context_restore(); -#endif /*Turn off USB clock, after finishing writing regs */ musb_platform_disable_clk(musb); musb_platform_unprepare_clk(musb); @@ -2913,7 +2884,6 @@ static struct platform_driver musb_driver = { .remove = musb_remove, .shutdown = musb_shutdown, }; -module_platform_driver(musb_driver); /*-------------------------------------------------------------------------*/ @@ -2924,7 +2894,6 @@ static int __init musb_init(void) pr_info("%s: version " MUSB_VERSION ", ?dma?, otg (peripheral+host)\n" , musb_driver_name); - /* Could be removed here if musb_core and musb_plat built-in together */ return platform_driver_register(&musb_driver); } module_init(musb_init); diff --git a/drivers/misc/mediatek/usb20/musb_core.h b/drivers/misc/mediatek/usb20/musb_core.h index 3990eb742e50..d6a8291f7622 100644 --- a/drivers/misc/mediatek/usb20/musb_core.h +++ b/drivers/misc/mediatek/usb20/musb_core.h @@ -16,9 +16,7 @@ #include #include #include -#include -#include -#include +#include "musb.h" #include #include #include @@ -41,6 +39,7 @@ struct musb; struct musb_hw_ep; struct musb_ep; extern int musb_fake_CDP; +extern int kernel_init_done; extern int musb_force_on; extern int musb_host_dynamic_fifo; extern int musb_host_dynamic_fifo_usage_msk; @@ -52,6 +51,7 @@ extern long musb_host_db_delay_ns; extern long musb_host_db_workaround_cnt; extern int mtk_host_audio_free_ep_udelay; +extern struct musb *mtk_musb; extern bool mtk_usb_power; extern ktime_t ktime_ready; extern int ep_config_from_table_for_host(struct musb *musb); @@ -98,6 +98,10 @@ extern void musb_bug(void); #include #include "musb_host.h" +#ifdef CONFIG_DUAL_ROLE_USB_INTF +#include +#endif + /* NOTE: otg and peripheral-only state machines start at B_IDLE. * OTG or host-only go to A_IDLE when ID is sensed. */ @@ -180,6 +184,8 @@ enum musb_g_ep0_state { #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ #endif + + /*************************** REGISTER ACCESS ********************************/ #define musb_ep_select(_mbase, _epnum) \ @@ -239,7 +245,6 @@ struct musb_platform_ops { void (*disable_clk)(struct musb *musb); void (*prepare_clk)(struct musb *musb); void (*unprepare_clk)(struct musb *musb); - void (*enable_wakeup)(struct musb *musb, bool enable); }; /* @@ -384,8 +389,7 @@ struct musb { #endif struct usb_phy *xceiv; - struct phy *phy; - + unsigned int efuse_val; u8 xceiv_event; int nIrq; @@ -401,6 +405,7 @@ struct musb { u8 nr_endpoints; int (*board_set_power)(int state); + void (*usb_rev6_setting)(int value); u8 min_power; /* vbus for periph, in mA/2 */ @@ -484,17 +489,11 @@ struct musb { enum usb_otg_event otg_event; #endif struct workqueue_struct *st_wq; +#ifdef CONFIG_DUAL_ROLE_USB_INTF + struct dual_role_phy_instance *dr_usb; +#endif /* CONFIG_DUAL_ROLE_USB_INTF */ struct power_supply *usb_psy; struct notifier_block psy_nb; - -#if defined(CONFIG_USB_ROLE_SWITCH) - struct otg_switch_mtk *otg_sx; -#endif - struct mt_usb_glue *glue; - - /* host suspend */ - bool host_suspend; - bool usb_connected; }; static inline struct musb *gadget_to_musb(struct usb_gadget *g) @@ -639,18 +638,6 @@ static inline void musb_platform_unprepare_clk(struct musb *musb) musb->ops->unprepare_clk(musb); } -static inline void musb_platform_enable_wakeup(struct musb *musb) -{ - if (musb->ops->enable_wakeup) - musb->ops->enable_wakeup(musb, true); -} - -static inline void musb_platform_disable_wakeup(struct musb *musb) -{ - if (musb->ops->enable_wakeup) - musb->ops->enable_wakeup(musb, false); -} - /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0) */ static inline const char *otg_state_string(enum usb_otg_state state) { @@ -661,13 +648,10 @@ enum { USB_DPIDLE_ALLOWED = 0, USB_DPIDLE_FORBIDDEN, USB_DPIDLE_SRAM, - USB_DPIDLE_TIMER, - USB_DPIDLE_SUSPEND, - USB_DPIDLE_RESUME + USB_DPIDLE_TIMER }; extern void usb_hal_dpidle_request(int mode); extern void register_usb_hal_dpidle_request(void (*function)(int)); -extern void usb_hal_disconnect_check(void); extern void register_usb_hal_disconnect_check(void (*function)(void)); extern void wake_up_bat(void); extern void wait_tx_done(u8 epnum, unsigned int timeout_ns); diff --git a/drivers/misc/mediatek/usb20/musb_debug.h b/drivers/misc/mediatek/usb20/musb_debug.h index d057cd16e397..095ac2c4d099 100644 --- a/drivers/misc/mediatek/usb20/musb_debug.h +++ b/drivers/misc/mediatek/usb20/musb_debug.h @@ -6,8 +6,6 @@ #ifndef __MUSB_LINUX_DEBUG_H__ #define __MUSB_LINUX_DEBUG_H__ -extern struct musb *musb; - #define yprintk(facility, format, args...) \ pr_notice("[MUSB]%s %d: " format, \ __func__, __LINE__, ## args) @@ -44,12 +42,12 @@ extern struct musb *musb; extern unsigned int musb_debug; extern unsigned int musb_debug_limit; extern unsigned int musb_uart_debug; -extern unsigned int musb_speed; static inline int _dbg_level(unsigned int level) { return level <= musb_debug; } + #ifdef DBG #undef DBG #endif @@ -73,6 +71,5 @@ static inline int _dbg_level(unsigned int level) /* extern const char *otg_state_string(struct musb *); */ extern int musb_init_debugfs(struct musb *musb) __attribute__((weak)); extern void musb_exit_debugfs(struct musb *musb) __attribute__((weak)); -extern void musb_dr_debugfs_init(struct musb *musb); #endif /* __MUSB_LINUX_DEBUG_H__ */ diff --git a/drivers/misc/mediatek/usb20/musb_debugfs.c b/drivers/misc/mediatek/usb20/musb_debugfs.c index 7536059b31ae..fc52b28df774 100644 --- a/drivers/misc/mediatek/usb20/musb_debugfs.c +++ b/drivers/misc/mediatek/usb20/musb_debugfs.c @@ -7,39 +7,15 @@ #include #include #include -#include +#include #include #include #include -#ifdef CONFIG_MTK_MUSB_PHY -#include -#endif - #define MUSB_OTG_CSR0 0x102 -#include -#include -#include -#include - -#define PROC_DIR_MTK_USB "mtk_usb" -#define PROC_FILE_REGDUMP "mtk_usb/regdump" -#define PROC_FILE_TESTMODE "mtk_usb/testmode" -#define PROC_FILE_REGW "mtk_usb/regw" -#define PROC_FILE_REGR "mtk_usb/regr" -#define PROC_FILE_SPEED "mtk_usb/speed" - -#define PROC_FILE_NUM 5 -static struct proc_dir_entry *proc_files[PROC_FILE_NUM] = { - NULL, NULL, NULL, NULL, NULL}; - -#define PROC_FILE_MODE "mtk_usb/mode" -#define PROC_FILE_VBUS "mtk_usb/vbus" - -#define PROC_FILE_DR_NUM 2 -static struct proc_dir_entry *proc_dr_files[PROC_FILE_DR_NUM] = { - NULL, NULL}; +#include "musb_core.h" +#include "musb_debug.h" struct musb_register_map { char *name; @@ -102,6 +78,8 @@ static const struct musb_register_map musb_regmap[] = { {} /* Terminating Entry */ }; +static struct dentry *musb_debugfs_root; + static int musb_regdump_show(struct seq_file *s, void *unused) { struct musb *musb = s->private; @@ -131,7 +109,7 @@ static int musb_regdump_show(struct seq_file *s, void *unused) static int musb_regdump_open(struct inode *inode, struct file *file) { - return single_open(file, musb_regdump_show, PDE_DATA(inode)); + return single_open(file, musb_regdump_show, inode->i_private); } static int musb_test_mode_show(struct seq_file *s, void *unused) @@ -177,7 +155,7 @@ static const struct file_operations musb_regdump_fops = { static int musb_test_mode_open(struct inode *inode, struct file *file) { - return single_open(file, musb_test_mode_show, PDE_DATA(inode)); + return single_open(file, musb_test_mode_show, inode->i_private); } void musbdebugfs_otg_write_fifo(u16 len, u8 *buf, struct musb *mtk_musb) @@ -394,7 +372,7 @@ static int musb_regw_show(struct seq_file *s, void *unused) static int musb_regw_open(struct inode *inode, struct file *file) { - return single_open(file, musb_regw_show, PDE_DATA(inode)); + return single_open(file, musb_regw_show, inode->i_private); } static ssize_t musb_regw_mode_write @@ -453,13 +431,11 @@ static ssize_t musb_regw_mode_write pr_notice("Must use 32bits alignment address\n"); return count; } -#ifdef CONFIG_MTK_MUSB_PHY pr_notice("Phy base adddr 0x%lx, Write 0x%x[0x%x]\n", (unsigned long)((void __iomem *) (((unsigned long)musb->xceiv->io_priv) + 0x800)), offset, data); USBPHY_WRITE32(offset, data); -#endif } return count; @@ -485,7 +461,7 @@ static int musb_regr_show(struct seq_file *s, void *unused) static int musb_regr_open(struct inode *inode, struct file *file) { - return single_open(file, musb_regr_show, PDE_DATA(inode)); + return single_open(file, musb_regr_show, inode->i_private); } static ssize_t musb_regr_mode_write(struct file *file, @@ -536,13 +512,11 @@ static ssize_t musb_regr_mode_write(struct file *file, pr_notice("Must use 32bits alignment address\n"); return count; } -#ifdef CONFIG_MTK_MUSB_PHY pr_notice("Read Phy base adddr 0x%lx, Read 0x%x[0x%x]\n", (unsigned long)((void __iomem *) (((unsigned long)musb->xceiv->io_priv) + 0x800)), offset, USBPHY_READ32(offset)); -#endif } return count; @@ -556,221 +530,58 @@ static const struct file_operations musb_regr_fops = { .release = single_release, }; -static int musb_speed_show(struct seq_file *s, void *unused) -{ - seq_printf(s, "musb_speed = %d\n", musb_speed); - return 0; -} - -static int musb_speed_open(struct inode *inode, struct file *file) -{ - return single_open(file, musb_speed_show, PDE_DATA(inode)); -} - -static ssize_t musb_speed_write(struct file *file, - const char __user *ubuf, size_t count, loff_t *ppos) -{ - char buf[20]; - unsigned int val; - - memset(buf, 0x00, sizeof(buf)); - - if (copy_from_user(buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - - if (kstrtouint(buf, 10, &val) == 0 && val >= 0 && val <= 1) - musb_speed = val; - else - return -EINVAL; - - return count; -} - -static const struct file_operations musb_speed_fops = { - .open = musb_speed_open, - .write = musb_speed_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - int musb_init_debugfs(struct musb *musb) { - int ret, idx = 0; - - proc_mkdir(PROC_DIR_MTK_USB, NULL); + struct dentry *root; + struct dentry *file; + int ret; - proc_files[idx] = proc_create_data(PROC_FILE_REGDUMP, 0444, - NULL, &musb_regdump_fops, musb); - if (!proc_files[idx]) { + root = debugfs_create_dir("musb", NULL); + if (!root) { ret = -ENOMEM; - goto err1; + goto err0; } - idx++; - proc_files[idx] = proc_create_data(PROC_FILE_TESTMODE, 0644, - NULL, &musb_test_mode_fops, musb); - if (!proc_files[idx]) { + file = debugfs_create_file("regdump", 0444, + root, musb, &musb_regdump_fops); + if (!file) { ret = -ENOMEM; goto err1; } - idx++; - proc_files[idx] = proc_create_data(PROC_FILE_REGW, 0644, - NULL, &musb_regw_fops, musb); - if (!proc_files[idx]) { + file = debugfs_create_file("testmode", 0644, + root, musb, &musb_test_mode_fops); + if (!file) { ret = -ENOMEM; goto err1; } - idx++; - proc_files[idx] = proc_create_data(PROC_FILE_REGR, 0644, - NULL, &musb_regr_fops, musb); - if (!proc_files[idx]) { + file = debugfs_create_file("regw", 0644, + root, musb, &musb_regw_fops); + if (!file) { ret = -ENOMEM; goto err1; } - idx++; - proc_files[idx] = proc_create_data(PROC_FILE_SPEED, 0644, - NULL, &musb_speed_fops, musb); - if (!proc_files[idx]) { + file = debugfs_create_file("regr", 0644 + , root, musb, &musb_regr_fops); + if (!file) { ret = -ENOMEM; goto err1; } + musb_debugfs_root = root; + return 0; err1: - for (; idx >= 0; idx--) { - if (proc_files[idx]) { - proc_remove(proc_files[idx]); - proc_files[idx] = NULL; - } - } + debugfs_remove_recursive(root); +err0: return ret; } void /* __init_or_exit */ musb_exit_debugfs(struct musb *musb) { - int idx = 0; - - for (; idx < PROC_FILE_NUM; idx++) { - if (proc_files[idx]) { - proc_remove(proc_files[idx]); - proc_files[idx] = NULL; - } - } -} - -static int musb_mode_show(struct seq_file *sf, void *unused) -{ - struct musb *musb = sf->private; - struct mt_usb_glue *glue = - container_of(&musb, struct mt_usb_glue, mtk_musb); - - seq_printf(sf, "current mode: %s(%s drd)\n(echo device/host)\n", - musb->is_host ? "host" : "device", - glue->otg_sx.manual_drd_enabled ? "manual" : "auto"); - - return 0; -} - -static int musb_mode_open(struct inode *inode, struct file *file) -{ - return single_open(file, musb_mode_show, PDE_DATA(inode)); -} - -static ssize_t musb_mode_write(struct file *file, const char __user *ubuf, - size_t count, loff_t *ppos) -{ - struct seq_file *sf = file->private_data; - struct musb *musb = sf->private; - char buf[16]; - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - - if (!strncmp(buf, "host", 4) && !musb->is_host) { - mt_usb_mode_switch(musb, 1); - } else if (!strncmp(buf, "device", 6) && musb->is_host) { - mt_usb_mode_switch(musb, 0); - } else { - dev_err(musb->controller, "wrong or duplicated setting\n"); - return -EINVAL; - } - - return count; -} - -static const struct file_operations musb_mode_fops = { - .open = musb_mode_open, - .write = musb_mode_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int musb_vbus_show(struct seq_file *sf, void *unused) -{ - struct musb *musb = sf->private; - struct mt_usb_glue *glue = - container_of(&musb, struct mt_usb_glue, mtk_musb); - struct otg_switch_mtk *otg_sx = &glue->otg_sx; - - seq_printf(sf, "vbus state: %s\n(echo on/off)\n", - regulator_is_enabled(otg_sx->vbus) ? "on" : "off"); - - return 0; -} - -static int musb_vbus_open(struct inode *inode, struct file *file) -{ - return single_open(file, musb_vbus_show, PDE_DATA(inode)); -} - -static ssize_t musb_vbus_write(struct file *file, const char __user *ubuf, - size_t count, loff_t *ppos) -{ - struct seq_file *sf = file->private_data; - struct musb *musb = sf->private; - struct mt_usb_glue *glue = - container_of(&musb, struct mt_usb_glue, mtk_musb); - struct otg_switch_mtk *otg_sx = &glue->otg_sx; - char buf[16]; - bool enable; - - if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) - return -EFAULT; - - if (kstrtobool(buf, &enable)) { - dev_err(musb->controller, "wrong setting\n"); - return -EINVAL; - } - - mt_usb_set_vbus(otg_sx, enable); - - return count; -} - -static const struct file_operations musb_vbus_fops = { - .open = musb_vbus_open, - .write = musb_vbus_write, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -void musb_dr_debugfs_init(struct musb *musb) -{ - int idx = 0; - - proc_mkdir(PROC_DIR_MTK_USB, NULL); - - proc_dr_files[idx++] = proc_create_data(PROC_FILE_MODE, 0644, - NULL, &musb_mode_fops, musb); - - proc_dr_files[idx++] = proc_create_data(PROC_FILE_VBUS, 0644, - NULL, &musb_vbus_fops, musb); + debugfs_remove_recursive(musb_debugfs_root); } diff --git a/drivers/misc/mediatek/usb20/musb_dr.c b/drivers/misc/mediatek/usb20/musb_dr.c deleted file mode 100644 index 01ff4b814051..000000000000 --- a/drivers/misc/mediatek/usb20/musb_dr.c +++ /dev/null @@ -1,482 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * musb_dr.c - dual role switch and host glue layer - * - * Copyright (C) 2021 MediaTek Inc. - * - * Author: Macpaul Lin - */ - -#include - -#include -#include -#include -#include -#ifdef CONFIG_DEBUG_FS -#include -#endif - -#if IS_ENABLED(CONFIG_MTK_BASE_POWER) -#include "mtk_spm_resource_req.h" -#endif - -#define USB2_PORT 2 - -enum mt_usb_vbus_id_state { - MUSB_ID_FLOAT = 1, - MUSB_ID_GROUND, - MUSB_VBUS_OFF, - MUSB_VBUS_VALID, -}; - -static char *mailbox_state_string(enum mt_usb_vbus_id_state state) -{ - switch (state) { - case MUSB_ID_FLOAT: - return "ID_FLOAT"; - case MUSB_ID_GROUND: - return "ID_GROUND"; - case MUSB_VBUS_OFF: - return "VBUS_OFF"; - case MUSB_VBUS_VALID: - return "VBUS_VALID"; - default: - return "UNKNOWN"; - } -} - -int mt_usb_set_vbus(struct otg_switch_mtk *otg_sx, int is_on) -{ - struct mt_usb_glue *glue = - container_of(otg_sx, struct mt_usb_glue, otg_sx); - struct musb *musb = glue->mtk_musb; - struct regulator *vbus = otg_sx->vbus; - int ret; - - /* vbus is optional */ - if (!vbus) - return 0; - - dev_dbg(musb->controller, "%s: turn %s\n", __func__, is_on ? "on" : "off"); - - if (is_on) { - ret = regulator_enable(vbus); - if (ret) { - dev_err(musb->controller, "vbus regulator enable failed\n"); - return ret; - } - } else { - regulator_disable(vbus); - } - - return 0; -} -EXPORT_SYMBOL(mt_usb_set_vbus); - -static void mt_usb_gadget_disconnect(struct musb *musb) -{ - /* notify gadget driver */ - if (musb->g.speed == USB_SPEED_UNKNOWN) - return; - - if (musb->gadget_driver && musb->gadget_driver->disconnect) { - musb->gadget_driver->disconnect(&musb->g); - musb->g.speed = USB_SPEED_UNKNOWN; - } - - usb_gadget_set_state(&musb->g, USB_STATE_NOTATTACHED); -} - -/* - * switch to host: -> MUSB_VBUS_OFF --> MUSB_ID_GROUND - * switch to device: -> MUSB_ID_FLOAT --> MUSB_VBUS_VALID - */ -static void mt_usb_set_mailbox(struct otg_switch_mtk *otg_sx, - enum mt_usb_vbus_id_state status) -{ - struct mt_usb_glue *glue = - container_of(otg_sx, struct mt_usb_glue, otg_sx); - struct musb *musb = glue->mtk_musb; - int i; - - dev_info(musb->controller, "mailbox %s\n", mailbox_state_string(status)); - switch (status) { - case MUSB_ID_GROUND: - mt_usb_set_vbus(otg_sx, 1); - musb->is_ready = true; - otg_sx->sw_state |= MUSB_ID_GROUND; - mt_usb_host_connect(0); - break; - case MUSB_ID_FLOAT: - mt_usb_host_disconnect(0); - musb->is_ready = false; - /* turn off VBUS until do_host_work switch to DEV mode */ - for (i = 0; i < 6; i++) { - if (!musb->is_host) - break; - mdelay(50); - } - mt_usb_set_vbus(otg_sx, 0); - otg_sx->sw_state &= ~MUSB_ID_GROUND; - break; - case MUSB_VBUS_OFF: - /* ToDo or fix: killing any outstanding requests */ - mt_usb_set_vbus(otg_sx, false); - musb->usb_connected = 0; - musb->is_host = false; - mt_usb_disconnect(); /* sync to UI */ - mt_usb_gadget_disconnect(musb); /* sync to UI */ - otg_sx->sw_state &= ~MUSB_VBUS_VALID; - break; - case MUSB_VBUS_VALID: - mt_usb_set_vbus(otg_sx, true); - /* avoid suspend when works as device */ - otg_sx->sw_state |= MUSB_VBUS_VALID; - musb->usb_connected = 1; - mt_usb_connect(); - break; - default: - dev_err(musb->controller, "invalid state\n"); - } -} - -static void mt_usb_id_work(struct work_struct *work) -{ - struct otg_switch_mtk *otg_sx = - container_of(work, struct otg_switch_mtk, id_work); - - if (otg_sx->id_event) - mt_usb_set_mailbox(otg_sx, MUSB_ID_GROUND); - else - mt_usb_set_mailbox(otg_sx, MUSB_ID_FLOAT); -} - -static void mt_usb_vbus_work(struct work_struct *work) -{ - struct otg_switch_mtk *otg_sx = - container_of(work, struct otg_switch_mtk, vbus_work); - - if (otg_sx->vbus_event) - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_VALID); - else - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_OFF); -} - -/* - * @mt_usb_id_notifier is called in atomic context, but @mt_usb_set_mailbox - * may sleep, so use work queue here - */ -static int mt_usb_id_notifier(struct notifier_block *nb, - unsigned long event, void *ptr) -{ - struct otg_switch_mtk *otg_sx = - container_of(nb, struct otg_switch_mtk, id_nb); - - otg_sx->id_event = event; - schedule_work(&otg_sx->id_work); - - return NOTIFY_DONE; -} - -static int mt_usb_vbus_notifier(struct notifier_block *nb, - unsigned long event, void *ptr) -{ - struct otg_switch_mtk *otg_sx = - container_of(nb, struct otg_switch_mtk, vbus_nb); - - otg_sx->vbus_event = event; - schedule_work(&otg_sx->vbus_work); - - return NOTIFY_DONE; -} - -static int mt_usb_extcon_register(struct otg_switch_mtk *otg_sx) -{ - struct mt_usb_glue *glue = - container_of(otg_sx, struct mt_usb_glue, otg_sx); - struct musb *musb = glue->mtk_musb; - struct extcon_dev *edev = otg_sx->edev; - int ret; - - /* extcon is optional */ - if (!edev) - return 0; - - otg_sx->vbus_nb.notifier_call = mt_usb_vbus_notifier; - ret = devm_extcon_register_notifier(musb->controller, edev, EXTCON_USB, - &otg_sx->vbus_nb); - if (ret < 0) { - dev_err(musb->controller, "failed to register notifier for USB\n"); - return ret; - } - - otg_sx->id_nb.notifier_call = mt_usb_id_notifier; - ret = devm_extcon_register_notifier(musb->controller, edev, EXTCON_USB_HOST, - &otg_sx->id_nb); - if (ret < 0) { - dev_err(musb->controller, "failed to register notifier for USB-HOST\n"); - return ret; - } - - dev_dbg(musb->controller, "EXTCON_USB: %d, EXTCON_USB_HOST: %d\n", - extcon_get_state(edev, EXTCON_USB), - extcon_get_state(edev, EXTCON_USB_HOST)); - - /* default as host, switch to device mode if needed */ - if (extcon_get_state(edev, EXTCON_USB_HOST) == false) - mt_usb_set_mailbox(otg_sx, MUSB_ID_FLOAT); - if (extcon_get_state(edev, EXTCON_USB) == true) - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_VALID); - - return 0; -} - -/* - * We provide an interface via debugfs to switch between host and device modes - * depending on user input. - * This is useful in special cases, such as uses TYPE-A receptacle but also - * wants to support dual-role mode. - */ -void mt_usb_mode_switch(struct musb *musb, int to_host) -{ - struct mt_usb_glue *glue = - container_of(&musb, struct mt_usb_glue, mtk_musb); - struct otg_switch_mtk *otg_sx = &glue->otg_sx; - - if (to_host) { - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_OFF); - mt_usb_set_mailbox(otg_sx, MUSB_ID_GROUND); - } else { - mt_usb_set_mailbox(otg_sx, MUSB_ID_FLOAT); - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_VALID); - } -} -EXPORT_SYMBOL(mt_usb_mode_switch); - -static int mt_usb_role_sx_set(struct device *dev, enum usb_role role) -{ - struct mt_usb_glue *glue = dev_get_drvdata(dev); - struct otg_switch_mtk *otg_sx = &glue->otg_sx; - bool id_event, vbus_event; - static bool first_init = true; - - dev_info(dev, "role_sx_set role %d, latest_role: %d\n", - role, otg_sx->latest_role); - - /* Avoid transit from HOST -> DEV with NONE state */ - if ((role == USB_ROLE_DEVICE && otg_sx->latest_role == USB_ROLE_HOST) || - (role == USB_ROLE_HOST && otg_sx->latest_role == USB_ROLE_DEVICE)) { - DBG(0, "force USB_ROLE_NONE transit state.\n"); - mt_usb_role_sx_set(dev, USB_ROLE_NONE); - } - - otg_sx->latest_role = role; - - if (otg_sx->op_mode != MUSB_DR_OPERATION_NORMAL) { - dev_info(dev, "op_mode %d, skip set role\n", otg_sx->op_mode); - return 0; - } - - id_event = (role == USB_ROLE_HOST); - vbus_event = (role == USB_ROLE_DEVICE); - -#ifdef CONFIG_MTK_UART_USB_SWITCH - in_uart_mode = usb_phy_check_in_uart_mode(); - if (in_uart_mode) { - DBG(0, "At UART mode. Switch to USB is not support\n"); - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_OFF); - phy_set_mode(glue->phy, PHY_MODE_INVALID); - return 0; - } -#endif - - if (!!(otg_sx->sw_state & MUSB_VBUS_VALID) ^ vbus_event) { - if (vbus_event) { - dev_info(dev, "%s: if vbus_event true\n", __func__); - phy_set_mode(glue->phy, PHY_MODE_USB_DEVICE); - phy_power_on(glue->phy); - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_VALID); - } else { - mt_usb_set_mailbox(otg_sx, MUSB_VBUS_OFF); - dev_info(dev, "%s: if vbus_event false\n", __func__); - phy_power_off(glue->phy); - } - } - - if (!!(otg_sx->sw_state & MUSB_ID_GROUND) ^ id_event) { - if (id_event) { - dev_info(dev, "%s: if id_event true\n", __func__); - - phy_power_on(glue->phy); - - /* PHY mode will be set in host_connect work */ - mt_usb_set_mailbox(otg_sx, MUSB_ID_GROUND); - } else { - /* - * add this for reduce boot 200ms - * and add delay 200ms for plugout - */ - if (!first_init) - mdelay(200); - else - first_init = false; - - /* PHY mode will be set in host_disconnect work */ - mt_usb_set_mailbox(otg_sx, MUSB_ID_FLOAT); - phy_power_off(glue->phy); - } - } - - return 0; -} - -static enum usb_role mt_usb_role_sx_get(struct device *dev) -{ - struct mt_usb_glue *glue = dev_get_drvdata(dev); - struct musb *musb = glue->mtk_musb; - enum usb_role role; - - role = musb->is_host ? USB_ROLE_HOST : USB_ROLE_DEVICE; - - return role; -} - -static int mt_usb_role_sw_register(struct otg_switch_mtk *otg_sx) -{ - struct usb_role_switch_desc role_sx_desc = { 0 }; - struct mt_usb_glue *glue = - container_of(otg_sx, struct mt_usb_glue, otg_sx); - struct musb *musb = glue->mtk_musb; - - if (!otg_sx->role_sw_used) - return 0; - - role_sx_desc.set = mt_usb_role_sx_set; - role_sx_desc.get = mt_usb_role_sx_get; - otg_sx->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc); - - if (IS_ERR(otg_sx->role_sw)) - return PTR_ERR(otg_sx->role_sw); - - mt_usb_role_sx_set(glue->dev, USB_ROLE_NONE); - musb->usb_connected = 0; - - return 0; -} - -static ssize_t cmode_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct musb *mtk_musb = dev_get_drvdata(dev); - struct otg_switch_mtk *otg_sx = mtk_musb->otg_sx; - enum usb_role role = otg_sx->latest_role; - - /* note: can't use container_of() by mtk_musb glue, use otg_sx here */ - struct mt_usb_glue *glue = - container_of(otg_sx, struct mt_usb_glue, otg_sx); - int mode; - - if (kstrtoint(buf, 10, &mode)) - return -EINVAL; - - dev_info(dev, "store cmode %d op_mode %d\n", mode, otg_sx->op_mode); - - if (otg_sx->op_mode != mode) { - /* set switch role */ - switch (mode) { - case MUSB_DR_OPERATION_NONE: - otg_sx->latest_role = USB_ROLE_NONE; - break; - case MUSB_DR_OPERATION_NORMAL: - /* switch usb role to latest role */ - break; - case MUSB_DR_OPERATION_HOST: - otg_sx->latest_role = USB_ROLE_HOST; - break; - case MUSB_DR_OPERATION_DEVICE: - otg_sx->latest_role = USB_ROLE_DEVICE; - break; - default: - return -EINVAL; - } - /* switch operation mode to normal temporarily */ - otg_sx->op_mode = MUSB_DR_OPERATION_NORMAL; - /* switch usb role */ - mt_usb_role_sx_set(glue->dev, otg_sx->latest_role); - /* update operation mode */ - otg_sx->op_mode = mode; - /* restore role */ - otg_sx->latest_role = role; - } - - return count; -} - -static ssize_t cmode_show(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct musb *mtk_musb = dev_get_drvdata(dev); - struct otg_switch_mtk *otg_sx = mtk_musb->otg_sx; - - return sprintf(buf, "%d\n", otg_sx->op_mode); -} -static DEVICE_ATTR_RW(cmode); - -static struct attribute *mt_usb_dr_attrs[] = { - &dev_attr_cmode.attr, - NULL -}; - -static const struct attribute_group mt_usb_dr_group = { - .attrs = mt_usb_dr_attrs, -}; - -int mt_usb_otg_switch_init(struct mt_usb_glue *glue) -{ - struct otg_switch_mtk *otg_sx = &glue->otg_sx; - struct musb *mtk_musb = glue->mtk_musb; - int ret = 0; - - /* we need to keep otg_sx here for cmode operations */ - mtk_musb->otg_sx = otg_sx; - - INIT_WORK(&otg_sx->id_work, mt_usb_id_work); - INIT_WORK(&otg_sx->vbus_work, mt_usb_vbus_work); - - /* default as host, update state */ - otg_sx->sw_state = mtk_musb->is_host ? - MUSB_ID_GROUND : MUSB_VBUS_VALID; - - /* initial operation mode */ - otg_sx->op_mode = MUSB_DR_OPERATION_NORMAL; - - ret = sysfs_create_group(&mtk_musb->controller->kobj, &mt_usb_dr_group); - if (ret) - dev_info(mtk_musb->controller, "error creating sysfs attributes\n"); - -#ifdef CONFIG_DEBUG_FS - if (otg_sx->manual_drd_enabled) - musb_dr_debugfs_init(mtk_musb); -#endif - else if (otg_sx->role_sw_used) - ret = mt_usb_role_sw_register(otg_sx); - else - ret = mt_usb_extcon_register(otg_sx); - - return ret; -} -EXPORT_SYMBOL(mt_usb_otg_switch_init); - -void mt_usb_otg_switch_exit(struct mt_usb_glue *glue) -{ - struct otg_switch_mtk *otg_sx = &glue->otg_sx; - struct musb *mtk_musb = glue->mtk_musb; - - cancel_work_sync(&otg_sx->id_work); - cancel_work_sync(&otg_sx->vbus_work); - usb_role_switch_unregister(otg_sx->role_sw); - sysfs_remove_group(&mtk_musb->controller->kobj, &mt_usb_dr_group); -} diff --git a/drivers/misc/mediatek/usb20/musb_dr.h b/drivers/misc/mediatek/usb20/musb_dr.h deleted file mode 100644 index f1ccc063f8eb..000000000000 --- a/drivers/misc/mediatek/usb20/musb_dr.h +++ /dev/null @@ -1,101 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * musb_dr.h - dual role switch and host glue layer header - * - * Copyright (C) 2021 MediaTek Inc. - * - * Author: Macpaul Lin - */ - -#ifndef _MUSB_DR_H_ -#define _MUSB_DR_H_ - -#include -#include -#include -#include - -#if IS_ENABLED(CONFIG_USB_MTK_OTG) || IS_ENABLED(CONFIG_MTK_MUSB_DUAL_ROLE) -int musb_host_init(struct musb *musb, struct device_node *parent_dn); -void musb_host_exit(struct musb *musb); -int musb_wakeup_of_property_parse(struct musb *musb, - struct device_node *dn); -int musb_host_enable(struct musb *musb); -int musb_host_disable(struct musb *musb, bool suspend); -void musb_wakeup_set(struct musb *musb, bool enable); -#else -static inline int musb_host_init(struct musb *musb, - - struct device_node *parent_dn) -{ - return 0; -} - -static inline void musb_host_exit(struct musb *musb) -{} - -static inline int musb_wakeup_of_property_parse( - struct musb *musb, struct device_node *dn) -{ - return 0; -} - -static inline int musb_host_enable(struct musb *musb) -{ - return 0; -} - -static inline int musb_host_disable(struct musb *musb, bool suspend) -{ - return 0; -} - -static inline void musb_wakeup_set(struct musb *musb, bool enable) -{} - -#endif - -#if IS_ENABLED(CONFIG_USB_MTK_HDRC) || IS_ENABLED(CONFIG_MTK_MUSB_DUAL_ROLE) -int musb_gadget_init(struct musb *musb); -void musb_gadget_exit(struct musb *musb); -#else -static inline int musb_gadget_init(struct musb *musb) -{ - return 0; -} - -static inline void musb_gadget_exit(struct musb *musb) -{} -#endif - -#if IS_ENABLED(CONFIG_MTK_MUSB_DUAL_ROLE) -int mt_usb_otg_switch_init(struct mt_usb_glue *glue); -void mt_usb_otg_switch_exit(struct mt_usb_glue *glue); -extern void mt_usb_mode_switch(struct musb *musb, int to_host); -extern int mt_usb_set_vbus(struct otg_switch_mtk *otg_sx, int is_on); -void mt_usb_set_force_mode(struct musb *musb, - enum mt_usb_dr_force_mode mode); - -#else -static inline int mt_usb_otg_switch_init(struct mt_usb_glue *glue) -{ - return 0; -} - -static inline void mt_usb_otg_switch_exit(struct mt_usb_glue *glue) -{} - -static inline void mt_usb_mode_switch(struct musb *musb, int to_host) -{} - -static inline int mt_usb_set_vbus(struct otg_switch_mtk *otg_sx, int is_on) -{ - return 0; -} - -static inline void -mt_usb_set_force_mode(struct musb *musb, enum mt_usb_dr_force_mode mode) -{} -#endif - -#endif /* _MUSB_DR_H_ */ diff --git a/drivers/misc/mediatek/usb20/musb_gadget.c b/drivers/misc/mediatek/usb20/musb_gadget.c index 0c68c804d2f0..3e4287db6c1f 100644 --- a/drivers/misc/mediatek/usb20/musb_gadget.c +++ b/drivers/misc/mediatek/usb20/musb_gadget.c @@ -23,8 +23,7 @@ #include -#include -#include +#include "musb_core.h" /* GADGET only support all-ep QMU, otherwise downgrade to non-QMU */ #ifdef MUSB_QMU_LIMIT_SUPPORT @@ -97,9 +96,6 @@ static inline void map_dma_buffer(struct musb_request *request, unsigned int length; - if (request->request.length == 0) - return; - length = ALIGN(request->request.length, dma_get_cache_alignment()); @@ -152,9 +148,6 @@ unmap_dma_buffer(struct musb_request *request, struct musb *musb) { unsigned int length; - if (request->request.length == 0) - return; - length = ALIGN(request->request.length, dma_get_cache_alignment()); if (!is_buffer_mapped(request)) @@ -210,8 +203,7 @@ void musb_g_giveback(struct musb_ep *ep, goto lock; } - if (!dma_mapping_error(musb->controller, request->dma) && - req->request.length != 0) + if (!dma_mapping_error(musb->controller, request->dma)) unmap_dma_buffer(req, musb); else if (req->epnum != 0) DBG(0, "%s dma_mapping_error\n", ep->end_point.name); @@ -1100,73 +1092,6 @@ void musb_g_rx(struct musb *musb, u8 epnum) rxstate(musb, req); } -enum { - USB_TYPE_UNKNOWN, - USB_TYPE_ADB, - USB_TYPE_MTP, - /* USB_TYPE_PTP, */ - USB_TYPE_RNDIS, - USB_TYPE_ACM, -}; - -static struct usb_descriptor_header ** -get_function_descriptors(struct usb_function *f, - enum usb_device_speed speed) -{ - struct usb_descriptor_header **descriptors; - - switch (speed) { - case USB_SPEED_SUPER_PLUS: - descriptors = f->ssp_descriptors; - if (descriptors) - break; - case USB_SPEED_SUPER: - descriptors = f->ss_descriptors; - if (descriptors) - break; - case USB_SPEED_HIGH: - descriptors = f->hs_descriptors; - if (descriptors) - break; - default: - descriptors = f->fs_descriptors; - } - return descriptors; -} - -static int musb_get_ep_type(struct usb_descriptor_header **f_desc) -{ - struct usb_interface_descriptor *int_desc; - u8 int_class, int_subclass, int_protocol; - - for (; *f_desc; ++f_desc) { - if ((*f_desc)->bDescriptorType != USB_DT_INTERFACE) - continue; - int_desc = (struct usb_interface_descriptor *)*f_desc; - int_class = int_desc->bInterfaceClass; - int_subclass = int_desc->bInterfaceSubClass; - int_protocol = int_desc->bInterfaceProtocol; - - if (int_class == 0x6 && int_subclass == 0x1 - && int_protocol == 0x1) { - return USB_TYPE_MTP; - } else if (int_class == 0xff && int_subclass == 0x42 - && int_protocol == 0x1) { - return USB_TYPE_ADB; - } else if (int_class == 0x2 && int_subclass == 0x2 - && int_protocol == 0xff) { - return USB_TYPE_RNDIS; - } else if (int_class == 0xe0 && int_subclass == 0x1 - && int_protocol == 0x3) { - return USB_TYPE_RNDIS; - } else if (int_class == 0x2 && int_subclass == 0x2 - && int_protocol == 0x1) { - return USB_TYPE_ACM; - } - } - return USB_TYPE_UNKNOWN; -} - /* * at the safe mode, * ACM IN-BULK-> Double Buffer, @@ -1178,38 +1103,204 @@ static int musb_get_ep_type(struct usb_descriptor_header **f_desc) static int is_db_ok(struct musb *musb, struct musb_ep *musb_ep) { - struct usb_ep *ep = &musb_ep->end_point; struct usb_composite_dev *cdev = (musb->g).ep0->driver_data; + struct usb_configuration *c = cdev->config; struct usb_gadget *gadget = &(musb->g); - struct usb_function *f = NULL; - struct usb_descriptor_header **f_desc; - int addr; - int type = USB_TYPE_UNKNOWN; + int tmp; int ret = 1; - addr = ((ep->address & 0x80) >> 3) - | (ep->address & 0x0f); - list_for_each_entry(f, &cdev->config->functions, list) { - if (test_bit(addr, f->endpoints)) - goto find_f; - } - goto done; -find_f: - f_desc = get_function_descriptors(f, gadget->speed); - if (f_desc) - type = musb_get_ep_type(f_desc); - else - goto done; + for (tmp = 0; tmp < MAX_CONFIG_INTERFACES; tmp++) { + struct usb_function *f = c->interface[tmp]; + struct usb_descriptor_header **descriptors; - if (type == USB_TYPE_ACM && !musb_ep->is_in) - ret = 0; - else if (type == USB_TYPE_ADB) - ret = 0; + if (!f) + break; -done: + DBG(0, "Ifc name=%s\n", f->name); + + switch (gadget->speed) { + case USB_SPEED_SUPER: + descriptors = f->ss_descriptors; + break; + case USB_SPEED_HIGH: + descriptors = f->hs_descriptors; + break; + default: + descriptors = f->fs_descriptors; + } + + for (; *descriptors; ++descriptors) { + struct usb_endpoint_descriptor *ep; + int is_in; + int epnum; + + if ((*descriptors)->bDescriptorType != USB_DT_ENDPOINT) + continue; + + ep = (struct usb_endpoint_descriptor *)*descriptors; + + is_in = (ep->bEndpointAddress & 0x80) >> 7; + epnum = (ep->bEndpointAddress & 0x0f); + + /* + * Under saving mode, some + * kinds of EPs have to be + * set as Single Buffer + * ACM OUT-BULK - Signle + * ACM IN-BULK - Double + * ADB OUT-BULK - Signle + * ADB IN-BULK - Single + */ + + /* ep must be matched */ + if (ep->bEndpointAddress == + (musb_ep->end_point).address) { + + DBG(0, "%s %s desc-addr=%x, addr=%x\n" + , f->name + , is_in ? "IN" : "OUT" + , ep->bEndpointAddress + , (musb_ep->end_point).address); + + if (!strcmp(f->name, "acm") && !is_in) + ret = 0; + else if (!strcmp(f->name, "adb")) + ret = 0; + + if (ret == 0) + DBG(0, "[%s] EP%d-%s as signle buffer\n" + , f->name, epnum, + (is_in ? "IN" : "OUT")); + else + DBG(0, "[%s] EP%d-%s as double buffer\n" + , f->name, epnum, + (is_in ? "IN" : "OUT")); + + goto end; + } + } + } +end: return ret; } + +static char *musb_dbuffer_avail_function_list[] = { + + "adb", + "mtp", + "Mass Storage Function", + "rndis", + "acm", + "rawbulk-modem", + NULL +}; + +static int check_musb_dbuffer_avail(struct musb *musb, struct musb_ep *musb_ep) +{ +/* #define TIME_SPENT_CHECK_MUSB_DBUFFER_AVAIL */ +#ifdef TIME_SPENT_CHECK_MUSB_DBUFFER_AVAIL + struct timeval tv_before, tv_after; + + do_gettimeofday(&tv_before); +#endif + + int tmp; + struct usb_composite_dev *cdev = (musb->g).ep0->driver_data; + struct usb_configuration *c = cdev->config; + struct usb_gadget *gadget = &(musb->g); + + if (c == NULL) + return 0; + + for (tmp = 0; tmp < MAX_CONFIG_INTERFACES; tmp++) { + struct usb_function *f = c->interface[tmp]; + struct usb_descriptor_header **descriptors; + + if (!f) + break; + + DBG(1, "<%s, %d>, name: %s\n", __func__, __LINE__, f->name); + + switch (gadget->speed) { + case USB_SPEED_SUPER: + descriptors = f->ss_descriptors; + break; + case USB_SPEED_HIGH: + descriptors = f->hs_descriptors; + break; + default: + descriptors = f->fs_descriptors; + } + + for (; *descriptors; ++descriptors) { + struct usb_endpoint_descriptor *ep; + int is_in; + int epnum; + + if ((*descriptors)->bDescriptorType != USB_DT_ENDPOINT) + continue; + + ep = (struct usb_endpoint_descriptor *)*descriptors; + + is_in = (ep->bEndpointAddress & 0x80) >> 7; + epnum = (ep->bEndpointAddress & 0x0f); + + DBG(1, + "<%s, %d>, ep->bEndpointAddress(%x), address(%x)\n" + , __func__, __LINE__, + ep->bEndpointAddress, + (musb_ep->end_point).address); + + /* ep must be matched */ + if (ep->bEndpointAddress + == (musb_ep->end_point).address) { + int i; + + for (i = 0;; i++) { + if (musb_dbuffer_avail_function_list[i] + == NULL) + break; + + DBG(1, "<%s, %d>, comparing:%s\n" + , __func__, __LINE__, + musb_dbuffer_avail_function_list[i]); + if (!strcmp(f->name, + musb_dbuffer_avail_function_list[i])) { + DBG(0, + "<%s, %d>, got bulk ep:%x in function :%s\n", + __func__, __LINE__, + ep->bEndpointAddress, + f->name); +#ifdef TIME_SPENT_CHECK_MUSB_DBUFFER_AVAIL + do_gettimeofday(&tv_after); + DBG(0, + "<%s, %d>, sec:%d, usec:%d\n", + __func__, __LINE__, + (tv_after.tv_sec - + tv_before.tv_sec), + (tv_after.tv_usec - + tv_before.tv_usec)); +#endif + return 1; + } + } +#ifdef TIME_SPENT_CHECK_MUSB_DBUFFER_AVAIL + do_gettimeofday(&tv_after); + DBG(0, "<%s, %d>, sec:%d, usec:%d\n", __func__ + , __LINE__, + (tv_after.tv_sec - tv_before.tv_sec), + (tv_after.tv_usec - tv_before.tv_usec)); +#endif + return 0; + } + } + } + return 0; + + DBG(0, "<%s, %d>, should not be here\n", __func__, __LINE__); +} + static void fifo_setup(struct musb *musb, struct musb_ep *musb_ep) { void __iomem *mbase = musb->mregs; @@ -1233,16 +1324,18 @@ static void fifo_setup(struct musb *musb, struct musb_ep *musb_ep) /* Set double buffer, if the transfer type is bulk or isoc. */ /* So user need to take care the fifo buffer is enough or not. */ - if (musb_ep->fifo_mode == BUF_DOUBLE + if (musb_ep->fifo_mode == MUSB_BUF_DOUBLE && (musb_ep->type == USB_ENDPOINT_XFER_BULK || musb_ep->type == USB_ENDPOINT_XFER_ISOC)) { + + if (check_musb_dbuffer_avail(musb, musb_ep)) dbuffer_needed = 1; } if (dbuffer_needed) { if ((musb->fifo_addr + (maxpacket << 1)) > (musb->fifo_size)) { DBG(0, - "BUF_DOUBLE USB FIFO is not enough!!! (%d>%d), fifo_addr=%d\n", + "MUSB_BUF_DOUBLE USB FIFO is not enough!!! (%d>%d), fifo_addr=%d\n", (musb->fifo_addr + (maxpacket << 1)), (musb->fifo_size), musb->fifo_addr); @@ -1261,7 +1354,7 @@ static void fifo_setup(struct musb *musb, struct musb_ep *musb_ep) c_size |= MUSB_FIFOSZ_DPB; } } else if ((musb->fifo_addr + maxpacket) > (musb->fifo_size)) { - DBG(0, "BUF_SINGLE USB FIFO is not enough!!! (%d>%d)\n", + DBG(0, "MUSB_BUF_SINGLE USB FIFO is not enough!!! (%d>%d)\n", (musb->fifo_addr + maxpacket), (musb->fifo_size)); return; } @@ -1495,7 +1588,6 @@ static int musb_gadget_disable(struct usb_ep *ep) struct musb_ep *musb_ep; void __iomem *epio; int status = 0; - u16 csr; musb_ep = to_musb_ep(ep); musb = musb_ep->musb; @@ -1511,13 +1603,9 @@ static int musb_gadget_disable(struct usb_ep *ep) musb->intrtxe &= ~(1 << epnum); musb_writew(musb->mregs, MUSB_INTRTXE, musb->intrtxe); #endif - csr = MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_CLRDATATOG; - /* set twice in case of double buffering */ - musb_writew(epio, MUSB_TXCSR, csr); - musb_writew(epio, MUSB_TXCSR, csr); - musb_writew(epio, MUSB_TXMAXP, 0); } else { + u16 csr; #ifndef CONFIG_MTK_MUSB_QMU_SUPPORT musb->intrrxe &= ~(1 << epnum); musb_writew(musb->mregs, MUSB_INTRRXE, musb->intrrxe); @@ -1662,8 +1750,7 @@ static int musb_gadget_queue /* add request to the list */ list_add_tail(&request->list, &musb_ep->req_list); #ifdef CONFIG_MTK_MUSB_QMU_SUPPORT - if (request->request.dma != DMA_ADDR_INVALID || - request->request.length == 0) { + if (request->request.dma != DMA_ADDR_INVALID) { /* TX case */ if (request->tx) { /* TX QMU don't have info @@ -1770,8 +1857,6 @@ static int musb_gadget_dequeue(struct usb_ep *ep, struct usb_request *request) if (!ep || !request || to_musb_request(request)->ep != musb_ep) return -EINVAL; - disable_irq_nosync(musb->nIrq); - spin_lock_irqsave(&musb->lock, flags); list_for_each_entry(r, &musb_ep->req_list, list) { @@ -1794,10 +1879,10 @@ static int musb_gadget_dequeue(struct usb_ep *ep, struct usb_request *request) ep->address); musb_flush_qmu(musb_ep->hw_ep->epnum, (musb_ep->is_in ? TXQ : RXQ)); - mtk_qmu_enable(musb, + musb_g_giveback(musb_ep, request, -ECONNRESET); + musb_restart_qmu(musb, musb_ep->hw_ep->epnum, (musb_ep->is_in ? TXQ : RXQ)); - musb_g_giveback(musb_ep, request, -ECONNRESET); } #else /* ... else abort the dma transfer ... */ @@ -1821,8 +1906,6 @@ static int musb_gadget_dequeue(struct usb_ep *ep, struct usb_request *request) done: spin_unlock_irqrestore(&musb->lock, flags); - - enable_irq(musb->nIrq); return status; } @@ -2250,6 +2333,22 @@ static int musb_gadget_vbus_draw return usb_phy_set_power(musb->xceiv, mA); } +/* default value 0 */ +static int usb_rdy; +void set_usb_rdy(void) +{ + DBG(0, "set usb_rdy, wake up bat\n"); + usb_rdy = 1; +} +bool is_usb_rdy(void) +{ + if (usb_rdy) + return true; + else + return false; +} +EXPORT_SYMBOL(is_usb_rdy); + static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on) { struct musb *musb = gadget_to_musb(gadget); @@ -2261,6 +2360,7 @@ static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on) is_on = !!is_on; pm_runtime_get_sync(musb->controller); + /* NOTE: this assumes we are sensing vbus; we'd rather * not pullup unless the B-session is active. */ @@ -2277,6 +2377,7 @@ static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on) if (!musb->is_ready && is_on) { musb->is_ready = true; + set_usb_rdy(); /* direct issue connection work if usb is forced on */ if (musb_force_on) { DBG(0, "mt_usb_connect() on is_ready begin\n"); diff --git a/drivers/misc/mediatek/usb20/musb_gadget_ep0.c b/drivers/misc/mediatek/usb20/musb_gadget_ep0.c index d32d69ad40d4..0c36c967400a 100644 --- a/drivers/misc/mediatek/usb20/musb_gadget_ep0.c +++ b/drivers/misc/mediatek/usb20/musb_gadget_ep0.c @@ -415,14 +415,13 @@ __acquires(musb->lock) goto stall; } -#ifdef CONFIG_MTK_MUSB_PHY if (musb->usb_rev6_setting && (musb->test_mode_nr == MUSB_TEST_K || musb->test_mode_nr == MUSB_TEST_J)) musb->usb_rev6_setting(0x0); -#endif + /* enter test mode after irq */ #if defined(CONFIG_USBIF_COMPLIANCE) if (handled > 0 && diff --git a/drivers/misc/mediatek/usb20/musb_host.c b/drivers/misc/mediatek/usb20/musb_host.c index 0b3862bd1be0..659704b17420 100644 --- a/drivers/misc/mediatek/usb20/musb_host.c +++ b/drivers/misc/mediatek/usb20/musb_host.c @@ -3114,7 +3114,10 @@ static int musb_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) DBG(0, "ret<%d>\n", ret); } - DBG_LIMIT(5, "%s", info); + if (strstr(current->comm, "usb_call")) + DBG_LIMIT(5, "%s", info); + else + DBG(0, "%s\n", info); #ifdef CONFIG_MTK_MUSB_QMU_SUPPORT /* abort HW transaction on this ep */ @@ -3169,7 +3172,7 @@ static int musb_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) #endif if (qh->type != USB_ENDPOINT_XFER_CONTROL) { DBG(0, "why here, this is ring case?\n"); - dump_stack(); + musb_bug(); } qh->hep->hcpriv = NULL; @@ -3355,11 +3358,6 @@ static int musb_bus_suspend(struct usb_hcd *hcd) { struct musb *musb = hcd_to_musb(hcd); u8 devctl; - int ret; - - ret = musb_port_suspend(musb, true); - if (ret) - return ret; if (!is_host_active(musb)) return 0; @@ -3398,10 +3396,8 @@ static int musb_bus_resume(struct usb_hcd *hcd) { struct musb *musb = hcd_to_musb(hcd); - if (!is_host_active(musb)) - return 0; - - usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); + if (is_host_active(musb)) + usb_hal_dpidle_request(USB_DPIDLE_FORBIDDEN); /* resuming child port does the work */ return 0; diff --git a/drivers/misc/mediatek/usb20/musb_host.h b/drivers/misc/mediatek/usb20/musb_host.h index a7eb7bb8ebd4..a5699c48b95c 100644 --- a/drivers/misc/mediatek/usb20/musb_host.h +++ b/drivers/misc/mediatek/usb20/musb_host.h @@ -62,7 +62,6 @@ static inline struct musb_qh *first_qh(struct list_head *q) void musb_h_pre_disable(struct musb *musb); extern void musb_root_disconnect(struct musb *musb); -extern int musb_port_suspend(struct musb *musb, bool do_suspend); struct usb_hcd; diff --git a/drivers/misc/mediatek/usb20/musb_io.h b/drivers/misc/mediatek/usb20/musb_io.h index 6f87762d1311..953cf7b99bc9 100644 --- a/drivers/misc/mediatek/usb20/musb_io.h +++ b/drivers/misc/mediatek/usb20/musb_io.h @@ -8,14 +8,13 @@ #include #include -#include -#include extern bool mtk_usb_power; #ifdef CONFIG_MTK_MUSB_PORT0_LOWPOWER_MODE extern void mt_usb_clock_prepare(void); extern void mt_usb_clock_unprepare(void); #endif +extern bool usb_enable_clock(bool enable); extern spinlock_t usb_io_lock; static inline u16 musb_readw(const void __iomem *addr, unsigned int offset) diff --git a/drivers/misc/mediatek/usb20/musb_qmu.c b/drivers/misc/mediatek/usb20/musb_qmu.c index 14cf6412c397..3d8804c92ba0 100644 --- a/drivers/misc/mediatek/usb20/musb_qmu.c +++ b/drivers/misc/mediatek/usb20/musb_qmu.c @@ -79,7 +79,7 @@ static void do_low_power_timer_monitor_work(struct work_struct *work) static void low_power_timer_wakeup_func(unsigned long data); static DEFINE_TIMER(low_power_timer, low_power_timer_wakeup_func, 0, 0); -static void low_power_timer_resource_reset(void) +void low_power_timer_resource_reset(void) { low_power_timer_total_sleep = low_power_timer_total_wake = 0; low_power_timer_trigger_cnt = low_power_timer_wake_cnt = 0; @@ -138,7 +138,7 @@ static void low_power_timer_wakeup_func(struct timer_list *timer) } -static void try_trigger_low_power_timer(signed int sleep_ms) +void try_trigger_low_power_timer(signed int sleep_ms) { DBG(1, "sleep_ms:%d\n", sleep_ms); @@ -188,7 +188,7 @@ static void try_trigger_low_power_timer(signed int sleep_ms) usb_hal_dpidle_request(USB_DPIDLE_SRAM); } -static void do_low_power_timer_test_work(struct work_struct *work) +void do_low_power_timer_test_work(struct work_struct *work) { unsigned long flags; signed int set_time; @@ -223,7 +223,7 @@ static void do_low_power_timer_test_work(struct work_struct *work) } } -static void lower_power_timer_test_init(void) +void lower_power_timer_test_init(void) { INIT_WORK(&low_power_timer_test_work, do_low_power_timer_test_work); low_power_timer_test_wq = @@ -242,7 +242,7 @@ static void lower_power_timer_test_init(void) * mode 2 + option 2: simulate SCREEN OFF mode 1 real case */ -static void low_power_timer_sleep(unsigned int sleep_ms) +void low_power_timer_sleep(unsigned int sleep_ms) { DBG(1, "sleep(%d) ms\n", sleep_ms); @@ -263,7 +263,7 @@ static void low_power_timer_sleep(unsigned int sleep_ms) } #endif -static void mtk_host_active_dev_resource_reset(void) +void mtk_host_active_dev_resource_reset(void) { memset(mtk_host_active_dev_table, 0, sizeof(mtk_host_active_dev_table)); mtk_host_active_dev_cnt = 0; @@ -279,7 +279,7 @@ void musb_host_active_dev_add(unsigned int addr) mtk_host_active_dev_cnt++; } } -EXPORT_SYMBOL(musb_host_active_dev_add); + void __iomem *qmu_base; /* debug variable to check qmu_base issue */ @@ -315,13 +315,11 @@ int musb_qmu_init(struct musb *musb) return 0; } -EXPORT_SYMBOL(musb_qmu_init); void musb_qmu_exit(struct musb *musb) { qmu_destroy_gpd_pool(musb->controller); } -EXPORT_SYMBOL(musb_qmu_exit); void musb_disable_q_all(struct musb *musb) { @@ -350,7 +348,6 @@ void musb_disable_q_all(struct musb *musb) host_qmu_tx_max_number_of_pkts[ep_num] = 0; } } -EXPORT_SYMBOL(musb_disable_q_all); void musb_kick_D_CmdQ(struct musb *musb, struct musb_request *request) { @@ -375,7 +372,6 @@ void musb_kick_D_CmdQ(struct musb *musb, struct musb_request *request) mtk_qmu_resume(request->epnum, isRx); } -EXPORT_SYMBOL(musb_kick_D_CmdQ); irqreturn_t musb_q_irq(struct musb *musb) { @@ -404,7 +400,6 @@ irqreturn_t musb_q_irq(struct musb *musb) return retval; } -EXPORT_SYMBOL(musb_q_irq); void musb_flush_qmu(u32 ep_num, u8 isRx) { @@ -412,7 +407,6 @@ void musb_flush_qmu(u32 ep_num, u8 isRx) mtk_qmu_stop(ep_num, isRx); qmu_reset_gpd_pool(ep_num, isRx); } -EXPORT_SYMBOL(musb_flush_qmu); void musb_restart_qmu(struct musb *musb, u32 ep_num, u8 isRx) { @@ -420,7 +414,6 @@ void musb_restart_qmu(struct musb *musb, u32 ep_num, u8 isRx) flush_ep_csr(musb, ep_num, isRx); mtk_qmu_enable(musb, ep_num, isRx); } -EXPORT_SYMBOL(musb_restart_qmu); bool musb_is_qmu_stop(u32 ep_num, u8 isRx) { @@ -750,4 +743,3 @@ int mtk_kick_CmdQ(struct musb *musb, DBG(4, "\n"); return 0; } -EXPORT_SYMBOL(mtk_kick_CmdQ); diff --git a/drivers/misc/mediatek/usb20/musb_virthub.c b/drivers/misc/mediatek/usb20/musb_virthub.c index 6460ea86cbcd..049485a3bb73 100644 --- a/drivers/misc/mediatek/usb20/musb_virthub.c +++ b/drivers/misc/mediatek/usb20/musb_virthub.c @@ -18,29 +18,14 @@ static int h_pre_disable = 1; module_param(h_pre_disable, int, 0644); -static void musb_host_check_disconnect(struct musb *musb) -{ - u8 opstate = musb_readb(musb->mregs, MUSB_OPSTATE); - bool is_con = musb->port1_status & USB_PORT_STAT_CONNECTION; - - if (opstate == MUSB_OPSTATE_HOST_WAIT_DEV && is_con) { - DBG(0, "disconnect when suspend"); - musb->int_usb |= MUSB_INTR_DISCONNECT; - musb->xceiv->otg->state = OTG_STATE_A_HOST; - musb_interrupt(musb); - } -} - -int musb_port_suspend(struct musb *musb, bool do_suspend) +static void musb_port_suspend(struct musb *musb, bool do_suspend) { struct usb_otg *otg = musb->xceiv->otg; u8 power; void __iomem *mbase = musb->mregs; if (!is_host_active(musb)) - return 0; - - DBG(0, "%s\n", do_suspend ? "suspend" : "resume"); + return; /* NOTE: this doesn't necessarily put PHY into low power mode, * turning off its clock; that's a function of PHY integration and @@ -51,20 +36,17 @@ int musb_port_suspend(struct musb *musb, bool do_suspend) if (do_suspend) { int retries = 10000; - if (power & MUSB_POWER_RESUME) - return -EBUSY; + power &= ~MUSB_POWER_RESUME; + power |= (MUSB_POWER_SUSPENDM | MUSB_POWER_ENSUSPEND); - if (!(power & MUSB_POWER_SUSPENDM)) { - power |= MUSB_POWER_SUSPENDM; - musb_writeb(mbase, MUSB_POWER, power); + musb_writeb(mbase, MUSB_POWER, power); - /* Needed for OPT A tests */ + /* Needed for OPT A tests */ + power = musb_readb(mbase, MUSB_POWER); + while (power & MUSB_POWER_SUSPENDM) { power = musb_readb(mbase, MUSB_POWER); - while (power & MUSB_POWER_SUSPENDM) { - power = musb_readb(mbase, MUSB_POWER); - if (retries-- < 1) - break; - } + if (retries-- < 1) + break; } DBG(3, "Root port suspended, power %02x\n", power); @@ -99,7 +81,6 @@ int musb_port_suspend(struct musb *musb, bool do_suspend) musb->port1_status |= MUSB_PORT_STAT_RESUME; musb->rh_timer = jiffies + msecs_to_jiffies(20); } - return 0; } static void musb_port_reset(struct musb *musb, bool do_reset) @@ -222,7 +203,7 @@ void musb_root_disconnect(struct musb *musb) otg_state_string(musb->xceiv->otg->state)); } } -EXPORT_SYMBOL(musb_root_disconnect); + /*---------------------------------------------------------------------*/ @@ -364,7 +345,7 @@ int musb_hub_control(struct usb_hcd *hcd, /* NOTE: it might really be A_WAIT_BCON ... */ musb->xceiv->otg->state = OTG_STATE_A_HOST; } - musb_host_check_disconnect(musb); + put_unaligned(cpu_to_le32(musb->port1_status & ~MUSB_PORT_STAT_RESUME), (__le32 *) buf); -- GitLab