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Commit ff50eda4 authored Aug 09, 2018 by David S. Miller

Merge branch 'More-complete-PHYLINK-support-for-mv88e6xxx'



Andrew Lunn says:

====================
More complete PHYLINK support for mv88e6xxx

Previous patches added sufficient PHYLINK support to the mv88e6xxx
that it did not break existing use cases, basically fixed-link phys.

This patchset builds out the support so that SFP modules, up to
2.5Gbps can be supported, on mv88e6390X, on ports 9 and 10. It also
provides a framework which can be extended to support SFPs on ports
2-8 of mv88e6390X, 10Gbps PHYs, and SFP support on the 6352 family.

Russell King did much of the initial work, implementing the validate
and mac_link_state calls. However, there is an important TODO in the
commit message:

needs to call phylink_mac_change() when the port link comes up/goes down.

The remaining patches implement this, by adding more support for the
SERDES interfaces, in particular, interrupt support so we get notified
when the SERDES gains/looses sync.

This has been tested on the ZII devel C, using a Clearfog as peer
device.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

parents 78b39066 734447d4

drivers/net/dsa/mv88e6xxx/chip.c

+219 −7

Original line number	Original line	Diff line number	Diff line
	@@ -524,7 +524,7 @@ int mv88e6xxx_update(struct mv88e6xxx_chip *chip, int addr, int reg, u16 update)
	}		}

	static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,		static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,
	int link, int speed, int duplex,		int link, int speed, int duplex, int pause,
	phy_interface_t mode)		phy_interface_t mode)
	{		{
	int err;		int err;
	@@ -543,6 +543,12 @@ static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,
	goto restore_link;		goto restore_link;
	}		}

			if (chip->info->ops->port_set_pause) {
			err = chip->info->ops->port_set_pause(chip, port, pause);
			if (err)
			goto restore_link;
			}

	if (chip->info->ops->port_set_duplex) {		if (chip->info->ops->port_set_duplex) {
	err = chip->info->ops->port_set_duplex(chip, port, duplex);		err = chip->info->ops->port_set_duplex(chip, port, duplex);
	if (err && err != -EOPNOTSUPP)		if (err && err != -EOPNOTSUPP)
	@@ -584,17 +590,100 @@ static void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port,

	mutex_lock(&chip->reg_lock);		mutex_lock(&chip->reg_lock);
	err = mv88e6xxx_port_setup_mac(chip, port, phydev->link, phydev->speed,		err = mv88e6xxx_port_setup_mac(chip, port, phydev->link, phydev->speed,
	phydev->duplex, phydev->interface);		phydev->duplex, phydev->pause,
			phydev->interface);
	mutex_unlock(&chip->reg_lock);		mutex_unlock(&chip->reg_lock);

	if (err && err != -EOPNOTSUPP)		if (err && err != -EOPNOTSUPP)
	dev_err(ds->dev, "p%d: failed to configure MAC\n", port);		dev_err(ds->dev, "p%d: failed to configure MAC\n", port);
	}		}

			static void mv88e6065_phylink_validate(struct mv88e6xxx_chip *chip, int port,
			unsigned long *mask,
			struct phylink_link_state *state)
			{
			if (!phy_interface_mode_is_8023z(state->interface)) {
			/* 10M and 100M are only supported in non-802.3z mode */
			phylink_set(mask, 10baseT_Half);
			phylink_set(mask, 10baseT_Full);
			phylink_set(mask, 100baseT_Half);
			phylink_set(mask, 100baseT_Full);
			}
			}

			static void mv88e6185_phylink_validate(struct mv88e6xxx_chip *chip, int port,
			unsigned long *mask,
			struct phylink_link_state *state)
			{
			/* FIXME: if the port is in 1000Base-X mode, then it only supports
			* 1000M FD speeds. In this case, CMODE will indicate 5.
			*/
			phylink_set(mask, 1000baseT_Full);
			phylink_set(mask, 1000baseX_Full);

			mv88e6065_phylink_validate(chip, port, mask, state);
			}

			static void mv88e6352_phylink_validate(struct mv88e6xxx_chip *chip, int port,
			unsigned long *mask,
			struct phylink_link_state *state)
			{
			/* No ethtool bits for 200Mbps */
			phylink_set(mask, 1000baseT_Full);
			phylink_set(mask, 1000baseX_Full);

			mv88e6065_phylink_validate(chip, port, mask, state);
			}

			static void mv88e6390_phylink_validate(struct mv88e6xxx_chip *chip, int port,
			unsigned long *mask,
			struct phylink_link_state *state)
			{
			if (port >= 9)
			phylink_set(mask, 2500baseX_Full);

			/* No ethtool bits for 200Mbps */
			phylink_set(mask, 1000baseT_Full);
			phylink_set(mask, 1000baseX_Full);

			mv88e6065_phylink_validate(chip, port, mask, state);
			}

			static void mv88e6390x_phylink_validate(struct mv88e6xxx_chip *chip, int port,
			unsigned long *mask,
			struct phylink_link_state *state)
			{
			if (port >= 9) {
			phylink_set(mask, 10000baseT_Full);
			phylink_set(mask, 10000baseKR_Full);
			}

			mv88e6390_phylink_validate(chip, port, mask, state);
			}

	static void mv88e6xxx_validate(struct dsa_switch *ds, int port,		static void mv88e6xxx_validate(struct dsa_switch *ds, int port,
	unsigned long *supported,		unsigned long *supported,
	struct phylink_link_state *state)		struct phylink_link_state *state)
	{		{
			__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
			struct mv88e6xxx_chip *chip = ds->priv;

			/* Allow all the expected bits */
			phylink_set(mask, Autoneg);
			phylink_set(mask, Pause);
			phylink_set_port_modes(mask);

			if (chip->info->ops->phylink_validate)
			chip->info->ops->phylink_validate(chip, port, mask, state);

			bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
			bitmap_and(state->advertising, state->advertising, mask,
			__ETHTOOL_LINK_MODE_MASK_NBITS);

			/* We can only operate at 2500BaseX or 1000BaseX. If requested
			* to advertise both, only report advertising at 2500BaseX.
			*/
			phylink_helper_basex_speed(state);
	}		}

	static int mv88e6xxx_link_state(struct dsa_switch *ds, int port,		static int mv88e6xxx_link_state(struct dsa_switch *ds, int port,
	@@ -604,7 +693,10 @@ static int mv88e6xxx_link_state(struct dsa_switch *ds, int port,
	int err;		int err;

	mutex_lock(&chip->reg_lock);		mutex_lock(&chip->reg_lock);
	err = mv88e6xxx_port_link_state(chip, port, state);		if (chip->info->ops->port_link_state)
			err = chip->info->ops->port_link_state(chip, port, state);
			else
			err = -EOPNOTSUPP;
	mutex_unlock(&chip->reg_lock);		mutex_unlock(&chip->reg_lock);

	return err;		return err;
	@@ -615,7 +707,7 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port,
	const struct phylink_link_state *state)		const struct phylink_link_state *state)
	{		{
	struct mv88e6xxx_chip *chip = ds->priv;		struct mv88e6xxx_chip *chip = ds->priv;
	int speed, duplex, link, err;		int speed, duplex, link, pause, err;

	if (mode == MLO_AN_PHY)		if (mode == MLO_AN_PHY)
	return;		return;
	@@ -629,9 +721,10 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port,
	duplex = DUPLEX_UNFORCED;		duplex = DUPLEX_UNFORCED;
	link = LINK_UNFORCED;		link = LINK_UNFORCED;
	}		}
			pause = !!phylink_test(state->advertising, Pause);

	mutex_lock(&chip->reg_lock);		mutex_lock(&chip->reg_lock);
	err = mv88e6xxx_port_setup_mac(chip, port, link, speed, duplex,		err = mv88e6xxx_port_setup_mac(chip, port, link, speed, duplex, pause,
	state->interface);		state->interface);
	mutex_unlock(&chip->reg_lock);		mutex_unlock(&chip->reg_lock);

	@@ -2080,6 +2173,9 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
	int err;		int err;
	u16 reg;		u16 reg;

			chip->ports[port].chip = chip;
			chip->ports[port].port = port;

	/* MAC Forcing register: don't force link, speed, duplex or flow control		/* MAC Forcing register: don't force link, speed, duplex or flow control
	* state to any particular values on physical ports, but force the CPU		* state to any particular values on physical ports, but force the CPU
	* port and all DSA ports to their maximum bandwidth and full duplex.		* port and all DSA ports to their maximum bandwidth and full duplex.
	@@ -2087,10 +2183,12 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
	if (dsa_is_cpu_port(ds, port) \|\| dsa_is_dsa_port(ds, port))		if (dsa_is_cpu_port(ds, port) \|\| dsa_is_dsa_port(ds, port))
	err = mv88e6xxx_port_setup_mac(chip, port, LINK_FORCED_UP,		err = mv88e6xxx_port_setup_mac(chip, port, LINK_FORCED_UP,
	SPEED_MAX, DUPLEX_FULL,		SPEED_MAX, DUPLEX_FULL,
			PAUSE_OFF,
	PHY_INTERFACE_MODE_NA);		PHY_INTERFACE_MODE_NA);
	else		else
	err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED,		err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED,
	SPEED_UNFORCED, DUPLEX_UNFORCED,		SPEED_UNFORCED, DUPLEX_UNFORCED,
			PAUSE_ON,
	PHY_INTERFACE_MODE_NA);		PHY_INTERFACE_MODE_NA);
	if (err)		if (err)
	return err;		return err;
	@@ -2239,7 +2337,12 @@ static int mv88e6xxx_port_enable(struct dsa_switch *ds, int port,
	int err;		int err;

	mutex_lock(&chip->reg_lock);		mutex_lock(&chip->reg_lock);

	err = mv88e6xxx_serdes_power(chip, port, true);		err = mv88e6xxx_serdes_power(chip, port, true);

			if (!err && chip->info->ops->serdes_irq_setup)
			err = chip->info->ops->serdes_irq_setup(chip, port);

	mutex_unlock(&chip->reg_lock);		mutex_unlock(&chip->reg_lock);

	return err;		return err;
	@@ -2251,8 +2354,13 @@ static void mv88e6xxx_port_disable(struct dsa_switch *ds, int port,
	struct mv88e6xxx_chip *chip = ds->priv;		struct mv88e6xxx_chip *chip = ds->priv;

	mutex_lock(&chip->reg_lock);		mutex_lock(&chip->reg_lock);

			if (chip->info->ops->serdes_irq_free)
			chip->info->ops->serdes_irq_free(chip, port);

	if (mv88e6xxx_serdes_power(chip, port, false))		if (mv88e6xxx_serdes_power(chip, port, false))
	dev_err(chip->dev, "failed to power off SERDES\n");		dev_err(chip->dev, "failed to power off SERDES\n");

	mutex_unlock(&chip->reg_lock);		mutex_unlock(&chip->reg_lock);
	}		}

	@@ -2286,6 +2394,7 @@ static int mv88e6xxx_stats_setup(struct mv88e6xxx_chip *chip)
	static int mv88e6xxx_setup(struct dsa_switch *ds)		static int mv88e6xxx_setup(struct dsa_switch *ds)
	{		{
	struct mv88e6xxx_chip *chip = ds->priv;		struct mv88e6xxx_chip *chip = ds->priv;
			u8 cmode;
	int err;		int err;
	int i;		int i;

	@@ -2294,6 +2403,17 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)

	mutex_lock(&chip->reg_lock);		mutex_lock(&chip->reg_lock);

			/* Cache the cmode of each port. */
			for (i = 0; i < mv88e6xxx_num_ports(chip); i++) {
			if (chip->info->ops->port_get_cmode) {
			err = chip->info->ops->port_get_cmode(chip, i, &cmode);
			if (err)
			return err;

			chip->ports[i].cmode = cmode;
			}
			}

	/* Setup Switch Port Registers */		/* Setup Switch Port Registers */
	for (i = 0; i < mv88e6xxx_num_ports(chip); i++) {		for (i = 0; i < mv88e6xxx_num_ports(chip); i++) {
	if (dsa_is_unused_port(ds, i))		if (dsa_is_unused_port(ds, i))
	@@ -2601,6 +2721,8 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,		.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2617,6 +2739,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
	.rmu_disable = mv88e6085_g1_rmu_disable,		.rmu_disable = mv88e6085_g1_rmu_disable,
	.vtu_getnext = mv88e6352_g1_vtu_getnext,		.vtu_getnext = mv88e6352_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6095_ops = {		static const struct mv88e6xxx_ops mv88e6095_ops = {
	@@ -2632,6 +2755,8 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
	.port_set_frame_mode = mv88e6085_port_set_frame_mode,		.port_set_frame_mode = mv88e6085_port_set_frame_mode,
	.port_set_egress_floods = mv88e6185_port_set_egress_floods,		.port_set_egress_floods = mv88e6185_port_set_egress_floods,
	.port_set_upstream_port = mv88e6095_port_set_upstream_port,		.port_set_upstream_port = mv88e6095_port_set_upstream_port,
			.port_link_state = mv88e6185_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,		.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2643,6 +2768,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
	.reset = mv88e6185_g1_reset,		.reset = mv88e6185_g1_reset,
	.vtu_getnext = mv88e6185_g1_vtu_getnext,		.vtu_getnext = mv88e6185_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6097_ops = {		static const struct mv88e6xxx_ops mv88e6097_ops = {
	@@ -2665,6 +2791,8 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,		.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2679,6 +2807,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
	.rmu_disable = mv88e6085_g1_rmu_disable,		.rmu_disable = mv88e6085_g1_rmu_disable,
	.vtu_getnext = mv88e6352_g1_vtu_getnext,		.vtu_getnext = mv88e6352_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6123_ops = {		static const struct mv88e6xxx_ops mv88e6123_ops = {
	@@ -2696,6 +2825,8 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
	.port_set_egress_floods = mv88e6352_port_set_egress_floods,		.port_set_egress_floods = mv88e6352_port_set_egress_floods,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2709,6 +2840,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
	.reset = mv88e6352_g1_reset,		.reset = mv88e6352_g1_reset,
	.vtu_getnext = mv88e6352_g1_vtu_getnext,		.vtu_getnext = mv88e6352_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6131_ops = {		static const struct mv88e6xxx_ops mv88e6131_ops = {
	@@ -2729,6 +2861,9 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,		.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,		.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
			.port_set_pause = mv88e6185_port_set_pause,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,		.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2744,6 +2879,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
	.reset = mv88e6185_g1_reset,		.reset = mv88e6185_g1_reset,
	.vtu_getnext = mv88e6185_g1_vtu_getnext,		.vtu_getnext = mv88e6185_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6141_ops = {		static const struct mv88e6xxx_ops mv88e6141_ops = {
	@@ -2769,6 +2905,8 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -2784,6 +2922,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
	.serdes_power = mv88e6341_serdes_power,		.serdes_power = mv88e6341_serdes_power,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
			.phylink_validate = mv88e6390_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6161_ops = {		static const struct mv88e6xxx_ops mv88e6161_ops = {
	@@ -2806,6 +2945,8 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2821,6 +2962,7 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
	.avb_ops = &mv88e6165_avb_ops,		.avb_ops = &mv88e6165_avb_ops,
	.ptp_ops = &mv88e6165_ptp_ops,		.ptp_ops = &mv88e6165_ptp_ops,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6165_ops = {		static const struct mv88e6xxx_ops mv88e6165_ops = {
	@@ -2836,6 +2978,8 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
	.port_set_speed = mv88e6185_port_set_speed,		.port_set_speed = mv88e6185_port_set_speed,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,		.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2851,6 +2995,7 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
	.avb_ops = &mv88e6165_avb_ops,		.avb_ops = &mv88e6165_avb_ops,
	.ptp_ops = &mv88e6165_ptp_ops,		.ptp_ops = &mv88e6165_ptp_ops,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6171_ops = {		static const struct mv88e6xxx_ops mv88e6171_ops = {
	@@ -2874,6 +3019,8 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2887,6 +3034,7 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
	.reset = mv88e6352_g1_reset,		.reset = mv88e6352_g1_reset,
	.vtu_getnext = mv88e6352_g1_vtu_getnext,		.vtu_getnext = mv88e6352_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6172_ops = {		static const struct mv88e6xxx_ops mv88e6172_ops = {
	@@ -2912,6 +3060,8 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2928,6 +3078,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
	.serdes_power = mv88e6352_serdes_power,		.serdes_power = mv88e6352_serdes_power,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
			.phylink_validate = mv88e6352_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6175_ops = {		static const struct mv88e6xxx_ops mv88e6175_ops = {
	@@ -2951,6 +3102,8 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -2964,6 +3117,7 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
	.reset = mv88e6352_g1_reset,		.reset = mv88e6352_g1_reset,
	.vtu_getnext = mv88e6352_g1_vtu_getnext,		.vtu_getnext = mv88e6352_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6176_ops = {		static const struct mv88e6xxx_ops mv88e6176_ops = {
	@@ -2989,6 +3143,8 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -3005,6 +3161,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
	.serdes_power = mv88e6352_serdes_power,		.serdes_power = mv88e6352_serdes_power,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
			.phylink_validate = mv88e6352_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6185_ops = {		static const struct mv88e6xxx_ops mv88e6185_ops = {
	@@ -3021,6 +3178,9 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
	.port_set_egress_floods = mv88e6185_port_set_egress_floods,		.port_set_egress_floods = mv88e6185_port_set_egress_floods,
	.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,		.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,
	.port_set_upstream_port = mv88e6095_port_set_upstream_port,		.port_set_upstream_port = mv88e6095_port_set_upstream_port,
			.port_set_pause = mv88e6185_port_set_pause,
			.port_link_state = mv88e6185_port_link_state,
			.port_get_cmode = mv88e6185_port_get_cmode,
	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,		.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -3036,6 +3196,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
	.reset = mv88e6185_g1_reset,		.reset = mv88e6185_g1_reset,
	.vtu_getnext = mv88e6185_g1_vtu_getnext,		.vtu_getnext = mv88e6185_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6190_ops = {		static const struct mv88e6xxx_ops mv88e6190_ops = {
	@@ -3057,6 +3218,8 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
	.port_pause_limit = mv88e6390_port_pause_limit,		.port_pause_limit = mv88e6390_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,		.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3072,7 +3235,10 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
	.vtu_getnext = mv88e6390_g1_vtu_getnext,		.vtu_getnext = mv88e6390_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
	.serdes_power = mv88e6390_serdes_power,		.serdes_power = mv88e6390_serdes_power,
			.serdes_irq_setup = mv88e6390_serdes_irq_setup,
			.serdes_irq_free = mv88e6390_serdes_irq_free,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
			.phylink_validate = mv88e6390_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6190x_ops = {		static const struct mv88e6xxx_ops mv88e6190x_ops = {
	@@ -3094,6 +3260,8 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
	.port_pause_limit = mv88e6390_port_pause_limit,		.port_pause_limit = mv88e6390_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,		.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3108,8 +3276,11 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
	.rmu_disable = mv88e6390_g1_rmu_disable,		.rmu_disable = mv88e6390_g1_rmu_disable,
	.vtu_getnext = mv88e6390_g1_vtu_getnext,		.vtu_getnext = mv88e6390_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
	.serdes_power = mv88e6390_serdes_power,		.serdes_power = mv88e6390x_serdes_power,
			.serdes_irq_setup = mv88e6390_serdes_irq_setup,
			.serdes_irq_free = mv88e6390_serdes_irq_free,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
			.phylink_validate = mv88e6390x_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6191_ops = {		static const struct mv88e6xxx_ops mv88e6191_ops = {
	@@ -3131,6 +3302,8 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
	.port_pause_limit = mv88e6390_port_pause_limit,		.port_pause_limit = mv88e6390_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,		.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3146,8 +3319,11 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
	.vtu_getnext = mv88e6390_g1_vtu_getnext,		.vtu_getnext = mv88e6390_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
	.serdes_power = mv88e6390_serdes_power,		.serdes_power = mv88e6390_serdes_power,
			.serdes_irq_setup = mv88e6390_serdes_irq_setup,
			.serdes_irq_free = mv88e6390_serdes_irq_free,
	.avb_ops = &mv88e6390_avb_ops,		.avb_ops = &mv88e6390_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6390_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6240_ops = {		static const struct mv88e6xxx_ops mv88e6240_ops = {
	@@ -3173,6 +3349,8 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -3191,6 +3369,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
	.avb_ops = &mv88e6352_avb_ops,		.avb_ops = &mv88e6352_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6352_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6290_ops = {		static const struct mv88e6xxx_ops mv88e6290_ops = {
	@@ -3213,6 +3392,8 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
	.port_set_cmode = mv88e6390x_port_set_cmode,		.port_set_cmode = mv88e6390x_port_set_cmode,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,		.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3228,9 +3409,12 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
	.vtu_getnext = mv88e6390_g1_vtu_getnext,		.vtu_getnext = mv88e6390_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
	.serdes_power = mv88e6390_serdes_power,		.serdes_power = mv88e6390_serdes_power,
			.serdes_irq_setup = mv88e6390_serdes_irq_setup,
			.serdes_irq_free = mv88e6390_serdes_irq_free,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
	.avb_ops = &mv88e6390_avb_ops,		.avb_ops = &mv88e6390_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6390_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6320_ops = {		static const struct mv88e6xxx_ops mv88e6320_ops = {
	@@ -3255,6 +3439,8 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3270,6 +3456,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
	.avb_ops = &mv88e6352_avb_ops,		.avb_ops = &mv88e6352_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6321_ops = {		static const struct mv88e6xxx_ops mv88e6321_ops = {
	@@ -3294,6 +3481,8 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3307,6 +3496,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
	.avb_ops = &mv88e6352_avb_ops,		.avb_ops = &mv88e6352_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6341_ops = {		static const struct mv88e6xxx_ops mv88e6341_ops = {
	@@ -3332,6 +3522,8 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3349,6 +3541,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
	.avb_ops = &mv88e6390_avb_ops,		.avb_ops = &mv88e6390_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6390_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6350_ops = {		static const struct mv88e6xxx_ops mv88e6350_ops = {
	@@ -3372,6 +3565,8 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -3385,6 +3580,7 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
	.reset = mv88e6352_g1_reset,		.reset = mv88e6352_g1_reset,
	.vtu_getnext = mv88e6352_g1_vtu_getnext,		.vtu_getnext = mv88e6352_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6351_ops = {		static const struct mv88e6xxx_ops mv88e6351_ops = {
	@@ -3408,6 +3604,8 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -3423,6 +3621,7 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
	.avb_ops = &mv88e6352_avb_ops,		.avb_ops = &mv88e6352_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6185_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6352_ops = {		static const struct mv88e6xxx_ops mv88e6352_ops = {
	@@ -3448,6 +3647,8 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
	.port_pause_limit = mv88e6097_port_pause_limit,		.port_pause_limit = mv88e6097_port_pause_limit,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6320_g1_stats_snapshot,		.stats_snapshot = mv88e6320_g1_stats_snapshot,
	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,		.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6095_stats_get_sset_count,		.stats_get_sset_count = mv88e6095_stats_get_sset_count,
	@@ -3469,6 +3670,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
	.serdes_get_sset_count = mv88e6352_serdes_get_sset_count,		.serdes_get_sset_count = mv88e6352_serdes_get_sset_count,
	.serdes_get_strings = mv88e6352_serdes_get_strings,		.serdes_get_strings = mv88e6352_serdes_get_strings,
	.serdes_get_stats = mv88e6352_serdes_get_stats,		.serdes_get_stats = mv88e6352_serdes_get_stats,
			.phylink_validate = mv88e6352_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6390_ops = {		static const struct mv88e6xxx_ops mv88e6390_ops = {
	@@ -3493,6 +3695,8 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
	.port_set_cmode = mv88e6390x_port_set_cmode,		.port_set_cmode = mv88e6390x_port_set_cmode,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,		.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3508,9 +3712,12 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
	.vtu_getnext = mv88e6390_g1_vtu_getnext,		.vtu_getnext = mv88e6390_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
	.serdes_power = mv88e6390_serdes_power,		.serdes_power = mv88e6390_serdes_power,
			.serdes_irq_setup = mv88e6390_serdes_irq_setup,
			.serdes_irq_free = mv88e6390_serdes_irq_free,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
	.avb_ops = &mv88e6390_avb_ops,		.avb_ops = &mv88e6390_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6390_phylink_validate,
	};		};

	static const struct mv88e6xxx_ops mv88e6390x_ops = {		static const struct mv88e6xxx_ops mv88e6390x_ops = {
	@@ -3535,6 +3742,8 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
	.port_set_cmode = mv88e6390x_port_set_cmode,		.port_set_cmode = mv88e6390x_port_set_cmode,
	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,		.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,		.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
			.port_link_state = mv88e6352_port_link_state,
			.port_get_cmode = mv88e6352_port_get_cmode,
	.stats_snapshot = mv88e6390_g1_stats_snapshot,		.stats_snapshot = mv88e6390_g1_stats_snapshot,
	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,		.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
	.stats_get_sset_count = mv88e6320_stats_get_sset_count,		.stats_get_sset_count = mv88e6320_stats_get_sset_count,
	@@ -3549,10 +3758,13 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
	.rmu_disable = mv88e6390_g1_rmu_disable,		.rmu_disable = mv88e6390_g1_rmu_disable,
	.vtu_getnext = mv88e6390_g1_vtu_getnext,		.vtu_getnext = mv88e6390_g1_vtu_getnext,
	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,		.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
	.serdes_power = mv88e6390_serdes_power,		.serdes_power = mv88e6390x_serdes_power,
			.serdes_irq_setup = mv88e6390_serdes_irq_setup,
			.serdes_irq_free = mv88e6390_serdes_irq_free,
	.gpio_ops = &mv88e6352_gpio_ops,		.gpio_ops = &mv88e6352_gpio_ops,
	.avb_ops = &mv88e6390_avb_ops,		.avb_ops = &mv88e6390_avb_ops,
	.ptp_ops = &mv88e6352_ptp_ops,		.ptp_ops = &mv88e6352_ptp_ops,
			.phylink_validate = mv88e6390x_phylink_validate,
	};		};

	static const struct mv88e6xxx_info mv88e6xxx_table[] = {		static const struct mv88e6xxx_info mv88e6xxx_table[] = {

drivers/net/dsa/mv88e6xxx/chip.h

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drivers/net/dsa/mv88e6xxx/port.c

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drivers/net/dsa/mv88e6xxx/port.h

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drivers/net/dsa/mv88e6xxx/serdes.c

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