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Commit f7f20cba authored by Jon Mason's avatar Jon Mason Committed by Florian Fainelli
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ARM: dts: NSP: modify second CPU address 



NSP B0 has a different address for the second core.  Since there should
not be any Ax versions in the field, it should be safe to universally
change this.

Signed-off-by: default avatarJon Mason <jonmason@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent d71eb941

arch/arm/boot/dts/bcm-nsp.dtsi

+1 −1
Original line number Original line Diff line number Diff line
@@ -57,7 +57,7 @@ 
			compatible = "arm,cortex-a9";

			compatible = "arm,cortex-a9";

			next-level-cache = <&L2>;

			next-level-cache = <&L2>;

			enable-method = "brcm,bcm-nsp-smp";

			enable-method = "brcm,bcm-nsp-smp";

			secondary-boot-reg = <0xffff042c>;

			secondary-boot-reg = <0xffff0fec>;

			reg = <0x1>;

			reg = <0x1>;

		};

		};

	};

	};