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Commit f3415351 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM updates from Russell King:
 "In this set, we have:
   - Refactoring of some of the old StrongARM-1100 GPIO code to make
     things simpler by Dmitry Eremin-Solenikov
   - Read-only and non-executable support for modules on ARM from Laura
     Abbot
   - Removal of unnecessary set_drvdata() calls in AMBA code
   - Some non-executable support for kernel lowmem mappings at the 1MB
     section granularity, and dumping of kernel page tables via debugfs
   - Some improvements for the timer/clock code on Footbridge platforms,
     and cleanup some of the LED code there
   - Fix fls/ffs() signatures to match x86 to prevent build warnings,
     particularly where these are used with min/max() macros
   - Avoid using the bootmem allocator on ARM (patches from Santosh
     Shilimkar)
   - Various asid/unaligned access updates from Will Deacon"

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (51 commits)
  ARM: SMP implementations are not supposed to return from smp_ops.cpu_die()
  ARM: ignore memory below PHYS_OFFSET
  Fix select-induced Kconfig warning for ZBOOT_ROM
  ARM: fix ffs/fls implementations to match x86
  ARM: 7935/1: sa1100: collie: add gpio-keys configuration
  ARM: 7932/1: bcm: Add DEBUG_LL console support
  ARM: 7929/1: Remove duplicate SCHED_HRTICK config option
  ARM: 7928/1: kconfig: select HAVE_EFFICIENT_UNALIGNED_ACCESS for CPUv6+ && MMU
  ARM: 7927/1: dcache: select DCACHE_WORD_ACCESS for big-endian CPUs
  ARM: 7926/1: mm: flesh out and fix the comments in the ASID allocator
  ARM: 7925/1: mm: keep track of last ASID allocation to improve bitmap searching
  ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE
  ARM: PCI: add legacy IDE IRQ implementation
  ARM: footbridge: cleanup LEDs code
  ARM: pgd allocation: retry on failure
  ARM: footbridge: add one-shot mode for DC21285 timer
  ARM: footbridge: add sched_clock implementation
  ARM: 7922/1: l2x0: add Marvell Tauros3 support
  ARM: 7877/1: use built-in byte swap function
  ARM: 7921/1: mcpm: remove redundant dsb instructions prior to sev
  ...
parents 13c789a6 857989a7
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+12 −11
Original line number Diff line number Diff line
@@ -10,17 +10,18 @@ Required properties:
  "arm,pl310-cache"
  "arm,l220-cache"
  "arm,l210-cache"
  "bcm,bcm11351-a2-pl310-cache": DEPRECATED by "brcm,bcm11351-a2-pl310-cache"
  "brcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
     offset needs to be added to the address before passing down to the L2
     cache controller
  "marvell,aurora-system-cache": Marvell Controller designed to be
     compatible with the ARM one, with system cache mode (meaning
     maintenance operations on L1 are broadcasted to the L2 and L2
     performs the same operation).
	"marvell,"aurora-outer-cache: Marvell Controller designed to be
  "marvell,aurora-outer-cache": Marvell Controller designed to be
     compatible with the ARM one with outer cache mode.
	"brcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
	offset needs to be added to the address before passing down to the L2
	cache controller
	"bcm,bcm11351-a2-pl310-cache": DEPRECATED by
	                               "brcm,bcm11351-a2-pl310-cache"
  "marvell,tauros3-cache": Marvell Tauros3 cache controller, compatible
     with arm,pl310-cache controller.
- cache-unified : Specifies the cache is a unified cache.
- cache-level : Should be set to 2 for a level 2 cache.
- reg : Physical base address and size of cache controller's memory mapped
+7 −7
Original line number Diff line number Diff line
@@ -6,12 +6,13 @@ config ARM
	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
	select ARCH_HAVE_CUSTOM_GPIO_H
	select ARCH_MIGHT_HAVE_PC_PARPORT
	select ARCH_USE_BUILTIN_BSWAP
	select ARCH_USE_CMPXCHG_LOCKREF
	select ARCH_WANT_IPC_PARSE_VERSION
	select BUILDTIME_EXTABLE_SORT if MMU
	select CLONE_BACKWARDS
	select CPU_PM if (SUSPEND || CPU_IDLE)
	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
	select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
	select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
	select GENERIC_IDLE_POLL_SETUP
@@ -36,6 +37,7 @@ config ARM
	select HAVE_DMA_ATTRS
	select HAVE_DMA_CONTIGUOUS if MMU
	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
	select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
	select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
@@ -63,6 +65,7 @@ config ARM
	select IRQ_FORCED_THREADING
	select KTIME_SCALAR
	select MODULES_USE_ELF_REL
	select NO_BOOTMEM
	select OLD_SIGACTION
	select OLD_SIGSUSPEND3
	select PERF_USE_VMALLOC
@@ -1651,9 +1654,6 @@ config HZ
config SCHED_HRTICK
	def_bool HIGH_RES_TIMERS

config SCHED_HRTICK
	def_bool HIGH_RES_TIMERS

config THUMB2_KERNEL
	bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
	depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
@@ -1934,6 +1934,7 @@ config ZBOOT_ROM_BSS
config ZBOOT_ROM
	bool "Compressed boot loader in ROM/flash"
	depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
	depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
	help
	  Say Y here if you intend to execute your compressed kernel image
	  (zImage) directly from ROM or flash.  If unsure, say N.
@@ -1969,7 +1970,7 @@ endchoice

config ARM_APPENDED_DTB
	bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
	depends on OF && !ZBOOT_ROM
	depends on OF
	help
	  With this option, the boot code will look for a device tree binary
	  (DTB) appended to zImage
@@ -2057,7 +2058,7 @@ endchoice

config XIP_KERNEL
	bool "Kernel Execute-In-Place from ROM"
	depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
	depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
	help
	  Execute-In-Place allows the kernel to run from non-volatile storage
	  directly addressable by the CPU, such as NOR flash. This saves RAM
@@ -2120,7 +2121,6 @@ config CRASH_DUMP

config AUTO_ZRELADDR
	bool "Auto calculation of the decompressed kernel image address"
	depends on !ZBOOT_ROM
	help
	  ZRELADDR is the physical address where the decompressed kernel
	  image will be placed. If AUTO_ZRELADDR is selected, the address
+38 −1
Original line number Diff line number Diff line
@@ -2,6 +2,18 @@ menu "Kernel hacking"

source "lib/Kconfig.debug"

config ARM_PTDUMP
	bool "Export kernel pagetable layout to userspace via debugfs"
	depends on DEBUG_KERNEL
	select DEBUG_FS
	---help---
	  Say Y here if you want to show the kernel pagetable layout in a
	  debugfs file. This information is only useful for kernel developers
	  who are working in architecture specific areas of the kernel.
	  It is probably not a good idea to enable this feature in a production
	  kernel.
	  If in doubt, say "N"

config STRICT_DEVMEM
	bool "Filter access to /dev/mem"
	depends on MMU
@@ -94,6 +106,17 @@ choice
		depends on ARCH_BCM2835
		select DEBUG_UART_PL01X

	config DEBUG_BCM_KONA_UART
		bool "Kernel low-level debugging messages via BCM KONA UART"
		depends on ARCH_BCM
		select DEBUG_UART_8250
		help
		  Say Y here if you want kernel low-level debugging support
		  on Broadcom SoC platforms.
		  This low level debug works for Broadcom
		  mobile SoCs in the Kona family of chips (e.g. bcm28155,
		  bcm11351, etc...)

	config DEBUG_CLPS711X_UART1
		bool "Kernel low-level debugging messages via UART1"
		depends on ARCH_CLPS711X
@@ -988,6 +1011,7 @@ config DEBUG_UART_PHYS
	default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
	default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
	default 0x20201000 if DEBUG_BCM2835
	default 0x3e000000 if DEBUG_BCM_KONA_UART
	default 0x4000e400 if DEBUG_LL_UART_EFM32
	default 0x40090000 if ARCH_LPC32XX
	default 0x40100000 if DEBUG_PXA_UART1
@@ -1049,6 +1073,7 @@ config DEBUG_UART_VIRT
	default 0xfe018000 if DEBUG_MMP_UART3
	default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
	default 0xfe230000 if DEBUG_PICOXCELL_UART
	default 0xfe300000 if DEBUG_BCM_KONA_UART
	default 0xfe800000 if ARCH_IOP32X
	default 0xfeb00000 if DEBUG_HI3620_UART || DEBUG_HI3716_UART
	default 0xfeb24000 if DEBUG_RK3X_UART0
@@ -1091,7 +1116,8 @@ config DEBUG_UART_8250_WORD
	default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \
		ARCH_KEYSTONE || \
		DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
		DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1
		DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \
		DEBUG_BCM_KONA_UART

config DEBUG_UART_8250_FLOW_CONTROL
	bool "Enable flow control for 8250 UART"
@@ -1150,4 +1176,15 @@ config PID_IN_CONTEXTIDR
	  additional instructions during context switch. Say Y here only if you
	  are planning to use hardware trace tools with this kernel.

config DEBUG_SET_MODULE_RONX
	bool "Set loadable kernel module data as NX and text as RO"
	depends on MODULES
	---help---
	  This option helps catch unintended modifications to loadable
	  kernel module's text and read-only data. It also prevents execution
	  of module data. Such protection may interfere with run-time code
	  patching and dynamic kernel tracing - and they might also protect
	  against certain classes of kernel exploits.
	  If in doubt, say "N".

endmenu
+11 −4
Original line number Diff line number Diff line
@@ -108,12 +108,12 @@ endif

targets       := vmlinux vmlinux.lds \
		 piggy.$(suffix_y) piggy.$(suffix_y).o \
		 lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
		 font.o font.c head.o misc.o $(OBJS)
		 lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S bswapsdi2.o \
		 bswapsdi2.S font.o font.c head.o misc.o $(OBJS)

# Make sure files are removed during clean
extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern piggy.lz4 \
		 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) \
		 lib1funcs.S ashldi3.S bswapsdi2.S $(libfdt) $(libfdt_hdrs) \
		 hyp-stub.S

ifeq ($(CONFIG_FUNCTION_TRACER),y)
@@ -156,6 +156,12 @@ ashldi3 = $(obj)/ashldi3.o
$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
	$(call cmd,shipped)

# For __bswapsi2, __bswapdi2
bswapsdi2 = $(obj)/bswapsdi2.o

$(obj)/bswapsdi2.S: $(srctree)/arch/$(SRCARCH)/lib/bswapsdi2.S
	$(call cmd,shipped)

# We need to prevent any GOTOFF relocs being used with references
# to symbols in the .bss section since we cannot relocate them
# independently from the rest at run time.  This can be achieved by
@@ -177,7 +183,8 @@ if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" = "" ]; then \
fi

$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
		$(addprefix $(obj)/, $(OBJS)) $(lib1funcs) $(ashldi3) FORCE
		$(addprefix $(obj)/, $(OBJS)) $(lib1funcs) $(ashldi3) \
		$(bswapsdi2) FORCE
	@$(check_for_multiple_zreladdr)
	$(call if_changed,ld)
	@$(check_for_bad_syms)
+3 −4
Original line number Diff line number Diff line
@@ -35,8 +35,7 @@ void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
	unsigned long *poke = &mcpm_entry_early_pokes[cluster][cpu][0];
	poke[0] = poke_phys_addr;
	poke[1] = poke_val;
	__cpuc_flush_dcache_area((void *)poke, 8);
	outer_clean_range(__pa(poke), __pa(poke + 2));
	__sync_cache_range_w(poke, 2 * sizeof(*poke));
}

static const struct mcpm_platform_ops *platform_ops;
@@ -167,7 +166,7 @@ void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster)
	dmb();
	mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN;
	sync_cache_w(&mcpm_sync.clusters[cluster].cpus[cpu].cpu);
	dsb_sev();
	sev();
}

/*
@@ -183,7 +182,7 @@ void __mcpm_outbound_leave_critical(unsigned int cluster, int state)
	dmb();
	mcpm_sync.clusters[cluster].cluster = state;
	sync_cache_w(&mcpm_sync.clusters[cluster].cluster);
	dsb_sev();
	sev();
}

/*
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