Commit f04d1080 authored Feb 20, 2017 by Madhavan Srinivasan Committed by Michael Ellerman Mar 09, 2017

powerpc/perf: Fix perf_get_data_addr() for power9 DD1

Power9 DD1 do not support PMU_HAS_SIER flag and sdsync in
perf_get_data_addr() defaults to MMCRA_SDSYNC which is wrong. Since
power9 MMCRA does not support SDSYNC bit, patch includes PPMU_NO_SIAR
flag to the check and set the sdsync with MMCRA_SAMPLE_ENABLE;

Fixes: 27593d72 ("powerpc/perf: Use MSR to report privilege level on P9 DD1")
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

parent 97ee351b

arch/powerpc/perf/core-book3s.c

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -188,6 +188,8 @@ static inline void perf_get_data_addr(struct pt_regs regs, u64 addrp)
	sdsync = POWER7P_MMCRA_SDAR_VALID;		sdsync = POWER7P_MMCRA_SDAR_VALID;
	else if (ppmu->flags & PPMU_ALT_SIPR)		else if (ppmu->flags & PPMU_ALT_SIPR)
	sdsync = POWER6_MMCRA_SDSYNC;		sdsync = POWER6_MMCRA_SDSYNC;
			else if (ppmu->flags & PPMU_NO_SIAR)
			sdsync = MMCRA_SAMPLE_ENABLE;
	else		else
	sdsync = MMCRA_SDSYNC;		sdsync = MMCRA_SDSYNC;