powerpc: Add cputable entry for POWER7 (e952e6c4) · Commits · e / devices / android_kernel_teracube_mt6765

arch/powerpc/kernel/cputable.c

+25 −0

Original line number	Original line	Diff line number	Diff line
	@@ -53,6 +53,8 @@ extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
	extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);		extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
	extern void __restore_cpu_pa6t(void);		extern void __restore_cpu_pa6t(void);
	extern void __restore_cpu_ppc970(void);		extern void __restore_cpu_ppc970(void);
			extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
			extern void __restore_cpu_power7(void);
	#endif /* CONFIG_PPC64 */		#endif /* CONFIG_PPC64 */

	/* This table only contains "desktop" CPUs, it need to be filled with embedded		/* This table only contains "desktop" CPUs, it need to be filled with embedded
	@@ -69,6 +71,9 @@ extern void __restore_cpu_ppc970(void);
	#define COMMON_USER_POWER6 (COMMON_USER_PPC64 \| PPC_FEATURE_ARCH_2_05 \|\		#define COMMON_USER_POWER6 (COMMON_USER_PPC64 \| PPC_FEATURE_ARCH_2_05 \|\
	PPC_FEATURE_SMT \| PPC_FEATURE_ICACHE_SNOOP \| \		PPC_FEATURE_SMT \| PPC_FEATURE_ICACHE_SNOOP \| \
	PPC_FEATURE_TRUE_LE)		PPC_FEATURE_TRUE_LE)
			#define COMMON_USER_POWER7 (COMMON_USER_PPC64 \| PPC_FEATURE_ARCH_2_06 \|\
			PPC_FEATURE_SMT \| PPC_FEATURE_ICACHE_SNOOP \| \
			PPC_FEATURE_TRUE_LE)
	#define COMMON_USER_PA6T (COMMON_USER_PPC64 \| PPC_FEATURE_PA6T \|\		#define COMMON_USER_PA6T (COMMON_USER_PPC64 \| PPC_FEATURE_PA6T \|\
	PPC_FEATURE_TRUE_LE \| \		PPC_FEATURE_TRUE_LE \| \
	PPC_FEATURE_HAS_ALTIVEC_COMP)		PPC_FEATURE_HAS_ALTIVEC_COMP)
	@@ -381,6 +386,26 @@ static struct cpu_spec __initdata cpu_specs[] = {
	.machine_check = machine_check_generic,		.machine_check = machine_check_generic,
	.platform = "power6",		.platform = "power6",
	},		},
			{ /* Power7 */
			.pvr_mask = 0xffff0000,
			.pvr_value = 0x003f0000,
			.cpu_name = "POWER7",
			.cpu_features = CPU_FTRS_POWER7,
			.cpu_user_features = COMMON_USER_POWER7,
			.icache_bsize = 128,
			.dcache_bsize = 128,
			.num_pmcs = 6,
			.pmc_type = PPC_PMC_IBM,
			.cpu_setup = __setup_cpu_power7,
			.cpu_restore = __restore_cpu_power7,
			.oprofile_cpu_type = "ppc64/power7",
			.oprofile_type = PPC_OPROFILE_POWER4,
			.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
			.oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
			.oprofile_mmcra_clear = POWER6_MMCRA_THRM \|
			POWER6_MMCRA_OTHER,
			.platform = "power7",
			},
	{ /* Cell Broadband Engine */		{ /* Cell Broadband Engine */
	.pvr_mask = 0xffff0000,		.pvr_mask = 0xffff0000,
	.pvr_value = 0x00700000,		.pvr_value = 0x00700000,

arch/powerpc/kernel/misc.S

+5 −0

Original line number	Original line	Diff line number	Diff line
	@@ -116,3 +116,8 @@ _GLOBAL(longjmp)
	mtlr r0		mtlr r0
	mr r3,r4		mr r3,r4
	blr		blr

			_GLOBAL(__setup_cpu_power7)
			_GLOBAL(__restore_cpu_power7)
			/* place holder */
			blr

arch/powerpc/kernel/prom_init.c

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -650,6 +650,7 @@ static void __init early_cmdline_parse(void)
	static unsigned char ibm_architecture_vec[] = {		static unsigned char ibm_architecture_vec[] = {
	W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */		W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
	W(0xffff0000), W(0x003e0000), /* POWER6 */		W(0xffff0000), W(0x003e0000), /* POWER6 */
			W(0xffff0000), W(0x003f0000), /* POWER7 */
	W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */		W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
	W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */		W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
	5 - 1, /* 5 option vectors */		5 - 1, /* 5 option vectors */

include/asm-powerpc/cputable.h

+10 −2

Original line number	Original line	Diff line number	Diff line
	@@ -26,6 +26,7 @@
	#define PPC_FEATURE_PA6T 0x00000800		#define PPC_FEATURE_PA6T 0x00000800
	#define PPC_FEATURE_HAS_DFP 0x00000400		#define PPC_FEATURE_HAS_DFP 0x00000400
	#define PPC_FEATURE_POWER6_EXT 0x00000200		#define PPC_FEATURE_POWER6_EXT 0x00000200
			#define PPC_FEATURE_ARCH_2_06 0x00000100

	#define PPC_FEATURE_TRUE_LE 0x00000002		#define PPC_FEATURE_TRUE_LE 0x00000002
	#define PPC_FEATURE_PPC_LE 0x00000001		#define PPC_FEATURE_PPC_LE 0x00000001
	@@ -379,6 +380,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
	CPU_FTR_COHERENT_ICACHE \| CPU_FTR_LOCKLESS_TLBIE \| \		CPU_FTR_COHERENT_ICACHE \| CPU_FTR_LOCKLESS_TLBIE \| \
	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \		CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
	CPU_FTR_DSCR)		CPU_FTR_DSCR)
			#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB \| \
			CPU_FTR_HPTE_TABLE \| CPU_FTR_PPCAS_ARCH_V2 \| CPU_FTR_CTRL \| \
			CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
			CPU_FTR_COHERENT_ICACHE \| CPU_FTR_LOCKLESS_TLBIE \| \
			CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
			CPU_FTR_DSCR)
	#define CPU_FTRS_CELL (CPU_FTR_USE_TB \| \		#define CPU_FTRS_CELL (CPU_FTR_USE_TB \| \
	CPU_FTR_HPTE_TABLE \| CPU_FTR_PPCAS_ARCH_V2 \| CPU_FTR_CTRL \| \		CPU_FTR_HPTE_TABLE \| CPU_FTR_PPCAS_ARCH_V2 \| CPU_FTR_CTRL \| \
	CPU_FTR_ALTIVEC_COMP \| CPU_FTR_MMCRA \| CPU_FTR_SMT \| \		CPU_FTR_ALTIVEC_COMP \| CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
	@@ -394,7 +401,8 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
	#define CPU_FTRS_POSSIBLE \		#define CPU_FTRS_POSSIBLE \
	(CPU_FTRS_POWER3 \| CPU_FTRS_RS64 \| CPU_FTRS_POWER4 \| \		(CPU_FTRS_POWER3 \| CPU_FTRS_RS64 \| CPU_FTRS_POWER4 \| \
	CPU_FTRS_PPC970 \| CPU_FTRS_POWER5 \| CPU_FTRS_POWER6 \| \		CPU_FTRS_PPC970 \| CPU_FTRS_POWER5 \| CPU_FTRS_POWER6 \| \
	CPU_FTRS_CELL \| CPU_FTRS_PA6T \| CPU_FTR_1T_SEGMENT)		CPU_FTRS_POWER7 \| CPU_FTRS_CELL \| CPU_FTRS_PA6T \| \
			CPU_FTR_1T_SEGMENT)
	#else		#else
	enum {		enum {
	CPU_FTRS_POSSIBLE =		CPU_FTRS_POSSIBLE =
	@@ -434,7 +442,7 @@ enum {
	#define CPU_FTRS_ALWAYS \		#define CPU_FTRS_ALWAYS \
	(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \		(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
	CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \		CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
	CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)		CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
	#else		#else
	enum {		enum {
	CPU_FTRS_ALWAYS =		CPU_FTRS_ALWAYS =