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Commit e5c3f470 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman
Browse files

ARM: dts: r8a7791: Convert to new LVDS DT bindings



The internal LVDS encoder now has DT bindings separate from the DU. Port
the device tree over to the new model.

Fixes: c6a27fa4 ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Fixes: bb21803e ("ARM: dts: r8a7791: add soc node")
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 15a1ff30
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+9 −3
Original line number Original line Diff line number Diff line
@@ -468,10 +468,9 @@
	pinctrl-names = "default";
	pinctrl-names = "default";
	status = "okay";
	status = "okay";


	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
		 <&x13_clk>, <&x2_clk>;
		 <&x13_clk>, <&x2_clk>;
	clock-names = "du.0", "du.1", "lvds.0",
	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
		      "dclkin.0", "dclkin.1";


	ports {
	ports {
		port@0 {
		port@0 {
@@ -479,6 +478,13 @@
				remote-endpoint = <&adv7511_in>;
				remote-endpoint = <&adv7511_in>;
			};
			};
		};
		};
	};
};

&lvds0 {
	status = "okay";

	ports {
		port@1 {
		port@1 {
			lvds_connector: endpoint {
			lvds_connector: endpoint {
			};
			};
+13 −3
Original line number Original line Diff line number Diff line
@@ -441,10 +441,9 @@
	pinctrl-names = "default";
	pinctrl-names = "default";
	status = "okay";
	status = "okay";


	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
		 <&x3_clk>, <&x16_clk>;
		 <&x3_clk>, <&x16_clk>;
	clock-names = "du.0", "du.1", "lvds.0",
	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
		      "dclkin.0", "dclkin.1";


	ports {
	ports {
		port@0 {
		port@0 {
@@ -455,6 +454,17 @@
	};
	};
};
};


&lvds0 {
	status = "okay";

	ports {
		port@1 {
			lvds_connector: endpoint {
			};
		};
	};
};

&rcar_sound {
&rcar_sound {
	pinctrl-0 = <&ssi_pins &audio_clk_pins>;
	pinctrl-0 = <&ssi_pins &audio_clk_pins>;
	pinctrl-names = "default";
	pinctrl-names = "default";
+30 −6
Original line number Original line Diff line number Diff line
@@ -1633,15 +1633,12 @@


		du: display@feb00000 {
		du: display@feb00000 {
			compatible = "renesas,du-r8a7791";
			compatible = "renesas,du-r8a7791";
			reg = <0 0xfeb00000 0 0x40000>,
			reg = <0 0xfeb00000 0 0x40000>;
			      <0 0xfeb90000 0 0x1c>;
			reg-names = "du", "lvds.0";
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>,
			clocks = <&cpg CPG_MOD 724>,
				 <&cpg CPG_MOD 723>,
				 <&cpg CPG_MOD 723>;
				 <&cpg CPG_MOD 726>;
			clock-names = "du.0", "du.1";
			clock-names = "du.0", "du.1", "lvds.0";
			status = "disabled";
			status = "disabled";


			ports {
			ports {
@@ -1656,6 +1653,33 @@
				port@1 {
				port@1 {
					reg = <1>;
					reg = <1>;
					du_out_lvds0: endpoint {
					du_out_lvds0: endpoint {
						remote-endpoint = <&lvds0_in>;
					};
				};
			};
		};

		lvds0: lvds@feb90000 {
			compatible = "renesas,r8a7791-lvds";
			reg = <0 0xfeb90000 0 0x1c>;
			clocks = <&cpg CPG_MOD 726>;
			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
			resets = <&cpg 726>;
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					lvds0_in: endpoint {
						remote-endpoint = <&du_out_lvds0>;
					};
				};
				port@1 {
					reg = <1>;
					lvds0_out: endpoint {
					};
					};
				};
				};
			};
			};