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Commit e5b1db01 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

PCI: Remove unused pcie_get_minimum_link() 



In some cases pcie_get_minimum_link() returned misleading information
because it found the slowest link and the narrowest link without
considering the total bandwidth of the link.

For example, consider a path with these two links:

  - 16.0 GT/s  x1 link  (16.0 * 10^9 * 128 / 130) *  1 / 8 = 1969 MB/s
  -  2.5 GT/s x16 link  ( 2.5 * 10^9 *   8 /  10) * 16 / 8 = 4000 MB/s

The available bandwidth of the path is limited by the 16 GT/s link to about
1969 MB/s, but pcie_get_minimum_link() returned 2.5 GT/s x1, which
corresponds to only 250 MB/s.

Callers should use pcie_print_link_status() instead, or
pcie_bandwidth_available() if they need more detailed information.

Remove pcie_get_minimum_link() since there are no callers left.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 4695ca9d

drivers/pci/pci.c

+0 −43
Original line number Diff line number Diff line
@@ -5069,49 +5069,6 @@ int pcie_set_mps(struct pci_dev *dev, int mps) 
}

EXPORT_SYMBOL(pcie_set_mps);



/**

 * pcie_get_minimum_link - determine minimum link settings of a PCI device

 * @dev: PCI device to query

 * @speed: storage for minimum speed

 * @width: storage for minimum width

 *

 * This function will walk up the PCI device chain and determine the minimum

 * link width and speed of the device.

 */

int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,

			  enum pcie_link_width *width)

{

	int ret;



	*speed = PCI_SPEED_UNKNOWN;

	*width = PCIE_LNK_WIDTH_UNKNOWN;



	while (dev) {

		u16 lnksta;

		enum pci_bus_speed next_speed;

		enum pcie_link_width next_width;



		ret = pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);

		if (ret)

			return ret;



		next_speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS];

		next_width = (lnksta & PCI_EXP_LNKSTA_NLW) >>

			PCI_EXP_LNKSTA_NLW_SHIFT;



		if (next_speed < *speed)

			*speed = next_speed;



		if (next_width < *width)

			*width = next_width;



		dev = dev->bus->self;

	}



	return 0;

}

EXPORT_SYMBOL(pcie_get_minimum_link);



/**

 * pcie_bandwidth_available - determine minimum link settings of a PCIe

 *			      device and its bandwidth limitation

include/linux/pci.h

+0 −2
Original line number Diff line number Diff line
@@ -1080,8 +1080,6 @@ int pcie_get_readrq(struct pci_dev *dev); 
int pcie_set_readrq(struct pci_dev *dev, int rq);

int pcie_get_mps(struct pci_dev *dev);

int pcie_set_mps(struct pci_dev *dev, int mps);

int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,

			  enum pcie_link_width *width);

u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev,

			     enum pci_bus_speed *speed,

			     enum pcie_link_width *width);