Commit e4fbb68f authored Feb 01, 2010 by Abhijeet Dharmapurikar Committed by Daniel Walker Oct 08, 2010

msm: 8x60: setup correct handlers for private interrupts

Private Peripheral interrupts could be edge triggered or level triggered
depending on the platform. Initialize handlers for these in board file.

Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>

parent 569fb6e3

arch/arm/mach-msm/board-msm8x60.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -44,7 +44,7 @@ static void __init msm8x60_init_irq(void)
		{
		unsigned int i;

		gic_dist_init(0, MSM_QGIC_DIST_BASE, 1);
		gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START);
		gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
		gic_cpu_init(0, MSM_QGIC_CPU_BASE);