[IA64] Convert ia64 to use int-ll64.h (e088a4ad) · Commits · e / devices / android_kernel_teracube_mt6765

arch/ia64/hp/common/sba_iommu.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -1787,7 +1787,7 @@ static struct ioc_iommu ioc_iommu_info[] __initdata = {
	};		};

	static struct ioc * __init		static struct ioc * __init
	ioc_init(u64 hpa, void *handle)		ioc_init(unsigned long hpa, void *handle)
	{		{
	struct ioc *ioc;		struct ioc *ioc;
	struct ioc_iommu *info;		struct ioc_iommu *info;

arch/ia64/include/asm/gcc_intrin.h

+9 −9

Original line number	Original line	Diff line number	Diff line
	@@ -388,7 +388,7 @@ register unsigned long ia64_r13 asm ("r13") __used;

	#define ia64_native_thash(addr) \		#define ia64_native_thash(addr) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \		asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})
	@@ -419,7 +419,7 @@ register unsigned long ia64_r13 asm ("r13") __used;

	#define ia64_tpa(addr) \		#define ia64_tpa(addr) \
	({ \		({ \
	__u64 ia64_pa; \		unsigned long ia64_pa; \
	asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \		asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
	ia64_pa; \		ia64_pa; \
	})		})
	@@ -444,35 +444,35 @@ register unsigned long ia64_r13 asm ("r13") __used;

	#define ia64_native_get_cpuid(index) \		#define ia64_native_get_cpuid(index) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \		asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})

	#define __ia64_get_dbr(index) \		#define __ia64_get_dbr(index) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \		asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})

	#define ia64_get_ibr(index) \		#define ia64_get_ibr(index) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \		asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})

	#define ia64_get_pkr(index) \		#define ia64_get_pkr(index) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \		asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})

	#define ia64_get_pmc(index) \		#define ia64_get_pmc(index) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \		asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})
	@@ -480,14 +480,14 @@ register unsigned long ia64_r13 asm ("r13") __used;

	#define ia64_native_get_pmd(index) \		#define ia64_native_get_pmd(index) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \		asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})

	#define ia64_native_get_rr(index) \		#define ia64_native_get_rr(index) \
	({ \		({ \
	__u64 ia64_intri_res; \		unsigned long ia64_intri_res; \
	asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \		asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
	ia64_intri_res; \		ia64_intri_res; \
	})		})

arch/ia64/include/asm/mca.h

+19 −19

Original line number	Original line	Diff line number	Diff line
	@@ -72,39 +72,39 @@ typedef struct ia64_mc_info_s {
	struct ia64_sal_os_state {		struct ia64_sal_os_state {

	/* SAL to OS */		/* SAL to OS */
	u64 os_gp; /* GP of the os registered with the SAL, physical */		unsigned long os_gp; /* GP of the os registered with the SAL, physical */
	u64 pal_proc; /* PAL_PROC entry point, physical */		unsigned long pal_proc; /* PAL_PROC entry point, physical */
	u64 sal_proc; /* SAL_PROC entry point, physical */		unsigned long sal_proc; /* SAL_PROC entry point, physical */
	u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */		unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */
	u64 proc_state_param; /* from R18 */		unsigned long proc_state_param; /* from R18 */
	u64 monarch; /* 1 for a monarch event, 0 for a slave */		unsigned long monarch; /* 1 for a monarch event, 0 for a slave */

	/* common */		/* common */
	u64 sal_ra; /* Return address in SAL, physical */		unsigned long sal_ra; /* Return address in SAL, physical */
	u64 sal_gp; /* GP of the SAL - physical */		unsigned long sal_gp; /* GP of the SAL - physical */
	pal_min_state_area_t pal_min_state; / from R17. physical in asm, virtual in C */		pal_min_state_area_t pal_min_state; / from R17. physical in asm, virtual in C */
	/* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).		/* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
	* Note: if the MCA/INIT recovery code wants to resume to a new context		* Note: if the MCA/INIT recovery code wants to resume to a new context
	* then it must change these values to reflect the new kernel stack.		* then it must change these values to reflect the new kernel stack.
	*/		*/
	u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */		unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
	u64 prev_IA64_KR_CURRENT_STACK;		unsigned long prev_IA64_KR_CURRENT_STACK;
	struct task_struct prev_task; / previous task, NULL if it is not useful */		struct task_struct prev_task; / previous task, NULL if it is not useful */
	/* Some interrupt registers are not saved in minstate, pt_regs or		/* Some interrupt registers are not saved in minstate, pt_regs or
	* switch_stack. Because MCA/INIT can occur when interrupts are		* switch_stack. Because MCA/INIT can occur when interrupts are
	* disabled, we need to save the additional interrupt registers over		* disabled, we need to save the additional interrupt registers over
	* MCA/INIT and resume.		* MCA/INIT and resume.
	*/		*/
	u64 isr;		unsigned long isr;
	u64 ifa;		unsigned long ifa;
	u64 itir;		unsigned long itir;
	u64 iipa;		unsigned long iipa;
	u64 iim;		unsigned long iim;
	u64 iha;		unsigned long iha;

	/* OS to SAL */		/* OS to SAL */
	u64 os_status; /* OS status to SAL, enum below */		unsigned long os_status; /* OS status to SAL, enum below */
	u64 context; /* 0 if return to same context		unsigned long context; /* 0 if return to same context
	1 if return to new context */		1 if return to new context */
	};		};

	@@ -150,7 +150,7 @@ extern void ia64_slave_init_handler(void);
	extern void ia64_mca_cmc_vector_setup(void);		extern void ia64_mca_cmc_vector_setup(void);
	extern int ia64_reg_MCA_extension(int (fn)(void , struct ia64_sal_os_state *));		extern int ia64_reg_MCA_extension(int (fn)(void , struct ia64_sal_os_state *));
	extern void ia64_unreg_MCA_extension(void);		extern void ia64_unreg_MCA_extension(void);
	extern u64 ia64_get_rnat(u64 *);		extern unsigned long ia64_get_rnat(unsigned long *);
	extern void ia64_mca_printk(const char * fmt, ...)		extern void ia64_mca_printk(const char * fmt, ...)
	__attribute__ ((format (printf, 1, 2)));		__attribute__ ((format (printf, 1, 2)));

arch/ia64/include/asm/meminit.h

+9 −9

Original line number	Original line	Diff line number	Diff line
	@@ -25,8 +25,8 @@
	#define IA64_MAX_RSVD_REGIONS 9		#define IA64_MAX_RSVD_REGIONS 9

	struct rsvd_region {		struct rsvd_region {
	unsigned long start; /* virtual address of beginning of element */		u64 start; /* virtual address of beginning of element */
	unsigned long end; /* virtual address of end of element + 1 */		u64 end; /* virtual address of end of element + 1 */
	};		};

	extern struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];		extern struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
	@@ -35,13 +35,13 @@ extern int num_rsvd_regions;
	extern void find_memory (void);		extern void find_memory (void);
	extern void reserve_memory (void);		extern void reserve_memory (void);
	extern void find_initrd (void);		extern void find_initrd (void);
	extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg);		extern int filter_rsvd_memory (u64 start, u64 end, void *arg);
	extern int filter_memory (unsigned long start, unsigned long end, void *arg);		extern int filter_memory (u64 start, u64 end, void *arg);
	extern unsigned long efi_memmap_init(unsigned long s, unsigned long e);		extern unsigned long efi_memmap_init(u64 s, u64 e);
	extern int find_max_min_low_pfn (unsigned long , unsigned long, void *);		extern int find_max_min_low_pfn (u64, u64, void *);

	extern unsigned long vmcore_find_descriptor_size(unsigned long address);		extern unsigned long vmcore_find_descriptor_size(unsigned long address);
	extern int reserve_elfcorehdr(unsigned long start, unsigned long end);		extern int reserve_elfcorehdr(u64 start, u64 end);

	/*		/*
	* For rounding an address to the next IA64_GRANULE_SIZE or order		* For rounding an address to the next IA64_GRANULE_SIZE or order

arch/ia64/include/asm/pal.h

+11 −13

Original line number	Original line	Diff line number	Diff line
	@@ -989,8 +989,8 @@ ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)
	}		}

	/* Return summary information about the hierarchy of caches controlled by the processor */		/* Return summary information about the hierarchy of caches controlled by the processor */
	static inline s64		static inline long ia64_pal_cache_summary(unsigned long *cache_levels,
	ia64_pal_cache_summary (u64 cache_levels, u64 unique_caches)		unsigned long *unique_caches)
	{		{
	struct ia64_pal_retval iprv;		struct ia64_pal_retval iprv;
	PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0);		PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0);
	@@ -1038,8 +1038,8 @@ ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc
	}		}

	/* Return the number of instruction and data debug register pairs */		/* Return the number of instruction and data debug register pairs */
	static inline s64		static inline long ia64_pal_debug_info(unsigned long *inst_regs,
	ia64_pal_debug_info (u64 inst_regs, u64 data_regs)		unsigned long *data_regs)
	{		{
	struct ia64_pal_retval iprv;		struct ia64_pal_retval iprv;
	PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0);		PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0);
	@@ -1074,8 +1074,7 @@ ia64_pal_fixed_addr (u64 *global_unique_addr)
	}		}

	/* Get base frequency of the platform if generated by the processor */		/* Get base frequency of the platform if generated by the processor */
	static inline s64		static inline long ia64_pal_freq_base(unsigned long *platform_base_freq)
	ia64_pal_freq_base (u64 *platform_base_freq)
	{		{
	struct ia64_pal_retval iprv;		struct ia64_pal_retval iprv;
	PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0);		PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0);
	@@ -1437,7 +1436,7 @@ ia64_pal_proc_set_features (u64 feature_select)
	* possible.		* possible.
	*/		*/
	typedef struct ia64_ptce_info_s {		typedef struct ia64_ptce_info_s {
	u64 base;		unsigned long base;
	u32 count[2];		u32 count[2];
	u32 stride[2];		u32 stride[2];
	} ia64_ptce_info_t;		} ia64_ptce_info_t;
	@@ -1478,9 +1477,9 @@ ia64_pal_register_info (u64 info_request, u64 reg_info_1, u64 reg_info_2)
	}		}

	typedef union pal_hints_u {		typedef union pal_hints_u {
	u64 ph_data;		unsigned long ph_data;
	struct {		struct {
	u64 si : 1,		unsigned long si : 1,
	li : 1,		li : 1,
	reserved : 62;		reserved : 62;
	} pal_hints_s;		} pal_hints_s;
	@@ -1489,8 +1488,8 @@ typedef union pal_hints_u {
	/* Return information about the register stack and RSE for this processor		/* Return information about the register stack and RSE for this processor
	* implementation.		* implementation.
	*/		*/
	static inline s64		static inline long ia64_pal_rse_info(unsigned long *num_phys_stacked,
	ia64_pal_rse_info (u64 num_phys_stacked, pal_hints_u_t hints)		pal_hints_u_t *hints)
	{		{
	struct ia64_pal_retval iprv;		struct ia64_pal_retval iprv;
	PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0);		PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0);
	@@ -1608,8 +1607,7 @@ ia64_pal_vm_info (u64 tc_level, u64 tc_type, pal_tc_info_u_t tc_info, u64 tc_
	/* Get page size information about the virtual memory characteristics of the processor		/* Get page size information about the virtual memory characteristics of the processor
	* implementation.		* implementation.
	*/		*/
	static inline s64		static inline s64 ia64_pal_vm_page_size(u64 tr_pages, u64 vw_pages)
	ia64_pal_vm_page_size (u64 tr_pages, u64 vw_pages)
	{		{
	struct ia64_pal_retval iprv;		struct ia64_pal_retval iprv;
	PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0);		PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0);