Loading arch/arm/mach-omap2/devices.c +40 −147 Original line number Original line Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/io.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/clk.h> #include <linux/err.h> #include <linux/err.h> #include <linux/slab.h> #include <mach/hardware.h> #include <mach/hardware.h> #include <mach/irqs.h> #include <mach/irqs.h> Loading Loading @@ -279,163 +280,55 @@ static inline void omap_init_audio(void) {} #include <plat/mcspi.h> #include <plat/mcspi.h> #define OMAP2_MCSPI1_BASE 0x48098000 struct omap_device_pm_latency omap_mcspi_latency[] = { #define OMAP2_MCSPI2_BASE 0x4809a000 [0] = { #define OMAP2_MCSPI3_BASE 0x480b8000 .deactivate_func = omap_device_idle_hwmods, #define OMAP2_MCSPI4_BASE 0x480ba000 .activate_func = omap_device_enable_hwmods, .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, #define OMAP4_MCSPI1_BASE 0x48098100 #define OMAP4_MCSPI2_BASE 0x4809a100 #define OMAP4_MCSPI3_BASE 0x480b8100 #define OMAP4_MCSPI4_BASE 0x480ba100 static struct omap2_mcspi_platform_config omap2_mcspi1_config = { .num_cs = 4, }; static struct resource omap2_mcspi1_resources[] = { { .start = OMAP2_MCSPI1_BASE, .end = OMAP2_MCSPI1_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi1 = { .name = "omap2_mcspi", .id = 1, .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), .resource = omap2_mcspi1_resources, .dev = { .platform_data = &omap2_mcspi1_config, }, }; static struct omap2_mcspi_platform_config omap2_mcspi2_config = { .num_cs = 2, }; static struct resource omap2_mcspi2_resources[] = { { .start = OMAP2_MCSPI2_BASE, .end = OMAP2_MCSPI2_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi2 = { .name = "omap2_mcspi", .id = 2, .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), .resource = omap2_mcspi2_resources, .dev = { .platform_data = &omap2_mcspi2_config, }, }; #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ defined(CONFIG_ARCH_OMAP4) static struct omap2_mcspi_platform_config omap2_mcspi3_config = { .num_cs = 2, }; static struct resource omap2_mcspi3_resources[] = { { .start = OMAP2_MCSPI3_BASE, .end = OMAP2_MCSPI3_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi3 = { .name = "omap2_mcspi", .id = 3, .num_resources = ARRAY_SIZE(omap2_mcspi3_resources), .resource = omap2_mcspi3_resources, .dev = { .platform_data = &omap2_mcspi3_config, }, }; #endif #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) static struct omap2_mcspi_platform_config omap2_mcspi4_config = { .num_cs = 1, }; static struct resource omap2_mcspi4_resources[] = { { .start = OMAP2_MCSPI4_BASE, .end = OMAP2_MCSPI4_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi4 = { .name = "omap2_mcspi", .id = 4, .num_resources = ARRAY_SIZE(omap2_mcspi4_resources), .resource = omap2_mcspi4_resources, .dev = { .platform_data = &omap2_mcspi4_config, }, }, }; }; #endif #ifdef CONFIG_ARCH_OMAP4 static inline void omap4_mcspi_fixup(void) { omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE; omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff; omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE; omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff; omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE; omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff; omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE; omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff; } #else static inline void omap4_mcspi_fixup(void) { } #endif #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) defined(CONFIG_ARCH_OMAP4) static inline void omap2_mcspi3_init(void) { platform_device_register(&omap2_mcspi3); } #else static inline void omap2_mcspi3_init(void) { { struct omap_device *od; char *name = "omap2_mcspi"; struct omap2_mcspi_platform_config *pdata; static int spi_num; struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr; pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); if (!pdata) { pr_err("Memory allocation for McSPI device failed\n"); return -ENOMEM; } pdata->num_cs = mcspi_attrib->num_chipselect; switch (oh->class->rev) { case OMAP2_MCSPI_REV: case OMAP3_MCSPI_REV: pdata->regs_offset = 0; break; case OMAP4_MCSPI_REV: pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET; break; default: pr_err("Invalid McSPI Revision value\n"); return -EINVAL; } } #endif #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) spi_num++; static inline void omap2_mcspi4_init(void) od = omap_device_build(name, spi_num, oh, pdata, { sizeof(*pdata), omap_mcspi_latency, platform_device_register(&omap2_mcspi4); ARRAY_SIZE(omap_mcspi_latency), 0); } WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", #else name, oh->name); static inline void omap2_mcspi4_init(void) kfree(pdata); { return 0; } } #endif static void omap_init_mcspi(void) static void omap_init_mcspi(void) { { if (cpu_is_omap44xx()) omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL); omap4_mcspi_fixup(); platform_device_register(&omap2_mcspi1); platform_device_register(&omap2_mcspi2); if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx()) omap2_mcspi3_init(); if (cpu_is_omap343x() || cpu_is_omap44xx()) omap2_mcspi4_init(); } } #else #else Loading arch/arm/mach-omap2/omap_hwmod_2420_data.c +156 −0 Original line number Original line Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <plat/serial.h> #include <plat/serial.h> #include <plat/i2c.h> #include <plat/i2c.h> #include <plat/gpio.h> #include <plat/gpio.h> #include <plat/mcspi.h> #include "omap_hwmod_common_data.h" #include "omap_hwmod_common_data.h" Loading @@ -44,6 +45,8 @@ static struct omap_hwmod omap2420_gpio2_hwmod; static struct omap_hwmod omap2420_gpio3_hwmod; static struct omap_hwmod omap2420_gpio3_hwmod; static struct omap_hwmod omap2420_gpio4_hwmod; static struct omap_hwmod omap2420_gpio4_hwmod; static struct omap_hwmod omap2420_dma_system_hwmod; static struct omap_hwmod omap2420_dma_system_hwmod; static struct omap_hwmod omap2420_mcspi1_hwmod; static struct omap_hwmod omap2420_mcspi2_hwmod; /* L3 -> L4_CORE interface */ /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { Loading Loading @@ -88,6 +91,42 @@ static struct omap_hwmod omap2420_uart3_hwmod; static struct omap_hwmod omap2420_i2c1_hwmod; static struct omap_hwmod omap2420_i2c1_hwmod; static struct omap_hwmod omap2420_i2c2_hwmod; static struct omap_hwmod omap2420_i2c2_hwmod; /* l4 core -> mcspi1 interface */ static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { { .pa_start = 0x48098000, .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2420_mcspi1_addr_space, .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { { .pa_start = 0x4809a000, .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2420_mcspi2_addr_space, .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4_CORE -> L4_WKUP interface */ /* L4_CORE -> L4_WKUP interface */ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { .master = &omap2420_l4_core_hwmod, .master = &omap2420_l4_core_hwmod, Loading Loading @@ -864,6 +903,119 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, .flags = HWMOD_NO_IDLEST, }; }; /* * 'mcspi' class * multichannel serial port interface (mcspi) / master/slave synchronous serial * bus */ static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2420_mcspi_class = { .name = "mcspi", .sysc = &omap2420_mcspi_sysc, .rev = OMAP2_MCSPI_REV, }; /* mcspi1 */ static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { { .irq = 65 }, }; static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ }; static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { &omap2420_l4_core__mcspi1, }; static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { .num_chipselect = 4, }; static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2420_mcspi1_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), .sdma_reqs = omap2420_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI1_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, }, }, .slaves = omap2420_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), .class = &omap2420_mcspi_class, .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* mcspi2 */ static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { { .irq = 66 }, }; static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ }; static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { &omap2420_l4_core__mcspi2, }; static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { .num_chipselect = 2, }; static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2420_mcspi2_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), .sdma_reqs = omap2420_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI2_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, }, }, .slaves = omap2420_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), .class = &omap2420_mcspi_class, .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; static __initdata struct omap_hwmod *omap2420_hwmods[] = { static __initdata struct omap_hwmod *omap2420_hwmods[] = { &omap2420_l3_main_hwmod, &omap2420_l3_main_hwmod, &omap2420_l4_core_hwmod, &omap2420_l4_core_hwmod, Loading @@ -885,6 +1037,10 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = { /* dma_system class*/ /* dma_system class*/ &omap2420_dma_system_hwmod, &omap2420_dma_system_hwmod, /* mcspi class */ &omap2420_mcspi1_hwmod, &omap2420_mcspi2_hwmod, NULL, NULL, }; }; Loading arch/arm/mach-omap2/omap_hwmod_2430_data.c +219 −0 Original line number Original line Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <plat/serial.h> #include <plat/serial.h> #include <plat/i2c.h> #include <plat/i2c.h> #include <plat/gpio.h> #include <plat/gpio.h> #include <plat/mcspi.h> #include "omap_hwmod_common_data.h" #include "omap_hwmod_common_data.h" Loading Loading @@ -45,6 +46,9 @@ static struct omap_hwmod omap2430_gpio3_hwmod; static struct omap_hwmod omap2430_gpio4_hwmod; static struct omap_hwmod omap2430_gpio4_hwmod; static struct omap_hwmod omap2430_gpio5_hwmod; static struct omap_hwmod omap2430_gpio5_hwmod; static struct omap_hwmod omap2430_dma_system_hwmod; static struct omap_hwmod omap2430_dma_system_hwmod; static struct omap_hwmod omap2430_mcspi1_hwmod; static struct omap_hwmod omap2430_mcspi2_hwmod; static struct omap_hwmod omap2430_mcspi3_hwmod; /* L3 -> L4_CORE interface */ /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { Loading Loading @@ -223,6 +227,60 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { }; }; /* l4 core -> mcspi1 interface */ static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { { .pa_start = 0x48098000, .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2430_mcspi1_addr_space, .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { { .pa_start = 0x4809a000, .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2430_mcspi2_addr_space, .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi3 interface */ static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { { .pa_start = 0x480b8000, .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi3_hwmod, .clk = "mcspi3_ick", .addr = omap2430_mcspi3_addr_space, .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 WKUP */ /* L4 WKUP */ static struct omap_hwmod omap2430_l4_wkup_hwmod = { static struct omap_hwmod omap2430_l4_wkup_hwmod = { .name = "l4_wkup", .name = "l4_wkup", Loading Loading @@ -919,6 +977,162 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, .flags = HWMOD_NO_IDLEST, }; }; /* * 'mcspi' class * multichannel serial port interface (mcspi) / master/slave synchronous serial * bus */ static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2430_mcspi_class = { .name = "mcspi", .sysc = &omap2430_mcspi_sysc, .rev = OMAP2_MCSPI_REV, }; /* mcspi1 */ static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { { .irq = 65 }, }; static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ }; static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { &omap2430_l4_core__mcspi1, }; static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { .num_chipselect = 4, }; static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2430_mcspi1_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), .sdma_reqs = omap2430_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI1_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, }, }, .slaves = omap2430_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), .class = &omap2430_mcspi_class, .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcspi2 */ static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { { .irq = 66 }, }; static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ }; static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { &omap2430_l4_core__mcspi2, }; static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { .num_chipselect = 2, }; static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2430_mcspi2_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), .sdma_reqs = omap2430_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI2_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, }, }, .slaves = omap2430_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), .class = &omap2430_mcspi_class, .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcspi3 */ static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { { .irq = 91 }, }; static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */ { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ }; static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { &omap2430_l4_core__mcspi3, }; static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { .num_chipselect = 2, }; static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), .sdma_reqs = omap2430_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 2, .module_bit = OMAP2430_EN_MCSPI3_SHIFT, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, }, }, .slaves = omap2430_mcspi3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), .class = &omap2430_mcspi_class, .dev_attr = &omap_mcspi3_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; static __initdata struct omap_hwmod *omap2430_hwmods[] = { static __initdata struct omap_hwmod *omap2430_hwmods[] = { &omap2430_l3_main_hwmod, &omap2430_l3_main_hwmod, &omap2430_l4_core_hwmod, &omap2430_l4_core_hwmod, Loading @@ -941,6 +1155,11 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = { /* dma_system class*/ /* dma_system class*/ &omap2430_dma_system_hwmod, &omap2430_dma_system_hwmod, /* mcspi class */ &omap2430_mcspi1_hwmod, &omap2430_mcspi2_hwmod, &omap2430_mcspi3_hwmod, NULL, NULL, }; }; Loading arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +280 −0 File changed.Preview size limit exceeded, changes collapsed. Show changes arch/arm/plat-omap/include/plat/mcspi.h +11 −0 Original line number Original line Diff line number Diff line #ifndef _OMAP2_MCSPI_H #ifndef _OMAP2_MCSPI_H #define _OMAP2_MCSPI_H #define _OMAP2_MCSPI_H #define OMAP2_MCSPI_REV 0 #define OMAP3_MCSPI_REV 1 #define OMAP4_MCSPI_REV 2 #define OMAP4_MCSPI_REG_OFFSET 0x100 struct omap2_mcspi_platform_config { struct omap2_mcspi_platform_config { unsigned short num_cs; unsigned short num_cs; unsigned int regs_offset; }; struct omap2_mcspi_dev_attr { unsigned short num_chipselect; }; }; struct omap2_mcspi_device_config { struct omap2_mcspi_device_config { Loading Loading
arch/arm/mach-omap2/devices.c +40 −147 Original line number Original line Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/io.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/clk.h> #include <linux/err.h> #include <linux/err.h> #include <linux/slab.h> #include <mach/hardware.h> #include <mach/hardware.h> #include <mach/irqs.h> #include <mach/irqs.h> Loading Loading @@ -279,163 +280,55 @@ static inline void omap_init_audio(void) {} #include <plat/mcspi.h> #include <plat/mcspi.h> #define OMAP2_MCSPI1_BASE 0x48098000 struct omap_device_pm_latency omap_mcspi_latency[] = { #define OMAP2_MCSPI2_BASE 0x4809a000 [0] = { #define OMAP2_MCSPI3_BASE 0x480b8000 .deactivate_func = omap_device_idle_hwmods, #define OMAP2_MCSPI4_BASE 0x480ba000 .activate_func = omap_device_enable_hwmods, .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, #define OMAP4_MCSPI1_BASE 0x48098100 #define OMAP4_MCSPI2_BASE 0x4809a100 #define OMAP4_MCSPI3_BASE 0x480b8100 #define OMAP4_MCSPI4_BASE 0x480ba100 static struct omap2_mcspi_platform_config omap2_mcspi1_config = { .num_cs = 4, }; static struct resource omap2_mcspi1_resources[] = { { .start = OMAP2_MCSPI1_BASE, .end = OMAP2_MCSPI1_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi1 = { .name = "omap2_mcspi", .id = 1, .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), .resource = omap2_mcspi1_resources, .dev = { .platform_data = &omap2_mcspi1_config, }, }; static struct omap2_mcspi_platform_config omap2_mcspi2_config = { .num_cs = 2, }; static struct resource omap2_mcspi2_resources[] = { { .start = OMAP2_MCSPI2_BASE, .end = OMAP2_MCSPI2_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi2 = { .name = "omap2_mcspi", .id = 2, .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), .resource = omap2_mcspi2_resources, .dev = { .platform_data = &omap2_mcspi2_config, }, }; #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ defined(CONFIG_ARCH_OMAP4) static struct omap2_mcspi_platform_config omap2_mcspi3_config = { .num_cs = 2, }; static struct resource omap2_mcspi3_resources[] = { { .start = OMAP2_MCSPI3_BASE, .end = OMAP2_MCSPI3_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi3 = { .name = "omap2_mcspi", .id = 3, .num_resources = ARRAY_SIZE(omap2_mcspi3_resources), .resource = omap2_mcspi3_resources, .dev = { .platform_data = &omap2_mcspi3_config, }, }; #endif #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) static struct omap2_mcspi_platform_config omap2_mcspi4_config = { .num_cs = 1, }; static struct resource omap2_mcspi4_resources[] = { { .start = OMAP2_MCSPI4_BASE, .end = OMAP2_MCSPI4_BASE + 0xff, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap2_mcspi4 = { .name = "omap2_mcspi", .id = 4, .num_resources = ARRAY_SIZE(omap2_mcspi4_resources), .resource = omap2_mcspi4_resources, .dev = { .platform_data = &omap2_mcspi4_config, }, }, }; }; #endif #ifdef CONFIG_ARCH_OMAP4 static inline void omap4_mcspi_fixup(void) { omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE; omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff; omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE; omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff; omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE; omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff; omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE; omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff; } #else static inline void omap4_mcspi_fixup(void) { } #endif #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) defined(CONFIG_ARCH_OMAP4) static inline void omap2_mcspi3_init(void) { platform_device_register(&omap2_mcspi3); } #else static inline void omap2_mcspi3_init(void) { { struct omap_device *od; char *name = "omap2_mcspi"; struct omap2_mcspi_platform_config *pdata; static int spi_num; struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr; pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); if (!pdata) { pr_err("Memory allocation for McSPI device failed\n"); return -ENOMEM; } pdata->num_cs = mcspi_attrib->num_chipselect; switch (oh->class->rev) { case OMAP2_MCSPI_REV: case OMAP3_MCSPI_REV: pdata->regs_offset = 0; break; case OMAP4_MCSPI_REV: pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET; break; default: pr_err("Invalid McSPI Revision value\n"); return -EINVAL; } } #endif #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) spi_num++; static inline void omap2_mcspi4_init(void) od = omap_device_build(name, spi_num, oh, pdata, { sizeof(*pdata), omap_mcspi_latency, platform_device_register(&omap2_mcspi4); ARRAY_SIZE(omap_mcspi_latency), 0); } WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", #else name, oh->name); static inline void omap2_mcspi4_init(void) kfree(pdata); { return 0; } } #endif static void omap_init_mcspi(void) static void omap_init_mcspi(void) { { if (cpu_is_omap44xx()) omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL); omap4_mcspi_fixup(); platform_device_register(&omap2_mcspi1); platform_device_register(&omap2_mcspi2); if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx()) omap2_mcspi3_init(); if (cpu_is_omap343x() || cpu_is_omap44xx()) omap2_mcspi4_init(); } } #else #else Loading
arch/arm/mach-omap2/omap_hwmod_2420_data.c +156 −0 Original line number Original line Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <plat/serial.h> #include <plat/serial.h> #include <plat/i2c.h> #include <plat/i2c.h> #include <plat/gpio.h> #include <plat/gpio.h> #include <plat/mcspi.h> #include "omap_hwmod_common_data.h" #include "omap_hwmod_common_data.h" Loading @@ -44,6 +45,8 @@ static struct omap_hwmod omap2420_gpio2_hwmod; static struct omap_hwmod omap2420_gpio3_hwmod; static struct omap_hwmod omap2420_gpio3_hwmod; static struct omap_hwmod omap2420_gpio4_hwmod; static struct omap_hwmod omap2420_gpio4_hwmod; static struct omap_hwmod omap2420_dma_system_hwmod; static struct omap_hwmod omap2420_dma_system_hwmod; static struct omap_hwmod omap2420_mcspi1_hwmod; static struct omap_hwmod omap2420_mcspi2_hwmod; /* L3 -> L4_CORE interface */ /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { Loading Loading @@ -88,6 +91,42 @@ static struct omap_hwmod omap2420_uart3_hwmod; static struct omap_hwmod omap2420_i2c1_hwmod; static struct omap_hwmod omap2420_i2c1_hwmod; static struct omap_hwmod omap2420_i2c2_hwmod; static struct omap_hwmod omap2420_i2c2_hwmod; /* l4 core -> mcspi1 interface */ static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { { .pa_start = 0x48098000, .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2420_mcspi1_addr_space, .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { { .pa_start = 0x4809a000, .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2420_mcspi2_addr_space, .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4_CORE -> L4_WKUP interface */ /* L4_CORE -> L4_WKUP interface */ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { .master = &omap2420_l4_core_hwmod, .master = &omap2420_l4_core_hwmod, Loading Loading @@ -864,6 +903,119 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, .flags = HWMOD_NO_IDLEST, }; }; /* * 'mcspi' class * multichannel serial port interface (mcspi) / master/slave synchronous serial * bus */ static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2420_mcspi_class = { .name = "mcspi", .sysc = &omap2420_mcspi_sysc, .rev = OMAP2_MCSPI_REV, }; /* mcspi1 */ static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { { .irq = 65 }, }; static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ }; static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { &omap2420_l4_core__mcspi1, }; static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { .num_chipselect = 4, }; static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2420_mcspi1_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), .sdma_reqs = omap2420_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI1_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, }, }, .slaves = omap2420_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), .class = &omap2420_mcspi_class, .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* mcspi2 */ static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { { .irq = 66 }, }; static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ }; static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { &omap2420_l4_core__mcspi2, }; static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { .num_chipselect = 2, }; static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2420_mcspi2_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), .sdma_reqs = omap2420_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI2_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, }, }, .slaves = omap2420_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), .class = &omap2420_mcspi_class, .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; static __initdata struct omap_hwmod *omap2420_hwmods[] = { static __initdata struct omap_hwmod *omap2420_hwmods[] = { &omap2420_l3_main_hwmod, &omap2420_l3_main_hwmod, &omap2420_l4_core_hwmod, &omap2420_l4_core_hwmod, Loading @@ -885,6 +1037,10 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = { /* dma_system class*/ /* dma_system class*/ &omap2420_dma_system_hwmod, &omap2420_dma_system_hwmod, /* mcspi class */ &omap2420_mcspi1_hwmod, &omap2420_mcspi2_hwmod, NULL, NULL, }; }; Loading
arch/arm/mach-omap2/omap_hwmod_2430_data.c +219 −0 Original line number Original line Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <plat/serial.h> #include <plat/serial.h> #include <plat/i2c.h> #include <plat/i2c.h> #include <plat/gpio.h> #include <plat/gpio.h> #include <plat/mcspi.h> #include "omap_hwmod_common_data.h" #include "omap_hwmod_common_data.h" Loading Loading @@ -45,6 +46,9 @@ static struct omap_hwmod omap2430_gpio3_hwmod; static struct omap_hwmod omap2430_gpio4_hwmod; static struct omap_hwmod omap2430_gpio4_hwmod; static struct omap_hwmod omap2430_gpio5_hwmod; static struct omap_hwmod omap2430_gpio5_hwmod; static struct omap_hwmod omap2430_dma_system_hwmod; static struct omap_hwmod omap2430_dma_system_hwmod; static struct omap_hwmod omap2430_mcspi1_hwmod; static struct omap_hwmod omap2430_mcspi2_hwmod; static struct omap_hwmod omap2430_mcspi3_hwmod; /* L3 -> L4_CORE interface */ /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { Loading Loading @@ -223,6 +227,60 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { }; }; /* l4 core -> mcspi1 interface */ static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { { .pa_start = 0x48098000, .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2430_mcspi1_addr_space, .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { { .pa_start = 0x4809a000, .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2430_mcspi2_addr_space, .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi3 interface */ static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { { .pa_start = 0x480b8000, .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi3_hwmod, .clk = "mcspi3_ick", .addr = omap2430_mcspi3_addr_space, .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 WKUP */ /* L4 WKUP */ static struct omap_hwmod omap2430_l4_wkup_hwmod = { static struct omap_hwmod omap2430_l4_wkup_hwmod = { .name = "l4_wkup", .name = "l4_wkup", Loading Loading @@ -919,6 +977,162 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, .flags = HWMOD_NO_IDLEST, }; }; /* * 'mcspi' class * multichannel serial port interface (mcspi) / master/slave synchronous serial * bus */ static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2430_mcspi_class = { .name = "mcspi", .sysc = &omap2430_mcspi_sysc, .rev = OMAP2_MCSPI_REV, }; /* mcspi1 */ static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { { .irq = 65 }, }; static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ }; static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { &omap2430_l4_core__mcspi1, }; static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { .num_chipselect = 4, }; static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2430_mcspi1_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), .sdma_reqs = omap2430_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI1_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, }, }, .slaves = omap2430_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), .class = &omap2430_mcspi_class, .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcspi2 */ static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { { .irq = 66 }, }; static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ }; static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { &omap2430_l4_core__mcspi2, }; static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { .num_chipselect = 2, }; static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2430_mcspi2_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), .sdma_reqs = omap2430_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MCSPI2_SHIFT, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, }, }, .slaves = omap2430_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), .class = &omap2430_mcspi_class, .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcspi3 */ static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { { .irq = 91 }, }; static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */ { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ }; static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { &omap2430_l4_core__mcspi3, }; static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { .num_chipselect = 2, }; static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), .sdma_reqs = omap2430_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { .module_offs = CORE_MOD, .prcm_reg_id = 2, .module_bit = OMAP2430_EN_MCSPI3_SHIFT, .idlest_reg_id = 2, .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, }, }, .slaves = omap2430_mcspi3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), .class = &omap2430_mcspi_class, .dev_attr = &omap_mcspi3_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; static __initdata struct omap_hwmod *omap2430_hwmods[] = { static __initdata struct omap_hwmod *omap2430_hwmods[] = { &omap2430_l3_main_hwmod, &omap2430_l3_main_hwmod, &omap2430_l4_core_hwmod, &omap2430_l4_core_hwmod, Loading @@ -941,6 +1155,11 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = { /* dma_system class*/ /* dma_system class*/ &omap2430_dma_system_hwmod, &omap2430_dma_system_hwmod, /* mcspi class */ &omap2430_mcspi1_hwmod, &omap2430_mcspi2_hwmod, &omap2430_mcspi3_hwmod, NULL, NULL, }; }; Loading
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +280 −0 File changed.Preview size limit exceeded, changes collapsed. Show changes
arch/arm/plat-omap/include/plat/mcspi.h +11 −0 Original line number Original line Diff line number Diff line #ifndef _OMAP2_MCSPI_H #ifndef _OMAP2_MCSPI_H #define _OMAP2_MCSPI_H #define _OMAP2_MCSPI_H #define OMAP2_MCSPI_REV 0 #define OMAP3_MCSPI_REV 1 #define OMAP4_MCSPI_REV 2 #define OMAP4_MCSPI_REG_OFFSET 0x100 struct omap2_mcspi_platform_config { struct omap2_mcspi_platform_config { unsigned short num_cs; unsigned short num_cs; unsigned int regs_offset; }; struct omap2_mcspi_dev_attr { unsigned short num_chipselect; }; }; struct omap2_mcspi_device_config { struct omap2_mcspi_device_config { Loading