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Commit ded11383 authored by Paul Walmsley's avatar Paul Walmsley
Browse files

omap_hwmod: share identical omap_hwmod_addr_space arrays



To reduce kernel source file data duplication, share struct
omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data
files.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 78183f3f
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+8 −3
Original line number Diff line number Diff line
@@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
obj-$(CONFIG_SOC_OMAP2430)		+= opp2430_data.o

# hwmod data
obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2420_data.o
obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2430_data.o
obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_3xxx_data.o
obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_interconnect_data.o \
					   omap_hwmod_2xxx_3xxx_interconnect_data.o \
					   omap_hwmod_2420_data.o
obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_interconnect_data.o \
					   omap_hwmod_2xxx_3xxx_interconnect_data.o \
					   omap_hwmod_2430_data.o
obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_2xxx_3xxx_interconnect_data.o \
					   omap_hwmod_3xxx_data.o
obj-$(CONFIG_ARCH_OMAP4)		+= omap_hwmod_44xx_data.o

# EMU peripherals
+26 −265
Original line number Diff line number Diff line
@@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod;
static struct omap_hwmod omap2420_mcbsp2_hwmod;

/* l4 core -> mcspi1 interface */
static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = {
	{
		.pa_start	= 0x48098000,
		.pa_end		= 0x480980ff,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_mcspi1_hwmod,
	.clk		= "mcspi1_ick",
	.addr		= omap2420_mcspi1_addr_space,
	.addr		= omap2_mcspi1_addr_space,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

/* l4 core -> mcspi2 interface */
static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = {
	{
		.pa_start	= 0x4809a000,
		.pa_end		= 0x4809a0ff,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_mcspi2_hwmod,
	.clk		= "mcspi2_ick",
	.addr		= omap2420_mcspi2_addr_space,
	.addr		= omap2_mcspi2_addr_space,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
};

/* L4 CORE -> UART1 interface */
static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = {
	{
		.pa_start	= OMAP2_UART1_BASE,
		.pa_end		= OMAP2_UART1_BASE + SZ_8K - 1,
		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
	},
	{ }
};

static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_uart1_hwmod,
	.clk		= "uart1_ick",
	.addr		= omap2420_uart1_addr_space,
	.addr		= omap2xxx_uart1_addr_space,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

/* L4 CORE -> UART2 interface */
static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = {
	{
		.pa_start	= OMAP2_UART2_BASE,
		.pa_end		= OMAP2_UART2_BASE + SZ_1K - 1,
		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
	},
	{ }
};

static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_uart2_hwmod,
	.clk		= "uart2_ick",
	.addr		= omap2420_uart2_addr_space,
	.addr		= omap2xxx_uart2_addr_space,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

/* L4 PER -> UART3 interface */
static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = {
	{
		.pa_start	= OMAP2_UART3_BASE,
		.pa_end		= OMAP2_UART3_BASE + SZ_1K - 1,
		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
	},
	{ }
};

static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_uart3_hwmod,
	.clk		= "uart3_ick",
	.addr		= omap2420_uart3_addr_space,
	.addr		= omap2xxx_uart3_addr_space,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

/* I2C IP block address space length (in bytes) */
#define OMAP2_I2C_AS_LEN		128

/* L4 CORE -> I2C1 interface */
static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = {
	{
		.pa_start	= 0x48070000,
		.pa_end		= 0x48070000 + OMAP2_I2C_AS_LEN - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_i2c1_hwmod,
	.clk		= "i2c1_ick",
	.addr		= omap2420_i2c1_addr_space,
	.addr		= omap2_i2c1_addr_space,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

/* L4 CORE -> I2C2 interface */
static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = {
	{
		.pa_start	= 0x48072000,
		.pa_end		= 0x48072000 + OMAP2_I2C_AS_LEN - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_i2c2_hwmod,
	.clk		= "i2c2_ick",
	.addr		= omap2420_i2c2_addr_space,
	.addr		= omap2_i2c2_addr_space,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
	{ .irq = 38, },
};

static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = {
	{
		.pa_start	= 0x4802a000,
		.pa_end		= 0x4802a000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer2 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer2_hwmod,
	.clk		= "gpt2_ick",
	.addr		= omap2420_timer2_addrs,
	.addr		= omap2xxx_timer2_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = {
	{ .irq = 39, },
};

static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = {
	{
		.pa_start	= 0x48078000,
		.pa_end		= 0x48078000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer3 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer3_hwmod,
	.clk		= "gpt3_ick",
	.addr		= omap2420_timer3_addrs,
	.addr		= omap2xxx_timer3_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = {
	{ .irq = 40, },
};

static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = {
	{
		.pa_start	= 0x4807a000,
		.pa_end		= 0x4807a000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer4 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer4_hwmod,
	.clk		= "gpt4_ick",
	.addr		= omap2420_timer4_addrs,
	.addr		= omap2xxx_timer4_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = {
	{ .irq = 41, },
};

static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = {
	{
		.pa_start	= 0x4807c000,
		.pa_end		= 0x4807c000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer5 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer5_hwmod,
	.clk		= "gpt5_ick",
	.addr		= omap2420_timer5_addrs,
	.addr		= omap2xxx_timer5_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = {
	{ .irq = 42, },
};

static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = {
	{
		.pa_start	= 0x4807e000,
		.pa_end		= 0x4807e000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer6 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer6_hwmod,
	.clk		= "gpt6_ick",
	.addr		= omap2420_timer6_addrs,
	.addr		= omap2xxx_timer6_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = {
	{ .irq = 43, },
};

static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = {
	{
		.pa_start	= 0x48080000,
		.pa_end		= 0x48080000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer7 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer7_hwmod,
	.clk		= "gpt7_ick",
	.addr		= omap2420_timer7_addrs,
	.addr		= omap2xxx_timer7_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = {
	{ .irq = 44, },
};

static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = {
	{
		.pa_start	= 0x48082000,
		.pa_end		= 0x48082000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer8 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer8_hwmod,
	.clk		= "gpt8_ick",
	.addr		= omap2420_timer8_addrs,
	.addr		= omap2xxx_timer8_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = {
	{ .irq = 45, },
};

static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = {
	{
		.pa_start	= 0x48084000,
		.pa_end		= 0x48084000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer9 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer9_hwmod,
	.clk		= "gpt9_ick",
	.addr		= omap2420_timer9_addrs,
	.addr		= omap2xxx_timer9_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = {
	{ .irq = 46, },
};

static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = {
	{
		.pa_start	= 0x48086000,
		.pa_end		= 0x48086000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer10 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer10_hwmod,
	.clk		= "gpt10_ick",
	.addr		= omap2420_timer10_addrs,
	.addr		= omap2_timer10_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = {
	{ .irq = 47, },
};

static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = {
	{
		.pa_start	= 0x48088000,
		.pa_end		= 0x48088000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer11 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer11_hwmod,
	.clk		= "gpt11_ick",
	.addr		= omap2420_timer11_addrs,
	.addr		= omap2_timer11_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = {
	{ .irq = 48, },
};

static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = {
	{
		.pa_start	= 0x4808a000,
		.pa_end		= 0x4808a000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> timer12 */
static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_timer12_hwmod,
	.clk		= "gpt12_ick",
	.addr		= omap2420_timer12_addrs,
	.addr		= omap2xxx_timer12_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
	&omap2420_dss__l3,
};

static struct omap_hwmod_addr_space omap2420_dss_addrs[] = {
	{
		.pa_start	= 0x48050000,
		.pa_end		= 0x480503FF,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> dss */
static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_dss_core_hwmod,
	.clk		= "dss_ick",
	.addr		= omap2420_dss_addrs,
	.addr		= omap2_dss_addrs,
	.fw = {
		.omap2 = {
			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
@@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
	{ .irq = 25 },
};

static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = {
	{
		.pa_start	= 0x48050400,
		.pa_end		= 0x480507FF,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> dss_dispc */
static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_dss_dispc_hwmod,
	.clk		= "dss_ick",
	.addr		= omap2420_dss_dispc_addrs,
	.addr		= omap2_dss_dispc_addrs,
	.fw = {
		.omap2 = {
			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
@@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = {
	.sysc = &omap2420_rfbi_sysc,
};

static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = {
	{
		.pa_start	= 0x48050800,
		.pa_end		= 0x48050BFF,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> dss_rfbi */
static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_dss_rfbi_hwmod,
	.clk		= "dss_ick",
	.addr		= omap2420_dss_rfbi_addrs,
	.addr		= omap2_dss_rfbi_addrs,
	.fw = {
		.omap2 = {
			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
@@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = {
	.name = "venc",
};

/* dss_venc */
static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = {
	{
		.pa_start	= 0x48050C00,
		.pa_end		= 0x48050FFF,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> dss_venc */
static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_dss_venc_hwmod,
	.clk		= "dss_54m_fck",
	.addr		= omap2420_dss_venc_addrs,
	.addr		= omap2_dss_venc_addrs,
	.fw = {
		.omap2 = {
			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
@@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
	{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
};

static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
	{
		.pa_start	= 0x48056000,
		.pa_end		= 0x48056fff,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* dma_system -> L3 */
static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
	.master		= &omap2420_dma_system_hwmod,
@@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_dma_system_hwmod,
	.clk		= "sdma_ick",
	.addr		= omap2420_dma_system_addrs,
	.addr		= omap2_dma_system_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
	{ .name = "iva", .irq = 34 },
};

static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = {
	{
		.pa_start	= 0x48094000,
		.pa_end		= 0x480941ff,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

/* l4_core -> mailbox */
static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_mailbox_hwmod,
	.addr		= omap2420_mailbox_addrs,
	.addr		= omap2_mailbox_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
	{ .name = "tx", .dma_req = 31 },
};

static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = {
	{
		.name		= "mpu",
		.pa_start	= 0x48074000,
		.pa_end		= 0x480740ff,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> mcbsp1 */
static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_mcbsp1_hwmod,
	.clk		= "mcbsp1_ick",
	.addr		= omap2420_mcbsp1_addrs,
	.addr		= omap2_mcbsp1_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

@@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
	{ .name = "tx", .dma_req = 33 },
};

static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = {
	{
		.name		= "mpu",
		.pa_start	= 0x48076000,
		.pa_end		= 0x480760ff,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

/* l4_core -> mcbsp2 */
static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
	.master		= &omap2420_l4_core_hwmod,
	.slave		= &omap2420_mcbsp2_hwmod,
	.clk		= "mcbsp2_ick",
	.addr		= omap2420_mcbsp2_addrs,
	.addr		= omap2xxx_mcbsp2_addrs,
	.user		= OCP_USER_MPU | OCP_USER_SDMA,
};

+26 −293

File changed.

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+173 −0
Original line number Diff line number Diff line
/*
 * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
 *
 * Copyright (C) 2009-2011 Nokia Corporation
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * XXX handle crossbar/shared link difference for L3?
 * XXX these should be marked initdata for multi-OMAP kernels
 */
#include <asm/sizes.h>

#include <plat/omap_hwmod.h>
#include <plat/serial.h>

#include "omap_hwmod_common_data.h"

struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
	{
		.pa_start	= 0x4809c000,
		.pa_end		= 0x4809c1ff,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
	{
		.pa_start	= 0x480b4000,
		.pa_end		= 0x480b41ff,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
	{
		.pa_start	= 0x48070000,
		.pa_end		= 0x48070000 + SZ_128 - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
	{
		.pa_start	= 0x48072000,
		.pa_end		= 0x48072000 + SZ_128 - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2_dss_addrs[] = {
	{
		.pa_start	= 0x48050000,
		.pa_end		= 0x48050000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
	{
		.pa_start	= 0x48050400,
		.pa_end		= 0x48050400 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
	{
		.pa_start	= 0x48050800,
		.pa_end		= 0x48050800 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
	{
		.pa_start	= 0x48050C00,
		.pa_end		= 0x48050C00 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
	{
		.pa_start	= 0x48086000,
		.pa_end		= 0x48086000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
	{
		.pa_start	= 0x48088000,
		.pa_end		= 0x48088000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
	{
		.pa_start	= 0x4808a000,
		.pa_end		= 0x4808a000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
	{
		.pa_start	= 0x48098000,
		.pa_end		= 0x48098000 + SZ_256 - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
	{
		.pa_start	= 0x4809a000,
		.pa_end		= 0x4809a000 + SZ_256 - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
	{
		.pa_start	= 0x480b8000,
		.pa_end		= 0x480b8000 + SZ_256 - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
	{
		.pa_start	= 0x48056000,
		.pa_end		= 0x48056000 + SZ_4K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
	{
		.pa_start	= 0x48094000,
		.pa_end		= 0x48094000 + SZ_512 - 1,
		.flags		= ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
	{
		.name		= "mpu",
		.pa_start	= 0x48074000,
		.pa_end		= 0x480740ff,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};
+130 −0
Original line number Diff line number Diff line
/*
 * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
 *
 * Copyright (C) 2009-2011 Nokia Corporation
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * XXX handle crossbar/shared link difference for L3?
 * XXX these should be marked initdata for multi-OMAP kernels
 */
#include <asm/sizes.h>

#include <plat/omap_hwmod.h>
#include <plat/serial.h>

#include "omap_hwmod_common_data.h"

struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
	{
		.pa_start	= OMAP2_UART1_BASE,
		.pa_end		= OMAP2_UART1_BASE + SZ_8K - 1,
		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
	{
		.pa_start	= OMAP2_UART2_BASE,
		.pa_end		= OMAP2_UART2_BASE + SZ_1K - 1,
		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
	{
		.pa_start	= OMAP2_UART3_BASE,
		.pa_end		= OMAP2_UART3_BASE + SZ_1K - 1,
		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
	{
		.pa_start	= 0x4802a000,
		.pa_end		= 0x4802a000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
	{
		.pa_start	= 0x48078000,
		.pa_end		= 0x48078000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
	{
		.pa_start	= 0x4807a000,
		.pa_end		= 0x4807a000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
	{
		.pa_start	= 0x4807c000,
		.pa_end		= 0x4807c000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
	{
		.pa_start	= 0x4807e000,
		.pa_end		= 0x4807e000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
	{
		.pa_start	= 0x48080000,
		.pa_end		= 0x48080000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
	{
		.pa_start	= 0x48082000,
		.pa_end		= 0x48082000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
	{
		.pa_start	= 0x48084000,
		.pa_end		= 0x48084000 + SZ_1K - 1,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
	{
		.name		= "mpu",
		.pa_start	= 0x48076000,
		.pa_end		= 0x480760ff,
		.flags		= ADDR_TYPE_RT
	},
	{ }
};

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