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Commit d9f58812 authored by Ricardo Ribalda Delgado's avatar Ricardo Ribalda Delgado Committed by Mark Brown
Browse files

spi/xilinx: Do not inhibit transmission in polling mode



When no irq is used, there is no need to inhibit the transmission for
every transaction. This inhibition was implemented to avoid a race
condition with the irq handler.

Signed-off-by: default avatarRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 5fe11cc0
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+15 −10
Original line number Original line Diff line number Diff line
@@ -163,6 +163,7 @@ static void xspi_rx32(struct xilinx_spi *xspi)
static void xspi_init_hw(struct xilinx_spi *xspi)
static void xspi_init_hw(struct xilinx_spi *xspi)
{
{
	void __iomem *regs_base = xspi->regs;
	void __iomem *regs_base = xspi->regs;
	u32 inhibit;


	/* Reset the SPI device */
	/* Reset the SPI device */
	xspi->write_fn(XIPIF_V123B_RESET_MASK,
	xspi->write_fn(XIPIF_V123B_RESET_MASK,
@@ -173,16 +174,19 @@ static void xspi_init_hw(struct xilinx_spi *xspi)
	xspi->write_fn(XSPI_INTR_TX_EMPTY,
	xspi->write_fn(XSPI_INTR_TX_EMPTY,
			regs_base + XIPIF_V123B_IIER_OFFSET);
			regs_base + XIPIF_V123B_IIER_OFFSET);
	/* Enable the global IPIF interrupt */
	/* Enable the global IPIF interrupt */
	if (xspi->irq >= 0)
	if (xspi->irq >= 0) {
		xspi->write_fn(XIPIF_V123B_GINTR_ENABLE,
		xspi->write_fn(XIPIF_V123B_GINTR_ENABLE,
			regs_base + XIPIF_V123B_DGIER_OFFSET);
			regs_base + XIPIF_V123B_DGIER_OFFSET);
	else
		inhibit = XSPI_CR_TRANS_INHIBIT;
	} else {
		xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);
		xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);
		inhibit = 0;
	}
	/* Deselect the slave on the SPI bus */
	/* Deselect the slave on the SPI bus */
	xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET);
	xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET);
	/* Disable the transmitter, enable Manual Slave Select Assertion,
	/* Disable the transmitter, enable Manual Slave Select Assertion,
	 * put SPI controller into master mode, and enable it */
	 * put SPI controller into master mode, and enable it */
	xspi->write_fn(XSPI_CR_TRANS_INHIBIT | XSPI_CR_MANUAL_SSELECT |
	xspi->write_fn(inhibit | XSPI_CR_MANUAL_SSELECT |
		XSPI_CR_MASTER_MODE | XSPI_CR_ENABLE | XSPI_CR_TXFIFO_RESET |
		XSPI_CR_MASTER_MODE | XSPI_CR_ENABLE | XSPI_CR_TXFIFO_RESET |
		XSPI_CR_RXFIFO_RESET, regs_base + XSPI_CR_OFFSET);
		XSPI_CR_RXFIFO_RESET, regs_base + XSPI_CR_OFFSET);
}
}
@@ -252,7 +256,7 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
	reinit_completion(&xspi->done);
	reinit_completion(&xspi->done);


	while (xspi->remaining_bytes) {
	while (xspi->remaining_bytes) {
		u16 cr;
		u16 cr = 0;
		int n_words;
		int n_words;


		n_words = (xspi->remaining_bytes * 8) / xspi->bits_per_word;
		n_words = (xspi->remaining_bytes * 8) / xspi->bits_per_word;
@@ -263,13 +267,13 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
		/* Start the transfer by not inhibiting the transmitter any
		/* Start the transfer by not inhibiting the transmitter any
		 * longer
		 * longer
		 */
		 */

		if (xspi->irq >= 0) {
			cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) &
			cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) &
							~XSPI_CR_TRANS_INHIBIT;
							~XSPI_CR_TRANS_INHIBIT;
			xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
			xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);

		if (xspi->irq >= 0)
			wait_for_completion(&xspi->done);
			wait_for_completion(&xspi->done);
		else
		} else
			while (!(xspi->read_fn(xspi->regs + XSPI_SR_OFFSET) &
			while (!(xspi->read_fn(xspi->regs + XSPI_SR_OFFSET) &
						XSPI_SR_TX_EMPTY_MASK))
						XSPI_SR_TX_EMPTY_MASK))
				;
				;
@@ -279,6 +283,7 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
		 * transmitter while the Isr refills the transmit register/FIFO,
		 * transmitter while the Isr refills the transmit register/FIFO,
		 * or make sure it is stopped if we're done.
		 * or make sure it is stopped if we're done.
		 */
		 */
		if (xspi->irq >= 0)
			xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
			xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
			       xspi->regs + XSPI_CR_OFFSET);
			       xspi->regs + XSPI_CR_OFFSET);