Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d8d94ba3 authored by Changbin Du's avatar Changbin Du Committed by Zhenyu Wang
Browse files

drm/i915/gvt: Cleanup struct intel_gvt_mmio_info



The size, length, addr_mask fields actually are not necessary. Every
tracked mmio has DWORD size, and addr_mask is a legacy field.

Signed-off-by: default avatarChangbin Du <changbin.du@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent 65f9f6fe
Loading
Loading
Loading
Loading
+2 −7
Original line number Diff line number Diff line
@@ -102,13 +102,8 @@ static int expose_firmware_sysfs(struct intel_gvt *gvt)

	p = firmware + h->mmio_offset;

	hash_for_each(gvt->mmio.mmio_info_table, i, e, node) {
		int j;

		for (j = 0; j < e->length; j += 4)
			*(u32 *)(p + e->offset + j) =
				I915_READ_NOTRACE(_MMIO(e->offset + j));
	}
	hash_for_each(gvt->mmio.mmio_info_table, i, e, node)
		*(u32 *)(p + e->offset) = I915_READ_NOTRACE(_MMIO(e->offset));

	memcpy(gvt->firmware.mmio, p, info->mmio_size);

+1 −6
Original line number Diff line number Diff line
@@ -131,9 +131,7 @@ static int new_mmio_info(struct intel_gvt *gvt,
		if (p)
			gvt_err("dup mmio definition offset %x\n",
				info->offset);
		info->size = size;
		info->length = (i + 4) < end ? 4 : (end - i);
		info->addr_mask = addr_mask;

		info->ro_mask = ro_mask;
		info->device = device;
		info->read = read ? read : intel_vgpu_default_mmio_read;
@@ -3114,9 +3112,6 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
		goto default_rw;
	}

	if (WARN_ON(bytes > mmio_info->size))
		return -EINVAL;

	if (is_read)
		return mmio_info->read(vgpu, offset, pdata, bytes);
	else {
+0 −3
Original line number Diff line number Diff line
@@ -57,9 +57,6 @@ typedef int (*gvt_mmio_func)(struct intel_vgpu *, unsigned int, void *,

struct intel_gvt_mmio_info {
	u32 offset;
	u32 size;
	u32 length;
	u32 addr_mask;
	u64 ro_mask;
	u32 device;
	gvt_mmio_func read;