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Commit d554b5e1 authored by Martin K. Petersen's avatar Martin K. Petersen Committed by Sagi Grimberg
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nvme: Quirks for PM1725 controllers



PM1725 controllers have a couple of quirks that need to be handled in
the driver:

 - I/O queue depth must be limited to 64 entries on controllers that do
   not report MQES.

 - The host interface registers go offline briefly while resetting the
   chip. Thus a delay is needed before checking whether the controller
   is ready.

Note that the admin queue depth is also limited to 64 on older versions
of this board. Since our NVME_AQ_DEPTH is now 32 that is no longer an
issue.

Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: default avatarSagi Grimberg <sagi@grimberg.me>
parent a84ebb83
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