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Commit d0117a0e authored by Len Brown's avatar Len Brown
Browse files

x86: msr-index.h: define EPB mid-points 



These are currently open-coded into intel_pstate.c

Signed-off-by: default avatarLen Brown <len.brown@intel.com>
parent c470abd4

arch/x86/include/asm/msr-index.h

+5 −3
Original line number Diff line number Diff line
@@ -463,7 +463,9 @@ 


#define MSR_IA32_ENERGY_PERF_BIAS	0x000001b0

#define ENERGY_PERF_BIAS_PERFORMANCE		0

#define ENERGY_PERF_BIAS_BALANCE_PERFORMANCE	4

#define ENERGY_PERF_BIAS_NORMAL			6

#define ENERGY_PERF_BIAS_BALANCE_POWERSAVE	8

#define ENERGY_PERF_BIAS_POWERSAVE		15



#define MSR_IA32_PACKAGE_THERM_STATUS		0x000001b1