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Commit cda80a82 authored by Yan Markman's avatar Yan Markman Committed by Gregory CLEMENT
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ARM: dts: mvebu: pl310-cache disable double-linefill 



Under heavy system stress mvebu SoC using Cortex A9 sporadically
encountered instability issues.

The "double linefill" feature of L2 cache was identified as causing
dependency between read and write which lead to the deadlock.

Especially, it was the cause of deadlock seen under heavy PCIe traffic,
as this dependency violates PCIE overtaking rule.

Fixes: c8f5a878 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarYan Markman <ymarkman@marvell.com>
Signed-off-by: default avatarIgal Liberman <igall@marvell.com>
Signed-off-by: default avatarNadav Haklai <nadavh@marvell.com>
[gregory.clement@free-electrons.com: reformulate commit log, add Armada
375 and add Fixes tag]
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 2bbbd963

arch/arm/boot/dts/armada-375.dtsi

+2 −2
Original line number Original line Diff line number Diff line
@@ -178,9 +178,9 @@ 
				reg = <0x8000 0x1000>;

				reg = <0x8000 0x1000>;

				cache-unified;

				cache-unified;

				cache-level = <2>;

				cache-level = <2>;

				arm,double-linefill-incr = <1>;

				arm,double-linefill-incr = <0>;

				arm,double-linefill-wrap = <0>;

				arm,double-linefill-wrap = <0>;

				arm,double-linefill = <1>;

				arm,double-linefill = <0>;

				prefetch-data = <1>;

				prefetch-data = <1>;

			};

			};

arch/arm/boot/dts/armada-38x.dtsi

+2 −2
Original line number Original line Diff line number Diff line
@@ -143,9 +143,9 @@ 
				reg = <0x8000 0x1000>;

				reg = <0x8000 0x1000>;

				cache-unified;

				cache-unified;

				cache-level = <2>;

				cache-level = <2>;

				arm,double-linefill-incr = <1>;

				arm,double-linefill-incr = <0>;

				arm,double-linefill-wrap = <0>;

				arm,double-linefill-wrap = <0>;

				arm,double-linefill = <1>;

				arm,double-linefill = <0>;

				prefetch-data = <1>;

				prefetch-data = <1>;

			};

			};

arch/arm/boot/dts/armada-39x.dtsi

+2 −2
Original line number Original line Diff line number Diff line
@@ -111,9 +111,9 @@ 
				reg = <0x8000 0x1000>;

				reg = <0x8000 0x1000>;

				cache-unified;

				cache-unified;

				cache-level = <2>;

				cache-level = <2>;

				arm,double-linefill-incr = <1>;

				arm,double-linefill-incr = <0>;

				arm,double-linefill-wrap = <0>;

				arm,double-linefill-wrap = <0>;

				arm,double-linefill = <1>;

				arm,double-linefill = <0>;

				prefetch-data = <1>;

				prefetch-data = <1>;

			};

			};