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Commit c9d059de authored by Kenji Kaneshige's avatar Kenji Kaneshige Committed by Tony Luck
Browse files

[IA64] Fix IOSAPIC delivery mode setting



Fix the problem that redirect hit bit in I/O SAPIC RTE is set even
when it must be disabled (e.g. nointroute boot option is set, CPU
hotplug is enabled or percpu vector is enabled).

Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent 4c013f5c
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+15 −3
Original line number Original line Diff line number Diff line
@@ -748,6 +748,15 @@ get_target_cpu (unsigned int gsi, int irq)
#endif
#endif
}
}


static inline unsigned char choose_dmode(void)
{
#ifdef CONFIG_SMP
	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
		return IOSAPIC_LOWEST_PRIORITY;
#endif
	return IOSAPIC_FIXED;
}

/*
/*
 * ACPI can describe IOSAPIC interrupts via static tables and namespace
 * ACPI can describe IOSAPIC interrupts via static tables and namespace
 * methods.  This provides an interface to register those interrupts and
 * methods.  This provides an interface to register those interrupts and
@@ -762,6 +771,7 @@ iosapic_register_intr (unsigned int gsi,
	unsigned long flags;
	unsigned long flags;
	struct iosapic_rte_info *rte;
	struct iosapic_rte_info *rte;
	u32 low32;
	u32 low32;
	unsigned char dmode;


	/*
	/*
	 * If this GSI has already been registered (i.e., it's a
	 * If this GSI has already been registered (i.e., it's a
@@ -791,8 +801,8 @@ iosapic_register_intr (unsigned int gsi,


	spin_lock(&irq_desc[irq].lock);
	spin_lock(&irq_desc[irq].lock);
	dest = get_target_cpu(gsi, irq);
	dest = get_target_cpu(gsi, irq);
	err = register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY,
	dmode = choose_dmode();
			    polarity, trigger);
	err = register_intr(gsi, irq, dmode, polarity, trigger);
	if (err < 0) {
	if (err < 0) {
		spin_unlock(&irq_desc[irq].lock);
		spin_unlock(&irq_desc[irq].lock);
		irq = err;
		irq = err;
@@ -961,10 +971,12 @@ iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
{
{
	int vector, irq;
	int vector, irq;
	unsigned int dest = cpu_physical_id(smp_processor_id());
	unsigned int dest = cpu_physical_id(smp_processor_id());
	unsigned char dmode;


	irq = vector = isa_irq_to_vector(isa_irq);
	irq = vector = isa_irq_to_vector(isa_irq);
	BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
	BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
	register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY, polarity, trigger);
	dmode = choose_dmode();
	register_intr(gsi, irq, dmode, polarity, trigger);


	DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
	DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
	    isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level",
	    isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level",