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Commit c5362941 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'lpc32xx/devel' into next/soc 

* lpc32xx/devel: (22 commits)
  ARM: LPC32xx: Move i2s1 dma enabling to clock.c
  ARM: LPC32xx: Move uart6 irda disable to serial.c
  ARM: LPC32xx: Cleanup board init, remove duplicate clock init
  ARM: LPC32xx: Remove spi chip definitions
  ARM: LPC32xx: Remove spi chipselect request from board init
  ARM: LPC32xx: Add dt settings to the at25 node
  ARM: LPC32xx: Build arch dtbs
  ARM: LPC32xx: Fix lpc32xx.dtsi status property: "disable" -> "disabled"
  ARM: LPC32xx: Remove mach specific ARCH_NR_GPIOS, use default
  ARM: LPC32xx: High Speed UART configuration via DT
  ARM: LPC32xx: DT conversion of Standard UARTs
  ARM: LPC32xx: DTS adjustment for using pl18x primecell
  ARM: LPC32xx: Add MMC controller support
  ARM: LPC32xx: Defconfig update
  ARM: LPC32xx: Clock adjustment for key matrix controller
  ARM: LPC32xx: DTS adjustment for key matrix controller
  ARM: LPC32xx: Add dts for EA3250 reference board
  ARM: LPC32xx: Adjust dtsi file for MLC controller configuration
  ARM: LPC32xx: Add DMA configuration to platform data
  ARM: LPC32xx: Remove SLC controller initialization from platform init
  ...
parents 51a1ec01 df072717

arch/arm/Kconfig

+0 −2
Original line number Diff line number Diff line
@@ -1019,8 +1019,6 @@ source "arch/arm/mach-kirkwood/Kconfig" 


source "arch/arm/mach-ks8695/Kconfig"



source "arch/arm/mach-lpc32xx/Kconfig"



source "arch/arm/mach-msm/Kconfig"



source "arch/arm/mach-mv78xx0/Kconfig"

arch/arm/boot/dts/ea3250.dts

0 → 100644
+157 −0
Original line number Diff line number Diff line 
/*

 * Embedded Artists LPC3250 board

 *

 * Copyright 2012 Roland Stigge <stigge@antcom.de>

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



/dts-v1/;

/include/ "lpc32xx.dtsi"



/ {

	model = "Embedded Artists LPC3250 board based on NXP LPC3250";

	compatible = "ea,ea3250", "nxp,lpc3250";

	#address-cells = <1>;

	#size-cells = <1>;



	memory {

		device_type = "memory";

		reg = <0 0x4000000>;

	};



	ahb {

		mac: ethernet@31060000 {

			phy-mode = "rmii";

			use-iram;

		};



		/* Here, choose exactly one from: ohci, usbd */

		ohci@31020000 {

			transceiver = <&isp1301>;

			status = "okay";

		};



/*

		usbd@31020000 {

			transceiver = <&isp1301>;

			status = "okay";

		};

*/



		/* 128MB Flash via SLC NAND controller */

		slc: flash@20020000 {

			status = "okay";

			#address-cells = <1>;

			#size-cells = <1>;



			nxp,wdr-clks = <14>;

			nxp,wwidth = <260000000>;

			nxp,whold = <104000000>;

			nxp,wsetup = <200000000>;

			nxp,rdr-clks = <14>;

			nxp,rwidth = <34666666>;

			nxp,rhold = <104000000>;

			nxp,rsetup = <200000000>;

			nand-on-flash-bbt;

			gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */



			mtd0@00000000 {

				label = "ea3250-boot";

				reg = <0x00000000 0x00080000>;

				read-only;

			};



			mtd1@00080000 {

				label = "ea3250-uboot";

				reg = <0x00080000 0x000c0000>;

				read-only;

			};



			mtd2@00140000 {

				label = "ea3250-kernel";

				reg = <0x00140000 0x00400000>;

			};



			mtd3@00540000 {

				label = "ea3250-rootfs";

				reg = <0x00540000 0x07ac0000>;

			};

		};



		apb {

			uart5: serial@40090000 {

				status = "okay";

			};



			uart3: serial@40080000 {

				status = "okay";

			};



			uart6: serial@40098000 {

				status = "okay";

			};



			i2c1: i2c@400A0000 {

				clock-frequency = <100000>;



				eeprom@50 {

					compatible = "at,24c256";

					reg = <0x50>;

				};



				eeprom@57 {

					compatible = "at,24c64";

					reg = <0x57>;

				};



				uda1380: uda1380@18 {

					compatible = "nxp,uda1380";

					reg = <0x18>;

					power-gpio = <&gpio 0x59 0>;

					reset-gpio = <&gpio 0x51 0>;

					dac-clk = "wspll";

				};



				pca9532: pca9532@60 {

					compatible = "nxp,pca9532";

					gpio-controller;

					#gpio-cells = <2>;

					reg = <0x60>;

				};

			};



			i2c2: i2c@400A8000 {

				clock-frequency = <100000>;

			};



			i2cusb: i2c@31020300 {

				clock-frequency = <100000>;



				isp1301: usb-transceiver@2d {

					compatible = "nxp,isp1301";

					reg = <0x2d>;

				};

			};



			sd@20098000 {

				wp-gpios = <&pca9532 5 0>;

				cd-gpios = <&pca9532 4 0>;

				cd-inverted;

				bus-width = <4>;

				status = "okay";

			};

		};



		fab {

			uart1: serial@40014000 {

				status = "okay";

			};

		};

	};

};

arch/arm/boot/dts/lpc32xx.dtsi

+51 −23
Original line number Diff line number Diff line
@@ -35,13 +35,14 @@ 
		slc: flash@20020000 {

			compatible = "nxp,lpc3220-slc";

			reg = <0x20020000 0x1000>;

			status = "disable";

			status = "disabled";

		};



		mlc: flash@200B0000 {

		mlc: flash@200a8000 {

			compatible = "nxp,lpc3220-mlc";

			reg = <0x200B0000 0x1000>;

			status = "disable";

			reg = <0x200a8000 0x11000>;

			interrupts = <11 0>;

			status = "disabled";

		};



		dma@31000000 {
@@ -57,21 +58,21 @@ 
			compatible = "nxp,ohci-nxp", "usb-ohci";

			reg = <0x31020000 0x300>;

			interrupts = <0x3b 0>;

			status = "disable";

			status = "disabled";

		};



		usbd@31020000 {

			compatible = "nxp,lpc3220-udc";

			reg = <0x31020000 0x300>;

			interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;

			status = "disable";

			status = "disabled";

		};



		clcd@31040000 {

			compatible = "arm,pl110", "arm,primecell";

			reg = <0x31040000 0x1000>;

			interrupts = <0x0e 0>;

			status = "disable";

			status = "disabled";

		};



		mac: ethernet@31060000 {
@@ -114,9 +115,10 @@ 
			};



			sd@20098000 {

				compatible = "arm,pl180", "arm,primecell";

				compatible = "arm,pl18x", "arm,primecell";

				reg = <0x20098000 0x1000>;

				interrupts = <0x0f 0>, <0x0d 0>;

				status = "disabled";

			};



			i2s1: i2s@2009C000 {
@@ -124,24 +126,42 @@ 
				reg = <0x2009C000 0x1000>;

			};



			/* UART5 first since it is the default console, ttyS0 */

			uart5: serial@40090000 {

				/* actually, ns16550a w/ 64 byte fifos! */

				compatible = "nxp,lpc3220-uart";

				reg = <0x40090000 0x1000>;

				interrupts = <9 0>;

				clock-frequency = <13000000>;

				reg-shift = <2>;

				status = "disabled";

			};



			uart3: serial@40080000 {

				compatible = "nxp,serial";

				compatible = "nxp,lpc3220-uart";

				reg = <0x40080000 0x1000>;

				interrupts = <7 0>;

				clock-frequency = <13000000>;

				reg-shift = <2>;

				status = "disabled";

			};



			uart4: serial@40088000 {

				compatible = "nxp,serial";

				compatible = "nxp,lpc3220-uart";

				reg = <0x40088000 0x1000>;

			};



			uart5: serial@40090000 {

				compatible = "nxp,serial";

				reg = <0x40090000 0x1000>;

				interrupts = <8 0>;

				clock-frequency = <13000000>;

				reg-shift = <2>;

				status = "disabled";

			};



			uart6: serial@40098000 {

				compatible = "nxp,serial";

				compatible = "nxp,lpc3220-uart";

				reg = <0x40098000 0x1000>;

				interrupts = <10 0>;

				clock-frequency = <13000000>;

				reg-shift = <2>;

				status = "disabled";

			};



			i2c1: i2c@400A0000 {
@@ -192,18 +212,24 @@ 
			};



			uart1: serial@40014000 {

				compatible = "nxp,serial";

				compatible = "nxp,lpc3220-hsuart";

				reg = <0x40014000 0x1000>;

				interrupts = <26 0>;

				status = "disabled";

			};



			uart2: serial@40018000 {

				compatible = "nxp,serial";

				compatible = "nxp,lpc3220-hsuart";

				reg = <0x40018000 0x1000>;

				interrupts = <25 0>;

				status = "disabled";

			};



			uart7: serial@4001C000 {

				compatible = "nxp,serial";

				reg = <0x4001C000 0x1000>;

			uart7: serial@4001c000 {

				compatible = "nxp,lpc3220-hsuart";

				reg = <0x4001c000 0x1000>;

				interrupts = <24 0>;

				status = "disabled";

			};



			rtc@40024000 {
@@ -235,19 +261,21 @@ 
				compatible = "nxp,lpc3220-adc";

				reg = <0x40048000 0x1000>;

				interrupts = <0x27 0>;

				status = "disable";

				status = "disabled";

			};



			tsc@40048000 {

				compatible = "nxp,lpc3220-tsc";

				reg = <0x40048000 0x1000>;

				interrupts = <0x27 0>;

				status = "disable";

				status = "disabled";

			};



			key@40050000 {

				compatible = "nxp,lpc3220-key";

				reg = <0x40050000 0x1000>;

				interrupts = <54 0>;

				status = "disabled";

			};



		};

arch/arm/boot/dts/phy3250.dts

+61 −0
Original line number Diff line number Diff line
@@ -54,6 +54,17 @@ 
			#address-cells = <1>;

			#size-cells = <1>;



			nxp,wdr-clks = <14>;

			nxp,wwidth = <40000000>;

			nxp,whold = <100000000>;

			nxp,wsetup = <100000000>;

			nxp,rdr-clks = <14>;

			nxp,rwidth = <40000000>;

			nxp,rhold = <66666666>;

			nxp,rsetup = <100000000>;

			nand-on-flash-bbt;

			gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */



			mtd0@00000000 {

				label = "phy3250-boot";

				reg = <0x00000000 0x00064000>;
@@ -83,6 +94,14 @@ 
		};



		apb {

			uart5: serial@40090000 {

				status = "okay";

			};



			uart3: serial@40080000 {

				status = "okay";

			};



			i2c1: i2c@400A0000 {

				clock-frequency = <100000>;
@@ -114,16 +133,58 @@ 
			};



			ssp0: ssp@20084000 {

				#address-cells = <1>;

				#size-cells = <0>;

				pl022,num-chipselects = <1>;

				cs-gpios = <&gpio 3 5 0>;



				eeprom: at25@0 {

					pl022,hierarchy = <0>;

					pl022,interface = <0>;

					pl022,slave-tx-disable = <0>;

					pl022,com-mode = <0>;

					pl022,rx-level-trig = <1>;

					pl022,tx-level-trig = <1>;

					pl022,ctrl-len = <11>;

					pl022,wait-state = <0>;

					pl022,duplex = <0>;



					at25,byte-len = <0x8000>;

					at25,addr-mode = <2>;

					at25,page-size = <64>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <5000000>;

				};

			};



			sd@20098000 {

				wp-gpios = <&gpio 3 0 0>;

				cd-gpios = <&gpio 3 1 0>;

				cd-inverted;

				bus-width = <4>;

				status = "okay";

			};

		};



		fab {

			uart2: serial@40018000 {

				status = "okay";

			};



			tsc@40048000 {

				status = "okay";

			};



			key@40050000 {

				status = "okay";

				keypad,num-rows = <1>;

				keypad,num-columns = <1>;

				nxp,debounce-delay-ms = <3>;

				nxp,scan-delay-ms = <34>;

				linux,keymap = <0x00000002>;

			};

		};

	};

arch/arm/configs/lpc32xx_defconfig

+18 −6
Original line number Diff line number Diff line 
CONFIG_EXPERIMENTAL=y

CONFIG_SYSVIPC=y

CONFIG_NO_HZ=y

CONFIG_HIGH_RES_TIMERS=y

CONFIG_IKCONFIG=y

CONFIG_IKCONFIG_PROC=y

CONFIG_LOG_BUF_SHIFT=16
@@ -16,8 +18,6 @@ CONFIG_MODULE_UNLOAD=y 
# CONFIG_BLK_DEV_BSG is not set

CONFIG_PARTITION_ADVANCED=y

CONFIG_ARCH_LPC32XX=y

CONFIG_NO_HZ=y

CONFIG_HIGH_RES_TIMERS=y

CONFIG_PREEMPT=y

CONFIG_AEABI=y

CONFIG_ZBOOT_ROM_TEXT=0x0
@@ -52,13 +52,17 @@ CONFIG_MTD=y 
CONFIG_MTD_CMDLINE_PARTS=y

CONFIG_MTD_CHAR=y

CONFIG_MTD_BLOCK=y

CONFIG_MTD_M25P80=y

CONFIG_MTD_NAND=y

CONFIG_MTD_NAND_MUSEUM_IDS=y

CONFIG_MTD_NAND_SLC_LPC32XX=y

CONFIG_MTD_NAND_MLC_LPC32XX=y

CONFIG_BLK_DEV_LOOP=y

CONFIG_BLK_DEV_CRYPTOLOOP=y

CONFIG_BLK_DEV_RAM=y

CONFIG_BLK_DEV_RAM_COUNT=1

CONFIG_BLK_DEV_RAM_SIZE=16384

CONFIG_EEPROM_AT24=y

CONFIG_EEPROM_AT25=y

CONFIG_SCSI=y

CONFIG_BLK_DEV_SD=y
@@ -79,16 +83,22 @@ CONFIG_LPC_ENET=y 
# CONFIG_NET_VENDOR_STMICRO is not set

CONFIG_SMSC_PHY=y

# CONFIG_WLAN is not set

CONFIG_INPUT_MATRIXKMAP=y

# CONFIG_INPUT_MOUSEDEV_PSAUX is not set

CONFIG_INPUT_MOUSEDEV_SCREEN_X=240

CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320

CONFIG_INPUT_EVDEV=y

# CONFIG_KEYBOARD_ATKBD is not set

CONFIG_KEYBOARD_LPC32XX=y

# CONFIG_INPUT_MOUSE is not set

CONFIG_INPUT_TOUCHSCREEN=y

CONFIG_TOUCHSCREEN_LPC32XX=y

CONFIG_SERIO_LIBPS2=y

# CONFIG_LEGACY_PTYS is not set

CONFIG_SERIAL_8250=y

CONFIG_SERIAL_8250_CONSOLE=y

CONFIG_SERIAL_HS_LPC32XX=y

CONFIG_SERIAL_OF_PLATFORM=y

# CONFIG_HW_RANDOM is not set

CONFIG_I2C=y

CONFIG_I2C_CHARDEV=y
@@ -96,7 +106,8 @@ CONFIG_I2C_PNX=y 
CONFIG_SPI=y

CONFIG_SPI_PL022=y

CONFIG_GPIO_SYSFS=y

# CONFIG_HWMON is not set

CONFIG_SENSORS_DS620=y

CONFIG_SENSORS_MAX6639=y

CONFIG_WATCHDOG=y

CONFIG_PNX4008_WATCHDOG=y

CONFIG_FB=y
@@ -133,6 +144,8 @@ CONFIG_MMC=y 
CONFIG_MMC_ARMMMCI=y

CONFIG_NEW_LEDS=y

CONFIG_LEDS_CLASS=y

CONFIG_LEDS_PCA9532=y

CONFIG_LEDS_PCA9532_GPIO=y

CONFIG_LEDS_GPIO=y

CONFIG_LEDS_TRIGGERS=y

CONFIG_LEDS_TRIGGER_TIMER=y
@@ -146,10 +159,10 @@ CONFIG_RTC_DRV_DS1374=y 
CONFIG_RTC_DRV_PCF8563=y

CONFIG_RTC_DRV_LPC32XX=y

CONFIG_DMADEVICES=y

CONFIG_AMBA_PL08X=y

CONFIG_STAGING=y

CONFIG_IIO=y

CONFIG_LPC32XX_ADC=y

CONFIG_MAX517=y

CONFIG_IIO=y

CONFIG_EXT2_FS=y

CONFIG_AUTOFS4_FS=y

CONFIG_MSDOS_FS=y
@@ -159,7 +172,6 @@ CONFIG_JFFS2_FS=y 
CONFIG_JFFS2_FS_WBUF_VERIFY=y

CONFIG_CRAMFS=y

CONFIG_NFS_FS=y

CONFIG_NFS_V3=y

CONFIG_ROOT_NFS=y

CONFIG_NLS_CODEPAGE_437=y

CONFIG_NLS_ASCII=y