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Commit c3bd517d authored by Milton Miller's avatar Milton Miller Committed by Benjamin Herrenschmidt
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powerpc/pci: Move hose_list and pci_address_to_pio to pci-common 



move the definition of hose_list next to its hotplug spinlock.

create pcibios_io_size to encapsulate ifdef in existing pci-common
function pcibios_vaddr_is_ioport

move pci_address_to_pio to pci-common, using new pcibios_io_size, and
protect this GPL exported function against concurrent hotplug removal

Signed-off-by: default avatarMilton Miller <miltonm@bga.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 6071ed04

arch/powerpc/kernel/pci-common.c

+35 −6
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ 
#include <asm/eeh.h>



static DEFINE_SPINLOCK(hose_spinlock);

LIST_HEAD(hose_list);



/* XXX kill that some day ... */

static int global_phb_number;		/* Global phb counter */
@@ -113,19 +114,24 @@ void pcibios_free_controller(struct pci_controller *phb) 
		kfree(phb);

}



static resource_size_t pcibios_io_size(const struct pci_controller *hose)

{

#ifdef CONFIG_PPC64

	return hose->pci_io_size;

#else

	return hose->io_resource.end - hose->io_resource.start + 1;

#endif

}



int pcibios_vaddr_is_ioport(void __iomem *address)

{

	int ret = 0;

	struct pci_controller *hose;

	unsigned long size;

	resource_size_t size;



	spin_lock(&hose_spinlock);

	list_for_each_entry(hose, &hose_list, list_node) {

#ifdef CONFIG_PPC64

		size = hose->pci_io_size;

#else

		size = hose->io_resource.end - hose->io_resource.start + 1;

#endif

		size = pcibios_io_size(hose);

		if (address >= hose->io_base_virt &&

		    address < (hose->io_base_virt + size)) {

			ret = 1;
@@ -136,6 +142,29 @@ int pcibios_vaddr_is_ioport(void __iomem *address) 
	return ret;

}



unsigned long pci_address_to_pio(phys_addr_t address)

{

	struct pci_controller *hose;

	resource_size_t size;

	unsigned long ret = ~0;



	spin_lock(&hose_spinlock);

	list_for_each_entry(hose, &hose_list, list_node) {

		size = pcibios_io_size(hose);

		if (address >= hose->io_base_phys &&

		    address < (hose->io_base_phys + size)) {

			unsigned long base =

				(unsigned long)hose->io_base_virt - _IO_BASE;

			ret = base + (address - hose->io_base_phys);

			break;

		}

	}

	spin_unlock(&hose_spinlock);



	return ret;

}

EXPORT_SYMBOL_GPL(pci_address_to_pio);



/*

 * Return the domain number for this bus.

 */

arch/powerpc/kernel/pci_32.c

+1 −20
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#include <asm/prom.h>

#include <asm/sections.h>

#include <asm/pci-bridge.h>

#include <asm/ppc-pci.h>

#include <asm/byteorder.h>

#include <asm/uaccess.h>

#include <asm/machdep.h>
@@ -43,8 +44,6 @@ static u8* pci_to_OF_bus_map; 
 */

static int pci_assign_all_buses;



LIST_HEAD(hose_list);



static int pci_bus_count;



/* This will remain NULL for now, until isa-bridge.c is made common
@@ -491,24 +490,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) 
	return result;

}



unsigned long pci_address_to_pio(phys_addr_t address)

{

	struct pci_controller *hose, *tmp;



	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {

		unsigned int size = hose->io_resource.end -

			hose->io_resource.start + 1;

		if (address >= hose->io_base_phys &&

		    address < (hose->io_base_phys + size)) {

			unsigned long base =

				(unsigned long)hose->io_base_virt - _IO_BASE;

			return base + (address - hose->io_base_phys);

		}

	}

	return (unsigned int)-1;

}

EXPORT_SYMBOL(pci_address_to_pio);



/*

 * Null PCI config access functions, for the case when we can't

 * find a hose.

arch/powerpc/kernel/pci_64.c

+0 −19
Original line number Diff line number Diff line
@@ -43,8 +43,6 @@ unsigned long pci_probe_only = 1; 
unsigned long pci_io_base = ISA_IO_BASE;

EXPORT_SYMBOL(pci_io_base);



LIST_HEAD(hose_list);



static void fixup_broken_pcnet32(struct pci_dev* dev)

{

	if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
@@ -524,23 +522,6 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus) 
}

EXPORT_SYMBOL_GPL(pcibios_map_io_space);



unsigned long pci_address_to_pio(phys_addr_t address)

{

	struct pci_controller *hose, *tmp;



	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {

		if (address >= hose->io_base_phys &&

		    address < (hose->io_base_phys + hose->pci_io_size)) {

			unsigned long base =

				(unsigned long)hose->io_base_virt - _IO_BASE;

			return base + (address - hose->io_base_phys);

		}

	}

	return (unsigned int)-1;

}

EXPORT_SYMBOL_GPL(pci_address_to_pio);





#define IOBASE_BRIDGE_NUMBER	0

#define IOBASE_MEMORY		1

#define IOBASE_IO		2