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Commit c2b9ff24 authored by H. Peter Anvin's avatar H. Peter Anvin
Browse files

x86, cpu: Re-run get_cpu_cap() after adjusting the CPUID level



At least on Intel, adjusting the max CPUID level can expose new CPUID
features, so we need to re-run get_cpu_cap() after changing the CPUID
level.

Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent aeb9c7d6
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+1 −1
Original line number Original line Diff line number Diff line
@@ -545,7 +545,7 @@ void __cpuinit cpu_detect(struct cpuinfo_x86 *c)
	}
	}
}
}


static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
{
{
	u32 tfms, xlvl;
	u32 tfms, xlvl;
	u32 ebx;
	u32 ebx;
+1 −0
Original line number Original line Diff line number Diff line
@@ -32,6 +32,7 @@ struct cpu_dev {
extern const struct cpu_dev *const __x86_cpu_dev_start[],
extern const struct cpu_dev *const __x86_cpu_dev_start[],
			    *const __x86_cpu_dev_end[];
			    *const __x86_cpu_dev_end[];


extern void get_cpu_cap(struct cpuinfo_x86 *c);
extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);


#endif
#endif
+1 −0
Original line number Original line Diff line number Diff line
@@ -39,6 +39,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
			misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
			misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
			wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
			wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
			c->cpuid_level = cpuid_eax(0);
			c->cpuid_level = cpuid_eax(0);
			get_cpu_cap(c);
		}
		}
	}
	}