Commit c0e2ee1b authored Feb 23, 2012 by Eugeni Dodonov Committed by Jesse Barnes Feb 24, 2012

drm/i915: fix operator precedence when enabling RC6p



As noticed by Torsten Kaiser, the operator precedence can play tricks with
us here.

CC: Dave Airlie <airlied@redhat.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

parent 4e9bb47b

drivers/gpu/drm/i915/intel_display.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -8194,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)

		if (intel_enable_rc6(dev_priv->dev))
		rc6_mask = GEN6_RC_CTL_RC6_ENABLE \|
		(IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
		((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);

		I915_WRITE(GEN6_RC_CONTROL,
		rc6_mask \|