Loading arch/arm/boot/dts/at91sam9263.dtsi +19 −0 Original line number Diff line number Diff line Loading @@ -677,6 +677,14 @@ }; }; can { pinctrl_can_rx_tx: can_rx_tx { atmel,pins = <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ }; }; pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; Loading Loading @@ -905,6 +913,17 @@ clock-names = "pwm_clk"; status = "disabled"; }; can: can@fffac000 { compatible = "atmel,at91sam9263-can"; reg = <0xfffac000 0x300>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can_rx_tx>; clocks = <&can_clk>; clock-names = "can_clk"; status = "disabled"; }; }; fb0: fb@0x00700000 { Loading arch/arm/boot/dts/at91sam9x25.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ #include "at91sam9x5_usart3.dtsi" #include "at91sam9x5_macb0.dtsi" #include "at91sam9x5_macb1.dtsi" #include "at91sam9x5_can.dtsi" / { model = "Atmel AT91SAM9X25 SoC"; Loading arch/arm/boot/dts/at91sam9x35.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "at91sam9x5.dtsi" #include "at91sam9x5_macb0.dtsi" #include "at91sam9x5_can.dtsi" / { model = "Atmel AT91SAM9X35 SoC"; Loading arch/arm/boot/dts/at91sam9x5.dtsi +12 −0 Original line number Diff line number Diff line Loading @@ -860,6 +860,9 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>, <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&mck>; clock-names = "usart"; status = "disabled"; Loading @@ -871,6 +874,9 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>, <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled"; Loading @@ -882,6 +888,9 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>, <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled"; Loading @@ -893,6 +902,9 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>, <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled"; Loading arch/arm/boot/dts/at91sam9x5_can.dtsi +45 −5 Original line number Diff line number Diff line /* * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 * at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 * Ethernet interface. * * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> Loading @@ -26,6 +26,46 @@ }; }; }; can0: can@f8000000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf8000000 0x300>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_rx_tx>; clocks = <&can0_clk>; clock-names = "can_clk"; status = "disabled"; }; can1: can@f8004000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf8004000 0x300>; interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_rx_tx>; clocks = <&can1_clk>; clock-names = "can_clk"; status = "disabled"; }; pinctrl@fffff400 { can0 { pinctrl_can0_rx_tx: can0_rx_tx { atmel,pins = <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */ AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */ }; }; can1 { pinctrl_can1_rx_tx: can1_rx_tx { atmel,pins = <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */ AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */ }; }; }; }; }; }; Loading
arch/arm/boot/dts/at91sam9263.dtsi +19 −0 Original line number Diff line number Diff line Loading @@ -677,6 +677,14 @@ }; }; can { pinctrl_can_rx_tx: can_rx_tx { atmel,pins = <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ }; }; pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; Loading Loading @@ -905,6 +913,17 @@ clock-names = "pwm_clk"; status = "disabled"; }; can: can@fffac000 { compatible = "atmel,at91sam9263-can"; reg = <0xfffac000 0x300>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can_rx_tx>; clocks = <&can_clk>; clock-names = "can_clk"; status = "disabled"; }; }; fb0: fb@0x00700000 { Loading
arch/arm/boot/dts/at91sam9x25.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ #include "at91sam9x5_usart3.dtsi" #include "at91sam9x5_macb0.dtsi" #include "at91sam9x5_macb1.dtsi" #include "at91sam9x5_can.dtsi" / { model = "Atmel AT91SAM9X25 SoC"; Loading
arch/arm/boot/dts/at91sam9x35.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "at91sam9x5.dtsi" #include "at91sam9x5_macb0.dtsi" #include "at91sam9x5_can.dtsi" / { model = "Atmel AT91SAM9X35 SoC"; Loading
arch/arm/boot/dts/at91sam9x5.dtsi +12 −0 Original line number Diff line number Diff line Loading @@ -860,6 +860,9 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>, <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&mck>; clock-names = "usart"; status = "disabled"; Loading @@ -871,6 +874,9 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>, <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&usart0_clk>; clock-names = "usart"; status = "disabled"; Loading @@ -882,6 +888,9 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>, <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&usart1_clk>; clock-names = "usart"; status = "disabled"; Loading @@ -893,6 +902,9 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>, <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; clocks = <&usart2_clk>; clock-names = "usart"; status = "disabled"; Loading
arch/arm/boot/dts/at91sam9x5_can.dtsi +45 −5 Original line number Diff line number Diff line /* * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 * at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 * Ethernet interface. * * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> Loading @@ -26,6 +26,46 @@ }; }; }; can0: can@f8000000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf8000000 0x300>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_rx_tx>; clocks = <&can0_clk>; clock-names = "can_clk"; status = "disabled"; }; can1: can@f8004000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf8004000 0x300>; interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_rx_tx>; clocks = <&can1_clk>; clock-names = "can_clk"; status = "disabled"; }; pinctrl@fffff400 { can0 { pinctrl_can0_rx_tx: can0_rx_tx { atmel,pins = <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */ AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */ }; }; can1 { pinctrl_can1_rx_tx: can1_rx_tx { atmel,pins = <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */ AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */ }; }; }; }; }; };