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Commit b377e0df authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/ 



The DP link frequency is 162MHz, not 160MHz. Rename the ILK eDP PLL
defines to match.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-11-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d6fbdd15

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -4199,7 +4199,7 @@ enum skl_disp_power_wells { 


/* eDP */

#define   DP_PLL_FREQ_270MHZ		(0 << 16)

#define   DP_PLL_FREQ_160MHZ		(1 << 16)

#define   DP_PLL_FREQ_162MHZ		(1 << 16)

#define   DP_PLL_FREQ_MASK		(3 << 16)



/* locked once port is enabled */

drivers/gpu/drm/i915/intel_dp.c

+5 −5
Original line number Diff line number Diff line
@@ -1560,11 +1560,11 @@ static void ironlake_set_pll_cpu_edp(struct intel_dp *intel_dp) 


	if (crtc->config->port_clock == 162000) {

		/* For a long time we've carried around a ILK-DevA w/a for the

		 * 160MHz clock. If we're really unlucky, it's still required.

		 * 162MHz clock. If we're really unlucky, it's still required.

		 */

		DRM_DEBUG_KMS("160MHz cpu eDP clock, might need ilk devA w/a\n");

		dpa_ctl |= DP_PLL_FREQ_160MHZ;

		intel_dp->DP |= DP_PLL_FREQ_160MHZ;

		DRM_DEBUG_KMS("162MHz cpu eDP clock, might need ilk devA w/a\n");

		dpa_ctl |= DP_PLL_FREQ_162MHZ;

		intel_dp->DP |= DP_PLL_FREQ_162MHZ;

	} else {

		dpa_ctl |= DP_PLL_FREQ_270MHZ;

		intel_dp->DP |= DP_PLL_FREQ_270MHZ;
@@ -2327,7 +2327,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder, 
	intel_dp_get_m_n(crtc, pipe_config);



	if (port == PORT_A) {

		if ((I915_READ(DP_A) & DP_PLL_FREQ_MASK) == DP_PLL_FREQ_160MHZ)

		if ((I915_READ(DP_A) & DP_PLL_FREQ_MASK) == DP_PLL_FREQ_162MHZ)

			pipe_config->port_clock = 162000;

		else

			pipe_config->port_clock = 270000;