Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a9ed33ca authored by Abdiel Janulgue's avatar Abdiel Janulgue Committed by Daniel Vetter
Browse files

drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag and getparam 



Ensures that the batch buffer is executed by the resource streamer.
And will let userspace know whether Resource Streamer is supported in
the kernel.

v2: Don't skip 1<<15 for the exec flags (Jani Nikula)
v3: Use HAS_RESOURCE_STREAMER macro for execbuf validation (Chris Wilson)

(from getparam patch)

v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after
    I915_PARAM_HAS_GPU_RESET.
v3: Only advertise RS support for hardware that supports it.
v4: Add HAS_RESOURCE_STREAMER() macro (Chris)

Testcase: igt/gem_exec_params
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarAbdiel Janulgue <abdiel.janulgue@linux.intel.com>
[danvet: squash in getparam patch since it'd break bisect, suggested
by Chris.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 6922528a

drivers/gpu/drm/i915/i915_dma.c

+3 −0
Original line number Diff line number Diff line
@@ -167,6 +167,9 @@ static int i915_getparam(struct drm_device *dev, void *data, 
		value = i915.enable_hangcheck &&

			intel_has_gpu_reset(dev);

		break;

	case I915_PARAM_HAS_RESOURCE_STREAMER:

		value = HAS_RESOURCE_STREAMER(dev);

		break;

	default:

		DRM_DEBUG("Unknown parameter %d\n", param->param);

		return -EINVAL;

drivers/gpu/drm/i915/i915_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -2539,6 +2539,9 @@ struct drm_i915_cmd_table { 


#define HAS_CSR(dev)	(IS_SKYLAKE(dev))



#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \

				    INTEL_INFO(dev)->gen >= 8)



#define INTEL_PCH_DEVICE_ID_MASK		0xff00

#define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00

#define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+14 −0
Original line number Diff line number Diff line
@@ -1490,6 +1490,20 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, 
		return -EINVAL;

	}



	if (args->flags & I915_EXEC_RESOURCE_STREAMER) {

		if (!HAS_RESOURCE_STREAMER(dev)) {

			DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n");

			return -EINVAL;

		}

		if (ring->id != RCS) {

			DRM_DEBUG("RS is not available on %s\n",

				 ring->name);

			return -EINVAL;

		}



		dispatch_flags |= I915_DISPATCH_RS;

	}



	intel_runtime_pm_get(dev_priv);



	ret = i915_mutex_lock_interruptible(dev);

include/uapi/drm/i915_drm.h

+7 −1
Original line number Diff line number Diff line
@@ -355,6 +355,7 @@ typedef struct drm_i915_irq_wait { 
#define I915_PARAM_SUBSLICE_TOTAL	 33

#define I915_PARAM_EU_TOTAL		 34

#define I915_PARAM_HAS_GPU_RESET	 35

#define I915_PARAM_HAS_RESOURCE_STREAMER 36



typedef struct drm_i915_getparam {

	int param;
@@ -765,7 +766,12 @@ struct drm_i915_gem_execbuffer2 { 
#define I915_EXEC_BSD_RING1		(1<<13)

#define I915_EXEC_BSD_RING2		(2<<13)



#define __I915_EXEC_UNKNOWN_FLAGS -(1<<15)

/** Tell the kernel that the batchbuffer is processed by

 *  the resource streamer.

 */

#define I915_EXEC_RESOURCE_STREAMER     (1<<15)



#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER<<1)



#define I915_EXEC_CONTEXT_ID_MASK	(0xffffffff)

#define i915_execbuffer2_set_context_id(eb2, context) \