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Commit a793804f authored by David S. Miller's avatar David S. Miller Committed by James Bottomley
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[SCSI] esp: Correct chip ID probing sequence.



The features enable bit has to be set in the config2 register
before we can be absolutely sure we will probe a correct
part unique ID and family code from the transfer-count-high
register.

Also, reload the CFACT, STP, SOFF, and TIMEO near the end of
esp_reset_esp().

From a patch by Maciej W. Rozycki.

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@HansenPartnership.com>
parent eac6e8e4
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+13 −11
Original line number Diff line number Diff line
@@ -219,19 +219,10 @@ static void esp_reset_esp(struct esp *esp)
	/* Now reset the ESP chip */
	scsi_esp_cmd(esp, ESP_CMD_RC);
	scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
	if (esp->rev == FAST)
		esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
	scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);

	/* Reload the configuration registers */
	esp_write8(esp->cfact, ESP_CFACT);

	esp->prev_stp = 0;
	esp_write8(esp->prev_stp, ESP_STP);

	esp->prev_soff = 0;
	esp_write8(esp->prev_soff, ESP_SOFF);

	esp_write8(esp->neg_defp, ESP_TIMEO);

	/* This is the only point at which it is reliable to read
	 * the ID-code for a fast ESP chip variants.
	 */
@@ -316,6 +307,17 @@ static void esp_reset_esp(struct esp *esp)
		break;
	}

	/* Reload the configuration registers */
	esp_write8(esp->cfact, ESP_CFACT);

	esp->prev_stp = 0;
	esp_write8(esp->prev_stp, ESP_STP);

	esp->prev_soff = 0;
	esp_write8(esp->prev_soff, ESP_SOFF);

	esp_write8(esp->neg_defp, ESP_TIMEO);

	/* Eat any bitrot in the chip */
	esp_read8(ESP_INTRPT);
	udelay(100);