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Commit 9dd17e85 authored by Suraj Jitindar Singh's avatar Suraj Jitindar Singh Committed by Michael Ellerman
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powerpc/64: Define new ISA v3.00 logical PVR value and PCR register value 



ISA 3.00 adds the logical PVR value 0x0f000005, so add a definition for
this.

Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in the processor
compatibility register (PCR).

[paulus@ozlabs.org - moved dummy PCR_ARCH_300 value into next patch]

Signed-off-by: default avatarSuraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent ffe6d810

arch/powerpc/include/asm/reg.h

+7 −0
Original line number Diff line number Diff line
@@ -382,6 +382,12 @@ 
#define   PCR_VEC_DIS	(1ul << (63-0))	/* Vec. disable (bit NA since POWER8) */

#define   PCR_VSX_DIS	(1ul << (63-1))	/* VSX disable (bit NA since POWER8) */

#define   PCR_TM_DIS	(1ul << (63-2))	/* Trans. memory disable (POWER8) */

/*

 * These bits are used in the function kvmppc_set_arch_compat() to specify and

 * determine both the compatibility level which we want to emulate and the

 * compatibility level which the host is capable of emulating.

 */

#define   PCR_ARCH_207	0x8		/* Architecture 2.07 */

#define   PCR_ARCH_206	0x4		/* Architecture 2.06 */

#define   PCR_ARCH_205	0x2		/* Architecture 2.05 */

#define	SPRN_HEIR	0x153	/* Hypervisor Emulated Instruction Register */
@@ -1223,6 +1229,7 @@ 
#define PVR_ARCH_206	0x0f000003

#define PVR_ARCH_206p	0x0f100003

#define PVR_ARCH_207	0x0f000004

#define PVR_ARCH_300	0x0f000005



/* Macros for setting and retrieving special purpose registers */

#ifndef __ASSEMBLY__