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Commit 9ca3037e authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv50-nvaf/fb: split the class definitions up a bit 



These will diverge further in the future.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 1e9fc30e

drivers/gpu/drm/nouveau/Makefile

+4 −0
Original line number Diff line number Diff line
@@ -78,6 +78,10 @@ nouveau-y += core/subdev/fb/nv47.o 
nouveau-y += core/subdev/fb/nv49.o

nouveau-y += core/subdev/fb/nv4e.o

nouveau-y += core/subdev/fb/nv50.o

nouveau-y += core/subdev/fb/nv84.o

nouveau-y += core/subdev/fb/nva3.o

nouveau-y += core/subdev/fb/nvaa.o

nouveau-y += core/subdev/fb/nvaf.o

nouveau-y += core/subdev/fb/nvc0.o

nouveau-y += core/subdev/fb/ramnv04.o

nouveau-y += core/subdev/fb/ramnv10.o

drivers/gpu/drm/nouveau/core/engine/device/nv50.c

+13 −13
Original line number Diff line number Diff line
@@ -89,7 +89,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -115,7 +115,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -141,7 +141,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -167,7 +167,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -193,7 +193,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -219,7 +219,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -245,7 +245,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -271,7 +271,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaa_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -297,7 +297,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaa_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -323,7 +323,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -350,7 +350,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -376,7 +376,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;
@@ -402,7 +402,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] = &nv50_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv50_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaf_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv50_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;

drivers/gpu/drm/nouveau/core/include/subdev/fb.h

+4 −0
Original line number Diff line number Diff line
@@ -94,6 +94,10 @@ extern struct nouveau_oclass *nv47_fb_oclass; 
extern struct nouveau_oclass *nv49_fb_oclass;

extern struct nouveau_oclass *nv4e_fb_oclass;

extern struct nouveau_oclass *nv50_fb_oclass;

extern struct nouveau_oclass *nv84_fb_oclass;

extern struct nouveau_oclass *nva3_fb_oclass;

extern struct nouveau_oclass *nvaa_fb_oclass;

extern struct nouveau_oclass *nvaf_fb_oclass;

extern struct nouveau_oclass *nvc0_fb_oclass;



struct nouveau_ram {

drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c

+11 −31
Original line number Diff line number Diff line
@@ -27,14 +27,9 @@ 
#include <core/engctx.h>

#include <core/object.h>



#include "priv.h"

#include <subdev/bios.h>



struct nv50_fb_priv {

	struct nouveau_fb base;

	struct page *r100c08_page;

	dma_addr_t r100c08;

};

#include "nv50.h"



int

nv50_fb_memtype[0x80] = {
@@ -239,7 +234,7 @@ nv50_fb_intr(struct nouveau_subdev *subdev) 
		pr_cont("0x%08x\n", st1);

}



static int

int

nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,

	     struct nouveau_oclass *oclass, void *data, u32 size,

	     struct nouveau_object **pobject)
@@ -269,7 +264,7 @@ nv50_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	return 0;

}



static void

void

nv50_fb_dtor(struct nouveau_object *object)

{

	struct nouveau_device *device = nv_device(object);
@@ -284,10 +279,10 @@ nv50_fb_dtor(struct nouveau_object *object) 
	nouveau_fb_destroy(&priv->base);

}



static int

int

nv50_fb_init(struct nouveau_object *object)

{

	struct nouveau_device *device = nv_device(object);

	struct nv50_fb_impl *impl = (void *)object->oclass;

	struct nv50_fb_priv *priv = (void *)object;

	int ret;
@@ -303,33 +298,18 @@ nv50_fb_init(struct nouveau_object *object) 


	/* This is needed to get meaningful information from 100c90

	 * on traps. No idea what these values mean exactly. */

	switch (device->chipset) {

	case 0x50:

		nv_wr32(priv, 0x100c90, 0x000707ff);

		break;

	case 0xa3:

	case 0xa5:

	case 0xa8:

		nv_wr32(priv, 0x100c90, 0x000d0fff);

		break;

	case 0xaf:

		nv_wr32(priv, 0x100c90, 0x089d1fff);

		break;

	default:

		nv_wr32(priv, 0x100c90, 0x001d07ff);

		break;

	}



	nv_wr32(priv, 0x100c90, impl->trap);

	return 0;

}



struct nouveau_oclass *

nv50_fb_oclass = &(struct nouveau_oclass) {

	.handle = NV_SUBDEV(FB, 0x50),

	.ofuncs = &(struct nouveau_ofuncs) {

nv50_fb_oclass = &(struct nv50_fb_impl) {

	.base.handle = NV_SUBDEV(FB, 0x50),

	.base.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = nv50_fb_ctor,

		.dtor = nv50_fb_dtor,

		.init = nv50_fb_init,

		.fini = _nouveau_fb_fini,

	},

};
 
	.trap = 0x000707ff,

}.base;

drivers/gpu/drm/nouveau/core/subdev/fb/nv50.h

0 → 100644
+23 −0
Original line number Diff line number Diff line 
#ifndef __NVKM_FB_NV50_H__

#define __NVKM_FB_NV50_H__



#include "priv.h"



struct nv50_fb_priv {

	struct nouveau_fb base;

	struct page *r100c08_page;

	dma_addr_t r100c08;

};



int  nv50_fb_ctor(struct nouveau_object *, struct nouveau_object *,

		  struct nouveau_oclass *, void *, u32,

		  struct nouveau_object **);

void nv50_fb_dtor(struct nouveau_object *);

int  nv50_fb_init(struct nouveau_object *);



struct nv50_fb_impl {

	struct nouveau_oclass base;

	u32 trap;

};



#endif