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Commit 9c97b5ab authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: partially revert "drm/amdgpu: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR" v2 



The gtt_end is already inclusive, we don't need to subtract one here.

v2 (chk): keep the fix for the VM code, cause here it really applies.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAnatoli Antonovitch <anatoli.antonovitch@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f3f17692

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -513,7 +513,7 @@ static int gmc_v7_0_gart_enable(struct amdgpu_device *adev) 
	WREG32(mmVM_L2_CNTL3, tmp);

	WREG32(mmVM_L2_CNTL3, tmp);

	/* setup context0 */

	/* setup context0 */

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->mc.gtt_start >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->mc.gtt_start >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, (adev->mc.gtt_end >> 12) - 1);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->mc.gtt_end >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12);

	WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

	WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

			(u32)(adev->dummy_page.addr >> 12));

			(u32)(adev->dummy_page.addr >> 12));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -657,7 +657,7 @@ static int gmc_v8_0_gart_enable(struct amdgpu_device *adev) 
	WREG32(mmVM_L2_CNTL4, tmp);

	WREG32(mmVM_L2_CNTL4, tmp);

	/* setup context0 */

	/* setup context0 */

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->mc.gtt_start >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->mc.gtt_start >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, (adev->mc.gtt_end >> 12) - 1);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->mc.gtt_end >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12);

	WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12);

	WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

	WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

			(u32)(adev->dummy_page.addr >> 12));

			(u32)(adev->dummy_page.addr >> 12));