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Commit 95fa99aa authored by Robin Murphy's avatar Robin Murphy Committed by Will Deacon
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iommu/arm-smmu: Set PRIVCFG in stage 1 STEs 



Implement the SMMUv3 equivalent of d346180e ("iommu/arm-smmu: Treat
all device transactions as unprivileged"), so that once again those
pesky DMA controllers with their privileged instruction fetches don't
unexpectedly fault in stage 1 domains due to VMSAv8 rules.

Acked-by: default avatarWill Deacon <will.deacon@arm.com>
Tested-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 08d4ca2a

drivers/iommu/arm-smmu-v3.c

+6 −1
Original line number Original line Diff line number Diff line
@@ -267,6 +267,9 @@ 
#define STRTAB_STE_1_SHCFG_INCOMING	1UL

#define STRTAB_STE_1_SHCFG_INCOMING	1UL

#define STRTAB_STE_1_SHCFG_SHIFT	44

#define STRTAB_STE_1_SHCFG_SHIFT	44





#define STRTAB_STE_1_PRIVCFG_UNPRIV	2UL

#define STRTAB_STE_1_PRIVCFG_SHIFT	48



#define STRTAB_STE_2_S2VMID_SHIFT	0

#define STRTAB_STE_2_S2VMID_SHIFT	0

#define STRTAB_STE_2_S2VMID_MASK	0xffffUL

#define STRTAB_STE_2_S2VMID_MASK	0xffffUL

#define STRTAB_STE_2_VTCR_SHIFT		32

#define STRTAB_STE_2_VTCR_SHIFT		32
@@ -1068,7 +1071,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_device *smmu, u32 sid, 
#ifdef CONFIG_PCI_ATS

#ifdef CONFIG_PCI_ATS

			 STRTAB_STE_1_EATS_TRANS << STRTAB_STE_1_EATS_SHIFT |

			 STRTAB_STE_1_EATS_TRANS << STRTAB_STE_1_EATS_SHIFT |

#endif

#endif

			 STRTAB_STE_1_STRW_NSEL1 << STRTAB_STE_1_STRW_SHIFT);

			 STRTAB_STE_1_STRW_NSEL1 << STRTAB_STE_1_STRW_SHIFT |

			 STRTAB_STE_1_PRIVCFG_UNPRIV <<

			 STRTAB_STE_1_PRIVCFG_SHIFT);





		if (smmu->features & ARM_SMMU_FEAT_STALLS)

		if (smmu->features & ARM_SMMU_FEAT_STALLS)

			dst[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD);

			dst[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD);