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Commit 91ea692f authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC fixes from Arnd Bergmann:
 "Here are the latest bug fixes for ARM SoCs, mostly addressing recent
  regressions.  Changes are across several platforms, so I'm listing
  every change separately here.

  Regressions since 4.5:

   - A correction of the psci firmware DT binding, to prevent users from
     relying on unintended semantics

   - Actually getting the newly merged clock driver for some OMAP
     platforms to work

   - A revert of patches for the Qualcomm BAM, these need to be reworked
     for 4.7 to avoid breaking boards other than the one they were
     intended for

   - A correction for the I2C device nodes on the Socionext Uniphier
     platform

   - i.MX SDHCI was broken for non-DT platforms due to a change with the
     setting of the DMA mask

   - A revert of a patch that accidentally added a nonexisting clock on
     the Rensas "Porter" board

   - A couple of OMAP fixes that are all related to suspend after the
     power domain changes for dra7

   - On Mediatek, revert part of the power domain initialization changes
     that broke mt8173-evb

  Fixes for older bugs:

   - Workaround for an "external abort" in the omap34xx suspend/resume
     code.

   - The USB1/eSATA should not be listed as an excon device on
     am57xx-beagle-x15 (broken since v4.0)

   - A v4.5 regression in the TI AM33xx and AM43XX DT specifying
     incorrect DMA request lines for the GPMC

   - The jiffies calibration on Renesas platforms was incorrect for some
     modern CPU cores.

   - A hardware errata woraround for clockdomains on TI DRA7"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  drivers: firmware: psci: unify enable-method binding on ARM {64,32}-bit systems
  arm64: dts: uniphier: fix I2C nodes of PH1-LD20
  ARM: shmobile: timer: Fix preset_lpj leading to too short delays
  Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
  ARM: dts: r8a7791: Don't disable referenced optional clocks
  Revert "ARM: OMAP: Catch callers of revision information prior to it being populated"
  ARM: OMAP3: Fix external abort on 36xx waking from off mode idle
  ARM: dts: am57xx-beagle-x15: remove extcon_usb1
  ARM: dts: am437x: Fix GPMC dma properties
  ARM: dts: am33xx: Fix GPMC dma properties
  Revert "soc: mediatek: SCPSYS: Fix double enabling of regulators"
  ARM: mach-imx: sdhci-esdhc-imx: initialize DMA mask
  ARM: DRA7: clockdomain: Implement timer workaround for errata i874
  ARM: OMAP: Catch callers of revision information prior to it being populated
  ARM: dts: dra7: Correct clock tree for sys_32k_ck
  ARM: OMAP: DRA7: Provide proper class to omap2_set_globals_tap
  ARM: OMAP: DRA7: wakeupgen: Skip SAR save for wakeupgen
  Revert "dts: msm8974: Add dma channels for blsp2_i2c1 node"
  Revert "dts: msm8974: Add blsp2_bam dma node"
  ARM: dts: Add clocks for dm814x ADPLL
parents 8ead9dd5 978fa436
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+0 −1
Original line number Original line Diff line number Diff line
@@ -192,7 +192,6 @@ nodes to be present and contain the properties described below.
			  can be one of:
			  can be one of:
			    "allwinner,sun6i-a31"
			    "allwinner,sun6i-a31"
			    "allwinner,sun8i-a23"
			    "allwinner,sun8i-a23"
			    "arm,psci"
			    "arm,realview-smp"
			    "arm,realview-smp"
			    "brcm,bcm-nsp-smp"
			    "brcm,bcm-nsp-smp"
			    "brcm,brahma-b15"
			    "brcm,brahma-b15"
+1 −1
Original line number Original line Diff line number Diff line
@@ -860,7 +860,7 @@
			ti,no-idle-on-init;
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			interrupts = <100>;
			dmas = <&edma 52>;
			dmas = <&edma 52 0>;
			dma-names = "rxtx";
			dma-names = "rxtx";
			gpmc,num-cs = <7>;
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			gpmc,num-waitpins = <2>;
+1 −1
Original line number Original line Diff line number Diff line
@@ -884,7 +884,7 @@
		gpmc: gpmc@50000000 {
		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,hwmods = "gpmc";
			dmas = <&edma 52>;
			dmas = <&edma 52 0>;
			dma-names = "rxtx";
			dma-names = "rxtx";
			clocks = <&l3s_gclk>;
			clocks = <&l3s_gclk>;
			clock-names = "fck";
			clock-names = "fck";
+0 −17
Original line number Original line Diff line number Diff line
@@ -99,13 +99,6 @@
		#cooling-cells = <2>;
		#cooling-cells = <2>;
	};
	};


	extcon_usb1: extcon_usb1 {
		compatible = "linux,extcon-usb-gpio";
		id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&extcon_usb1_pins>;
	};

	hdmi0: connector {
	hdmi0: connector {
		compatible = "hdmi-connector";
		compatible = "hdmi-connector";
		label = "hdmi";
		label = "hdmi";
@@ -349,12 +342,6 @@
		>;
		>;
	};
	};


	extcon_usb1_pins: extcon_usb1_pins {
		pinctrl-single,pins = <
			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
		>;
	};

	tpd12s015_pins: pinmux_tpd12s015_pins {
	tpd12s015_pins: pinmux_tpd12s015_pins {
		pinctrl-single,pins = <
		pinctrl-single,pins = <
			DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14)		/* gpio7_10 CT_CP_HPD */
			DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14)		/* gpio7_10 CT_CP_HPD */
@@ -706,10 +693,6 @@
	pinctrl-0 = <&usb1_pins>;
	pinctrl-0 = <&usb1_pins>;
};
};


&omap_dwc3_1 {
	extcon = <&extcon_usb1>;
};

&omap_dwc3_2 {
&omap_dwc3_2 {
	extcon = <&extcon_usb2>;
	extcon = <&extcon_usb2>;
};
};
+212 −31
Original line number Original line Diff line number Diff line
@@ -4,6 +4,157 @@
 * published by the Free Software Foundation.
 * published by the Free Software Foundation.
 */
 */


&pllss {
	/*
	 * See TRM "2.6.10 Connected outputso DPLLS" and
	 * "2.6.11 Connected Outputs of DPLLJ". Only clkout is
	 * connected except for hdmi and usb.
	 */
	adpll_mpu_ck: adpll@40 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-s-clock";
		reg = <0x40 0x40>;
		clocks = <&devosc_ck &devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow", "clkinphif";
		clock-output-names = "481c5040.adpll.dcoclkldo",
				     "481c5040.adpll.clkout",
				     "481c5040.adpll.clkoutx2",
				     "481c5040.adpll.clkouthif";
	};

	adpll_dsp_ck: adpll@80 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x80 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5080.adpll.dcoclkldo",
				     "481c5080.adpll.clkout",
				     "481c5080.adpll.clkoutldo";
	};

	adpll_sgx_ck: adpll@b0 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0xb0 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c50b0.adpll.dcoclkldo",
				     "481c50b0.adpll.clkout",
				     "481c50b0.adpll.clkoutldo";
	};

	adpll_hdvic_ck: adpll@e0 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0xe0 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c50e0.adpll.dcoclkldo",
				     "481c50e0.adpll.clkout",
				     "481c50e0.adpll.clkoutldo";
	};

	adpll_l3_ck: adpll@110 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x110 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5110.adpll.dcoclkldo",
				     "481c5110.adpll.clkout",
				     "481c5110.adpll.clkoutldo";
	};

	adpll_isp_ck: adpll@140 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x140 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5140.adpll.dcoclkldo",
				     "481c5140.adpll.clkout",
				     "481c5140.adpll.clkoutldo";
	};

	adpll_dss_ck: adpll@170 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x170 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5170.adpll.dcoclkldo",
				     "481c5170.adpll.clkout",
				     "481c5170.adpll.clkoutldo";
	};

	adpll_video0_ck: adpll@1a0 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x1a0 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c51a0.adpll.dcoclkldo",
				     "481c51a0.adpll.clkout",
				     "481c51a0.adpll.clkoutldo";
	};

	adpll_video1_ck: adpll@1d0 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x1d0 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c51d0.adpll.dcoclkldo",
				     "481c51d0.adpll.clkout",
				     "481c51d0.adpll.clkoutldo";
	};

	adpll_hdmi_ck: adpll@200 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x200 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5200.adpll.dcoclkldo",
				     "481c5200.adpll.clkout",
				     "481c5200.adpll.clkoutldo";
	};

	adpll_audio_ck: adpll@230 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x230 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5230.adpll.dcoclkldo",
				     "481c5230.adpll.clkout",
				     "481c5230.adpll.clkoutldo";
	};

	adpll_usb_ck: adpll@260 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x260 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5260.adpll.dcoclkldo",
				     "481c5260.adpll.clkout",
				     "481c5260.adpll.clkoutldo";
	};

	adpll_ddr_ck: adpll@290 {
		#clock-cells = <1>;
		compatible = "ti,dm814-adpll-lj-clock";
		reg = <0x290 0x30>;
		clocks = <&devosc_ck &devosc_ck>;
		clock-names = "clkinp", "clkinpulow";
		clock-output-names = "481c5290.adpll.dcoclkldo",
				     "481c5290.adpll.clkout",
				     "481c5290.adpll.clkoutldo";
	};
};

&pllss_clocks {
&pllss_clocks {
	timer1_fck: timer1_fck {
	timer1_fck: timer1_fck {
		#clock-cells = <0>;
		#clock-cells = <0>;
@@ -23,6 +174,24 @@
		reg = <0x2e0>;
		reg = <0x2e0>;
	};
	};


	/* CPTS_RFT_CLK in RMII_REFCLK_SRC, usually sourced from auiod */
	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		clocks = <&adpll_video0_ck 1
			  &adpll_video1_ck 1
			  &adpll_audio_ck 1>;
		ti,bit-shift = <1>;
		reg = <0x2e8>;
	};

	/* REVISIT: Set up with a proper mux using RMII_REFCLK_SRC */
	cpsw_125mhz_gclk: cpsw_125mhz_gclk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <125000000>;
	};

	sysclk18_ck: sysclk18_ck {
	sysclk18_ck: sysclk18_ck {
		#clock-cells = <0>;
		#clock-cells = <0>;
		compatible = "ti,mux-clock";
		compatible = "ti,mux-clock";
@@ -79,37 +248,6 @@
		compatible = "fixed-clock";
		compatible = "fixed-clock";
		clock-frequency = <1000000000>;
		clock-frequency = <1000000000>;
	};
	};

	sysclk4_ck: sysclk4_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <222000000>;
	};

	sysclk6_ck: sysclk6_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <100000000>;
	};

	sysclk10_ck: sysclk10_ck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <48000000>;
	};

        cpsw_125mhz_gclk: cpsw_125mhz_gclk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <125000000>;
	};

	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <250000000>;
	};

};
};


&prcm_clocks {
&prcm_clocks {
@@ -138,6 +276,49 @@
		clock-div = <78125>;
		clock-div = <78125>;
	};
	};


	/* L4_HS 220 MHz*/
	sysclk4_ck: sysclk4_ck {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clocks = <&adpll_l3_ck 1>;
		ti,clock-mult = <1>;
		ti,clock-div = <1>;
	};

	/* L4_FWCFG */
	sysclk5_ck: sysclk5_ck {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clocks = <&adpll_l3_ck 1>;
		ti,clock-mult = <1>;
		ti,clock-div = <2>;
	};

	/* L4_LS 110 MHz */
	sysclk6_ck: sysclk6_ck {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clocks = <&adpll_l3_ck 1>;
		ti,clock-mult = <1>;
		ti,clock-div = <2>;
	};

	sysclk8_ck: sysclk8_ck {
		#clock-cells = <0>;
		compatible = "ti,fixed-factor-clock";
		clocks = <&adpll_usb_ck 1>;
		ti,clock-mult = <1>;
		ti,clock-div = <1>;
	};

	sysclk10_ck: sysclk10_ck {
		compatible = "ti,divider-clock";
		reg = <0x324>;
		ti,max-div = <7>;
		#clock-cells = <0>;
		clocks = <&adpll_usb_ck 1>;
	};

	aud_clkin0_ck: aud_clkin0_ck {
	aud_clkin0_ck: aud_clkin0_ck {
		#clock-cells = <0>;
		#clock-cells = <0>;
		compatible = "fixed-clock";
		compatible = "fixed-clock";
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