Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8e795840 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branches 'pci/enumeration' and 'pci/virtualization' into next

* pci/enumeration:
  PCI: Cleanup control flow
  sparc/PCI: Claim bus resources before pci_bus_add_devices()
  PCI: Assign resources before drivers claim devices (pci_scan_root_bus())
  PCI: Assign resources before drivers claim devices (pci_scan_bus())

* pci/virtualization:
  PCI: Add ACS quirks for Intel 1G NICs
Loading
Loading
Loading
Loading
+7 −0
Original line number Diff line number Diff line
@@ -338,6 +338,8 @@ common_init_pci(void)

		bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
					hose, &resources);
		if (!bus)
			continue;
		hose->bus = bus;
		hose->need_domain_info = need_domain_info;
		next_busno = bus->busn_res.end + 1;
@@ -353,6 +355,11 @@ common_init_pci(void)

	pci_assign_unassigned_resources();
	pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
	for (hose = hose_head; hose; hose = hose->next) {
		bus = hose->bus;
		if (bus)
			pci_bus_add_devices(bus);
	}
}


+4 −0
Original line number Diff line number Diff line
@@ -207,6 +207,9 @@ nautilus_init_pci(void)

	/* Scan our single hose.  */
	bus = pci_scan_bus(0, alpha_mv.pci_ops, hose);
	if (!bus)
		return;

	hose->bus = bus;
	pcibios_claim_one_bus(bus);

@@ -253,6 +256,7 @@ nautilus_init_pci(void)
	   for the root bus, so just clear it. */
	bus->self = NULL;
	pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
	pci_bus_add_devices(bus);
}

/*
+4 −8
Original line number Diff line number Diff line
@@ -155,17 +155,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
static struct pci_bus __init *
dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
{
	struct pci_bus *bus;

	if (nr < num_pcie_ports) {
		bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
					&sys->resources);
	} else {
		bus = NULL;
	if (nr >= num_pcie_ports) {
		BUG();
		return NULL;
	}

	return bus;
	return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
				 &sys->resources);
}

static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+4 −8
Original line number Diff line number Diff line
@@ -197,17 +197,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
static struct pci_bus __init *
mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
{
	struct pci_bus *bus;

	if (nr < num_pcie_ports) {
		bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
					&sys->resources);
	} else {
		bus = NULL;
	if (nr >= num_pcie_ports) {
		BUG();
		return NULL;
	}

	return bus;
	return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
				 &sys->resources);
}

static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,
+14 −18
Original line number Diff line number Diff line
@@ -540,37 +540,33 @@ void __init orion5x_pci_set_cardbus_mode(void)

int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
{
	int ret = 0;

	vga_base = ORION5X_PCIE_MEM_PHYS_BASE;

	if (nr == 0) {
		orion_pcie_set_local_bus_nr(PCIE_BASE, sys->busnr);
		ret = pcie_setup(sys);
	} else if (nr == 1 && !orion5x_pci_disabled) {
		return pcie_setup(sys);
	}

	if (nr == 1 && !orion5x_pci_disabled) {
		orion5x_pci_set_bus_nr(sys->busnr);
		ret = pci_setup(sys);
		return pci_setup(sys);
	}

	return ret;
	return 0;
}

struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
{
	struct pci_bus *bus;

	if (nr == 0) {
		bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
	if (nr == 0)
		return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
					 &sys->resources);
	} else if (nr == 1 && !orion5x_pci_disabled) {
		bus = pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,

	if (nr == 1 && !orion5x_pci_disabled)
		return pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
					 &sys->resources);
	} else {
		bus = NULL;
		BUG();
	}

	return bus;
	BUG();
	return NULL;
}

int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
Loading