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Commit 8d20a3dd authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm64 fixes from Catalin Marinas:
 "Various arm64 fixes:
   - ftrace branch generation fix
   - branch instruction encoding fix
   - include files, guards and unused prototypes clean-up
   - minor VDSO ABI fix (clock_getres)
   - PSCI functions moved to .S to avoid compilation error with gcc 5
   - pte_modify fix to not ignore the mapping type
   - crypto: AES interleaved increased to 4x (for performance reasons)
   - text patching fix for modules
   - swiotlb increased back to 64MB
   - copy_siginfo_to_user32() fix for big endian"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: cpuidle: add asm/proc-fns.h inclusion
  arm64: compat Fix siginfo_t -> compat_siginfo_t conversion on big endian
  arm64: Increase the swiotlb buffer size 64MB
  arm64: Fix text patching logic when using fixmap
  arm64: crypto: increase AES interleave to 4x
  arm64: enable PTE type bit in the mask for pte_modify
  arm64: mm: remove unused functions and variable protoypes
  arm64: psci: move psci firmware calls out of line
  arm64: vdso: minor ABI fix for clock_getres
  arm64: guard asm/assembler.h against multiple inclusions
  arm64: insn: fix compare-and-branch encodings
  arm64: ftrace: fix ftrace_modify_graph_caller for branch replace
parents 1c070515 af4819af
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+1 −1
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@@ -29,7 +29,7 @@ aes-ce-blk-y := aes-glue-ce.o aes-ce.o
obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o
aes-neon-blk-y := aes-glue-neon.o aes-neon.o

AFLAGS_aes-ce.o		:= -DINTERLEAVE=2 -DINTERLEAVE_INLINE
AFLAGS_aes-ce.o		:= -DINTERLEAVE=4
AFLAGS_aes-neon.o	:= -DINTERLEAVE=4

CFLAGS_aes-glue-ce.o	:= -DUSE_V8_CRYPTO_EXTENSIONS
+5 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@
#error "Only include this from assembly code"
#endif

#ifndef __ASM_ASSEMBLER_H
#define __ASM_ASSEMBLER_H

#include <asm/ptrace.h>
#include <asm/thread_info.h>

@@ -155,3 +158,5 @@ lr .req x30 // link register
#endif
	orr	\rd, \lbits, \hbits, lsl #32
	.endm

#endif	/* __ASM_ASSEMBLER_H */
+2 −0
Original line number Diff line number Diff line
#ifndef __ASM_CPUIDLE_H
#define __ASM_CPUIDLE_H

#include <asm/proc-fns.h>

#ifdef CONFIG_CPU_IDLE
extern int cpu_init_idle(unsigned int cpu);
extern int cpu_suspend(unsigned long arg);
+4 −2
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@@ -264,8 +264,10 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
__AARCH64_INSN_FUNCS(bics,	0x7F200000, 0x6A200000)
__AARCH64_INSN_FUNCS(b,		0xFC000000, 0x14000000)
__AARCH64_INSN_FUNCS(bl,	0xFC000000, 0x94000000)
__AARCH64_INSN_FUNCS(cbz,	0xFE000000, 0x34000000)
__AARCH64_INSN_FUNCS(cbnz,	0xFE000000, 0x35000000)
__AARCH64_INSN_FUNCS(cbz,	0x7F000000, 0x34000000)
__AARCH64_INSN_FUNCS(cbnz,	0x7F000000, 0x35000000)
__AARCH64_INSN_FUNCS(tbz,	0x7F000000, 0x36000000)
__AARCH64_INSN_FUNCS(tbnz,	0x7F000000, 0x37000000)
__AARCH64_INSN_FUNCS(bcond,	0xFF000010, 0x54000000)
__AARCH64_INSN_FUNCS(svc,	0xFFE0001F, 0xD4000001)
__AARCH64_INSN_FUNCS(hvc,	0xFFE0001F, 0xD4000002)
+1 −1
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@@ -460,7 +460,7 @@ static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
			      PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
			      PTE_PROT_NONE | PTE_WRITE | PTE_TYPE_MASK;
	pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
	return pte;
}
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