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Commit 8b8936fc authored by Pramod Gurav's avatar Pramod Gurav Committed by Kumar Gala
Browse files

ARM: DT: APQ8064: Add pinctrl support 



This patch adds device tree nodes to support pinctrl for apq8064 SOC

CC: Rob Herring <robh+dt@kernel.org>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Kumar Gala <galak@codeaurora.org>
CC: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org

Signed-off-by: default avatarPramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
parent 44980b28

arch/arm/boot/dts/qcom-apq8064.dtsi

+12 −0
Original line number Original line Diff line number Diff line
@@ -3,6 +3,7 @@ 
#include "skeleton.dtsi"

#include "skeleton.dtsi"

#include <dt-bindings/clock/qcom,gcc-msm8960.h>

#include <dt-bindings/clock/qcom,gcc-msm8960.h>

#include <dt-bindings/soc/qcom,gsbi.h>

#include <dt-bindings/soc/qcom,gsbi.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>





/ {

/ {

	model = "Qualcomm APQ8064";

	model = "Qualcomm APQ8064";
@@ -70,6 +71,17 @@ 
		ranges;

		ranges;

		compatible = "simple-bus";

		compatible = "simple-bus";





		tlmm_pinmux: pinctrl@800000 {

			compatible = "qcom,apq8064-pinctrl";

			reg = <0x800000 0x4000>;



			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;

		};



		intc: interrupt-controller@2000000 {

		intc: interrupt-controller@2000000 {

			compatible = "qcom,msm-qgic2";

			compatible = "qcom,msm-qgic2";

			interrupt-controller;

			interrupt-controller;