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Commit 8935dced authored by David S. Miller's avatar David S. Miller
Browse files

[SPARC64]: Add SMT scheduling support for Niagara.



The mapping is a simple "(cpuid >> 2) == core" for now.
Later we'll add more sophisticated code that will walk
the sun4v machine description and figure this out from
there.

We should also add core mappings for jaguar and panther
processors.

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 17b0e199
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+9 −0
Original line number Original line Diff line number Diff line
@@ -356,6 +356,15 @@ config SOLARIS_EMUL


endmenu
endmenu


config SCHED_SMT
	bool "SMT (Hyperthreading) scheduler support"
	depends on SMP
	default y
	help
	  SMT scheduler support improves the CPU scheduler's decision making
	  when dealing with UltraSPARC cpus at a cost of slightly increased
	  overhead in some places. If unsure say N here.

config CMDLINE_BOOL
config CMDLINE_BOOL
	bool "Default bootloader kernel arguments"
	bool "Default bootloader kernel arguments"


+18 −0
Original line number Original line Diff line number Diff line
@@ -47,6 +47,8 @@ static unsigned char boot_cpu_id;


cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE;
cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE;
cpumask_t phys_cpu_present_map __read_mostly = CPU_MASK_NONE;
cpumask_t phys_cpu_present_map __read_mostly = CPU_MASK_NONE;
cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly =
	{ [0 ... NR_CPUS-1] = CPU_MASK_NONE };
static cpumask_t smp_commenced_mask;
static cpumask_t smp_commenced_mask;
static cpumask_t cpu_callout_map;
static cpumask_t cpu_callout_map;


@@ -1291,6 +1293,8 @@ int setup_profiling_timer(unsigned int multiplier)
/* Constrain the number of cpus to max_cpus.  */
/* Constrain the number of cpus to max_cpus.  */
void __init smp_prepare_cpus(unsigned int max_cpus)
void __init smp_prepare_cpus(unsigned int max_cpus)
{
{
	int i;

	if (num_possible_cpus() > max_cpus) {
	if (num_possible_cpus() > max_cpus) {
		int instance, mid;
		int instance, mid;


@@ -1305,6 +1309,20 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
		}
		}
	}
	}


	for_each_cpu(i) {
		if (tlb_type == hypervisor) {
			int j;

			/* XXX get this mapping from machine description */
			for_each_cpu(j) {
				if ((j >> 2) == (i >> 2))
					cpu_set(j, cpu_sibling_map[i]);
			}
		} else {
			cpu_set(i, cpu_sibling_map[i]);
		}
	}

	smp_store_cpu_info(boot_cpu_id);
	smp_store_cpu_info(boot_cpu_id);
}
}


+2 −0
Original line number Original line Diff line number Diff line
@@ -33,6 +33,8 @@
extern cpumask_t phys_cpu_present_map;
extern cpumask_t phys_cpu_present_map;
#define cpu_possible_map phys_cpu_present_map
#define cpu_possible_map phys_cpu_present_map


extern cpumask_t cpu_sibling_map[NR_CPUS];

/*
/*
 *	General functions that each host system must provide.
 *	General functions that each host system must provide.
 */
 */