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Commit 88b1b18f authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman
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ARM: dts: meson: add the SDIO MMC controller 



Meson6, Meson8 and Meson8b are using the same MMC controller IP. This
adds the MMC controller node to meson.dtsi so it can be used by all
SoCs.

The controller itself is a bit special, because it has multiple slots.
Each slot is accessed through a sub-node of the controller. However,
currently the driver for this hardware only supports one slot.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent b9b4bf50

arch/arm/boot/dts/meson.dtsi

+9 −0
Original line number Original line Diff line number Diff line
@@ -165,6 +165,15 @@ 
				status = "disabled";

				status = "disabled";

			};

			};





			sdio: mmc@8c20 {

				compatible = "amlogic,meson-mx-sdio";

				reg = <0x8c20 0x20>;

				interrupts = <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";

			};



			spifc: spi@8c80 {

			spifc: spi@8c80 {

				compatible = "amlogic,meson6-spifc";

				compatible = "amlogic,meson6-spifc";

				reg = <0x8c80 0x80>;

				reg = <0x8c80 0x80>;

arch/arm/boot/dts/meson8.dtsi

+6 −0
Original line number Original line Diff line number Diff line
@@ -299,6 +299,12 @@ 
	clock-names = "clkin", "core", "sana";

	clock-names = "clkin", "core", "sana";

};

};





&sdio {

	compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio";

	clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;

	clock-names = "core", "clkin";

};



&spifc {

&spifc {

	clocks = <&clkc CLKID_CLK81>;

	clocks = <&clkc CLKID_CLK81>;

};

};

arch/arm/boot/dts/meson8b.dtsi

+6 −0
Original line number Original line Diff line number Diff line
@@ -207,6 +207,12 @@ 
	clock-names = "clkin", "core", "sana";

	clock-names = "clkin", "core", "sana";

};

};





&sdio {

	compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";

	clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;

	clock-names = "core", "clkin";

};



&uart_AO {

&uart_AO {

	clocks = <&clkc CLKID_CLK81>;

	clocks = <&clkc CLKID_CLK81>;

};

};