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Commit 81faddef authored by Alexander Duyck's avatar Alexander Duyck Committed by Jeff Kirsher
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ixgbe: Cleanup configuration of FCoE registers 



This change makes it so we always use the FCoE redirection table.  We just
set all 8 entries to the same value in the case of only having one queue
for FCoE.

Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Tested-by: default avatarPhil Schmitt <phillip.j.schmitt@intel.com>
Tested-by: default avatarRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 1bf91cdc

drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c

+31 −27
Original line number Original line Diff line number Diff line
@@ -618,6 +618,7 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter) 
	struct ixgbe_fcoe *fcoe = &adapter->fcoe;

	struct ixgbe_fcoe *fcoe = &adapter->fcoe;

	struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];

	struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];

	unsigned int cpu;

	unsigned int cpu;

	u32 etqf;





	if (!fcoe->pool) {

	if (!fcoe->pool) {

		spin_lock_init(&fcoe->lock);

		spin_lock_init(&fcoe->lock);
@@ -665,40 +666,43 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter) 
		}

		}

	}

	}





	/* Enable L2 eth type filter for FCoE */

	/* Enable L2 EtherType filter for FCoE, necessary for FCoE Rx CRC */

	IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),

	etqf = ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN;

			(ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));

	if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {

	/* Enable L2 eth type filter for FIP */

		etqf |= IXGBE_ETQF_POOL_ENABLE;

	IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP),

		etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT;

			(ETH_P_FIP | IXGBE_ETQF_FILTER_EN));

	}

	if (adapter->ring_feature[RING_F_FCOE].indices) {

	IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE), etqf);

		/* Use multiple rx queues for FCoE by redirection table */

	IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);



	/* Use one or more Rx queues for FCoE by redirection table */

	for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {

	for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {

			fcoe_i = f->offset + i % f->indices;

		fcoe_i = f->offset + (i % f->indices);

		fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;

		fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;

		fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;

		fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;

		IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);

		IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);

	}

	}

	IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);

	IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);

		IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);



	} else  {

	/* Enable L2 EtherType filter for FIP */

		/* Use single rx queue for FCoE */

	etqf = ETH_P_FIP | IXGBE_ETQF_FILTER_EN;

		fcoe_i = f->offset;

	if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {

		fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;

		etqf |= IXGBE_ETQF_POOL_ENABLE;

		IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);

		etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT;

		IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),

				IXGBE_ETQS_QUEUE_EN |

				(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));

	}

	}

	/* send FIP frames to the first FCoE queue */

	IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP), etqf);

	fcoe_i = f->offset;



	fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;

	/* Send FIP frames to the first FCoE queue */

	fcoe_q = adapter->rx_ring[f->offset]->reg_idx;

	IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),

	IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),

			IXGBE_ETQS_QUEUE_EN |

			IXGBE_ETQS_QUEUE_EN |

			(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));

			(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));





	IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL, IXGBE_FCRXCTRL_FCCRCBO |

	/* Configure FCoE Rx control */

	IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,

			IXGBE_FCRXCTRL_FCCRCBO |

			(FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));

			(FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));



	return;

	return;

out_pcpu_noddp_extra_buff_alloc_fail:

out_pcpu_noddp_extra_buff_alloc_fail:

	free_percpu(fcoe->pcpu_noddp);

	free_percpu(fcoe->pcpu_noddp);

drivers/net/ethernet/intel/ixgbe/ixgbe_type.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -1452,6 +1452,7 @@ enum { 
#define IXGBE_ETQF_1588         0x40000000 /* bit 30 */

#define IXGBE_ETQF_1588         0x40000000 /* bit 30 */

#define IXGBE_ETQF_FILTER_EN    0x80000000 /* bit 31 */

#define IXGBE_ETQF_FILTER_EN    0x80000000 /* bit 31 */

#define IXGBE_ETQF_POOL_ENABLE   (1 << 26) /* bit 26 */

#define IXGBE_ETQF_POOL_ENABLE   (1 << 26) /* bit 26 */

#define IXGBE_ETQF_POOL_SHIFT		20





#define IXGBE_ETQS_RX_QUEUE     0x007F0000 /* bits 22:16 */

#define IXGBE_ETQS_RX_QUEUE     0x007F0000 /* bits 22:16 */

#define IXGBE_ETQS_RX_QUEUE_SHIFT       16

#define IXGBE_ETQS_RX_QUEUE_SHIFT       16