Merge remote-tracking branches 'asoc/topic/tdm-slot', 'asoc/topic/tegra',...

NVIDIA Tegra audio complex, with RT5677 CODEC

Required properties:

- compatible : "nvidia,tegra-audio-rt5677"

- clocks : Must contain an entry for each entry in clock-names.

  See ../clocks/clock-bindings.txt for details.

- clock-names : Must include the following entries:

  - pll_a

  - pll_a_out0

  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)

- nvidia,model : The user-visible name of this sound complex.

- nvidia,audio-routing : A list of the connections between audio components.

  Each entry is a pair of strings, the first being the connection's sink,

  the second being the connection's source. Valid names for sources and

  sinks are the RT5677's pins (as documented in its binding), and the jacks

  on the board:

  * Headphone

  * Speaker

  * Headset Mic

  * Internal Mic 1

  * Internal Mic 2

- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's

  connected to the CODEC.

- nvidia,audio-codec : The phandle of the RT5677 audio codec. This binding

  assumes that AIF1 on the CODEC is connected to Tegra.

Optional properties:

- nvidia,hp-det-gpios : The GPIO that detects headphones are plugged in

- nvidia,hp-en-gpios : The GPIO that enables headphone amplifier

- nvidia,mic-present-gpios: The GPIO that mic jack is plugged in

- nvidia,dmic-clk-en-gpios : The GPIO that gates DMIC clock signal

Example:

sound {

	compatible = "nvidia,tegra-audio-rt5677-ryu",

	        "nvidia,tegra-audio-rt5677";

	nvidia,model = "NVIDIA Tegra Ryu";

	nvidia,audio-routing =

		"Headphone", "LOUT2",

		"Headphone", "LOUT1",

		"Headset Mic", "MICBIAS1",

		"IN1P", "Headset Mic",

		"IN1N", "Headset Mic",

		"DMIC L1", "Internal Mic 1",

		"DMIC R1", "Internal Mic 1",

		"DMIC L2", "Internal Mic 2",

		"DMIC R2", "Internal Mic 2",

		"Speaker", "PDM1L",

		"Speaker", "PDM1R";

	nvidia,i2s-controller = <&tegra_i2s1>;

	nvidia,audio-codec = <&rt5677>;

	nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;

	nvidia,mic-present-gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>;

	nvidia,hp-en-gpios = <&rt5677 1 GPIO_ACTIVE_HIGH>;

	nvidia,dmic-clk-en-gpios = <&rt5677 2 GPIO_ACTIVE_HIGH>;

	clocks = <&tegra_car TEGRA124_CLK_PLL_A>,

	         <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,

	         <&tegra_car TEGRA124_CLK_EXTERN1>;

	clock-names = "pll_a", "pll_a_out0", "mclk";

};

    "ti,tlv320aic33" - TLV320AIC33

    "ti,tlv320aic3007" - TLV320AIC3007

    "ti,tlv320aic3106" - TLV320AIC3106

    "ti,tlv320aic3104" - TLV320AIC3104

- reg - <int> -  I2C slave address

- gpio-reset - gpio pin number used for codec reset

- ai3x-gpio-func - <array of 2 int> - AIC3X_GPIO1 & AIC3X_GPIO2 Functionality

				    - Not supported on tlv320aic3104

- ai3x-micbias-vg - MicBias Voltage required.

	1 - MICBIAS output is powered to 2.0V,

	2 - MICBIAS output is powered to 2.5V,

  * HPLCOM

  * HPRCOM

CODEC input pins:

CODEC input pins for TLV320AIC3104:

  * MIC2L

  * MIC2R

  * LINE1L

  * LINE1R

CODEC input pins for other compatible codecs:

  * MIC3L

  * MIC3R

  * LINE1L

 - interrupt-parent:	The parent interrupt controller

 - interrupts:		Interrupt number for /INT pin from the 227e

Optional properies:

 - ti,micbias:   Intended MICBIAS voltage (datasheet section 9.6.7).

      Select 0/1/2/3/4/5/6/7 to specify MACBIAS voltage

      2.1V/2.2V/2.3V/2.4V/2.5V/2.6V/2.7V/2.8V

      Default value is "1" (2.2V).

Examples:

	}

	switch (rx_mask) {

	case 0xfffffffc:

	case 0x03:

		val |= SSI_NETWORK_DAC_RXSLOT_0_1;

		break;

	case 0xfffffff3:

	case 0x0c:

		val |= SSI_NETWORK_DAC_RXSLOT_2_3;

		break;

	case 0xffffffcf:

	case 0x30:

		val |= SSI_NETWORK_DAC_RXSLOT_4_5;

		break;

	case 0xffffff3f:

	case 0xc0:

		val |= SSI_NETWORK_DAC_RXSLOT_6_7;

		break;

	default:

	if (slots != 4)

		return -EINVAL;

	if (tx_mask != 0xfffffffc)

	if (tx_mask != 0x3)

		return -EINVAL;

	val |= (0x00 << 2);	/* primary timeslot RX/TX(?) is 0 */