drm/i915: Move FBC stuff to intel_fbc.c (7ff0ebcc) · Commits · e / devices / android_kernel_teracube_mt6765

drivers/gpu/drm/i915/Makefile

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -47,6 +47,7 @@ i915-y += intel_renderstate_gen6.o \
	i915-y += intel_audio.o \		i915-y += intel_audio.o \
	intel_bios.o \		intel_bios.o \
	intel_display.o \		intel_display.o \
			intel_fbc.o \
	intel_fifo_underrun.o \		intel_fifo_underrun.o \
	intel_frontbuffer.o \		intel_frontbuffer.o \
	intel_modes.o \		intel_modes.o \

drivers/gpu/drm/i915/i915_drv.h

+0 −3

Original line number	Original line	Diff line number	Diff line
	@@ -2963,9 +2963,6 @@ extern void intel_modeset_setup_hw_state(struct drm_device *dev,
	bool force_restore);		bool force_restore);
	extern void i915_redisable_vga(struct drm_device *dev);		extern void i915_redisable_vga(struct drm_device *dev);
	extern void i915_redisable_vga_power_on(struct drm_device *dev);		extern void i915_redisable_vga_power_on(struct drm_device *dev);
	extern bool intel_fbc_enabled(struct drm_device *dev);
	extern void bdw_fbc_sw_flush(struct drm_device *dev, u32 value);
	extern void intel_disable_fbc(struct drm_device *dev);
	extern bool ironlake_set_drps(struct drm_device *dev, u8 val);		extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
	extern void intel_init_pch_refclk(struct drm_device *dev);		extern void intel_init_pch_refclk(struct drm_device *dev);
	extern void gen6_set_rps(struct drm_device *dev, u8 val);		extern void gen6_set_rps(struct drm_device *dev, u8 val);

drivers/gpu/drm/i915/i915_suspend.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -264,7 +264,7 @@ static void i915_restore_display(struct drm_device *dev)
	}		}

	/* only restore FBC info on the platform that supports FBC*/		/* only restore FBC info on the platform that supports FBC*/
	intel_disable_fbc(dev);		intel_fbc_disable(dev);

	/* restore FBC interval */		/* restore FBC interval */
	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev))		if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev))

drivers/gpu/drm/i915/intel_display.c

+11 −11

Original line number	Original line	Diff line number	Diff line
	@@ -4201,7 +4201,7 @@ static void intel_crtc_enable_planes(struct drm_crtc *crtc)
	hsw_enable_ips(intel_crtc);		hsw_enable_ips(intel_crtc);

	mutex_lock(&dev->struct_mutex);		mutex_lock(&dev->struct_mutex);
	intel_update_fbc(dev);		intel_fbc_update(dev);
	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);

	/*		/*
	@@ -4223,7 +4223,7 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc)
	intel_crtc_wait_for_pending_flips(crtc);		intel_crtc_wait_for_pending_flips(crtc);

	if (dev_priv->fbc.plane == plane)		if (dev_priv->fbc.plane == plane)
	intel_disable_fbc(dev);		intel_fbc_disable(dev);

	hsw_disable_ips(intel_crtc);		hsw_disable_ips(intel_crtc);

	@@ -4527,7 +4527,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
	intel_update_watermarks(crtc);		intel_update_watermarks(crtc);

	mutex_lock(&dev->struct_mutex);		mutex_lock(&dev->struct_mutex);
	intel_update_fbc(dev);		intel_fbc_update(dev);
	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);
	}		}

	@@ -4584,7 +4584,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
	intel_update_watermarks(crtc);		intel_update_watermarks(crtc);

	mutex_lock(&dev->struct_mutex);		mutex_lock(&dev->struct_mutex);
	intel_update_fbc(dev);		intel_fbc_update(dev);
	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);

	if (intel_crtc_to_shared_dpll(intel_crtc))		if (intel_crtc_to_shared_dpll(intel_crtc))
	@@ -5189,7 +5189,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
	intel_update_watermarks(crtc);		intel_update_watermarks(crtc);

	mutex_lock(&dev->struct_mutex);		mutex_lock(&dev->struct_mutex);
	intel_update_fbc(dev);		intel_fbc_update(dev);
	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);
	}		}

	@@ -8950,7 +8950,7 @@ static void intel_unpin_work_fn(struct work_struct *__work)
	drm_gem_object_unreference(&work->pending_flip_obj->base);		drm_gem_object_unreference(&work->pending_flip_obj->base);
	drm_gem_object_unreference(&work->old_fb_obj->base);		drm_gem_object_unreference(&work->old_fb_obj->base);

	intel_update_fbc(dev);		intel_fbc_update(dev);

	if (work->flip_queued_req)		if (work->flip_queued_req)
	i915_gem_request_assign(&work->flip_queued_req, NULL);		i915_gem_request_assign(&work->flip_queued_req, NULL);
	@@ -9747,7 +9747,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
	i915_gem_track_fb(work->old_fb_obj, obj,		i915_gem_track_fb(work->old_fb_obj, obj,
	INTEL_FRONTBUFFER_PRIMARY(pipe));		INTEL_FRONTBUFFER_PRIMARY(pipe));

	intel_disable_fbc(dev);		intel_fbc_disable(dev);
	intel_frontbuffer_flip_prepare(dev, INTEL_FRONTBUFFER_PRIMARY(pipe));		intel_frontbuffer_flip_prepare(dev, INTEL_FRONTBUFFER_PRIMARY(pipe));
	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);

	@@ -11816,7 +11816,7 @@ intel_commit_primary_plane(struct drm_plane *plane,
	INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&		INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&
	dev_priv->fbc.plane == intel_crtc->plane &&		dev_priv->fbc.plane == intel_crtc->plane &&
	intel_plane->rotation != BIT(DRM_ROTATE_0)) {		intel_plane->rotation != BIT(DRM_ROTATE_0)) {
	intel_disable_fbc(dev);		intel_fbc_disable(dev);
	}		}

	if (state->visible) {		if (state->visible) {
	@@ -11851,7 +11851,7 @@ intel_commit_primary_plane(struct drm_plane *plane,
	intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_PRIMARY(pipe));		intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_PRIMARY(pipe));

	mutex_lock(&dev->struct_mutex);		mutex_lock(&dev->struct_mutex);
	intel_update_fbc(dev);		intel_fbc_update(dev);
	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);
	}		}
	}		}
	@@ -13050,7 +13050,7 @@ void intel_modeset_init(struct drm_device *dev)
	intel_setup_outputs(dev);		intel_setup_outputs(dev);

	/* Just in case the BIOS is doing something questionable. */		/* Just in case the BIOS is doing something questionable. */
	intel_disable_fbc(dev);		intel_fbc_disable(dev);

	drm_modeset_lock_all(dev);		drm_modeset_lock_all(dev);
	intel_modeset_setup_hw_state(dev, false);		intel_modeset_setup_hw_state(dev, false);
	@@ -13567,7 +13567,7 @@ void intel_modeset_cleanup(struct drm_device *dev)

	intel_unregister_dsm_handler();		intel_unregister_dsm_handler();

	intel_disable_fbc(dev);		intel_fbc_disable(dev);

	ironlake_teardown_rc6(dev);		ironlake_teardown_rc6(dev);

drivers/gpu/drm/i915/intel_drv.h

+7 −2

Original line number	Original line	Diff line number	Diff line
	@@ -1063,6 +1063,13 @@ static inline void intel_fbdev_restore_mode(struct drm_device *dev)
	}		}
	#endif		#endif

			/* intel_fbc.c */
			bool intel_fbc_enabled(struct drm_device *dev);
			void intel_fbc_update(struct drm_device *dev);
			void intel_fbc_init(struct drm_i915_private *dev_priv);
			void intel_fbc_disable(struct drm_device *dev);
			void bdw_fbc_sw_flush(struct drm_device *dev, u32 value);

	/* intel_hdmi.c */		/* intel_hdmi.c */
	void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port);		void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port);
	void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,		void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
	@@ -1169,8 +1176,6 @@ void intel_update_sprite_watermarks(struct drm_plane *plane,
	bool enabled, bool scaled);		bool enabled, bool scaled);
	void intel_init_pm(struct drm_device *dev);		void intel_init_pm(struct drm_device *dev);
	void intel_pm_setup(struct drm_device *dev);		void intel_pm_setup(struct drm_device *dev);
	bool intel_fbc_enabled(struct drm_device *dev);
	void intel_update_fbc(struct drm_device *dev);
	void intel_gpu_ips_init(struct drm_i915_private *dev_priv);		void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
	void intel_gpu_ips_teardown(void);		void intel_gpu_ips_teardown(void);
	void intel_init_gt_powersave(struct drm_device *dev);		void intel_init_gt_powersave(struct drm_device *dev);