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Commit 7d1a83cb authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: assert_panel_unlocked() in chv_enable_pll() 



Supposedly the power sequencer still locks out the DPLL registers on
CHV, so let's issue a warning if it's still locked when enabling the
DPLL.

Also drop the redundant IS_MOBILE() check for VLV when we check the same
thing.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458052809-23426-6-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 8bd3f301

drivers/gpu/drm/i915/intel_display.c

+4 −2
Original line number Original line Diff line number Diff line
@@ -1535,7 +1535,6 @@ static void vlv_enable_pll(struct intel_crtc *crtc, 
	assert_pipe_disabled(dev_priv, pipe);

	assert_pipe_disabled(dev_priv, pipe);





	/* PLL is protected by panel, make sure we can write it */

	/* PLL is protected by panel, make sure we can write it */

	if (IS_MOBILE(dev_priv->dev))

	assert_panel_unlocked(dev_priv, pipe);

	assert_panel_unlocked(dev_priv, pipe);





	I915_WRITE(reg, dpll);

	I915_WRITE(reg, dpll);
@@ -1571,6 +1570,9 @@ static void chv_enable_pll(struct intel_crtc *crtc, 




	assert_pipe_disabled(dev_priv, pipe);

	assert_pipe_disabled(dev_priv, pipe);





	/* PLL is protected by panel, make sure we can write it */

	assert_panel_unlocked(dev_priv, pipe);



	mutex_lock(&dev_priv->sb_lock);

	mutex_lock(&dev_priv->sb_lock);





	/* Enable back the 10bit clock to display controller */

	/* Enable back the 10bit clock to display controller */