Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7beba565 authored by Fabrice Gasnier's avatar Fabrice Gasnier Committed by Alexandre Torgue
Browse files

ARM: dts: stm32: Add DFSDM support to stm32mp157c 



stm32mp157c has DFSDM (Digital Filter For Sigma Delta Modulators) hardware
with 6 filter instances.

Signed-off-by: default avatarFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
parent 2dca7899

arch/arm/boot/dts/stm32mp157c.dtsi

+70 −0
Original line number Diff line number Diff line
@@ -556,6 +556,76 @@ 
			};

		};



		dfsdm: dfsdm@4400d000 {

			compatible = "st,stm32mp1-dfsdm";

			reg = <0x4400d000 0x800>;

			clocks = <&rcc DFSDM_K>;

			clock-names = "dfsdm";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";



			dfsdm0: filter@0 {

				compatible = "st,stm32-dfsdm-adc";

				#io-channel-cells = <1>;

				reg = <0>;

				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&dmamux1 101 0x400 0x01>;

				dma-names = "rx";

				status = "disabled";

			};



			dfsdm1: filter@1 {

				compatible = "st,stm32-dfsdm-adc";

				#io-channel-cells = <1>;

				reg = <1>;

				interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&dmamux1 102 0x400 0x01>;

				dma-names = "rx";

				status = "disabled";

			};



			dfsdm2: filter@2 {

				compatible = "st,stm32-dfsdm-adc";

				#io-channel-cells = <1>;

				reg = <2>;

				interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&dmamux1 103 0x400 0x01>;

				dma-names = "rx";

				status = "disabled";

			};



			dfsdm3: filter@3 {

				compatible = "st,stm32-dfsdm-adc";

				#io-channel-cells = <1>;

				reg = <3>;

				interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&dmamux1 104 0x400 0x01>;

				dma-names = "rx";

				status = "disabled";

			};



			dfsdm4: filter@4 {

				compatible = "st,stm32-dfsdm-adc";

				#io-channel-cells = <1>;

				reg = <4>;

				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&dmamux1 91 0x400 0x01>;

				dma-names = "rx";

				status = "disabled";

			};



			dfsdm5: filter@5 {

				compatible = "st,stm32-dfsdm-adc";

				#io-channel-cells = <1>;

				reg = <5>;

				interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&dmamux1 92 0x400 0x01>;

				dma-names = "rx";

				status = "disabled";

			};

		};



		m_can1: can@4400e000 {

			compatible = "bosch,m_can";

			reg = <0x4400e000 0x400>, <0x44011000 0x2800>;