Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7b401850 authored by Gavin Shan's avatar Gavin Shan Committed by Benjamin Herrenschmidt
Browse files

powerpc/eeh: EEH_PE_ISOLATED not reflect HW state 



When doing PE reset, EEH_PE_ISOLATED is cleared unconditionally.
However, We should remove that if the PE reset has cleared the
frozen state successfully. Otherwise, the flag should be kept.
The patch fixes the issue.

Signed-off-by: default avatarGavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent b34497d1

arch/powerpc/kernel/eeh.c

+3 −7
Original line number Diff line number Diff line
@@ -612,12 +612,6 @@ static void eeh_reset_pe_once(struct eeh_pe *pe) 
#define PCI_BUS_RST_HOLD_TIME_MSEC 250

	msleep(PCI_BUS_RST_HOLD_TIME_MSEC);



	/* We might get hit with another EEH freeze as soon as the

	 * pci slot reset line is dropped. Make sure we don't miss

	 * these, and clear the flag now.

	 */

	eeh_pe_state_clear(pe, EEH_PE_ISOLATED);



	eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);



	/* After a PCI slot has been reset, the PCI Express spec requires
@@ -646,8 +640,10 @@ int eeh_reset_pe(struct eeh_pe *pe) 
		eeh_reset_pe_once(pe);



		rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);

		if ((rc & flags) == flags)

		if ((rc & flags) == flags) {

			eeh_pe_state_clear(pe, EEH_PE_ISOLATED);

			return 0;

		}



		if (rc < 0) {

			pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",