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Commit 77719d28 authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrement 



This W/A is put in a gen9 specific function because it may well be
needed on other gen9 platforms.

Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 183c6dac

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -5285,6 +5285,9 @@ enum skl_disp_power_wells { 
#define HSW_SCRATCH1				0xb038

#define HSW_SCRATCH1				0xb038

#define  HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE	(1<<27)

#define  HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE	(1<<27)





#define BDW_SCRATCH1					0xb11c

#define  GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE	(1<<2)



/* PCH */

/* PCH */





/* south display engine interrupt: IBX */

/* south display engine interrupt: IBX */

drivers/gpu/drm/i915/intel_pm.c

+11 −0
Original line number Original line Diff line number Diff line
@@ -52,10 +52,21 @@ 
#define INTEL_RC6p_ENABLE			(1<<1)

#define INTEL_RC6p_ENABLE			(1<<1)

#define INTEL_RC6pp_ENABLE			(1<<2)

#define INTEL_RC6pp_ENABLE			(1<<2)





static void gen9_init_clock_gating(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	/* WaEnableLbsSlaRetryTimerDecrement:skl */

	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |

		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);

}



static void skl_init_clock_gating(struct drm_device *dev)

static void skl_init_clock_gating(struct drm_device *dev)

{

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;





	gen9_init_clock_gating(dev);



	if (INTEL_REVID(dev) == SKL_REVID_A0) {

	if (INTEL_REVID(dev) == SKL_REVID_A0) {

		/*

		/*

		 * WaDisableSDEUnitClockGating:skl

		 * WaDisableSDEUnitClockGating:skl