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Commit 70cd071e authored by Tejun Heo's avatar Tejun Heo Committed by Jeff Garzik
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libata: clean up xfermode / PATA timing related stuff



* s/ATA_BITS_(PIO|MWDMA|UDMA)/ATA_NR_\1_MODES/g

* Consistently use 0xff to indicate invalid transfer mode (0x00 is
  valid for PIO_SLOW).

* Make ata_xfer_mode2mask() return proper mode mask instead of just
  the highest bit.

* Sort ata_timing table in increasing xfermode order and update
  ata_timing_find_mode() accordingly.

This patch doesn't introduce any behavior change.

Signed-off-by: default avatarTejun Heo <htejun@gmail.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 6357357c
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+40 −42
Original line number Original line Diff line number Diff line
@@ -487,9 +487,9 @@ static const struct ata_xfer_ent {
	int shift, bits;
	int shift, bits;
	u8 base;
	u8 base;
} ata_xfer_tbl[] = {
} ata_xfer_tbl[] = {
	{ ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
	{ ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
	{ ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
	{ ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
	{ ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
	{ ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
	{ -1, },
	{ -1, },
};
};


@@ -504,7 +504,7 @@ static const struct ata_xfer_ent {
 *	None.
 *	None.
 *
 *
 *	RETURNS:
 *	RETURNS:
 *	Matching XFER_* value, 0 if no match found.
 *	Matching XFER_* value, 0xff if no match found.
 */
 */
u8 ata_xfer_mask2mode(unsigned int xfer_mask)
u8 ata_xfer_mask2mode(unsigned int xfer_mask)
{
{
@@ -514,7 +514,7 @@ u8 ata_xfer_mask2mode(unsigned int xfer_mask)
	for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
	for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
		if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
		if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
			return ent->base + highbit - ent->shift;
			return ent->base + highbit - ent->shift;
	return 0;
	return 0xff;
}
}


/**
/**
@@ -535,7 +535,8 @@ unsigned int ata_xfer_mode2mask(u8 xfer_mode)


	for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
	for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
		if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
		if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
			return 1 << (ent->shift + xfer_mode - ent->base);
			return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
				& ~((1 << ent->shift) - 1);
	return 0;
	return 0;
}
}


@@ -1314,7 +1315,7 @@ void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
	/* Select the mode in use */
	/* Select the mode in use */
	mode = ata_xfer_mask2mode(mask);
	mode = ata_xfer_mask2mode(mask);


	if (mode != 0) {
	if (mode != 0xff) {
		ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
		ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
		       ata_mode_string(mask));
		       ata_mode_string(mask));
	} else {
	} else {
@@ -2788,38 +2789,33 @@ int sata_set_spd(struct ata_link *link)
 */
 */


static const struct ata_timing ata_timing[] = {
static const struct ata_timing ata_timing[] = {
/*	{ XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960,   0 }, */
	{ XFER_PIO_0,     70, 290, 240, 600, 165, 150, 600,   0 },
	{ XFER_PIO_1,     50, 290,  93, 383, 125, 100, 383,   0 },
	{ XFER_PIO_2,     30, 290,  40, 330, 100,  90, 240,   0 },
	{ XFER_PIO_3,     30,  80,  70, 180,  80,  70, 180,   0 },
	{ XFER_PIO_4,     25,  70,  25, 120,  70,  25, 120,   0 },
	{ XFER_PIO_5,     15,  65,  25, 100,  65,  25, 100,   0 },
	{ XFER_PIO_6,     10,  55,  20,  80,  55,  20,  80,   0 },


	{ XFER_UDMA_6,     0,   0,   0,   0,   0,   0,   0,  15 },
	{ XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 960,   0 },
	{ XFER_UDMA_5,     0,   0,   0,   0,   0,   0,   0,  20 },
	{ XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 480,   0 },
	{ XFER_UDMA_4,     0,   0,   0,   0,   0,   0,   0,  30 },
	{ XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 240,   0 },
	{ XFER_UDMA_3,     0,   0,   0,   0,   0,   0,   0,  45 },


	{ XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20,  80,   0 },
	{ XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 480,   0 },
	{ XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 150,   0 },
	{ XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 120,   0 },
	{ XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 100,   0 },
	{ XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 100,   0 },
	{ XFER_UDMA_2,     0,   0,   0,   0,   0,   0,   0,  60 },
	{ XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20,  80,   0 },
	{ XFER_UDMA_1,     0,   0,   0,   0,   0,   0,   0,  80 },
	{ XFER_UDMA_0,     0,   0,   0,   0,   0,   0,   0, 120 },


/*	{ XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0,   0, 150 }, */
/*	{ XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0,   0, 150 }, */

	{ XFER_UDMA_0,     0,   0,   0,   0,   0,   0,   0, 120 },
	{ XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 120,   0 },
	{ XFER_UDMA_1,     0,   0,   0,   0,   0,   0,   0,  80 },
	{ XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 150,   0 },
	{ XFER_UDMA_2,     0,   0,   0,   0,   0,   0,   0,  60 },
	{ XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 480,   0 },
	{ XFER_UDMA_3,     0,   0,   0,   0,   0,   0,   0,  45 },

	{ XFER_UDMA_4,     0,   0,   0,   0,   0,   0,   0,  30 },
	{ XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 240,   0 },
	{ XFER_UDMA_5,     0,   0,   0,   0,   0,   0,   0,  20 },
	{ XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 480,   0 },
	{ XFER_UDMA_6,     0,   0,   0,   0,   0,   0,   0,  15 },
	{ XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 960,   0 },

	{ XFER_PIO_6,     10,  55,  20,  80,  55,  20,  80,   0 },
	{ XFER_PIO_5,     15,  65,  25, 100,  65,  25, 100,   0 },
	{ XFER_PIO_4,     25,  70,  25, 120,  70,  25, 120,   0 },
	{ XFER_PIO_3,     30,  80,  70, 180,  80,  70, 180,   0 },

	{ XFER_PIO_2,     30, 290,  40, 330, 100,  90, 240,   0 },
	{ XFER_PIO_1,     50, 290,  93, 383, 125, 100, 383,   0 },
	{ XFER_PIO_0,     70, 290, 240, 600, 165, 150, 600,   0 },

/*	{ XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960,   0 }, */


	{ 0xFF }
	{ 0xFF }
};
};
@@ -2854,12 +2850,14 @@ void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,


const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
{
{
	const struct ata_timing *t;
	const struct ata_timing *t = ata_timing;


	for (t = ata_timing; t->mode != xfer_mode; t++)
	while (xfer_mode > t->mode)
		if (t->mode == 0xFF)
		t++;
			return NULL;

	if (xfer_mode == t->mode)
		return t;
		return t;
	return NULL;
}
}


int ata_timing_compute(struct ata_device *adev, unsigned short speed,
int ata_timing_compute(struct ata_device *adev, unsigned short speed,
@@ -3122,7 +3120,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
		dev->dma_mode = ata_xfer_mask2mode(dma_mask);
		dev->dma_mode = ata_xfer_mask2mode(dma_mask);


		found = 1;
		found = 1;
		if (dev->dma_mode)
		if (dev->dma_mode != 0xff)
			used_dma = 1;
			used_dma = 1;
	}
	}
	if (!found)
	if (!found)
@@ -3133,7 +3131,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
		if (!ata_dev_enabled(dev))
		if (!ata_dev_enabled(dev))
			continue;
			continue;


		if (!dev->pio_mode) {
		if (dev->pio_mode == 0xff) {
			ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
			ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
			rc = -EINVAL;
			rc = -EINVAL;
			goto out;
			goto out;
@@ -3147,7 +3145,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)


	/* step 3: set host DMA timings */
	/* step 3: set host DMA timings */
	ata_link_for_each_dev(dev, link) {
	ata_link_for_each_dev(dev, link) {
		if (!ata_dev_enabled(dev) || !dev->dma_mode)
		if (!ata_dev_enabled(dev) || dev->dma_mode == 0xff)
			continue;
			continue;


		dev->xfer_mode = dev->dma_mode;
		dev->xfer_mode = dev->dma_mode;
+12 −9
Original line number Original line Diff line number Diff line
@@ -269,17 +269,20 @@ enum {
	/* encoding various smaller bitmaps into a single
	/* encoding various smaller bitmaps into a single
	 * unsigned int bitmap
	 * unsigned int bitmap
	 */
	 */
	ATA_BITS_PIO		= 7,
	ATA_NR_PIO_MODES	= 7,
	ATA_BITS_MWDMA		= 5,
	ATA_NR_MWDMA_MODES	= 5,
	ATA_BITS_UDMA		= 8,
	ATA_NR_UDMA_MODES	= 8,


	ATA_SHIFT_PIO		= 0,
	ATA_SHIFT_PIO		= 0,
	ATA_SHIFT_MWDMA		= ATA_SHIFT_PIO + ATA_BITS_PIO,
	ATA_SHIFT_MWDMA		= ATA_SHIFT_PIO + ATA_NR_PIO_MODES,
	ATA_SHIFT_UDMA		= ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
	ATA_SHIFT_UDMA		= ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES,


	ATA_MASK_PIO		= ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
	ATA_MASK_PIO		= ((1 << ATA_NR_PIO_MODES) - 1)
	ATA_MASK_MWDMA		= ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
					<< ATA_SHIFT_PIO,
	ATA_MASK_UDMA		= ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
	ATA_MASK_MWDMA		= ((1 << ATA_NR_MWDMA_MODES) - 1)
					<< ATA_SHIFT_MWDMA,
	ATA_MASK_UDMA		= ((1 << ATA_NR_UDMA_MODES) - 1)
					<< ATA_SHIFT_UDMA,


	/* size of buffer to pad xfers ending on unaligned boundaries */
	/* size of buffer to pad xfers ending on unaligned boundaries */
	ATA_DMA_PAD_SZ		= 4,
	ATA_DMA_PAD_SZ		= 4,