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Commit 5d190c40 authored by Tony Lindgren's avatar Tony Lindgren
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omap2+: Initialize omap_irq_base for entry-macro.S from platform code



This way we can use the generic omap SoC detection code instead.

Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 03a9e512
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+15 −29
Original line number Original line Diff line number Diff line
@@ -38,41 +38,27 @@
 */
 */


#ifdef MULTI_OMAP2
#ifdef MULTI_OMAP2

/*
 * We use __glue to avoid errors with multiple definitions of
 * .globl omap_irq_base as it's included from entry-armv.S but not
 * from entry-common.S.
 */
#ifdef __glue
		.pushsection .data
		.pushsection .data
omap_irq_base:	.word	0
		.globl	omap_irq_base
omap_irq_base:
		.word	0
		.popsection
		.popsection
#endif


		/* Configure the interrupt base on the first interrupt */
		/*
		 * Configure the interrupt base on the first interrupt.
		 * See also omap_irq_base_init for setting omap_irq_base.
		 */
		.macro  get_irqnr_preamble, base, tmp
		.macro  get_irqnr_preamble, base, tmp
9:
		ldr	\base, =omap_irq_base	@ irq base address
		ldr	\base, =omap_irq_base	@ irq base address
		ldr	\base, [\base, #0]	@ irq base value
		ldr	\base, [\base, #0]	@ irq base value
		cmp	\base, #0		@ already configured?
		bne	9997f			@ nothing to do

		mrc	p15, 0, \tmp, c0, c0, 0	@ get processor revision
		and	\tmp, \tmp, #0x000f0000	@ only check architecture
		cmp	\tmp, #0x00070000	@ is v6?
		beq	2400f			@ found v6 so it's omap24xx
		mrc	p15, 0, \tmp, c0, c0, 0	@ get processor revision
		and	\tmp, \tmp, #0x000000f0	@ check cortex 8 or 9
		cmp	\tmp, #0x00000080	@ cortex A-8?
		beq	3400f			@ found A-8 so it's omap34xx
		cmp	\tmp, #0x00000090	@ cortex A-9?
		beq	4400f			@ found A-9 so it's omap44xx
2400:		ldr	\base, =OMAP2_IRQ_BASE
		ldr	\tmp, =omap_irq_base
		str	\base, [\tmp, #0]
		b	9b
3400:		ldr	\base, =OMAP3_IRQ_BASE
		ldr	\tmp, =omap_irq_base
		str	\base, [\tmp, #0]
		b	9b
4400:		ldr	\base, =OMAP4_IRQ_BASE
		ldr	\tmp, =omap_irq_base
		str	\base, [\tmp, #0]
		b	9b
9997:
		.endm
		.endm


		/* Check the pending interrupts. Note that base already set */
		/* Check the pending interrupts. Note that base already set */
+22 −0
Original line number Original line Diff line number Diff line
@@ -46,6 +46,7 @@
#include "clockdomains.h"
#include "clockdomains.h"


#include <plat/omap_hwmod.h>
#include <plat/omap_hwmod.h>
#include <plat/multi.h>


/*
/*
 * The machine specific code may provide the extra mapping besides the
 * The machine specific code may provide the extra mapping besides the
@@ -311,6 +312,25 @@ static int __init _omap2_init_reprogram_sdrc(void)
	return v;
	return v;
}
}


/*
 * Initialize asm_irq_base for entry-macro.S
 */
static inline void omap_irq_base_init(void)
{
	extern void __iomem *omap_irq_base;

#ifdef MULTI_OMAP2
	if (cpu_is_omap242x())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
	else if (cpu_is_omap34xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
	else if (cpu_is_omap44xx())
		omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
	else
		pr_err("Could not initialize omap_irq_base\n");
#endif
}

void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
				 struct omap_sdrc_params *sdrc_cs1)
				 struct omap_sdrc_params *sdrc_cs1)
{
{
@@ -352,4 +372,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
		_omap2_init_reprogram_sdrc();
		_omap2_init_reprogram_sdrc();
	}
	}
	gpmc_init();
	gpmc_init();

	omap_irq_base_init();
}
}