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Commit 5a5c7432 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/timer: port to subdev interfaces 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 7d9115de

drivers/gpu/drm/nouveau/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -75,6 +75,7 @@ nouveau-y += core/subdev/mc/nv44.o 
nouveau-y += core/subdev/mc/nv50.o

nouveau-y += core/subdev/mc/nv50.o

nouveau-y += core/subdev/mc/nv98.o

nouveau-y += core/subdev/mc/nv98.o

nouveau-y += core/subdev/mc/nvc0.o

nouveau-y += core/subdev/mc/nvc0.o

nouveau-y += core/subdev/timer/base.o

nouveau-y += core/subdev/timer/nv04.o

nouveau-y += core/subdev/timer/nv04.o

nouveau-y += core/subdev/vm/base.o

nouveau-y += core/subdev/vm/base.o

nouveau-y += core/subdev/vm/nv50.o

nouveau-y += core/subdev/vm/nv50.o

drivers/gpu/drm/nouveau/core/engine/graph/nv50.c

+2 −3
Original line number Original line Diff line number Diff line
@@ -224,7 +224,6 @@ static void 
nv84_graph_tlb_flush(struct drm_device *dev, int engine)

nv84_graph_tlb_flush(struct drm_device *dev, int engine)

{

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;

	bool idle, timeout = false;

	bool idle, timeout = false;

	unsigned long flags;

	unsigned long flags;

	u64 start;

	u64 start;
@@ -233,7 +232,7 @@ nv84_graph_tlb_flush(struct drm_device *dev, int engine) 
	spin_lock_irqsave(&dev_priv->context_switch_lock, flags);

	spin_lock_irqsave(&dev_priv->context_switch_lock, flags);

	nv_mask(dev, 0x400500, 0x00000001, 0x00000000);

	nv_mask(dev, 0x400500, 0x00000001, 0x00000000);





	start = ptimer->read(dev);

	start = nv_timer_read(dev);

	do {

	do {

		idle = true;

		idle = true;
@@ -251,7 +250,7 @@ nv84_graph_tlb_flush(struct drm_device *dev, int engine) 
			if ((tmp & 7) == 1)

			if ((tmp & 7) == 1)

				idle = false;

				idle = false;

		}

		}

	} while (!idle && !(timeout = ptimer->read(dev) - start > 2000000000));

	} while (!idle && !(timeout = nv_timer_read(dev) - start > 2000000000));





	if (timeout) {

	if (timeout) {

		NV_ERROR(dev, "PGRAPH TLB flush idle timeout fail: "

		NV_ERROR(dev, "PGRAPH TLB flush idle timeout fail: "

drivers/gpu/drm/nouveau/core/include/subdev/timer.h

0 → 100644
+53 −0
Original line number Original line Diff line number Diff line 
#ifndef __NOUVEAU_TIMER_H__

#define __NOUVEAU_TIMER_H__



#include <core/subdev.h>

#include <core/device.h>



struct nouveau_alarm {

	struct list_head head;

	u64 timestamp;

	void (*func)(struct nouveau_alarm *);

};



bool nouveau_timer_wait_eq(void *, u64 nsec, u32 addr, u32 mask, u32 data);

bool nouveau_timer_wait_ne(void *, u64 nsec, u32 addr, u32 mask, u32 data);

bool nouveau_timer_wait_cb(void *, u64 nsec, bool (*func)(void *), void *data);

void nouveau_timer_alarm(void *, u32 nsec, struct nouveau_alarm *);



#define NV_WAIT_DEFAULT 2000000000ULL

#define nv_wait(o,a,m,v)                                                       \

	nouveau_timer_wait_eq((o), NV_WAIT_DEFAULT, (a), (m), (v))

#define nv_wait_ne(o,a,m,v)                                                    \

	nouveau_timer_wait_ne((o), NV_WAIT_DEFAULT, (a), (m), (v))

#define nv_wait_cb(o,a,m,v)                                                    \

	nouveau_timer_wait_cb((o), NV_WAIT_DEFAULT, (a), (m), (v))



struct nouveau_timer {

	struct nouveau_subdev base;

	u64  (*read)(struct nouveau_timer *);

	void (*alarm)(struct nouveau_timer *, u32 time, struct nouveau_alarm *);

};



static inline struct nouveau_timer *

nouveau_timer(void *obj)

{

	return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_TIMER];

}



#define nouveau_timer_create(p,e,o,d)                                          \

	nouveau_subdev_create_((p), (e), (o), 0, "PTIMER", "timer",            \

			       sizeof(**d), (void **)d)

#define nouveau_timer_destroy(p)                                               \

	nouveau_subdev_destroy(&(p)->base)

#define nouveau_timer_init(p)                                                  \

	nouveau_subdev_init(&(p)->base)

#define nouveau_timer_fini(p,s)                                                \

	nouveau_subdev_fini(&(p)->base, (s))



int nouveau_timer_create_(struct nouveau_object *, struct nouveau_engine *,

			  struct nouveau_oclass *, int size, void **);



extern struct nouveau_oclass nv04_timer_oclass;



#endif

drivers/gpu/drm/nouveau/core/subdev/device/nv04.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -28,6 +28,7 @@ 
#include <subdev/clock.h>

#include <subdev/clock.h>

#include <subdev/devinit.h>

#include <subdev/devinit.h>

#include <subdev/mc.h>

#include <subdev/mc.h>

#include <subdev/timer.h>





int

int

nv04_identify(struct nouveau_device *device)

nv04_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nv04_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv04_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv04_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x05:

	case 0x05:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nv04_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv05_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv05_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	default:

	default:

		nv_fatal(device, "unknown RIVA chipset\n");

		nv_fatal(device, "unknown RIVA chipset\n");

drivers/gpu/drm/nouveau/core/subdev/device/nv10.c

+9 −0
Original line number Original line Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include <subdev/clock.h>

#include <subdev/clock.h>

#include <subdev/devinit.h>

#include <subdev/devinit.h>

#include <subdev/mc.h>

#include <subdev/mc.h>

#include <subdev/timer.h>





int

int

nv10_identify(struct nouveau_device *device)

nv10_identify(struct nouveau_device *device)
@@ -41,6 +42,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x15:

	case 0x15:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -49,6 +51,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x16:

	case 0x16:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -57,6 +60,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x1a:

	case 0x1a:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -65,6 +69,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x11:

	case 0x11:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -73,6 +78,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x17:

	case 0x17:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -81,6 +87,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x1f:

	case 0x1f:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -89,6 +96,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	case 0x18:

	case 0x18:

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -97,6 +105,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		break;

		break;

	default:

	default:

		nv_fatal(device, "unknown Celsius chipset\n");

		nv_fatal(device, "unknown Celsius chipset\n");