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Commit 56e57cb6 authored Aug 30, 2016 by Andrew Jeffery Committed by Linus Walleij Sep 07, 2016

pinctrl: Add pinctrl-aspeed-g5 driver

A small subset of pins and functions are exposed. The selection of pins
and functions is driven by the development of OpenBMC[1] on the
AST2500 SoC, particularly around booting the IBM Witherspoon platform.

[1] https://github.com/openbmc/docs



Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

parent 524594d4

drivers/pinctrl/aspeed/Kconfig

+8 −0

Original line number	Diff line number	Diff line
		@@ -14,3 +14,11 @@ config PINCTRL_ASPEED_G4
		help
		Say Y here to enable pin controller support for Aspeed's 4th
		generation SoCs. GPIO is provided by a separate GPIO driver.

		config PINCTRL_ASPEED_G5
		bool "Aspeed G5 SoC pin control"
		depends on (MACH_ASPEED_G5 \|\| COMPILE_TEST) && OF
		select PINCTRL_ASPEED
		help
		Say Y here to enable pin controller support for Aspeed's 5th
		generation SoCs. GPIO is provided by a separate GPIO driver.

drivers/pinctrl/aspeed/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -3,3 +3,4 @@
		ccflags-y += -Woverride-init
		obj-$(CONFIG_PINCTRL_ASPEED) += pinctrl-aspeed.o
		obj-$(CONFIG_PINCTRL_ASPEED_G4) += pinctrl-aspeed-g4.o
		obj-$(CONFIG_PINCTRL_ASPEED_G5) += pinctrl-aspeed-g5.o

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

0 → 100644

+808 −0

File added.

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