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Commit 4feed0eb authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915: Ensure the HW is powered during HW access in assert_pipe 



The assumption when adding the intel_display_power_is_enabled() checks
was that if it returns success the power can't be turned off afterwards
during the HW access, which is guaranteed by modeset locks. This isn't
always true, so make sure we hold a dedicated reference for the time of
the access.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1455296121-4742-6-git-send-email-imre.deak@intel.com
parent 6392f847

drivers/gpu/drm/i915/intel_display.c

+7 −4
Original line number Diff line number Diff line
@@ -1343,18 +1343,21 @@ void assert_pipe(struct drm_i915_private *dev_priv, 
	bool cur_state;

	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,

								      pipe);

	enum intel_display_power_domain power_domain;



	/* if we need the pipe quirk it must be always on */

	if ((pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) ||

	    (pipe == PIPE_B && dev_priv->quirks & QUIRK_PIPEB_FORCE))

		state = true;



	if (!intel_display_power_is_enabled(dev_priv,

				POWER_DOMAIN_TRANSCODER(cpu_transcoder))) {

		cur_state = false;

	} else {

	power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);

	if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {

		u32 val = I915_READ(PIPECONF(cpu_transcoder));

		cur_state = !!(val & PIPECONF_ENABLE);



		intel_display_power_put(dev_priv, power_domain);

	} else {

		cur_state = false;

	}



	I915_STATE_WARN(cur_state != state,