Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4e8ab361 authored by Yoichi Yuasa's avatar Yoichi Yuasa Committed by Ralf Baechle
Browse files

[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80. 



Signed-off-by: default avatarYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent f72af3cf

arch/mips/mm/c-r4k.c

+3 −1
Original line number Original line Diff line number Diff line
@@ -868,7 +868,9 @@ static void __init probe_pcache(void) 
		if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||

		if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||

		    c->processor_id == 0x0c82U) {

		    c->processor_id == 0x0c82U) {

			config &= ~0x00000030U;

			config &= ~0x00000030U;

			config |= 0x00410000U;

			config |= 0x00400000U;

			if (c->processor_id == 0x0c80U)

				config |= VR41_CONF_BP;

			write_c0_config(config);

			write_c0_config(config);

		}

		}

		icache_size = 1 << (10 + ((config & CONF_IC) >> 9));

		icache_size = 1 << (10 + ((config & CONF_IC) >> 9));

include/asm-mips/mipsregs.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -470,6 +470,7 @@ 




/* Bits specific to the VR41xx.  */

/* Bits specific to the VR41xx.  */

#define VR41_CONF_CS		(_ULCAST_(1) << 12)

#define VR41_CONF_CS		(_ULCAST_(1) << 12)

#define VR41_CONF_BP		(_ULCAST_(1) << 16)

#define VR41_CONF_M16		(_ULCAST_(1) << 20)

#define VR41_CONF_M16		(_ULCAST_(1) << 20)

#define VR41_CONF_AD		(_ULCAST_(1) << 23)

#define VR41_CONF_AD		(_ULCAST_(1) << 23)