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Commit 4e74663c authored by Dominik Brodowski's avatar Dominik Brodowski Committed by Dave Jones
Browse files

[CPUFREQ] p4-clockmod: add more CPUs 



Several more Intel CPUs are now capable using the p4-clockmod cpufreq
driver. As it is of limited use most of the time, print a big bold warning
if a better cpufreq driver might be available.

Signed-off-by: default avatarDominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: default avatarDave Jones <davej@redhat.com>
parent e08f5f5b

arch/i386/kernel/cpu/cpufreq/p4-clockmod.c

+18 −20
Original line number Diff line number Diff line
@@ -163,29 +163,27 @@ static int cpufreq_p4_verify(struct cpufreq_policy *policy) 


static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)

{

	if ((c->x86 == 0x06) && (c->x86_model == 0x09)) {

		/* Pentium M (Banias) */

		printk(KERN_WARNING PFX "Warning: Pentium M detected. "

		       "The speedstep_centrino module offers voltage scaling"

	if (c->x86 == 0x06) {

		if (cpu_has(c, X86_FEATURE_EST))

			printk(KERN_WARNING PFX "Warning: EST-capable CPU detected. "

			       "The acpi-cpufreq module offers voltage scaling"

			       " in addition of frequency scaling. You should use "

			       "that instead of p4-clockmod, if possible.\n");

		return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);

	}



	if ((c->x86 == 0x06) && (c->x86_model == 0x0D)) {

		/* Pentium M (Dothan) */

		printk(KERN_WARNING PFX "Warning: Pentium M detected. "

		       "The speedstep_centrino module offers voltage scaling"

		       " in addition of frequency scaling. You should use "

		       "that instead of p4-clockmod, if possible.\n");

		/* on P-4s, the TSC runs with constant frequency independent whether

		 * throttling is active or not. */

		switch (c->x86_model) {

		case 0x0E: /* Core */

		case 0x0F: /* Core Duo */

			p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;

			return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PCORE);

		case 0x0D: /* Pentium M (Dothan) */

			p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;

			/* fall through */

		case 0x09: /* Pentium M (Banias) */

			return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);

		}

	}



	if (c->x86 != 0xF) {

		printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <linux@brodo.de>\n");

		printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <cpufreq@lists.linux.org.uk>\n");

		return 0;

	}

arch/i386/kernel/cpu/cpufreq/speedstep-lib.c

+32 −0
Original line number Diff line number Diff line
@@ -123,6 +123,36 @@ static unsigned int pentiumM_get_frequency(void) 
	return (msr_tmp * 100 * 1000);

}



static unsigned int pentium_core_get_frequency(void)

{

	u32 fsb = 0;

	u32 msr_lo, msr_tmp;



	rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);

	/* see table B-2 of 24547212.pdf */

	switch (msr_lo & 0x07) {

	case 5:

		fsb = 400;

		break;

	case 1:

		fsb = 533;

		break;

	case 3:

		fsb = 667;

		break;

	default:

		printk(KERN_ERR "PCORE - MSR_FSB_FREQ undefined value");

	}



	rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);

	dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);



	msr_tmp = (msr_lo >> 22) & 0x1f;

	dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * fsb * 1000));



	return (msr_tmp * fsb * 1000);

}





static unsigned int pentium4_get_frequency(void)

{
@@ -174,6 +204,8 @@ static unsigned int pentium4_get_frequency(void) 
unsigned int speedstep_get_processor_frequency(unsigned int processor)

{

	switch (processor) {

	case SPEEDSTEP_PROCESSOR_PCORE:

		return pentium_core_get_frequency();

	case SPEEDSTEP_PROCESSOR_PM:

		return pentiumM_get_frequency();

	case SPEEDSTEP_PROCESSOR_P4D:

arch/i386/kernel/cpu/cpufreq/speedstep-lib.h

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
 * the speedstep_get_processor_frequency() call. */

#define SPEEDSTEP_PROCESSOR_PM			0xFFFFFF03  /* Pentium M  */

#define SPEEDSTEP_PROCESSOR_P4D			0xFFFFFF04  /* desktop P4  */

#define SPEEDSTEP_PROCESSOR_PCORE		0xFFFFFF05  /* Core */



/* speedstep states -- only two of them */

include/asm-i386/msr.h

+2 −0
Original line number Diff line number Diff line
@@ -95,6 +95,8 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) 


#define MSR_P6_PERFCTR0		0xc1

#define MSR_P6_PERFCTR1		0xc2

#define MSR_FSB_FREQ		0xcd





#define MSR_IA32_BBL_CR_CTL		0x119